1 /****************************************************************************** 2 * 3 * Copyright(c) 2016 - 2017 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 #ifndef __INC_PHYDM_API_H_8821C__ 16 #define __INC_PHYDM_API_H_8821C__ 17 18 #if (RTL8821C_SUPPORT == 1) 19 20 #define PHY_CONFIG_VERSION_8821C "3.1.27" /*2017.08.08 (HW user guide version: R03, SW user guide version: R01, Modification: R27)*/ 21 22 #define INVALID_RF_DATA 0xffffffff 23 #define INVALID_TXAGC_DATA 0xff 24 25 #define config_phydm_read_rf_check_8821c(data) (data != INVALID_RF_DATA) 26 #define config_phydm_read_txagc_check_8821c(data) (data != INVALID_TXAGC_DATA) 27 28 #define PSD_VAL_NUM_8821C 5 29 #define PSD_SMP_NUM_8821C 3 30 #define FREQ_PT_5G_NUM_8821C 3 31 32 enum rf_set_8821c { 33 SWITCH_TO_BTG = 0x0, 34 SWITCH_TO_WLG = 0x1, 35 SWITCH_TO_WLA = 0x2, 36 SWITCH_TO_BT = 0x3 37 }; 38 39 enum ant_num_8821c { 40 SWITCH_TO_ANT1 = 0x0, 41 SWITCH_TO_ANT2 = 0x1 42 }; 43 44 enum ant_num_map_8821c { 45 BOTH_AVAILABLE = 0x1, 46 ONLY_ANT1 = 0x2, 47 ONLY_ANT2 = 0x3, 48 DONT_CARE = 0x4 49 }; 50 51 s8 phydm_cck_rssi_8821c(struct dm_struct *dm, u8 lna_idx, u8 vga_idx); 52 53 u32 config_phydm_read_rf_reg_8821c(struct dm_struct *dm, enum rf_path path, 54 u32 reg_addr, u32 bit_mask); 55 56 boolean 57 config_phydm_write_rf_reg_8821c(struct dm_struct *dm, enum rf_path path, 58 u32 reg_addr, u32 bit_mask, u32 data); 59 60 boolean 61 config_phydm_write_txagc_8821c(struct dm_struct *dm, u32 power_index, 62 enum rf_path path, u8 hw_rate); 63 64 u8 config_phydm_read_txagc_8821c(struct dm_struct *dm, enum rf_path path, 65 u8 hw_rate); 66 67 boolean 68 config_phydm_switch_band_8821c(struct dm_struct *dm, u8 central_ch); 69 70 boolean 71 config_phydm_switch_channel_8821c(struct dm_struct *dm, u8 central_ch); 72 73 boolean 74 config_phydm_switch_bandwidth_8821c(struct dm_struct *dm, u8 primary_ch_idx, 75 enum channel_width bandwidth); 76 77 boolean 78 config_phydm_switch_channel_bw_8821c(struct dm_struct *dm, u8 central_ch, 79 u8 primary_ch_idx, 80 enum channel_width bandwidth); 81 82 boolean 83 config_phydm_trx_mode_8821c(struct dm_struct *dm, enum bb_path tx_path, 84 enum bb_path rx_path, boolean is_tx2_path); 85 86 boolean 87 config_phydm_parameter_init_8821c(struct dm_struct *dm, 88 enum odm_parameter_init type); 89 90 void config_phydm_switch_rf_set_8821c(struct dm_struct *dm, u8 rf_set); 91 92 void config_phydm_set_ant_path(struct dm_struct *dm, u8 rf_set, u8 ant_num); 93 94 /* ======================================================================== */ 95 /* These following functions can be used for PHY DM only*/ 96 97 boolean 98 phydm_write_txagc_1byte_8821c(struct dm_struct *dm, u32 power_index, 99 enum rf_path path, u8 hw_rate); 100 101 void phydm_init_hw_info_by_rfe_type_8821c(struct dm_struct *dm); 102 103 void phydm_set_gnt_state_8821c(struct dm_struct *dm, boolean gnt_wl_state, 104 boolean gnt_bt_state); 105 106 /* ======================================================================== */ 107 108 u32 query_phydm_trx_capability_8821c(struct dm_struct *dm); 109 110 u32 query_phydm_stbc_capability_8821c(struct dm_struct *dm); 111 112 u32 query_phydm_ldpc_capability_8821c(struct dm_struct *dm); 113 114 u32 query_phydm_txbf_parameters_8821c(struct dm_struct *dm); 115 116 u32 query_phydm_txbf_capability_8821c(struct dm_struct *dm); 117 118 u8 query_phydm_default_rf_set_8821c(struct dm_struct *dm); 119 120 u8 query_phydm_current_rf_set_8821c(struct dm_struct *dm); 121 122 u8 query_phydm_rfetype_8821c(struct dm_struct *dm); 123 124 u8 query_phydm_current_ant_num_8821c(struct dm_struct *dm); 125 126 u8 query_phydm_ant_num_map_8821c(struct dm_struct *dm); 127 128 #endif /* RTL8821C_SUPPORT == 1 */ 129 #endif /* __INC_PHYDM_API_H_8821C__ */ 130