1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26 /*@************************************************************
27 * include files
28 ************************************************************/
29
30 #include "mp_precomp.h"
31 #include "phydm_precomp.h"
32
phydm_init_debug_setting(struct dm_struct * dm)33 void phydm_init_debug_setting(struct dm_struct *dm)
34 {
35 dm->fw_debug_components = 0;
36 dm->debug_components =
37
38 #if DBG
39 /*@BB Functions*/
40 /*@DBG_DIG |*/
41 /*@DBG_RA_MASK |*/
42 /*@DBG_DYN_TXPWR |*/
43 /*@DBG_FA_CNT |*/
44 /*@DBG_RSSI_MNTR |*/
45 /*@DBG_CCKPD |*/
46 /*@DBG_ANT_DIV |*/
47 /*@DBG_SMT_ANT |*/
48 /*@DBG_PWR_TRAIN |*/
49 /*@DBG_RA |*/
50 /*@DBG_PATH_DIV |*/
51 /*@DBG_DFS |*/
52 /*@DBG_DYN_ARFR |*/
53 /*@DBG_ADPTVTY |*/
54 /*@DBG_CFO_TRK |*/
55 /*@DBG_ENV_MNTR |*/
56 /*@DBG_PRI_CCA |*/
57 /*@DBG_ADPTV_SOML |*/
58 /*@DBG_LNA_SAT_CHK |*/
59 /*@DBG_PHY_STATUS |*/
60 /*@DBG_TMP |*/
61 /*@DBG_FW_TRACE |*/
62 /*@DBG_TXBF |*/
63 /*@DBG_COMMON_FLOW |*/
64 /*@ODM_PHY_CONFIG |*/
65 /*@ODM_COMP_INIT |*/
66 /*@DBG_CMN |*/
67 /*@ODM_COMP_API |*/
68 #endif
69 0;
70
71 dm->fw_buff_is_enpty = true;
72 dm->pre_c2h_seq = 0;
73 dm->c2h_cmd_start = 0;
74 dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD;
75 dm->cmn_dbg_msg_period = PHYDM_WATCH_DOG_PERIOD;
76 phydm_reset_rx_rate_distribution(dm);
77 }
78
phydm_bb_dbg_port_header_sel(void * dm_void,u32 header_idx)79 void phydm_bb_dbg_port_header_sel(void *dm_void, u32 header_idx)
80 {
81 struct dm_struct *dm = (struct dm_struct *)dm_void;
82
83 if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
84 odm_set_bb_reg(dm, R_0x8f8, 0x3c00000, header_idx);
85
86 /*@
87 * header_idx:
88 * (0:) '{ofdm_dbg[31:0]}'
89 * (1:) '{cca,crc32_fail,dbg_ofdm[29:0]}'
90 * (2:) '{vbon,crc32_fail,dbg_ofdm[29:0]}'
91 * (3:) '{cca,crc32_ok,dbg_ofdm[29:0]}'
92 * (4:) '{vbon,crc32_ok,dbg_ofdm[29:0]}'
93 * (5:) '{dbg_iqk_anta}'
94 * (6:) '{cca,ofdm_crc_ok,dbg_dp_anta[29:0]}'
95 * (7:) '{dbg_iqk_antb}'
96 * (8:) '{DBGOUT_RFC_b[31:0]}'
97 * (9:) '{DBGOUT_RFC_a[31:0]}'
98 * (a:) '{dbg_ofdm}'
99 * (b:) '{dbg_cck}'
100 */
101 }
102 }
103
phydm_bb_dbg_port_clock_en(void * dm_void,u8 enable)104 void phydm_bb_dbg_port_clock_en(void *dm_void, u8 enable)
105 {
106 struct dm_struct *dm = (struct dm_struct *)dm_void;
107 u32 reg_value = 0;
108
109 if (dm->support_ic_type & ODM_IC_11AC_2_SERIES) {
110 /*@enable/disable debug port clock, for power saving*/
111 reg_value = enable ? 0x7 : 0;
112 odm_set_bb_reg(dm, R_0x198c, 0x7, reg_value);
113 }
114 }
115
phydm_get_bb_dbg_port_idx(void * dm_void)116 u32 phydm_get_bb_dbg_port_idx(void *dm_void)
117 {
118 struct dm_struct *dm = (struct dm_struct *)dm_void;
119 u32 val = 0;
120
121 if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
122 phydm_bb_dbg_port_clock_en(dm, true);
123 val = odm_get_bb_reg(dm, R_0x8fc, MASKDWORD);
124 } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
125 val = odm_get_bb_reg(dm, R_0x1c3c, 0xfff00);
126 } else { /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/
127 val = odm_get_bb_reg(dm, R_0x908, MASKDWORD);
128 }
129 return val;
130 }
131
phydm_set_bb_dbg_port(void * dm_void,u8 curr_dbg_priority,u32 debug_port)132 u8 phydm_set_bb_dbg_port(void *dm_void, u8 curr_dbg_priority, u32 debug_port)
133 {
134 struct dm_struct *dm = (struct dm_struct *)dm_void;
135 u8 dbg_port_result = false;
136
137 if (curr_dbg_priority > dm->pre_dbg_priority) {
138 if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
139 phydm_bb_dbg_port_clock_en(dm, true);
140
141 odm_set_bb_reg(dm, R_0x8fc, MASKDWORD, debug_port);
142 } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
143 odm_set_bb_reg(dm, R_0x1c3c, 0xfff00, debug_port);
144 } else { /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/
145 odm_set_bb_reg(dm, R_0x908, MASKDWORD, debug_port);
146 }
147 PHYDM_DBG(dm, ODM_COMP_API,
148 "DbgPort ((0x%x)) set success, Cur_priority=((%d)), Pre_priority=((%d))\n",
149 debug_port, curr_dbg_priority, dm->pre_dbg_priority);
150 dm->pre_dbg_priority = curr_dbg_priority;
151 dbg_port_result = true;
152 }
153
154 return dbg_port_result;
155 }
156
phydm_release_bb_dbg_port(void * dm_void)157 void phydm_release_bb_dbg_port(void *dm_void)
158 {
159 struct dm_struct *dm = (struct dm_struct *)dm_void;
160
161 phydm_bb_dbg_port_clock_en(dm, false);
162 phydm_bb_dbg_port_header_sel(dm, 0);
163
164 dm->pre_dbg_priority = DBGPORT_RELEASE;
165 PHYDM_DBG(dm, ODM_COMP_API, "Release BB dbg_port\n");
166 }
167
phydm_get_bb_dbg_port_val(void * dm_void)168 u32 phydm_get_bb_dbg_port_val(void *dm_void)
169 {
170 struct dm_struct *dm = (struct dm_struct *)dm_void;
171 u32 dbg_port_value = 0;
172
173 if (dm->support_ic_type & ODM_IC_11AC_SERIES)
174 dbg_port_value = odm_get_bb_reg(dm, R_0xfa0, MASKDWORD);
175 else if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
176 dbg_port_value = odm_get_bb_reg(dm, R_0x2dbc, MASKDWORD);
177 else /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/
178 dbg_port_value = odm_get_bb_reg(dm, R_0xdf4, MASKDWORD);
179
180 PHYDM_DBG(dm, ODM_COMP_API, "dbg_port_value = 0x%x\n", dbg_port_value);
181 return dbg_port_value;
182 }
183
184 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
185 #if (ODM_IC_11N_SERIES_SUPPORT)
phydm_bb_hw_dbg_info_n(void * dm_void,u32 * _used,char * output,u32 * _out_len)186 void phydm_bb_hw_dbg_info_n(void *dm_void, u32 *_used, char *output,
187 u32 *_out_len)
188 {
189 struct dm_struct *dm = (struct dm_struct *)dm_void;
190 u32 used = *_used;
191 u32 out_len = *_out_len;
192 u32 value32 = 0, value32_1 = 0;
193 u8 rf_gain_a = 0, rf_gain_b = 0, rf_gain_c = 0, rf_gain_d = 0;
194 u8 rx_snr_a = 0, rx_snr_b = 0, rx_snr_c = 0, rx_snr_d = 0;
195 s8 rxevm_0 = 0, rxevm_1 = 0;
196 #if 1
197 struct phydm_cfo_rpt cfo;
198 u8 i = 0;
199 #else
200 s32 short_cfo_a = 0, short_cfo_b = 0, long_cfo_a = 0, long_cfo_b = 0;
201 s32 scfo_a = 0, scfo_b = 0, avg_cfo_a = 0, avg_cfo_b = 0;
202 s32 cfo_end_a = 0, cfo_end_b = 0, acq_cfo_a = 0, acq_cfo_b = 0;
203 #endif
204
205 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
206 "BB Report Info");
207
208 /*@AGC result*/
209 value32 = odm_get_bb_reg(dm, R_0xdd0, MASKDWORD);
210 rf_gain_a = (u8)(value32 & 0x3f);
211 rf_gain_a = rf_gain_a << 1;
212
213 rf_gain_b = (u8)((value32 >> 8) & 0x3f);
214 rf_gain_b = rf_gain_b << 1;
215
216 rf_gain_c = (u8)((value32 >> 16) & 0x3f);
217 rf_gain_c = rf_gain_c << 1;
218
219 rf_gain_d = (u8)((value32 >> 24) & 0x3f);
220 rf_gain_d = rf_gain_d << 1;
221
222 PDM_SNPF(out_len, used, output + used, out_len - used,
223 "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)",
224 rf_gain_a, rf_gain_b, rf_gain_c, rf_gain_d);
225
226 /*SNR report*/
227 value32 = odm_get_bb_reg(dm, R_0xdd4, MASKDWORD);
228 rx_snr_a = (u8)(value32 & 0xff);
229 rx_snr_a = rx_snr_a >> 1;
230
231 rx_snr_b = (u8)((value32 >> 8) & 0xff);
232 rx_snr_b = rx_snr_b >> 1;
233
234 rx_snr_c = (u8)((value32 >> 16) & 0xff);
235 rx_snr_c = rx_snr_c >> 1;
236
237 rx_snr_d = (u8)((value32 >> 24) & 0xff);
238 rx_snr_d = rx_snr_d >> 1;
239
240 PDM_SNPF(out_len, used, output + used, out_len - used,
241 "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)",
242 rx_snr_a, rx_snr_b, rx_snr_c, rx_snr_d);
243
244 /* PostFFT related info*/
245 value32 = odm_get_bb_reg(dm, R_0xdd8, MASKDWORD);
246
247 rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16);
248 rxevm_0 /= 2;
249 if (rxevm_0 < -63)
250 rxevm_0 = 0;
251
252 rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24);
253 rxevm_1 /= 2;
254 if (rxevm_1 < -63)
255 rxevm_1 = 0;
256
257 PDM_SNPF(out_len, used, output + used, out_len - used,
258 "\r\n %-35s = %d / %d", "RXEVM (1ss/2ss)", rxevm_0, rxevm_1);
259
260 #if 1
261 phydm_get_cfo_info(dm, &cfo);
262 for (i = 0; i < dm->num_rf_path; i++) {
263 PDM_SNPF(out_len, used, output + used, out_len - used,
264 "\r\n %s[%d] %-28s = {%d, %d, %d, %d, %d}",
265 "CFO", i, "{S, L, Sec, Acq, End}",
266 cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], cfo.cfo_rpt_sec[i],
267 cfo.cfo_rpt_acq[i], cfo.cfo_rpt_end[i]);
268 }
269 #else
270 /*@CFO Report Info*/
271 odm_set_bb_reg(dm, R_0xd00, BIT(26), 1);
272
273 /*Short CFO*/
274 value32 = odm_get_bb_reg(dm, R_0xdac, MASKDWORD);
275 value32_1 = odm_get_bb_reg(dm, R_0xdb0, MASKDWORD);
276
277 short_cfo_b = (s32)(value32 & 0xfff); /*S(12,11)*/
278 short_cfo_a = (s32)((value32 & 0x0fff0000) >> 16);
279
280 long_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
281 long_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
282
283 /*SFO 2's to dec*/
284 if (short_cfo_a > 2047)
285 short_cfo_a = short_cfo_a - 4096;
286 if (short_cfo_b > 2047)
287 short_cfo_b = short_cfo_b - 4096;
288
289 short_cfo_a = (short_cfo_a * 312500) / 2048;
290 short_cfo_b = (short_cfo_b * 312500) / 2048;
291
292 /*@LFO 2's to dec*/
293
294 if (long_cfo_a > 4095)
295 long_cfo_a = long_cfo_a - 8192;
296
297 if (long_cfo_b > 4095)
298 long_cfo_b = long_cfo_b - 8192;
299
300 long_cfo_a = long_cfo_a * 312500 / 4096;
301 long_cfo_b = long_cfo_b * 312500 / 4096;
302
303 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
304 "CFO Report Info");
305 PDM_SNPF(out_len, used, output + used, out_len - used,
306 "\r\n %-35s = %d / %d", "Short CFO(Hz) <A/B>", short_cfo_a,
307 short_cfo_b);
308 PDM_SNPF(out_len, used, output + used, out_len - used,
309 "\r\n %-35s = %d / %d", "Long CFO(Hz) <A/B>", long_cfo_a,
310 long_cfo_b);
311
312 /*SCFO*/
313 value32 = odm_get_bb_reg(dm, R_0xdb8, MASKDWORD);
314 value32_1 = odm_get_bb_reg(dm, R_0xdb4, MASKDWORD);
315
316 scfo_b = (s32)(value32 & 0x7ff); /*S(11,10)*/
317 scfo_a = (s32)((value32 & 0x07ff0000) >> 16);
318
319 if (scfo_a > 1023)
320 scfo_a = scfo_a - 2048;
321
322 if (scfo_b > 1023)
323 scfo_b = scfo_b - 2048;
324
325 scfo_a = scfo_a * 312500 / 1024;
326 scfo_b = scfo_b * 312500 / 1024;
327
328 avg_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
329 avg_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
330
331 if (avg_cfo_a > 4095)
332 avg_cfo_a = avg_cfo_a - 8192;
333
334 if (avg_cfo_b > 4095)
335 avg_cfo_b = avg_cfo_b - 8192;
336
337 avg_cfo_a = avg_cfo_a * 312500 / 4096;
338 avg_cfo_b = avg_cfo_b * 312500 / 4096;
339
340 PDM_SNPF(out_len, used, output + used, out_len - used,
341 "\r\n %-35s = %d / %d", "value SCFO(Hz) <A/B>", scfo_a,
342 scfo_b);
343 PDM_SNPF(out_len, used, output + used, out_len - used,
344 "\r\n %-35s = %d / %d", "Avg CFO(Hz) <A/B>", avg_cfo_a,
345 avg_cfo_b);
346
347 value32 = odm_get_bb_reg(dm, R_0xdbc, MASKDWORD);
348 value32_1 = odm_get_bb_reg(dm, R_0xde0, MASKDWORD);
349
350 cfo_end_b = (s32)(value32 & 0x1fff); /*S(13,12)*/
351 cfo_end_a = (s32)((value32 & 0x1fff0000) >> 16);
352
353 if (cfo_end_a > 4095)
354 cfo_end_a = cfo_end_a - 8192;
355
356 if (cfo_end_b > 4095)
357 cfo_end_b = cfo_end_b - 8192;
358
359 cfo_end_a = cfo_end_a * 312500 / 4096;
360 cfo_end_b = cfo_end_b * 312500 / 4096;
361
362 acq_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
363 acq_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
364
365 if (acq_cfo_a > 4095)
366 acq_cfo_a = acq_cfo_a - 8192;
367
368 if (acq_cfo_b > 4095)
369 acq_cfo_b = acq_cfo_b - 8192;
370
371 acq_cfo_a = acq_cfo_a * 312500 / 4096;
372 acq_cfo_b = acq_cfo_b * 312500 / 4096;
373
374 PDM_SNPF(out_len, used, output + used, out_len - used,
375 "\r\n %-35s = %d / %d", "End CFO(Hz) <A/B>", cfo_end_a,
376 cfo_end_b);
377 PDM_SNPF(out_len, used, output + used, out_len - used,
378 "\r\n %-35s = %d / %d", "ACQ CFO(Hz) <A/B>", acq_cfo_a,
379 acq_cfo_b);
380 #endif
381 }
382 #endif
383
384 #if (ODM_IC_11AC_SERIES_SUPPORT)
385 #if (RTL8822B_SUPPORT)
phydm_bb_hw_dbg_info_8822b(void * dm_void,u32 * _used,char * output,u32 * _out_len)386 void phydm_bb_hw_dbg_info_8822b(void *dm_void, u32 *_used, char *output,
387 u32 *_out_len)
388 {
389 struct dm_struct *dm = (struct dm_struct *)dm_void;
390 u32 used = *_used;
391 u32 out_len = *_out_len;
392 u32 condi_num = 0;
393 u8 i = 0;
394
395 if (!(dm->support_ic_type == ODM_RTL8822B))
396 return;
397
398 condi_num = phydm_get_condi_num_8822b(dm);
399 phydm_get_condi_num_acc_8822b(dm);
400
401 PDM_SNPF(out_len, used, output + used, out_len - used,
402 "\r\n %-35s = %d.%.4d", "condi_num",
403 condi_num >> 4, phydm_show_fraction_num(condi_num & 0xf, 4));
404
405 for (i = 0; i < CN_CNT_MAX; i++) {
406 PDM_SNPF(out_len, used, output + used, out_len - used,
407 "\r\n Tone_num[CN>%d]%-21s = %d",
408 i, " ", dm->phy_dbg_info.condi_num_cdf[i]);
409 }
410
411 *_used = used;
412 *_out_len = out_len;
413 }
414 #endif
415
phydm_bb_hw_dbg_info_ac(void * dm_void,u32 * _used,char * output,u32 * _out_len)416 void phydm_bb_hw_dbg_info_ac(void *dm_void, u32 *_used, char *output,
417 u32 *_out_len)
418 {
419 struct dm_struct *dm = (struct dm_struct *)dm_void;
420 u32 used = *_used;
421 u32 out_len = *_out_len;
422 char *tmp_string = NULL;
423 u8 rx_ht_bw, rx_vht_bw, rxsc, rx_ht, bw_idx = 0;
424 static u8 v_rx_bw;
425 u32 value32, value32_1, value32_2, value32_3;
426 struct phydm_cfo_rpt cfo;
427 u8 i = 0;
428 static u8 tail, parity, rsv, vrsv, smooth, htsound, agg;
429 static u8 stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts;
430 static u8 vtxops, vrsv2, vbrsv, bf, vbcrc;
431 static u16 h_length, htcrc8, length;
432 static u16 vpaid;
433 static u16 v_length, vhtcrc8, v_mcss, v_tail, vb_tail;
434 static u8 hmcss, hrx_bw;
435 u8 pwdb;
436 s8 rxevm_0, rxevm_1, rxevm_2;
437 u8 rf_gain[4];
438 u8 rx_snr[4];
439 s32 sig_power;
440
441 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
442 "BB Report Info");
443
444 /*@ [BW & Mode] =====================================================*/
445
446 value32 = odm_get_bb_reg(dm, R_0xf80, MASKDWORD);
447 rx_ht = (u8)((value32 & 0x180) >> 7);
448
449 if (rx_ht == AD_VHT_MODE) {
450 tmp_string = "VHT";
451 bw_idx = (u8)((value32 >> 1) & 0x3);
452 } else if (rx_ht == AD_HT_MODE) {
453 tmp_string = "HT";
454 bw_idx = (u8)(value32 & 0x1);
455 } else {
456 tmp_string = "Legacy";
457 bw_idx = 0;
458 }
459 PDM_SNPF(out_len, used, output + used, out_len - used,
460 "\r\n %-35s %s %dM", "mode", tmp_string, (20 << bw_idx));
461
462 if (rx_ht != AD_LEGACY_MODE) {
463 rxsc = (u8)(value32 & 0x78);
464
465 if (rxsc == 0)
466 tmp_string = "duplicate/full bw";
467 else if (rxsc == 1)
468 tmp_string = "usc20-1";
469 else if (rxsc == 2)
470 tmp_string = "lsc20-1";
471 else if (rxsc == 3)
472 tmp_string = "usc20-2";
473 else if (rxsc == 4)
474 tmp_string = "lsc20-2";
475 else if (rxsc == 9)
476 tmp_string = "usc40";
477 else if (rxsc == 10)
478 tmp_string = "lsc40";
479
480 PDM_SNPF(out_len, used, output + used, out_len - used,
481 " %-35s", tmp_string);
482 }
483
484 /*@ [RX signal power and AGC related info] ==========================*/
485
486 pwdb = (u8)odm_get_bb_reg(dm, R_0xf90, MASKBYTE1);
487 sig_power = -110 + (pwdb >> 1);
488 PDM_SNPF(out_len, used, output + used, out_len - used,
489 "\r\n %-35s = %d", "OFDM RX Signal Power(dB)", sig_power);
490
491 value32 = odm_get_bb_reg(dm, R_0xd14, MASKDWORD);
492 rx_snr[RF_PATH_A] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
493 rf_gain[RF_PATH_A] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
494
495 value32 = odm_get_bb_reg(dm, R_0xd54, MASKDWORD);
496 rx_snr[RF_PATH_B] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
497 rf_gain[RF_PATH_B] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
498
499 value32 = odm_get_bb_reg(dm, R_0xd94, MASKDWORD);
500 rx_snr[RF_PATH_C] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
501 rf_gain[RF_PATH_C] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
502
503 value32 = odm_get_bb_reg(dm, R_0xdd4, MASKDWORD);
504 rx_snr[RF_PATH_D] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
505 rf_gain[RF_PATH_D] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
506
507 PDM_SNPF(out_len, used, output + used, out_len - used,
508 "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)",
509 rf_gain[RF_PATH_A], rf_gain[RF_PATH_B],
510 rf_gain[RF_PATH_C], rf_gain[RF_PATH_D]);
511
512 /*@ [RX counter Info] ===============================================*/
513
514 PDM_SNPF(out_len, used, output + used, out_len - used,
515 "\r\n %-35s = %d", "OFDM CCA cnt",
516 odm_get_bb_reg(dm, R_0xf08, 0xFFFF0000));
517
518 PDM_SNPF(out_len, used, output + used, out_len - used,
519 "\r\n %-35s = %d", "OFDM SBD Fail cnt",
520 odm_get_bb_reg(dm, R_0xfd0, 0xFFFF));
521
522 value32 = odm_get_bb_reg(dm, R_0xfc4, MASKDWORD);
523 PDM_SNPF(out_len, used, output + used, out_len - used,
524 "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail cnt",
525 value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
526
527 PDM_SNPF(out_len, used, output + used, out_len - used,
528 "\r\n %-35s = %d", "CCK CCA cnt",
529 odm_get_bb_reg(dm, R_0xfcc, 0xFFFF));
530
531 value32 = odm_get_bb_reg(dm, R_0xfbc, MASKDWORD);
532 PDM_SNPF(out_len, used, output + used, out_len - used,
533 "\r\n %-35s = %d / %d",
534 "LSIG (parity Fail/rate Illegal) cnt", value32 & 0xFFFF,
535 ((value32 & 0xFFFF0000) >> 16));
536
537 PDM_SNPF(out_len, used, output + used, out_len - used,
538 "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT cnt",
539 odm_get_bb_reg(dm, R_0xfc0, (0xFFFF0000 >> 16)),
540 odm_get_bb_reg(dm, R_0xfc8, 0xFFFF));
541
542 /*@ [PostFFT Info] =================================================*/
543 value32 = odm_get_bb_reg(dm, R_0xf8c, MASKDWORD);
544 rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16);
545 rxevm_0 /= 2;
546 if (rxevm_0 < -63)
547 rxevm_0 = 0;
548
549 rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24);
550 rxevm_1 /= 2;
551 value32 = odm_get_bb_reg(dm, R_0xf88, MASKDWORD);
552 rxevm_2 = (s8)((value32 & MASKBYTE2) >> 16);
553 rxevm_2 /= 2;
554
555 if (rxevm_1 < -63)
556 rxevm_1 = 0;
557 if (rxevm_2 < -63)
558 rxevm_2 = 0;
559
560 PDM_SNPF(out_len, used, output + used, out_len - used,
561 "\r\n %-35s = %d / %d / %d", "RXEVM (1ss/2ss/3ss)", rxevm_0,
562 rxevm_1, rxevm_2);
563 PDM_SNPF(out_len, used, output + used, out_len - used,
564 "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D dB)",
565 rx_snr[RF_PATH_A], rx_snr[RF_PATH_B],
566 rx_snr[RF_PATH_C], rx_snr[RF_PATH_D]);
567
568 value32 = odm_get_bb_reg(dm, R_0xf8c, MASKDWORD);
569 PDM_SNPF(out_len, used, output + used, out_len - used,
570 "\r\n %-35s = %d / %d", "CSI_1st /CSI_2nd", value32 & 0xFFFF,
571 ((value32 & 0xFFFF0000) >> 16));
572
573 /*@ [CFO Report Info] ===============================================*/
574 phydm_get_cfo_info(dm, &cfo);
575 for (i = 0; i < dm->num_rf_path; i++) {
576 PDM_SNPF(out_len, used, output + used, out_len - used,
577 "\r\n %s[%d] %-28s = {%d, %d, %d, %d, %d}",
578 "CFO", i, "{S, L, Sec, Acq, End}",
579 cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], cfo.cfo_rpt_sec[i],
580 cfo.cfo_rpt_acq[i], cfo.cfo_rpt_end[i]);
581 }
582
583 /*@ [L-SIG Content] =================================================*/
584 value32 = odm_get_bb_reg(dm, R_0xf20, MASKDWORD);
585
586 tail = (u8)((value32 & 0xfc0000) >> 18);/*@[23:18]*/
587 parity = (u8)((value32 & 0x20000) >> 17);/*@[17]*/
588 length = (u16)((value32 & 0x1ffe0) >> 5);/*@[16:5]*/
589 rsv = (u8)((value32 & 0x10) >> 4);/*@[4]*/
590
591 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
592 "L-SIG");
593 PDM_SNPF(out_len, used, output + used, out_len - used,
594 "\r\n %-35s = %d M", "rate",
595 phydm_get_l_sig_rate(dm, (u8)(value32 & 0x0f)));
596
597 PDM_SNPF(out_len, used, output + used, out_len - used,
598 "\r\n %-35s = %x / %d / %d", "Rsv/length/parity", rsv, length,
599 parity);
600
601 if (rx_ht == AD_HT_MODE) {
602 /*@ [HT SIG 1] ======================================================*/
603 value32 = odm_get_bb_reg(dm, R_0xf2c, MASKDWORD);
604
605 hmcss = (u8)(value32 & 0x7F);
606 hrx_bw = (u8)((value32 & 0x80) >> 7);
607 h_length = (u16)((value32 & 0x0fff00) >> 8);
608
609 PDM_SNPF(out_len, used, output + used, out_len - used,
610 "\r\n %-35s", "HT-SIG1");
611 PDM_SNPF(out_len, used, output + used, out_len - used,
612 "\r\n %-35s = %d / %d / %d", "MCS/BW/length",
613 hmcss, hrx_bw, h_length);
614 /*@ [HT SIG 2] ======================================================*/
615 value32 = odm_get_bb_reg(dm, R_0xf30, MASKDWORD);
616 smooth = (u8)(value32 & 0x01);
617 htsound = (u8)((value32 & 0x02) >> 1);
618 rsv = (u8)((value32 & 0x04) >> 2);
619 agg = (u8)((value32 & 0x08) >> 3);
620 stbc = (u8)((value32 & 0x30) >> 4);
621 fec = (u8)((value32 & 0x40) >> 6);
622 sgi = (u8)((value32 & 0x80) >> 7);
623 htltf = (u8)((value32 & 0x300) >> 8);
624 htcrc8 = (u16)((value32 & 0x3fc00) >> 10);
625 tail = (u8)((value32 & 0xfc0000) >> 18);
626
627 PDM_SNPF(out_len, used, output + used, out_len - used,
628 "\r\n %-35s",
629 "HT-SIG2");
630 PDM_SNPF(out_len, used, output + used, out_len - used,
631 "\r\n %-35s = %x / %x / %x / %x / %x / %x",
632 "Smooth/NoSound/Rsv/Aggregate/STBC/LDPC",
633 smooth, htsound, rsv, agg, stbc, fec);
634 PDM_SNPF(out_len, used, output + used, out_len - used,
635 "\r\n %-35s = %x / %x / %x / %x",
636 "SGI/E-HT-LTFs/CRC/tail",
637 sgi, htltf, htcrc8, tail);
638 } else if (rx_ht == AD_VHT_MODE) {
639 /*@ [VHT SIG A1] ====================================================*/
640 value32 = odm_get_bb_reg(dm, R_0xf2c, MASKDWORD);
641
642 v_rx_bw = (u8)(value32 & 0x03);
643 vrsv = (u8)((value32 & 0x04) >> 2);
644 vstbc = (u8)((value32 & 0x08) >> 3);
645 vgid = (u8)((value32 & 0x3f0) >> 4);
646 v_nsts = (u8)(((value32 & 0x1c00) >> 10) + 1);
647 vpaid = (u16)((value32 & 0x3fe000) >> 13);
648 vtxops = (u8)((value32 & 0x400000) >> 22);
649 vrsv2 = (u8)((value32 & 0x800000) >> 23);
650
651 PDM_SNPF(out_len, used, output + used, out_len - used,
652 "\r\n %-35s",
653 "VHT-SIG-A1");
654 PDM_SNPF(out_len, used, output + used, out_len - used,
655 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x",
656 "BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw,
657 vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2);
658
659 /*@ [VHT SIG A2] ====================================================*/
660 value32 = odm_get_bb_reg(dm, R_0xf30, MASKDWORD);
661
662 /* @sgi=(u8)(value32&0x01); */
663 sgiext = (u8)(value32 & 0x03);
664 /* @fec = (u8)(value32&0x04); */
665 fecext = (u8)((value32 & 0x0C) >> 2);
666
667 v_mcss = (u8)((value32 & 0xf0) >> 4);
668 bf = (u8)((value32 & 0x100) >> 8);
669 vrsv = (u8)((value32 & 0x200) >> 9);
670 vhtcrc8 = (u16)((value32 & 0x3fc00) >> 10);
671 v_tail = (u8)((value32 & 0xfc0000) >> 18);
672
673 PDM_SNPF(out_len, used, output + used, out_len - used,
674 "\r\n %-35s", "VHT-SIG-A2");
675 PDM_SNPF(out_len, used, output + used, out_len - used,
676 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x",
677 "SGI/FEC/MCS/BF/Rsv/CRC/tail",
678 sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail);
679
680 /*@ [VHT SIG B] ====================================================*/
681 value32 = odm_get_bb_reg(dm, R_0xf34, MASKDWORD);
682
683 #if 0
684 v_length = (u16)(value32 & 0x1fffff);
685 vbrsv = (u8)((value32 & 0x600000) >> 21);
686 vb_tail = (u16)((value32 & 0x1f800000) >> 23);
687 vbcrc = (u8)((value32 & 0x80000000) >> 31);
688 #endif
689
690 PDM_SNPF(out_len, used, output + used, out_len - used,
691 "\r\n %-35s", "VHT-SIG-B");
692 PDM_SNPF(out_len, used, output + used, out_len - used,
693 "\r\n %-35s = %x",
694 "Codeword", value32);
695
696 #if 0
697 PDM_SNPF(out_len, used, output + used, out_len - used,
698 "\r\n %-35s = %x / %x / %x / %x",
699 "length/Rsv/tail/CRC",
700 v_length, vbrsv, vb_tail, vbcrc);
701 #endif
702 }
703
704 *_used = used;
705 *_out_len = out_len;
706 }
707 #endif
708
709 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
phydm_bb_hw_dbg_info_jgr3(void * dm_void,u32 * _used,char * output,u32 * _out_len)710 void phydm_bb_hw_dbg_info_jgr3(void *dm_void, u32 *_used, char *output,
711 u32 *_out_len)
712 {
713 struct dm_struct *dm = (struct dm_struct *)dm_void;
714 u32 used = *_used;
715 u32 out_len = *_out_len;
716 char *tmp_string = NULL;
717 u8 rx_ht_bw = 0, rx_vht_bw = 0, rx_ht = 0;
718 static u8 v_rx_bw;
719 u32 value32 = 0;
720 u8 i = 0;
721 static u8 tail, parity, rsv, vrsv, smooth, htsound, agg;
722 static u8 stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts;
723 static u8 vtxops, vrsv2, vbrsv, bf, vbcrc;
724 static u16 h_length, htcrc8, length;
725 static u16 vpaid;
726 static u16 v_length, vhtcrc8, v_mcss, v_tail, vb_tail;
727 static u8 hmcss, hrx_bw;
728
729 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
730 "BB Report Info");
731
732 /*@ [Mode] =====================================================*/
733
734 value32 = odm_get_bb_reg(dm, R_0x2c20, MASKDWORD);
735 rx_ht = (u8)((value32 & 0xC0000) >> 18);
736 if (rx_ht == AD_VHT_MODE)
737 tmp_string = "VHT";
738 else if (rx_ht == AD_HT_MODE)
739 tmp_string = "HT";
740 else
741 tmp_string = "Legacy";
742
743 PDM_SNPF(out_len, used, output + used, out_len - used,
744 "\r\n %-35s %s", "mode", tmp_string);
745 /*@ [RX counter Info] ===============================================*/
746
747 if (dm->support_ic_type & ODM_RTL8723F) {
748 PDM_SNPF(out_len, used, output + used, out_len - used,
749 "\r\n %-35s = %d", "CCK CCA cnt",
750 odm_get_bb_reg(dm, R_0x2aa0, 0xFFFF));
751 } else {
752 PDM_SNPF(out_len, used, output + used, out_len - used,
753 "\r\n %-35s = %d", "CCK CCA cnt",
754 odm_get_bb_reg(dm, R_0x2c08, 0xFFFF));
755 }
756 PDM_SNPF(out_len, used, output + used, out_len - used,
757 "\r\n %-35s = %d", "OFDM CCA cnt",
758 odm_get_bb_reg(dm, R_0x2c08, 0xFFFF0000));
759
760 PDM_SNPF(out_len, used, output + used, out_len - used,
761 "\r\n %-35s = %d", "OFDM SBD Fail cnt",
762 odm_get_bb_reg(dm, R_0x2d20, 0xFFFF0000));
763
764 PDM_SNPF(out_len, used, output + used, out_len - used,
765 "\r\n %-35s = %d / %d",
766 "LSIG (parity Fail/rate Illegal) cnt",
767 odm_get_bb_reg(dm, R_0x2d04, 0xFFFF0000),
768 odm_get_bb_reg(dm, R_0x2d08, 0xFFFF));
769
770 value32 = odm_get_bb_reg(dm, R_0x2d10, MASKDWORD);
771 PDM_SNPF(out_len, used, output + used, out_len - used,
772 "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT cnt",
773 value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
774
775 value32 = odm_get_bb_reg(dm, R_0x2d0c, MASKDWORD);
776 PDM_SNPF(out_len, used, output + used, out_len - used,
777 "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail cnt",
778 value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
779 /*@ [L-SIG Content] =================================================*/
780 value32 = odm_get_bb_reg(dm, R_0x2c20, MASKDWORD);
781
782 parity = (u8)((value32 & 0x20000) >> 17);/*@[17]*/
783 length = (u16)((value32 & 0x1ffe0) >> 5);/*@[16:5]*/
784 rsv = (u8)((value32 & 0x10) >> 4);/*@[4]*/
785
786 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
787 "L-SIG");
788 PDM_SNPF(out_len, used, output + used, out_len - used,
789 "\r\n %-35s = %d M", "rate",
790 phydm_get_l_sig_rate(dm, (u8)(value32 & 0x0f)));
791
792 PDM_SNPF(out_len, used, output + used, out_len - used,
793 "\r\n %-35s = %x / %d / %d", "Rsv/length/parity", rsv, length,
794 parity);
795
796 if (rx_ht == AD_HT_MODE) {
797 /*@ [HT SIG 1] ======================================================*/
798 value32 = odm_get_bb_reg(dm, R_0x2c2c, MASKDWORD);
799
800 hmcss = (u8)(value32 & 0x7F);
801 hrx_bw = (u8)((value32 & 0x80) >> 7);
802 h_length = (u16)((value32 & 0x0fff00) >> 8);
803
804 PDM_SNPF(out_len, used, output + used, out_len - used,
805 "\r\n %-35s", "HT-SIG1");
806 PDM_SNPF(out_len, used, output + used, out_len - used,
807 "\r\n %-35s = %d / %d / %d", "MCS/BW/length",
808 hmcss, hrx_bw, h_length);
809 /*@ [HT SIG 2] ======================================================*/
810 value32 = odm_get_bb_reg(dm, R_0x2c30, MASKDWORD);
811 smooth = (u8)(value32 & 0x01);
812 htsound = (u8)((value32 & 0x02) >> 1);
813 rsv = (u8)((value32 & 0x04) >> 2);
814 agg = (u8)((value32 & 0x08) >> 3);
815 stbc = (u8)((value32 & 0x30) >> 4);
816 fec = (u8)((value32 & 0x40) >> 6);
817 sgi = (u8)((value32 & 0x80) >> 7);
818 htltf = (u8)((value32 & 0x300) >> 8);
819 htcrc8 = (u16)((value32 & 0x3fc00) >> 10);
820 tail = (u8)((value32 & 0xfc0000) >> 18);
821
822 PDM_SNPF(out_len, used, output + used, out_len - used,
823 "\r\n %-35s",
824 "HT-SIG2");
825 PDM_SNPF(out_len, used, output + used, out_len - used,
826 "\r\n %-35s = %x / %x / %x / %x / %x / %x",
827 "Smooth/NoSound/Rsv/Aggregate/STBC/LDPC",
828 smooth, htsound, rsv, agg, stbc, fec);
829 PDM_SNPF(out_len, used, output + used, out_len - used,
830 "\r\n %-35s = %x / %x / %x / %x",
831 "SGI/E-HT-LTFs/CRC/tail",
832 sgi, htltf, htcrc8, tail);
833 } else if (rx_ht == AD_VHT_MODE) {
834 /*@ [VHT SIG A1] ====================================================*/
835 value32 = odm_get_bb_reg(dm, R_0x2c2c, MASKDWORD);
836
837 v_rx_bw = (u8)(value32 & 0x03);
838 vrsv = (u8)((value32 & 0x04) >> 2);
839 vstbc = (u8)((value32 & 0x08) >> 3);
840 vgid = (u8)((value32 & 0x3f0) >> 4);
841 v_nsts = (u8)(((value32 & 0x1c00) >> 10) + 1);
842 vpaid = (u16)((value32 & 0x3fe000) >> 13);
843 vtxops = (u8)((value32 & 0x400000) >> 22);
844 vrsv2 = (u8)((value32 & 0x800000) >> 23);
845
846 PDM_SNPF(out_len, used, output + used, out_len - used,
847 "\r\n %-35s",
848 "VHT-SIG-A1");
849 PDM_SNPF(out_len, used, output + used, out_len - used,
850 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x",
851 "BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw,
852 vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2);
853
854 /*@ [VHT SIG A2] ====================================================*/
855 value32 = odm_get_bb_reg(dm, R_0x2c30, MASKDWORD);
856
857 /* @sgi=(u8)(value32&0x01); */
858 sgiext = (u8)(value32 & 0x03);
859 /* @fec = (u8)(value32&0x04); */
860 fecext = (u8)((value32 & 0x0C) >> 2);
861
862 v_mcss = (u8)((value32 & 0xf0) >> 4);
863 bf = (u8)((value32 & 0x100) >> 8);
864 vrsv = (u8)((value32 & 0x200) >> 9);
865 vhtcrc8 = (u16)((value32 & 0x3fc00) >> 10);
866 v_tail = (u8)((value32 & 0xfc0000) >> 18);
867
868 PDM_SNPF(out_len, used, output + used, out_len - used,
869 "\r\n %-35s", "VHT-SIG-A2");
870 PDM_SNPF(out_len, used, output + used, out_len - used,
871 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x",
872 "SGI/FEC/MCS/BF/Rsv/CRC/tail",
873 sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail);
874
875 /*@ [VHT SIG B] ====================================================*/
876 value32 = odm_get_bb_reg(dm, R_0x2c34, MASKDWORD);
877
878 PDM_SNPF(out_len, used, output + used, out_len - used,
879 "\r\n %-35s", "VHT-SIG-B");
880 PDM_SNPF(out_len, used, output + used, out_len - used,
881 "\r\n %-35s = %x",
882 "Codeword", value32);
883
884 if (v_rx_bw == 0) {
885 v_length = (u16)(value32 & 0x1ffff);
886 vbrsv = (u8)((value32 & 0xE0000) >> 17);
887 vb_tail = (u16)((value32 & 0x03F00000) >> 20);
888 } else if (v_rx_bw == 1) {
889 v_length = (u16)(value32 & 0x7FFFF);
890 vbrsv = (u8)((value32 & 0x180000) >> 19);
891 vb_tail = (u16)((value32 & 0x07E00000) >> 21);
892 } else if (v_rx_bw == 2) {
893 v_length = (u16)(value32 & 0x1fffff);
894 vbrsv = (u8)((value32 & 0x600000) >> 21);
895 vb_tail = (u16)((value32 & 0x1f800000) >> 23);
896 }
897 vbcrc = (u8)((value32 & 0x80000000) >> 31);
898
899 PDM_SNPF(out_len, used, output + used, out_len - used,
900 "\r\n %-35s = %x / %x / %x / %x",
901 "length/Rsv/tail/CRC",
902 v_length, vbrsv, vb_tail, vbcrc);
903 }
904
905 *_used = used;
906 *_out_len = out_len;
907 }
908 #endif
909
phydm_get_l_sig_rate(void * dm_void,u8 rate_idx_l_sig)910 u8 phydm_get_l_sig_rate(void *dm_void, u8 rate_idx_l_sig)
911 {
912 u8 rate_idx = 0xff;
913
914 switch (rate_idx_l_sig) {
915 case 0x0b:
916 rate_idx = 6;
917 break;
918 case 0x0f:
919 rate_idx = 9;
920 break;
921 case 0x0a:
922 rate_idx = 12;
923 break;
924 case 0x0e:
925 rate_idx = 18;
926 break;
927 case 0x09:
928 rate_idx = 24;
929 break;
930 case 0x0d:
931 rate_idx = 36;
932 break;
933 case 0x08:
934 rate_idx = 48;
935 break;
936 case 0x0c:
937 rate_idx = 54;
938 break;
939 default:
940 rate_idx = 0xff;
941 break;
942 }
943
944 return rate_idx;
945 }
946
phydm_bb_hw_dbg_info(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)947 void phydm_bb_hw_dbg_info(void *dm_void, char input[][16], u32 *_used,
948 char *output, u32 *_out_len)
949 {
950 struct dm_struct *dm = (struct dm_struct *)dm_void;
951 u32 used = *_used;
952 u32 out_len = *_out_len;
953
954 switch (dm->ic_ip_series) {
955 #if (ODM_IC_11N_SERIES_SUPPORT)
956 case PHYDM_IC_N:
957 phydm_bb_hw_dbg_info_n(dm, &used, output, &out_len);
958 break;
959 #endif
960
961 #if (ODM_IC_11AC_SERIES_SUPPORT)
962 case PHYDM_IC_AC:
963 phydm_bb_hw_dbg_info_ac(dm, &used, output, &out_len);
964 phydm_reset_bb_hw_cnt(dm);
965 #if (RTL8822B_SUPPORT)
966 phydm_bb_hw_dbg_info_8822b(dm, &used, output, &out_len);
967 #endif
968 break;
969 #endif
970
971 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
972 case PHYDM_IC_JGR3:
973 phydm_bb_hw_dbg_info_jgr3(dm, &used, output, &out_len);
974 phydm_reset_bb_hw_cnt(dm);
975 break;
976 #endif
977 default:
978 break;
979 }
980
981 *_used = used;
982 *_out_len = out_len;
983 }
984
985 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
986
987 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
988
phydm_dm_summary_cli_win(void * dm_void,char * buf,u8 macid)989 void phydm_dm_summary_cli_win(void *dm_void, char *buf, u8 macid)
990 {
991 struct dm_struct *dm = (struct dm_struct *)dm_void;
992 struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
993 struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
994 struct cmn_sta_info *sta = NULL;
995 struct ra_sta_info *ra = NULL;
996 struct dtp_info *dtp = NULL;
997 u64 comp = dm->support_ability;
998 u64 pause_comp = dm->pause_ability;
999
1000 if (!dm->is_linked) {
1001 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "[%s]No Link !!!\n", __func__);
1002 RT_PRINT(buf);
1003 return;
1004 }
1005
1006 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "00.(%s) %-12s: IGI=0x%x, Dyn_Rng=0x%x~0x%x, fa_src=%d, FA_th={%d,%d,%d}\n",
1007 ((comp & ODM_BB_DIG) ?
1008 ((pause_comp & ODM_BB_DIG) ? "P" : "V") : "."),
1009 "DIG",
1010 dig_t->cur_ig_value,
1011 dig_t->rx_gain_range_min, dig_t->rx_gain_range_max,
1012 dig_t->fa_source,
1013 dig_t->fa_th[0], dig_t->fa_th[1], dig_t->fa_th[2]);
1014 RT_PRINT(buf);
1015
1016 sta = dm->phydm_sta_info[macid];
1017 if (is_sta_active(sta)) {
1018 ra = &sta->ra_info;
1019 dtp = &sta->dtp_stat;
1020
1021 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "01.(%s) %-12s: rssi_lv=%d, mask=0x%llx\n",
1022 ((comp & ODM_BB_RA_MASK) ?
1023 ((pause_comp & ODM_BB_RA_MASK) ? "P" : "V") : "."),
1024 "RaMask",
1025 ra->rssi_level, ra->ramask);
1026 RT_PRINT(buf);
1027
1028 #ifdef CONFIG_DYNAMIC_TX_TWR
1029 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "02.(%s) %-12s: pwr_lv=%d\n",
1030 ((comp & ODM_BB_DYNAMIC_TXPWR) ?
1031 ((pause_comp & ODM_BB_DYNAMIC_TXPWR) ? "P" : "V") : "."),
1032 "DynTxPwr",
1033 dtp->sta_tx_high_power_lvl);
1034 RT_PRINT(buf);
1035 #endif
1036 }
1037
1038 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "05.(%s) %-12s: cck_pd_lv=%d\n",
1039 ((comp & ODM_BB_CCK_PD) ?
1040 ((pause_comp & ODM_BB_CCK_PD) ? "P" : "V") : "."),
1041 "CCK_PD", dm->dm_cckpd_table.cck_pd_lv);
1042 RT_PRINT(buf);
1043
1044 #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
1045 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "06.(%s) %-12s: div_type=%d, curr_ant=%s\n",
1046 ((comp & ODM_BB_ANT_DIV) ?
1047 ((pause_comp & ODM_BB_ANT_DIV) ? "P" : "V") : "."),
1048 "ANT_DIV",
1049 dm->ant_div_type,
1050 (dm->dm_fat_table.rx_idle_ant == MAIN_ANT) ? "MAIN" : "AUX");
1051 RT_PRINT(buf);
1052 #endif
1053
1054 #ifdef PHYDM_POWER_TRAINING_SUPPORT
1055 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "08.(%s) %-12s: PT_score=%d, disable_PT=%d\n",
1056 ((comp & ODM_BB_PWR_TRAIN) ?
1057 ((pause_comp & ODM_BB_PWR_TRAIN) ? "P" : "V") : "."),
1058 "PwrTrain",
1059 dm->pow_train_table.pow_train_score,
1060 dm->is_disable_power_training);
1061 RT_PRINT(buf);
1062 #endif
1063
1064 #ifdef CONFIG_PHYDM_DFS_MASTER
1065 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "11.(%s) %-12s: dbg_mode=%d, region_domain=%d\n",
1066 ((comp & ODM_BB_DFS) ?
1067 ((pause_comp & ODM_BB_DFS) ? "P" : "V") : "."),
1068 "DFS",
1069 dm->dfs.dbg_mode, dm->dfs_region_domain);
1070 RT_PRINT(buf);
1071 #endif
1072 #ifdef PHYDM_SUPPORT_ADAPTIVITY
1073 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "13.(%s) %-12s: th{l2h, h2l}={%d, %d}, edcca_flag=%d\n",
1074 ((comp & ODM_BB_ADAPTIVITY) ?
1075 ((pause_comp & ODM_BB_ADAPTIVITY) ? "P" : "V") : "."),
1076 "Adaptivity",
1077 dm->adaptivity.th_l2h, dm->adaptivity.th_h2l,
1078 dm->false_alm_cnt.edcca_flag);
1079 RT_PRINT(buf);
1080 #endif
1081 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "14.(%s) %-12s: CFO_avg=%d kHz, CFO_traking=%s%d\n",
1082 ((comp & ODM_BB_CFO_TRACKING) ?
1083 ((pause_comp & ODM_BB_CFO_TRACKING) ? "P" : "V") : "."),
1084 "CfoTrack",
1085 cfo_t->CFO_ave_pre,
1086 ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
1087 DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
1088 RT_PRINT(buf);
1089
1090 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1091 "15.(%s) %-12s: ratio{nhm, nhm_env, clm, idle, tx}={%d, %d, %d, %d, %d}, nhm_pwr=%d\n",
1092 ((comp & ODM_BB_ENV_MONITOR) ?
1093 ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."),
1094 "EnvMntr",
1095 dm->dm_ccx_info.nhm_ratio, dm->dm_ccx_info.nhm_env_ratio,
1096 dm->dm_ccx_info.clm_ratio, dm->dm_ccx_info.nhm_idle_ratio,
1097 dm->dm_ccx_info.nhm_tx_ratio, dm->dm_ccx_info.nhm_pwr);
1098 RT_PRINT(buf);
1099
1100 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "15.(%s) %-12s: NHM_Rpt(H->L)[%d %d %d %d %d %d %d %d %d %d %d %d]\n",
1101 ((comp & ODM_BB_ENV_MONITOR) ?
1102 ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."),
1103 "EnvMntr",
1104 dm->dm_ccx_info.nhm_result[11],
1105 dm->dm_ccx_info.nhm_result[10],
1106 dm->dm_ccx_info.nhm_result[9], dm->dm_ccx_info.nhm_result[8],
1107 dm->dm_ccx_info.nhm_result[7], dm->dm_ccx_info.nhm_result[6],
1108 dm->dm_ccx_info.nhm_result[5], dm->dm_ccx_info.nhm_result[4],
1109 dm->dm_ccx_info.nhm_result[3], dm->dm_ccx_info.nhm_result[2],
1110 dm->dm_ccx_info.nhm_result[1], dm->dm_ccx_info.nhm_result[0]);
1111 RT_PRINT(buf);
1112
1113 #ifdef EDCCA_CLM_SUPPORT
1114 if (dm->support_ic_type & PHYDM_IC_SUPPORT_EDCCA_CLM) {
1115 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "15.(%s) %-12s: edcca_clm_ratio=%d\n",
1116 ((comp & ODM_BB_ENV_MONITOR) ?
1117 ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."),
1118 "EnvMntr",
1119 dm->dm_ccx_info.edcca_clm_ratio);
1120 RT_PRINT(buf);
1121 }
1122 #endif
1123
1124 #ifdef PHYDM_PRIMARY_CCA
1125 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "16.(%s) %-12s: CCA @ (%s SB)\n",
1126 ((comp & ODM_BB_PRIMARY_CCA) ?
1127 ((pause_comp & ODM_BB_PRIMARY_CCA) ? "P" : "V") : "."),
1128 "PriCCA",
1129 ((dm->dm_pri_cca.mf_state == MF_USC_LSC) ? "D" :
1130 ((dm->dm_pri_cca.mf_state == MF_LSC) ? "L" : "U")));
1131 RT_PRINT(buf);
1132 #endif
1133 #ifdef CONFIG_ADAPTIVE_SOML
1134 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "17.(%s) %-12s: soml_en = %s\n",
1135 ((comp & ODM_BB_ADAPTIVE_SOML) ?
1136 ((pause_comp & ODM_BB_ADAPTIVE_SOML) ? "P" : "V") : "."),
1137 "A-SOML",
1138 (dm->dm_soml_table.soml_last_state == SOML_ON) ?
1139 "ON" : "OFF");
1140 RT_PRINT(buf);
1141 #endif
1142 #ifdef PHYDM_LNA_SAT_CHK_SUPPORT
1143 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "18.(%s) %-12s:\n",
1144 ((comp & ODM_BB_LNA_SAT_CHK) ?
1145 ((pause_comp & ODM_BB_LNA_SAT_CHK) ? "P" : "V") : "."),
1146 "LNA_SAT_CHK");
1147 RT_PRINT(buf);
1148 #endif
1149 }
1150
phydm_basic_dbg_msg_cli_win(void * dm_void,char * buf)1151 void phydm_basic_dbg_msg_cli_win(void *dm_void, char *buf)
1152 {
1153 struct dm_struct *dm = (struct dm_struct *)dm_void;
1154 struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
1155 struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
1156 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info_win_bkp;
1157 struct phydm_phystatus_statistic *dbg_s = &dbg->physts_statistic_info;
1158 struct phydm_phystatus_avg *dbg_avg = &dbg->phystatus_statistic_avg;
1159
1160 char *rate_type = NULL;
1161 u8 tmp_rssi_avg[4];
1162 u8 tmp_snr_avg[4];
1163 u8 tmp_evm_avg[4];
1164 u32 tmp_cnt = 0;
1165 u8 macid, target_macid = 0;
1166 u8 i = 0;
1167 u8 rate_num = dm->num_rf_path;
1168 u8 ss_ofst = 0;
1169 struct cmn_sta_info *entry = NULL;
1170 char dbg_buf[PHYDM_SNPRINT_SIZE] = {0};
1171
1172
1173 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n PHYDM Common Dbg Msg --------->");
1174 RT_PRINT(buf);
1175 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n System up time=%d", dm->phydm_sys_up_time);
1176 RT_PRINT(buf);
1177
1178 if (dm->is_linked) {
1179 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n ID=((%d)), BW=((%d)), fc=((CH-%d))",
1180 dm->curr_station_id, 20 << *dm->band_width, *dm->channel);
1181 RT_PRINT(buf);
1182
1183 if (((*dm->channel <= 14) && (*dm->band_width == CHANNEL_WIDTH_40)) &&
1184 (dm->support_ic_type & ODM_IC_11N_SERIES)) {
1185 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Primary CCA at ((%s SB))",
1186 (*dm->sec_ch_offset == SECOND_CH_AT_LSB) ? "U" : "L");
1187 RT_PRINT(buf);
1188 }
1189
1190 if (dm->cck_new_agc || dm->rx_rate > ODM_RATE11M) {
1191 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}",
1192 dm->ofdm_agc_idx[0], dm->ofdm_agc_idx[1],
1193 dm->ofdm_agc_idx[2], dm->ofdm_agc_idx[3]);
1194 RT_PRINT(buf);
1195 } else {
1196 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [CCK AGC Idx] {LNA,VGA}={0x%x, 0x%x}",
1197 dm->cck_lna_idx, dm->cck_vga_idx);
1198 RT_PRINT(buf);
1199 }
1200
1201 phydm_print_rate_2_buff(dm, dm->rx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
1202 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n RSSI:{%d, %d, %d, %d}, RxRate:%s (0x%x)",
1203 (dm->rssi_a == 0xff) ? 0 : dm->rssi_a,
1204 (dm->rssi_b == 0xff) ? 0 : dm->rssi_b,
1205 (dm->rssi_c == 0xff) ? 0 : dm->rssi_c,
1206 (dm->rssi_d == 0xff) ? 0 : dm->rssi_d,
1207 dbg_buf, dm->rx_rate);
1208 RT_PRINT(buf);
1209
1210 phydm_print_rate_2_buff(dm, dm->phy_dbg_info.beacon_phy_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
1211 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Beacon_cnt=%d, rate_idx:%s (0x%x)",
1212 dm->phy_dbg_info.beacon_cnt_in_period,
1213 dbg_buf,
1214 dm->phy_dbg_info.beacon_phy_rate);
1215 RT_PRINT(buf);
1216
1217 /*Show phydm_rx_rate_distribution;*/
1218 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [RxRate Cnt] =============>");
1219 RT_PRINT(buf);
1220
1221 /*@======CCK=================================================*/
1222 if (*dm->channel <= 14) {
1223 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * CCK = {%d, %d, %d, %d}",
1224 dbg->num_qry_legacy_pkt[0], dbg->num_qry_legacy_pkt[1],
1225 dbg->num_qry_legacy_pkt[2], dbg->num_qry_legacy_pkt[3]);
1226 RT_PRINT(buf);
1227 }
1228 /*@======OFDM================================================*/
1229 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}",
1230 dbg->num_qry_legacy_pkt[4], dbg->num_qry_legacy_pkt[5],
1231 dbg->num_qry_legacy_pkt[6], dbg->num_qry_legacy_pkt[7],
1232 dbg->num_qry_legacy_pkt[8], dbg->num_qry_legacy_pkt[9],
1233 dbg->num_qry_legacy_pkt[10], dbg->num_qry_legacy_pkt[11]);
1234 RT_PRINT(buf);
1235
1236 /*@======HT==================================================*/
1237 if (dbg->ht_pkt_not_zero) {
1238 for (i = 0; i < rate_num; i++) {
1239 ss_ofst = (i << 3);
1240
1241 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}",
1242 (ss_ofst), (ss_ofst + 7),
1243 dbg->num_qry_ht_pkt[ss_ofst + 0], dbg->num_qry_ht_pkt[ss_ofst + 1],
1244 dbg->num_qry_ht_pkt[ss_ofst + 2], dbg->num_qry_ht_pkt[ss_ofst + 3],
1245 dbg->num_qry_ht_pkt[ss_ofst + 4], dbg->num_qry_ht_pkt[ss_ofst + 5],
1246 dbg->num_qry_ht_pkt[ss_ofst + 6], dbg->num_qry_ht_pkt[ss_ofst + 7]);
1247 RT_PRINT(buf);
1248 }
1249
1250 if (dbg->low_bw_20_occur) {
1251 for (i = 0; i < rate_num; i++) {
1252 ss_ofst = (i << 3);
1253
1254 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * [Low BW 20M] HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}",
1255 (ss_ofst), (ss_ofst + 7),
1256 dbg->num_qry_pkt_sc_20m[ss_ofst + 0], dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1257 dbg->num_qry_pkt_sc_20m[ss_ofst + 2], dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1258 dbg->num_qry_pkt_sc_20m[ss_ofst + 4], dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1259 dbg->num_qry_pkt_sc_20m[ss_ofst + 6], dbg->num_qry_pkt_sc_20m[ss_ofst + 7]);
1260 RT_PRINT(buf);
1261 }
1262 }
1263 }
1264
1265 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1266 /*@======VHT=================================================*/
1267 if (dbg->vht_pkt_not_zero) {
1268 for (i = 0; i < rate_num; i++) {
1269 ss_ofst = 10 * i;
1270
1271 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
1272 (i + 1),
1273 dbg->num_qry_vht_pkt[ss_ofst + 0], dbg->num_qry_vht_pkt[ss_ofst + 1],
1274 dbg->num_qry_vht_pkt[ss_ofst + 2], dbg->num_qry_vht_pkt[ss_ofst + 3],
1275 dbg->num_qry_vht_pkt[ss_ofst + 4], dbg->num_qry_vht_pkt[ss_ofst + 5],
1276 dbg->num_qry_vht_pkt[ss_ofst + 6], dbg->num_qry_vht_pkt[ss_ofst + 7],
1277 dbg->num_qry_vht_pkt[ss_ofst + 8], dbg->num_qry_vht_pkt[ss_ofst + 9]);
1278 RT_PRINT(buf);
1279 }
1280
1281 if (dbg->low_bw_20_occur) {
1282 for (i = 0; i < rate_num; i++) {
1283 ss_ofst = 10 * i;
1284
1285 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n *[Low BW 20M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
1286 (i + 1),
1287 dbg->num_qry_pkt_sc_20m[ss_ofst + 0], dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1288 dbg->num_qry_pkt_sc_20m[ss_ofst + 2], dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1289 dbg->num_qry_pkt_sc_20m[ss_ofst + 4], dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1290 dbg->num_qry_pkt_sc_20m[ss_ofst + 6], dbg->num_qry_pkt_sc_20m[ss_ofst + 7],
1291 dbg->num_qry_pkt_sc_20m[ss_ofst + 8], dbg->num_qry_pkt_sc_20m[ss_ofst + 9]);
1292 RT_PRINT(buf);
1293 }
1294 }
1295
1296 if (dbg->low_bw_40_occur) {
1297 for (i = 0; i < rate_num; i++) {
1298 ss_ofst = 10 * i;
1299
1300 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n *[Low BW 40M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
1301 (i + 1),
1302 dbg->num_qry_pkt_sc_40m[ss_ofst + 0], dbg->num_qry_pkt_sc_40m[ss_ofst + 1],
1303 dbg->num_qry_pkt_sc_40m[ss_ofst + 2], dbg->num_qry_pkt_sc_40m[ss_ofst + 3],
1304 dbg->num_qry_pkt_sc_40m[ss_ofst + 4], dbg->num_qry_pkt_sc_40m[ss_ofst + 5],
1305 dbg->num_qry_pkt_sc_40m[ss_ofst + 6], dbg->num_qry_pkt_sc_40m[ss_ofst + 7],
1306 dbg->num_qry_pkt_sc_40m[ss_ofst + 8], dbg->num_qry_pkt_sc_40m[ss_ofst + 9]);
1307 RT_PRINT(buf);
1308 }
1309 }
1310 }
1311 #endif
1312
1313 //1 Show phydm_avg_phystatus_val
1314 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1315 "\r\n [Avg PHY Statistic] ==============>\n");
1316 RT_PRINT(buf);
1317
1318 /*===[Beacon]===*/
1319 switch (dm->num_rf_path) {
1320 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
1321 case 4:
1322 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1323 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
1324 "[Beacon]", dbg_s->rssi_beacon_cnt,
1325 dbg_avg->rssi_beacon_avg[0],
1326 dbg_avg->rssi_beacon_avg[1],
1327 dbg_avg->rssi_beacon_avg[2],
1328 dbg_avg->rssi_beacon_avg[3]);
1329 break;
1330 #endif
1331 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
1332 case 3:
1333 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1334 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
1335 "[Beacon]", dbg_s->rssi_beacon_cnt,
1336 dbg_avg->rssi_beacon_avg[0],
1337 dbg_avg->rssi_beacon_avg[1],
1338 dbg_avg->rssi_beacon_avg[2]);
1339 break;
1340 #endif
1341 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
1342 case 2:
1343 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1344 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
1345 "[Beacon]", dbg_s->rssi_beacon_cnt,
1346 dbg_avg->rssi_beacon_avg[0],
1347 dbg_avg->rssi_beacon_avg[1]);
1348 break;
1349 #endif
1350 default:
1351 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1352 "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
1353 "[Beacon]", dbg_s->rssi_beacon_cnt,
1354 dbg_avg->rssi_beacon_avg[0]);
1355 break;
1356 }
1357 RT_PRINT(buf);
1358
1359 /*===[CCK]===*/
1360 switch (dm->num_rf_path) {
1361 #ifdef PHYSTS_3RD_TYPE_SUPPORT
1362 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
1363 case 4:
1364 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1365 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
1366 "[CCK]", dbg_s->rssi_cck_cnt,
1367 dbg_avg->rssi_cck_avg,
1368 dbg_avg->rssi_cck_avg_abv_2ss[0],
1369 dbg_avg->rssi_cck_avg_abv_2ss[1],
1370 dbg_avg->rssi_cck_avg_abv_2ss[2]);
1371 break;
1372 #endif
1373 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
1374 case 3:
1375 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1376 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
1377 "[CCK]", dbg_s->rssi_cck_cnt,
1378 dbg_avg->rssi_cck_avg,
1379 dbg_avg->rssi_cck_avg_abv_2ss[0],
1380 dbg_avg->rssi_cck_avg_abv_2ss[1]);
1381 break;
1382 #endif
1383 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
1384 case 2:
1385 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1386 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
1387 "[CCK]", dbg_s->rssi_cck_cnt,
1388 dbg_avg->rssi_cck_avg,
1389 dbg_avg->rssi_cck_avg_abv_2ss[0]);
1390 break;
1391 #endif
1392 #endif
1393 default:
1394 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1395 "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
1396 "[CCK]", dbg_s->rssi_cck_cnt,
1397 dbg_avg->rssi_cck_avg);
1398 break;
1399 }
1400 RT_PRINT(buf);
1401
1402 for (i = 0; i <= 4; i++) {
1403 if (i > dm->num_rf_path)
1404 break;
1405
1406 odm_memory_set(dm, tmp_rssi_avg, 0, 4);
1407 odm_memory_set(dm, tmp_snr_avg, 0, 4);
1408 odm_memory_set(dm, tmp_evm_avg, 0, 4);
1409
1410 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
1411 if (i == 4) {
1412 rate_type = "[4-SS]";
1413 tmp_cnt = dbg_s->rssi_4ss_cnt;
1414 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_4ss_avg, dm->num_rf_path);
1415 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_4ss_avg, dm->num_rf_path);
1416 odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_4ss_avg, 4);
1417 } else
1418 #endif
1419 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
1420 if (i == 3) {
1421 rate_type = "[3-SS]";
1422 tmp_cnt = dbg_s->rssi_3ss_cnt;
1423 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_3ss_avg, dm->num_rf_path);
1424 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_3ss_avg, dm->num_rf_path);
1425 odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_3ss_avg, 3);
1426 } else
1427 #endif
1428 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
1429 if (i == 2) {
1430 rate_type = "[2-SS]";
1431 tmp_cnt = dbg_s->rssi_2ss_cnt;
1432 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_2ss_avg, dm->num_rf_path);
1433 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_2ss_avg, dm->num_rf_path);
1434 odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_2ss_avg, 2);
1435 } else
1436 #endif
1437 if (i == 1) {
1438 rate_type = "[1-SS]";
1439 tmp_cnt = dbg_s->rssi_1ss_cnt;
1440 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_1ss_avg, dm->num_rf_path);
1441 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_1ss_avg, dm->num_rf_path);
1442 odm_move_memory(dm, tmp_evm_avg, &dbg_avg->evm_1ss_avg, 1);
1443 } else {
1444 rate_type = "[L-OFDM]";
1445 tmp_cnt = dbg_s->rssi_ofdm_cnt;
1446 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_ofdm_avg, dm->num_rf_path);
1447 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_ofdm_avg, dm->num_rf_path);
1448 odm_move_memory(dm, tmp_evm_avg, &dbg_avg->evm_ofdm_avg, 1);
1449 }
1450
1451 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1452 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n",
1453 rate_type, tmp_cnt,
1454 tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2], tmp_rssi_avg[3],
1455 tmp_snr_avg[0], tmp_snr_avg[1], tmp_snr_avg[2], tmp_snr_avg[3],
1456 tmp_evm_avg[0], tmp_evm_avg[1], tmp_evm_avg[2], tmp_evm_avg[3]);
1457 RT_PRINT(buf);
1458 }
1459 /*@----------------------------------------------------------*/
1460
1461 /*Print TX rate*/
1462 for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
1463 entry = dm->phydm_sta_info[macid];
1464
1465 if (is_sta_active(entry)) {
1466 phydm_print_rate_2_buff(dm, entry->ra_info.curr_tx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
1467 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n TxRate[%d]=%s (0x%x)", macid, dbg_buf, entry->ra_info.curr_tx_rate);
1468 RT_PRINT(buf);
1469 target_macid = macid;
1470 break;
1471 }
1472 }
1473
1474 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1475 "\r\n TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))",
1476 dm->tx_tp, dm->rx_tp, dm->total_tp, dm->traffic_load);
1477 RT_PRINT(buf);
1478
1479 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n CFO_avg=((%d kHz)), CFO_traking = ((%s%d))",
1480 cfo_t->CFO_ave_pre,
1481 ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
1482 DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
1483 RT_PRINT(buf);
1484
1485 /* @Condition number */
1486 #if (RTL8822B_SUPPORT)
1487 if (dm->support_ic_type == ODM_RTL8822B) {
1488 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Condi_Num=((%d.%.4d))",
1489 dm->phy_dbg_info.condi_num >> 4,
1490 phydm_show_fraction_num(dm->phy_dbg_info.condi_num & 0xf, 4));
1491 RT_PRINT(buf);
1492 }
1493 #endif
1494
1495 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT))
1496 /*STBC or LDPC pkt*/
1497 if (dm->support_ic_type & (PHYSTS_2ND_TYPE_IC |
1498 PHYSTS_3RD_TYPE_IC))
1499 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Coding: LDPC=((%s)), STBC=((%s))",
1500 (dm->phy_dbg_info.is_ldpc_pkt) ? "Y" : "N",
1501 (dm->phy_dbg_info.is_stbc_pkt) ? "Y" : "N");
1502 RT_PRINT(buf);
1503 #endif
1504
1505 } else {
1506 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n No Link !!!");
1507 RT_PRINT(buf);
1508 }
1509
1510 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1511 "\r\n [Tx cnt] {CCK_TxEN, CCK_TxON, OFDM_TxEN, OFDM_TxON} = {%d, %d, %d, %d}",
1512 fa_t->cnt_cck_txen, fa_t->cnt_cck_txon, fa_t->cnt_ofdm_txen,
1513 fa_t->cnt_ofdm_txon);
1514 RT_PRINT(buf);
1515
1516 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}",
1517 fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all);
1518 RT_PRINT(buf);
1519
1520 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}",
1521 fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all);
1522 RT_PRINT(buf);
1523
1524 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1525 "\r\n [FA duration(us)] {exp, ifs_clm, fahm} = {%d, %d, %d}",
1526 fa_t->time_fa_exp, fa_t->time_fa_ifs_clm,
1527 fa_t->time_fa_fahm);
1528 RT_PRINT(buf);
1529
1530 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1531 "\r\n [OFDM FA] Parity=%d, Rate=%d, Fast_Fsync=%d, SBD=%d",
1532 fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal,
1533 fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail);
1534 RT_PRINT(buf);
1535
1536 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [HT FA] CRC8=%d, MCS=%d",
1537 fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail);
1538 RT_PRINT(buf);
1539
1540 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1541 if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) {
1542 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1543 "\r\n [VHT FA] SIGA_CRC8=%d, SIGB_CRC8=%d, MCS=%d",
1544 fa_t->cnt_crc8_fail_vhta, fa_t->cnt_crc8_fail_vhtb,
1545 fa_t->cnt_mcs_fail_vht);
1546 RT_PRINT(buf);
1547 }
1548 #endif
1549
1550 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1551 "\r\n [CRC32 OK Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}",
1552 fa_t->cnt_cck_crc32_ok, fa_t->cnt_ofdm_crc32_ok,
1553 fa_t->cnt_ht_crc32_ok, fa_t->cnt_vht_crc32_ok,
1554 fa_t->cnt_crc32_ok_all);
1555 RT_PRINT(buf);
1556
1557 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1558 "\r\n [CRC32 Err Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}",
1559 fa_t->cnt_cck_crc32_error, fa_t->cnt_ofdm_crc32_error,
1560 fa_t->cnt_ht_crc32_error, fa_t->cnt_vht_crc32_error,
1561 fa_t->cnt_crc32_error_all);
1562 RT_PRINT(buf);
1563
1564 if (fa_t->ofdm2_rate_idx) {
1565 phydm_print_rate_2_buff(dm, fa_t->ofdm2_rate_idx,
1566 dbg_buf, PHYDM_SNPRINT_SIZE);
1567 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1568 "\r\n [OFDM:%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)",
1569 dbg_buf, fa_t->cnt_ofdm2_crc32_error,
1570 fa_t->cnt_ofdm2_crc32_ok, fa_t->ofdm2_pcr);
1571 RT_PRINT(buf);
1572 }
1573
1574 if (fa_t->ht2_rate_idx) {
1575 phydm_print_rate_2_buff(dm, fa_t->ht2_rate_idx, dbg_buf,
1576 PHYDM_SNPRINT_SIZE);
1577 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1578 "\r\n [HT :%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)",
1579 dbg_buf, fa_t->cnt_ht2_crc32_error,
1580 fa_t->cnt_ht2_crc32_ok, fa_t->ht2_pcr);
1581 RT_PRINT(buf);
1582 }
1583
1584 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1585 if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) {
1586 if (fa_t->vht2_rate_idx) {
1587 phydm_print_rate_2_buff(dm, fa_t->vht2_rate_idx,
1588 dbg_buf, PHYDM_SNPRINT_SIZE);
1589 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1590 "\r\n [VHT :%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)",
1591 dbg_buf, fa_t->cnt_vht2_crc32_error,
1592 fa_t->cnt_vht2_crc32_ok, fa_t->vht2_pcr);
1593 RT_PRINT(buf);
1594 }
1595 }
1596 #endif
1597
1598 if (dm->support_ic_type & (ODM_IC_11N_SERIES | ODM_IC_11AC_SERIES))
1599 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1600 "\r\n is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n",
1601 dm->is_linked, dm->number_linked_client, dm->rssi_min,
1602 dm->dm_dig_table.cur_ig_value, dm->noisy_decision);
1603 else
1604 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1605 "\r\n is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x\n",
1606 dm->is_linked, dm->number_linked_client, dm->rssi_min,
1607 dm->dm_dig_table.cur_ig_value);
1608
1609 RT_PRINT(buf);
1610
1611 phydm_dm_summary_cli_win(dm, buf, target_macid);
1612 }
1613
1614 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
phydm_sbd_check(struct dm_struct * dm)1615 void phydm_sbd_check(
1616 struct dm_struct *dm)
1617 {
1618 static u32 pkt_cnt;
1619 static boolean sbd_state;
1620 u32 sym_count, count, value32;
1621
1622 if (sbd_state == 0) {
1623 pkt_cnt++;
1624 /*read SBD conter once every 5 packets*/
1625 if (pkt_cnt % 5 == 0) {
1626 odm_set_timer(dm, &dm->sbdcnt_timer, 0); /*@ms*/
1627 sbd_state = 1;
1628 }
1629 } else { /*read counter*/
1630 value32 = odm_get_bb_reg(dm, R_0xf98, MASKDWORD);
1631 sym_count = (value32 & 0x7C000000) >> 26;
1632 count = (value32 & 0x3F00000) >> 20;
1633 pr_debug("#SBD# sym_count %d count %d\n", sym_count, count);
1634 sbd_state = 0;
1635 }
1636 }
1637 #endif
1638
phydm_sbd_callback(struct phydm_timer_list * timer)1639 void phydm_sbd_callback(
1640 struct phydm_timer_list *timer)
1641 {
1642 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
1643 void *adapter = timer->Adapter;
1644 HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter);
1645 struct dm_struct *dm = &hal_data->DM_OutSrc;
1646
1647 #if USE_WORKITEM
1648 odm_schedule_work_item(&dm->sbdcnt_workitem);
1649 #else
1650 phydm_sbd_check(dm);
1651 #endif
1652 #endif
1653 }
1654
phydm_sbd_workitem_callback(void * context)1655 void phydm_sbd_workitem_callback(
1656 void *context)
1657 {
1658 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
1659 void *adapter = (void *)context;
1660 HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter);
1661 struct dm_struct *dm = &hal_data->DM_OutSrc;
1662
1663 phydm_sbd_check(dm);
1664 #endif
1665 }
1666 #endif
1667
phydm_reset_rx_rate_distribution(struct dm_struct * dm)1668 void phydm_reset_rx_rate_distribution(struct dm_struct *dm)
1669 {
1670 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1671
1672 odm_memory_set(dm, &dbg->num_qry_legacy_pkt[0], 0,
1673 (LEGACY_RATE_NUM * 2));
1674 odm_memory_set(dm, &dbg->num_qry_ht_pkt[0], 0,
1675 (HT_RATE_NUM * 2));
1676 odm_memory_set(dm, &dbg->num_qry_pkt_sc_20m[0], 0,
1677 (LOW_BW_RATE_NUM * 2));
1678
1679 dbg->ht_pkt_not_zero = false;
1680 dbg->low_bw_20_occur = false;
1681
1682 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1683 odm_memory_set(dm, &dbg->num_qry_vht_pkt[0], 0, VHT_RATE_NUM * 2);
1684 odm_memory_set(dm, &dbg->num_qry_pkt_sc_40m[0], 0, LOW_BW_RATE_NUM * 2);
1685 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) || (defined(PHYSTS_3RD_TYPE_SUPPORT))
1686 odm_memory_set(dm, &dbg->num_mu_vht_pkt[0], 0, VHT_RATE_NUM * 2);
1687 #endif
1688 dbg->vht_pkt_not_zero = false;
1689 dbg->low_bw_40_occur = false;
1690 #endif
1691 }
1692
phydm_rx_rate_distribution(void * dm_void)1693 void phydm_rx_rate_distribution(void *dm_void)
1694 {
1695 struct dm_struct *dm = (struct dm_struct *)dm_void;
1696 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1697 u8 i = 0;
1698 u8 rate_num = dm->num_rf_path, ss_ofst = 0;
1699
1700 PHYDM_DBG(dm, DBG_CMN, "[RxRate Cnt] =============>\n");
1701
1702 /*@======CCK=========================================================*/
1703 if (*dm->channel <= 14) {
1704 PHYDM_DBG(dm, DBG_CMN, "* CCK = {%d, %d, %d, %d}\n",
1705 dbg->num_qry_legacy_pkt[0],
1706 dbg->num_qry_legacy_pkt[1],
1707 dbg->num_qry_legacy_pkt[2],
1708 dbg->num_qry_legacy_pkt[3]);
1709 }
1710 /*@======OFDM========================================================*/
1711 PHYDM_DBG(dm, DBG_CMN, "* OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
1712 dbg->num_qry_legacy_pkt[4], dbg->num_qry_legacy_pkt[5],
1713 dbg->num_qry_legacy_pkt[6], dbg->num_qry_legacy_pkt[7],
1714 dbg->num_qry_legacy_pkt[8], dbg->num_qry_legacy_pkt[9],
1715 dbg->num_qry_legacy_pkt[10], dbg->num_qry_legacy_pkt[11]);
1716
1717 /*@======HT==========================================================*/
1718 if (dbg->ht_pkt_not_zero) {
1719 for (i = 0; i < rate_num; i++) {
1720 ss_ofst = (i << 3);
1721
1722 PHYDM_DBG(dm, DBG_CMN,
1723 "* HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
1724 (ss_ofst), (ss_ofst + 7),
1725 dbg->num_qry_ht_pkt[ss_ofst + 0],
1726 dbg->num_qry_ht_pkt[ss_ofst + 1],
1727 dbg->num_qry_ht_pkt[ss_ofst + 2],
1728 dbg->num_qry_ht_pkt[ss_ofst + 3],
1729 dbg->num_qry_ht_pkt[ss_ofst + 4],
1730 dbg->num_qry_ht_pkt[ss_ofst + 5],
1731 dbg->num_qry_ht_pkt[ss_ofst + 6],
1732 dbg->num_qry_ht_pkt[ss_ofst + 7]);
1733 }
1734
1735 if (dbg->low_bw_20_occur) {
1736 for (i = 0; i < rate_num; i++) {
1737 ss_ofst = (i << 3);
1738
1739 PHYDM_DBG(dm, DBG_CMN,
1740 "* [Low BW 20M] HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
1741 (ss_ofst), (ss_ofst + 7),
1742 dbg->num_qry_pkt_sc_20m[ss_ofst + 0],
1743 dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1744 dbg->num_qry_pkt_sc_20m[ss_ofst + 2],
1745 dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1746 dbg->num_qry_pkt_sc_20m[ss_ofst + 4],
1747 dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1748 dbg->num_qry_pkt_sc_20m[ss_ofst + 6],
1749 dbg->num_qry_pkt_sc_20m[ss_ofst + 7]);
1750 }
1751 }
1752 }
1753
1754 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1755 /*@======VHT==========================================================*/
1756 if (dbg->vht_pkt_not_zero) {
1757 for (i = 0; i < rate_num; i++) {
1758 ss_ofst = 10 * i;
1759
1760 PHYDM_DBG(dm, DBG_CMN,
1761 "* VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
1762 (i + 1),
1763 dbg->num_qry_vht_pkt[ss_ofst + 0],
1764 dbg->num_qry_vht_pkt[ss_ofst + 1],
1765 dbg->num_qry_vht_pkt[ss_ofst + 2],
1766 dbg->num_qry_vht_pkt[ss_ofst + 3],
1767 dbg->num_qry_vht_pkt[ss_ofst + 4],
1768 dbg->num_qry_vht_pkt[ss_ofst + 5],
1769 dbg->num_qry_vht_pkt[ss_ofst + 6],
1770 dbg->num_qry_vht_pkt[ss_ofst + 7],
1771 dbg->num_qry_vht_pkt[ss_ofst + 8],
1772 dbg->num_qry_vht_pkt[ss_ofst + 9]);
1773 }
1774
1775 if (dbg->low_bw_20_occur) {
1776 for (i = 0; i < rate_num; i++) {
1777 ss_ofst = 10 * i;
1778
1779 PHYDM_DBG(dm, DBG_CMN,
1780 "*[Low BW 20M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
1781 (i + 1),
1782 dbg->num_qry_pkt_sc_20m[ss_ofst + 0],
1783 dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1784 dbg->num_qry_pkt_sc_20m[ss_ofst + 2],
1785 dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1786 dbg->num_qry_pkt_sc_20m[ss_ofst + 4],
1787 dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1788 dbg->num_qry_pkt_sc_20m[ss_ofst + 6],
1789 dbg->num_qry_pkt_sc_20m[ss_ofst + 7],
1790 dbg->num_qry_pkt_sc_20m[ss_ofst + 8],
1791 dbg->num_qry_pkt_sc_20m[ss_ofst + 9]);
1792 }
1793 }
1794
1795 if (dbg->low_bw_40_occur) {
1796 for (i = 0; i < rate_num; i++) {
1797 ss_ofst = 10 * i;
1798
1799 PHYDM_DBG(dm, DBG_CMN,
1800 "*[Low BW 40M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
1801 (i + 1),
1802 dbg->num_qry_pkt_sc_40m[ss_ofst + 0],
1803 dbg->num_qry_pkt_sc_40m[ss_ofst + 1],
1804 dbg->num_qry_pkt_sc_40m[ss_ofst + 2],
1805 dbg->num_qry_pkt_sc_40m[ss_ofst + 3],
1806 dbg->num_qry_pkt_sc_40m[ss_ofst + 4],
1807 dbg->num_qry_pkt_sc_40m[ss_ofst + 5],
1808 dbg->num_qry_pkt_sc_40m[ss_ofst + 6],
1809 dbg->num_qry_pkt_sc_40m[ss_ofst + 7],
1810 dbg->num_qry_pkt_sc_40m[ss_ofst + 8],
1811 dbg->num_qry_pkt_sc_40m[ss_ofst + 9]);
1812 }
1813 }
1814 }
1815 #endif
1816 }
1817
phydm_rx_utility(void * dm_void,u16 avg_phy_rate,u8 rx_max_ss,enum channel_width bw)1818 u16 phydm_rx_utility(void *dm_void, u16 avg_phy_rate, u8 rx_max_ss,
1819 enum channel_width bw)
1820 {
1821 struct dm_struct *dm = (struct dm_struct *)dm_void;
1822 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1823 u16 utility_primitive = 0, utility = 0;
1824
1825 if (dbg->ht_pkt_not_zero) {
1826 /*@ MCS7 20M: tp = 65, 1000/65 = 15.38, 65*15.5 = 1007*/
1827 utility_primitive = avg_phy_rate * 15 + (avg_phy_rate >> 1);
1828 }
1829 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1830 else if (dbg->vht_pkt_not_zero) {
1831 /*@ VHT 1SS MCS9(fake) 20M: tp = 90, 1000/90 = 11.11, 65*11.125 = 1001*/
1832 utility_primitive = avg_phy_rate * 11 + (avg_phy_rate >> 3);
1833 }
1834 #endif
1835 else {
1836 /*@ 54M, 1000/54 = 18.5, 54*18.5 = 999*/
1837 utility_primitive = avg_phy_rate * 18 + (avg_phy_rate >> 1);
1838 }
1839
1840 utility = (utility_primitive / rx_max_ss) >> bw;
1841
1842 if (utility > 1000)
1843 utility = 1000;
1844
1845 return utility;
1846 }
1847
phydm_rx_avg_phy_rate(void * dm_void)1848 u16 phydm_rx_avg_phy_rate(void *dm_void)
1849 {
1850 struct dm_struct *dm = (struct dm_struct *)dm_void;
1851 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1852 u8 i = 0, rate_num = 0, rate_base = 0;
1853 u16 rate = 0, avg_phy_rate = 0;
1854 u32 pkt_cnt = 0, phy_rate_sum = 0;
1855
1856 if (dbg->ht_pkt_not_zero) {
1857 rate_num = HT_RATE_NUM;
1858 rate_base = ODM_RATEMCS0;
1859 for (i = 0; i < rate_num; i++) {
1860 rate = phy_rate_table[i + rate_base] << *dm->band_width;
1861 phy_rate_sum += dbg->num_qry_ht_pkt[i] * rate;
1862 pkt_cnt += dbg->num_qry_ht_pkt[i];
1863 }
1864 }
1865 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1866 else if (dbg->vht_pkt_not_zero) {
1867 rate_num = VHT_RATE_NUM;
1868 rate_base = ODM_RATEVHTSS1MCS0;
1869 for (i = 0; i < rate_num; i++) {
1870 rate = phy_rate_table[i + rate_base] << *dm->band_width;
1871 phy_rate_sum += dbg->num_qry_vht_pkt[i] * rate;
1872 pkt_cnt += dbg->num_qry_vht_pkt[i];
1873 }
1874 }
1875 #endif
1876 else {
1877 for (i = ODM_RATE1M; i <= ODM_RATE54M; i++) {
1878 /*SKIP 1M & 6M for beacon case*/
1879 if (*dm->channel < 36 && i == ODM_RATE1M)
1880 continue;
1881
1882 if (*dm->channel >= 36 && i == ODM_RATE6M)
1883 continue;
1884
1885 rate = phy_rate_table[i];
1886 phy_rate_sum += dbg->num_qry_legacy_pkt[i] * rate;
1887 pkt_cnt += dbg->num_qry_legacy_pkt[i];
1888 }
1889 }
1890
1891 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1892 if (dbg->low_bw_40_occur) {
1893 for (i = 0; i < LOW_BW_RATE_NUM; i++) {
1894 rate = phy_rate_table[i + rate_base]
1895 << CHANNEL_WIDTH_40;
1896 phy_rate_sum += dbg->num_qry_pkt_sc_40m[i] * rate;
1897 pkt_cnt += dbg->num_qry_pkt_sc_40m[i];
1898 }
1899 }
1900 #endif
1901
1902 if (dbg->low_bw_20_occur) {
1903 for (i = 0; i < LOW_BW_RATE_NUM; i++) {
1904 rate = phy_rate_table[i + rate_base];
1905 phy_rate_sum += dbg->num_qry_pkt_sc_20m[i] * rate;
1906 pkt_cnt += dbg->num_qry_pkt_sc_20m[i];
1907 }
1908 }
1909
1910 avg_phy_rate = (pkt_cnt == 0) ? 0 : (u16)(phy_rate_sum / pkt_cnt);
1911
1912 return avg_phy_rate;
1913 }
1914
phydm_print_hist_2_buf(void * dm_void,u16 * val,u16 len,char * buf,u16 buf_size)1915 void phydm_print_hist_2_buf(void *dm_void, u16 *val, u16 len, char *buf,
1916 u16 buf_size)
1917 {
1918 struct dm_struct *dm = (struct dm_struct *)dm_void;
1919
1920 if (len == PHY_HIST_SIZE) {
1921 PHYDM_SNPRINTF(buf, buf_size,
1922 "[%.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d]",
1923 val[0], val[1], val[2], val[3], val[4],
1924 val[5], val[6], val[7], val[8], val[9],
1925 val[10], val[11]);
1926 } else if (len == (PHY_HIST_SIZE - 1)) {
1927 PHYDM_SNPRINTF(buf, buf_size,
1928 "[%.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d]",
1929 val[0], val[1], val[2], val[3], val[4],
1930 val[5], val[6], val[7], val[8], val[9],
1931 val[10]);
1932 }
1933 }
1934
phydm_nss_hitogram(void * dm_void,enum PDM_RATE_TYPE rate_type)1935 void phydm_nss_hitogram(void *dm_void, enum PDM_RATE_TYPE rate_type)
1936 {
1937 struct dm_struct *dm = (struct dm_struct *)dm_void;
1938 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
1939 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
1940 char buf[PHYDM_SNPRINT_SIZE] = {0};
1941 u16 buf_size = PHYDM_SNPRINT_SIZE;
1942 u16 h_size = PHY_HIST_SIZE;
1943 u16 *evm_hist = &dbg_s->evm_1ss_hist[0];
1944 u16 *snr_hist = &dbg_s->snr_1ss_hist[0];
1945 u8 i = 0;
1946 u8 ss = phydm_rate_type_2_num_ss(dm, rate_type);
1947
1948 for (i = 0; i < ss; i++) {
1949 if (rate_type == PDM_1SS) {
1950 evm_hist = &dbg_s->evm_1ss_hist[0];
1951 snr_hist = &dbg_s->snr_1ss_hist[0];
1952 } else if (rate_type == PDM_2SS) {
1953 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
1954 evm_hist = &dbg_s->evm_2ss_hist[i][0];
1955 snr_hist = &dbg_s->snr_2ss_hist[i][0];
1956 #endif
1957 } else if (rate_type == PDM_3SS) {
1958 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
1959 evm_hist = &dbg_s->evm_3ss_hist[i][0];
1960 snr_hist = &dbg_s->snr_3ss_hist[i][0];
1961 #endif
1962 } else if (rate_type == PDM_4SS) {
1963 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
1964 evm_hist = &dbg_s->evm_4ss_hist[i][0];
1965 snr_hist = &dbg_s->snr_4ss_hist[i][0];
1966 #endif
1967 }
1968
1969 phydm_print_hist_2_buf(dm, evm_hist, h_size, buf, buf_size);
1970 PHYDM_DBG(dm, DBG_CMN, "[%d-SS][EVM][%d]=%s\n", ss, i, buf);
1971 phydm_print_hist_2_buf(dm, snr_hist, h_size, buf, buf_size);
1972 PHYDM_DBG(dm, DBG_CMN, "[%d-SS][SNR][%d]=%s\n", ss, i, buf);
1973 }
1974 }
1975
1976 #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH
phydm_show_cn_hitogram(void * dm_void)1977 void phydm_show_cn_hitogram(void *dm_void)
1978 {
1979 struct dm_struct *dm = (struct dm_struct *)dm_void;
1980 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
1981 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
1982 u16 th_tmp[PHY_HIST_TH_SIZE];
1983 char buf[PHYDM_SNPRINT_SIZE] = {0};
1984 u8 i = 0;
1985 u16 *cn_hist = NULL;
1986 u32 cn_avg = 0;
1987
1988 if (!dm->pkt_proc_struct.physts_auto_swch_en)
1989 return;
1990
1991 if (dm->num_rf_path == 1)
1992 return;
1993
1994 PHYDM_DBG(dm, DBG_CMN, "[Condition number Histogram] ========>\n");
1995 /*@===[Threshold]=============================================================*/
1996 for (i = 0; i < PHY_HIST_TH_SIZE; i++)
1997 th_tmp[i] = dbg_i->cn_hist_th[i] >> 1;
1998
1999 phydm_print_hist_2_buf(dm, th_tmp,
2000 PHY_HIST_TH_SIZE, buf, PHYDM_SNPRINT_SIZE);
2001 PHYDM_DBG(dm, DBG_CMN, "%-24s=%s\n", "[CN_TH]", buf);
2002
2003 /*@===[Histogram]=============================================================*/
2004
2005 for (i = 1; i <= dm->num_rf_path; i++) {
2006 if (dbg_s->p4_cnt[i] == 0)
2007 continue;
2008
2009 cn_avg = PHYDM_DIV((dbg_s->cn_sum[i] +
2010 (dbg_s->p4_cnt[i] >> 1)) << 2,
2011 dbg_s->p4_cnt[i]); /*u(8,1)<<2 -> u(10,3)*/
2012
2013 cn_hist = &dbg_s->cn_hist[i][0];
2014 phydm_print_hist_2_buf(dm, cn_hist,
2015 PHY_HIST_SIZE, buf, PHYDM_SNPRINT_SIZE);
2016 PHYDM_DBG(dm, DBG_CMN, "[%d-SS]%s=(avg:%d.%4d)%s\n",
2017 i + 1, "[CN]", cn_avg >> 3,
2018 phydm_show_fraction_num(cn_avg & 0x7, 3), buf);
2019 }
2020 }
2021 #endif
2022
phydm_show_phy_hitogram(void * dm_void)2023 void phydm_show_phy_hitogram(void *dm_void)
2024 {
2025 struct dm_struct *dm = (struct dm_struct *)dm_void;
2026 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
2027 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
2028 char buf[PHYDM_SNPRINT_SIZE] = {0};
2029 u16 buf_size = PHYDM_SNPRINT_SIZE;
2030 u16 th_size = PHY_HIST_SIZE - 1;
2031 u8 i = 0;
2032
2033 PHYDM_DBG(dm, DBG_CMN, "[PHY Histogram] ==============>\n");
2034 /*@===[Threshold]=============================================================*/
2035 phydm_print_hist_2_buf(dm, dbg_i->evm_hist_th, th_size, buf, buf_size);
2036 PHYDM_DBG(dm, DBG_CMN, "%-16s=%s\n", "[EVM_TH]", buf);
2037
2038 phydm_print_hist_2_buf(dm, dbg_i->snr_hist_th, th_size, buf, buf_size);
2039 PHYDM_DBG(dm, DBG_CMN, "%-16s=%s\n", "[SNR_TH]", buf);
2040 /*@===[OFDM]==================================================================*/
2041 if (dbg_s->rssi_ofdm_cnt) {
2042 phydm_print_hist_2_buf(dm, dbg_s->evm_ofdm_hist, PHY_HIST_SIZE,
2043 buf, buf_size);
2044 PHYDM_DBG(dm, DBG_CMN, "%-14s=%s\n", "[OFDM][EVM]", buf);
2045
2046 phydm_print_hist_2_buf(dm, dbg_s->snr_ofdm_hist, PHY_HIST_SIZE,
2047 buf, buf_size);
2048 PHYDM_DBG(dm, DBG_CMN, "%-14s=%s\n", "[OFDM][SNR]", buf);
2049 }
2050 /*@===[1-SS]==================================================================*/
2051 if (dbg_s->rssi_1ss_cnt)
2052 phydm_nss_hitogram(dm, PDM_1SS);
2053 /*@===[2-SS]==================================================================*/
2054 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
2055 if ((dm->support_ic_type & PHYDM_IC_ABOVE_2SS) && dbg_s->rssi_2ss_cnt)
2056 phydm_nss_hitogram(dm, PDM_2SS);
2057 #endif
2058 /*@===[3-SS]==================================================================*/
2059 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
2060 if ((dm->support_ic_type & PHYDM_IC_ABOVE_3SS) && dbg_s->rssi_3ss_cnt)
2061 phydm_nss_hitogram(dm, PDM_3SS);
2062 #endif
2063 /*@===[4-SS]==================================================================*/
2064 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2065 if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS && dbg_s->rssi_4ss_cnt)
2066 phydm_nss_hitogram(dm, PDM_4SS);
2067 #endif
2068 }
2069
phydm_avg_phy_val_nss(void * dm_void,u8 nss)2070 void phydm_avg_phy_val_nss(void *dm_void, u8 nss)
2071 {
2072 struct dm_struct *dm = (struct dm_struct *)dm_void;
2073 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
2074 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
2075 struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg;
2076 char *rate_type = NULL;
2077 u32 *tmp_cnt = NULL;
2078 u8 *tmp_rssi_avg = NULL;
2079 u32 *tmp_rssi_sum = NULL;
2080 u8 *tmp_snr_avg = NULL;
2081 u32 *tmp_snr_sum = NULL;
2082 u8 *tmp_evm_avg = NULL;
2083 u32 *tmp_evm_sum = NULL;
2084 u8 evm_rpt_show[RF_PATH_MEM_SIZE];
2085 u8 i = 0;
2086
2087 odm_memory_set(dm, &evm_rpt_show[0], 0, RF_PATH_MEM_SIZE);
2088
2089 switch (nss) {
2090 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2091 case 4:
2092 rate_type = "[4-SS]";
2093 tmp_cnt = &dbg_s->rssi_4ss_cnt;
2094 tmp_rssi_avg = &dbg_avg->rssi_4ss_avg[0];
2095 tmp_snr_avg = &dbg_avg->snr_4ss_avg[0];
2096 tmp_rssi_sum = &dbg_s->rssi_4ss_sum[0];
2097 tmp_snr_sum = &dbg_s->snr_4ss_sum[0];
2098 tmp_evm_avg = &dbg_avg->evm_4ss_avg[0];
2099 tmp_evm_sum = &dbg_s->evm_4ss_sum[0];
2100 break;
2101 #endif
2102 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
2103 case 3:
2104 rate_type = "[3-SS]";
2105 tmp_cnt = &dbg_s->rssi_3ss_cnt;
2106 tmp_rssi_avg = &dbg_avg->rssi_3ss_avg[0];
2107 tmp_snr_avg = &dbg_avg->snr_3ss_avg[0];
2108 tmp_rssi_sum = &dbg_s->rssi_3ss_sum[0];
2109 tmp_snr_sum = &dbg_s->snr_3ss_sum[0];
2110 tmp_evm_avg = &dbg_avg->evm_3ss_avg[0];
2111 tmp_evm_sum = &dbg_s->evm_3ss_sum[0];
2112 break;
2113 #endif
2114 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
2115 case 2:
2116 rate_type = "[2-SS]";
2117 tmp_cnt = &dbg_s->rssi_2ss_cnt;
2118 tmp_rssi_avg = &dbg_avg->rssi_2ss_avg[0];
2119 tmp_snr_avg = &dbg_avg->snr_2ss_avg[0];
2120 tmp_rssi_sum = &dbg_s->rssi_2ss_sum[0];
2121 tmp_snr_sum = &dbg_s->snr_2ss_sum[0];
2122 tmp_evm_avg = &dbg_avg->evm_2ss_avg[0];
2123 tmp_evm_sum = &dbg_s->evm_2ss_sum[0];
2124 break;
2125 #endif
2126 case 1:
2127 rate_type = "[1-SS]";
2128 tmp_cnt = &dbg_s->rssi_1ss_cnt;
2129 tmp_rssi_avg = &dbg_avg->rssi_1ss_avg[0];
2130 tmp_snr_avg = &dbg_avg->snr_1ss_avg[0];
2131 tmp_rssi_sum = &dbg_s->rssi_1ss_sum[0];
2132 tmp_snr_sum = &dbg_s->snr_1ss_sum[0];
2133 tmp_evm_avg = &dbg_avg->evm_1ss_avg;
2134 tmp_evm_sum = &dbg_s->evm_1ss_sum;
2135 break;
2136 case 0:
2137 rate_type = "[L-OFDM]";
2138 tmp_cnt = &dbg_s->rssi_ofdm_cnt;
2139 tmp_rssi_avg = &dbg_avg->rssi_ofdm_avg[0];
2140 tmp_snr_avg = &dbg_avg->snr_ofdm_avg[0];
2141 tmp_rssi_sum = &dbg_s->rssi_ofdm_sum[0];
2142 tmp_snr_sum = &dbg_s->snr_ofdm_sum[0];
2143 tmp_evm_avg = &dbg_avg->evm_ofdm_avg;
2144 tmp_evm_sum = &dbg_s->evm_ofdm_sum;
2145 break;
2146 default:
2147 PHYDM_DBG(dm, DBG_CMN, "[warning] %s\n", __func__);
2148 return;
2149 }
2150
2151 if (*tmp_cnt != 0) {
2152 for (i = 0; i < dm->num_rf_path; i++) {
2153 tmp_rssi_avg[i] = (u8)(tmp_rssi_sum[i] / *tmp_cnt);
2154 tmp_snr_avg[i] = (u8)(tmp_snr_sum[i] / *tmp_cnt);
2155 }
2156
2157 if (nss == 0 || nss == 1) {
2158 *tmp_evm_avg = (u8)(*tmp_evm_sum / *tmp_cnt);
2159 evm_rpt_show[0] = *tmp_evm_avg;
2160 } else {
2161 for (i = 0; i < nss; i++) {
2162 tmp_evm_avg[i] = (u8)(tmp_evm_sum[i] /
2163 *tmp_cnt);
2164 evm_rpt_show[i] = tmp_evm_avg[i];
2165 }
2166 }
2167 }
2168
2169 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2170 PHYDM_DBG(dm, DBG_CMN,
2171 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n",
2172 rate_type, *tmp_cnt,
2173 tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2],
2174 tmp_rssi_avg[3], tmp_snr_avg[0], tmp_snr_avg[1],
2175 tmp_snr_avg[2], tmp_snr_avg[3], evm_rpt_show[0],
2176 evm_rpt_show[1], evm_rpt_show[2], evm_rpt_show[3]);
2177 #elif (defined(PHYDM_COMPILE_ABOVE_3SS))
2178 PHYDM_DBG(dm, DBG_CMN,
2179 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d}\n",
2180 rate_type, *tmp_cnt,
2181 tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2],
2182 tmp_snr_avg[0], tmp_snr_avg[1], tmp_snr_avg[2],
2183 evm_rpt_show[0], evm_rpt_show[1], evm_rpt_show[2]);
2184 #elif (defined(PHYDM_COMPILE_ABOVE_2SS))
2185 PHYDM_DBG(dm, DBG_CMN,
2186 "* %-8s Cnt= ((%.3d)) RSSI:{%.2d, %.2d} SNR:{%.2d, %.2d} EVM:{-%.2d, -%.2d}\n",
2187 rate_type, *tmp_cnt,
2188 tmp_rssi_avg[0], tmp_rssi_avg[1],
2189 tmp_snr_avg[0], tmp_snr_avg[1],
2190 evm_rpt_show[0], evm_rpt_show[1]);
2191 #else
2192 PHYDM_DBG(dm, DBG_CMN,
2193 "* %-8s Cnt= ((%.3d)) RSSI:{%.2d} SNR:{%.2d} EVM:{-%.2d}\n",
2194 rate_type, *tmp_cnt,
2195 tmp_rssi_avg[0], tmp_snr_avg[0], evm_rpt_show[0]);
2196 #endif
2197 }
2198
phydm_get_avg_phystatus_val(void * dm_void)2199 void phydm_get_avg_phystatus_val(void *dm_void)
2200 {
2201 struct dm_struct *dm = (struct dm_struct *)dm_void;
2202 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
2203 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
2204 struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg;
2205 u32 avg_tmp = 0;
2206 u8 i = 0;
2207
2208 PHYDM_DBG(dm, DBG_CMN, "[PHY Avg] ==============>\n");
2209 phydm_reset_phystatus_avg(dm);
2210
2211 /*@===[Beacon]===*/
2212 if (dbg_s->rssi_beacon_cnt) {
2213 for (i = 0; i < dm->num_rf_path; i++) {
2214 avg_tmp = dbg_s->rssi_beacon_sum[i] /
2215 dbg_s->rssi_beacon_cnt;
2216 dbg_avg->rssi_beacon_avg[i] = (u8)avg_tmp;
2217 }
2218 }
2219
2220 switch (dm->num_rf_path) {
2221 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2222 case 4:
2223 PHYDM_DBG(dm, DBG_CMN,
2224 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
2225 "[Beacon]", dbg_s->rssi_beacon_cnt,
2226 dbg_avg->rssi_beacon_avg[0],
2227 dbg_avg->rssi_beacon_avg[1],
2228 dbg_avg->rssi_beacon_avg[2],
2229 dbg_avg->rssi_beacon_avg[3]);
2230 break;
2231 #endif
2232 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
2233 case 3:
2234 PHYDM_DBG(dm, DBG_CMN,
2235 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
2236 "[Beacon]", dbg_s->rssi_beacon_cnt,
2237 dbg_avg->rssi_beacon_avg[0],
2238 dbg_avg->rssi_beacon_avg[1],
2239 dbg_avg->rssi_beacon_avg[2]);
2240 break;
2241 #endif
2242 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
2243 case 2:
2244 PHYDM_DBG(dm, DBG_CMN,
2245 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
2246 "[Beacon]", dbg_s->rssi_beacon_cnt,
2247 dbg_avg->rssi_beacon_avg[0],
2248 dbg_avg->rssi_beacon_avg[1]);
2249 break;
2250 #endif
2251 default:
2252 PHYDM_DBG(dm, DBG_CMN, "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
2253 "[Beacon]", dbg_s->rssi_beacon_cnt,
2254 dbg_avg->rssi_beacon_avg[0]);
2255 break;
2256 }
2257
2258 /*@===[CCK]===*/
2259 if (dbg_s->rssi_cck_cnt) {
2260 dbg_avg->rssi_cck_avg = (u8)(dbg_s->rssi_cck_sum /
2261 dbg_s->rssi_cck_cnt);
2262 #if (defined(PHYSTS_3RD_TYPE_SUPPORT) && defined(PHYDM_COMPILE_ABOVE_2SS))
2263 if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) {
2264 for (i = 0; i < dm->num_rf_path - 1; i++) {
2265 avg_tmp = dbg_s->rssi_cck_sum_abv_2ss[i] /
2266 dbg_s->rssi_cck_cnt;
2267 dbg_avg->rssi_cck_avg_abv_2ss[i] = (u8)avg_tmp;
2268 }
2269 }
2270 #endif
2271 }
2272
2273 switch (dm->num_rf_path) {
2274 #ifdef PHYSTS_3RD_TYPE_SUPPORT
2275 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2276 case 4:
2277 PHYDM_DBG(dm, DBG_CMN,
2278 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
2279 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg,
2280 dbg_avg->rssi_cck_avg_abv_2ss[0],
2281 dbg_avg->rssi_cck_avg_abv_2ss[1],
2282 dbg_avg->rssi_cck_avg_abv_2ss[2]);
2283 break;
2284 #endif
2285 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
2286 case 3:
2287 PHYDM_DBG(dm, DBG_CMN,
2288 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
2289 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg,
2290 dbg_avg->rssi_cck_avg_abv_2ss[0],
2291 dbg_avg->rssi_cck_avg_abv_2ss[1]);
2292 break;
2293 #endif
2294 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
2295 case 2:
2296 PHYDM_DBG(dm, DBG_CMN,
2297 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
2298 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg,
2299 dbg_avg->rssi_cck_avg_abv_2ss[0]);
2300 break;
2301 #endif
2302 #endif
2303 default:
2304 PHYDM_DBG(dm, DBG_CMN, "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
2305 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg);
2306 break;
2307 }
2308
2309 for (i = 0; i <= dm->num_rf_path; i++)
2310 phydm_avg_phy_val_nss(dm, i);
2311 }
2312
phydm_get_phy_statistic(void * dm_void)2313 void phydm_get_phy_statistic(void *dm_void)
2314 {
2315 struct dm_struct *dm = (struct dm_struct *)dm_void;
2316 struct cmn_sta_info *sta = dm->phydm_sta_info[dm->one_entry_macid];
2317 enum channel_width bw;
2318 u16 avg_phy_rate = 0;
2319 u16 utility = 0;
2320 u8 rx_ss = 1;
2321
2322 avg_phy_rate = phydm_rx_avg_phy_rate(dm);
2323
2324 if (dm->is_one_entry_only && is_sta_active(sta)) {
2325 rx_ss = phydm_get_rx_stream_num(dm, sta->mimo_type);
2326 bw = sta->bw_mode;
2327 utility = phydm_rx_utility(dm, avg_phy_rate, rx_ss, bw);
2328 }
2329 PHYDM_DBG(dm, DBG_CMN, "Avg_rx_rate = %d, rx_utility=( %d / 1000 )\n",
2330 avg_phy_rate, utility);
2331
2332 phydm_rx_rate_distribution(dm);
2333 phydm_reset_rx_rate_distribution(dm);
2334
2335 phydm_show_phy_hitogram(dm);
2336 #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH
2337 phydm_show_cn_hitogram(dm);
2338 #endif
2339 phydm_get_avg_phystatus_val(dm);
2340 phydm_reset_phystatus_statistic(dm);
2341 };
2342
phydm_basic_dbg_msg_linked(void * dm_void)2343 void phydm_basic_dbg_msg_linked(void *dm_void)
2344 {
2345 struct dm_struct *dm = (struct dm_struct *)dm_void;
2346 struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
2347 struct odm_phy_dbg_info *dbg_t = &dm->phy_dbg_info;
2348 u16 macid, client_cnt = 0;
2349 u8 rate = 0;
2350 struct cmn_sta_info *entry = NULL;
2351 char dbg_buf[PHYDM_SNPRINT_SIZE] = {0};
2352 struct phydm_cfo_rpt cfo;
2353 u8 i = 0;
2354
2355 PHYDM_DBG(dm, DBG_CMN, "ID=((%d)), BW=((%d)), fc=((CH-%d))\n",
2356 dm->curr_station_id, 20 << *dm->band_width, *dm->channel);
2357
2358 #ifdef ODM_IC_11N_SERIES_SUPPORT
2359 #ifdef PHYDM_PRIMARY_CCA
2360 if (((*dm->channel <= 14) && (*dm->band_width == CHANNEL_WIDTH_40)) &&
2361 (dm->support_ic_type & ODM_IC_11N_SERIES) &&
2362 (dm->support_ability & ODM_BB_PRIMARY_CCA)) {
2363 PHYDM_DBG(dm, DBG_CMN, "Primary CCA at ((%s SB))\n",
2364 ((*dm->sec_ch_offset == SECOND_CH_AT_LSB) ? "U" :
2365 "L"));
2366 }
2367 #endif
2368 #endif
2369
2370 if (dm->cck_new_agc || dm->rx_rate > ODM_RATE11M) {
2371 PHYDM_DBG(dm, DBG_CMN, "[AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}\n",
2372 dm->ofdm_agc_idx[0], dm->ofdm_agc_idx[1],
2373 dm->ofdm_agc_idx[2], dm->ofdm_agc_idx[3]);
2374 } else {
2375 PHYDM_DBG(dm, DBG_CMN, "[CCK AGC Idx] {LNA,VGA}={0x%x, 0x%x}\n",
2376 dm->cck_lna_idx, dm->cck_vga_idx);
2377 }
2378
2379 phydm_print_rate_2_buff(dm, dm->rx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
2380 PHYDM_DBG(dm, DBG_CMN, "RSSI:{%d, %d, %d, %d}, RxRate:%s (0x%x)\n",
2381 (dm->rssi_a == 0xff) ? 0 : dm->rssi_a,
2382 (dm->rssi_b == 0xff) ? 0 : dm->rssi_b,
2383 (dm->rssi_c == 0xff) ? 0 : dm->rssi_c,
2384 (dm->rssi_d == 0xff) ? 0 : dm->rssi_d,
2385 dbg_buf, dm->rx_rate);
2386
2387 rate = dbg_t->beacon_phy_rate;
2388 phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE);
2389
2390 PHYDM_DBG(dm, DBG_CMN, "Beacon_cnt=%d, rate_idx=%s (0x%x)\n",
2391 dbg_t->num_qry_beacon_pkt, dbg_buf, dbg_t->beacon_phy_rate);
2392
2393 phydm_get_phy_statistic(dm);
2394
2395 PHYDM_DBG(dm, DBG_CMN,
2396 "rxsc_idx {Legacy, 20, 40, 80} = {%d, %d, %d, %d}\n",
2397 dm->rxsc_l, dm->rxsc_20, dm->rxsc_40, dm->rxsc_80);
2398
2399 /*Print TX rate*/
2400 for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
2401 entry = dm->phydm_sta_info[macid];
2402
2403 if (!is_sta_active(entry))
2404 continue;
2405
2406 rate = entry->ra_info.curr_tx_rate;
2407 phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE);
2408 PHYDM_DBG(dm, DBG_CMN, "TxRate[%d]=%s (0x%x)\n",
2409 macid, dbg_buf, entry->ra_info.curr_tx_rate);
2410
2411 client_cnt++;
2412
2413 if (client_cnt >= dm->number_linked_client)
2414 break;
2415 }
2416
2417 PHYDM_DBG(dm, DBG_CMN,
2418 "TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))\n",
2419 dm->tx_tp, dm->rx_tp, dm->total_tp, dm->traffic_load);
2420
2421 PHYDM_DBG(dm, DBG_CMN, "CFO_avg=((%d kHz)), CFO_traking = ((%s%d))\n",
2422 cfo_t->CFO_ave_pre,
2423 ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
2424 DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
2425
2426 /* @CFO report */
2427 switch (dm->ic_ip_series) {
2428 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
2429 case PHYDM_IC_JGR3:
2430 PHYDM_DBG(dm, DBG_CMN, "cfo_tail = {%d, %d, %d, %d}\n",
2431 dbg_t->cfo_tail[0], dbg_t->cfo_tail[1],
2432 dbg_t->cfo_tail[2], dbg_t->cfo_tail[3]);
2433 break;
2434 #endif
2435 default:
2436 phydm_get_cfo_info(dm, &cfo);
2437 for (i = 0; i < dm->num_rf_path; i++) {
2438 PHYDM_DBG(dm, DBG_CMN,
2439 "CFO[%d] {S, L, Sec, Acq, End} = {%d, %d, %d, %d, %d}\n",
2440 i, cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i],
2441 cfo.cfo_rpt_sec[i], cfo.cfo_rpt_acq[i],
2442 cfo.cfo_rpt_end[i]);
2443 }
2444 break;
2445 }
2446
2447 /* @Condition number */
2448 #if (RTL8822B_SUPPORT)
2449 if (dm->support_ic_type == ODM_RTL8822B) {
2450 PHYDM_DBG(dm, DBG_CMN, "Condi_Num=((%d.%.4d)), %d\n",
2451 dbg_t->condi_num >> 4,
2452 phydm_show_fraction_num(dbg_t->condi_num & 0xf, 4),
2453 dbg_t->condi_num);
2454 }
2455 #endif
2456 #ifdef PHYSTS_3RD_TYPE_SUPPORT
2457 if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) {
2458 PHYDM_DBG(dm, DBG_CMN, "Condi_Num=((%d.%4d dB))\n",
2459 dbg_t->condi_num >> 1,
2460 phydm_show_fraction_num(dbg_t->condi_num & 0x1, 1));
2461 }
2462 #endif
2463
2464 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT))
2465 /*STBC or LDPC pkt*/
2466 if (dm->support_ic_type & (PHYSTS_2ND_TYPE_IC | PHYSTS_3RD_TYPE_IC))
2467 PHYDM_DBG(dm, DBG_CMN, "Coding: LDPC=((%s)), STBC=((%s))\n",
2468 (dbg_t->is_ldpc_pkt) ? "Y" : "N",
2469 (dbg_t->is_stbc_pkt) ? "Y" : "N");
2470 #endif
2471
2472 #if (RTL8822C_SUPPORT || RTL8723F_SUPPORT)
2473 /*Beamformed pkt*/
2474 if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8723F))
2475 PHYDM_DBG(dm, DBG_CMN, "Beamformed=((%s))\n",
2476 (dm->is_beamformed) ? "Y" : "N");
2477 #endif
2478 }
2479
phydm_dm_summary(void * dm_void,u8 macid)2480 void phydm_dm_summary(void *dm_void, u8 macid)
2481 {
2482 struct dm_struct *dm = (struct dm_struct *)dm_void;
2483 struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
2484 struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
2485 struct cmn_sta_info *sta = NULL;
2486 struct ra_sta_info *ra = NULL;
2487 struct dtp_info *dtp = NULL;
2488 u64 comp = dm->support_ability;
2489 u64 pause_comp = dm->pause_ability;
2490
2491 if (!(dm->debug_components & DBG_DM_SUMMARY))
2492 return;
2493
2494 if (!dm->is_linked) {
2495 pr_debug("[%s]No Link !!!\n", __func__);
2496 return;
2497 }
2498
2499 sta = dm->phydm_sta_info[macid];
2500
2501 if (!is_sta_active(sta)) {
2502 pr_debug("[Warning] %s invalid STA, macid=%d\n",
2503 __func__, macid);
2504 return;
2505 }
2506
2507 ra = &sta->ra_info;
2508 dtp = &sta->dtp_stat;
2509 pr_debug("[%s]===========>\n", __func__);
2510
2511 pr_debug("00.(%s) %-12s: IGI=0x%x, Dyn_Rng=0x%x~0x%x, FA_th={%d,%d,%d}\n",
2512 ((comp & ODM_BB_DIG) ?
2513 ((pause_comp & ODM_BB_DIG) ? "P" : "V") : "."),
2514 "DIG",
2515 dig_t->cur_ig_value,
2516 dig_t->rx_gain_range_min, dig_t->rx_gain_range_max,
2517 dig_t->fa_th[0], dig_t->fa_th[1], dig_t->fa_th[2]);
2518
2519 pr_debug("01.(%s) %-12s: rssi_lv=%d, mask=0x%llx\n",
2520 ((comp & ODM_BB_RA_MASK) ?
2521 ((pause_comp & ODM_BB_RA_MASK) ? "P" : "V") : "."),
2522 "RaMask",
2523 ra->rssi_level, ra->ramask);
2524
2525 #ifdef CONFIG_DYNAMIC_TX_TWR
2526 pr_debug("02.(%s) %-12s: pwr_lv=%d\n",
2527 ((comp & ODM_BB_DYNAMIC_TXPWR) ?
2528 ((pause_comp & ODM_BB_DYNAMIC_TXPWR) ? "P" : "V") : "."),
2529 "DynTxPwr",
2530 dtp->sta_tx_high_power_lvl);
2531 #endif
2532
2533 pr_debug("05.(%s) %-12s: cck_pd_lv=%d\n",
2534 ((comp & ODM_BB_CCK_PD) ?
2535 ((pause_comp & ODM_BB_CCK_PD) ? "P" : "V") : "."),
2536 "CCK_PD", dm->dm_cckpd_table.cck_pd_lv);
2537
2538 #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
2539 pr_debug("06.(%s) %-12s: div_type=%d, curr_ant=%s\n",
2540 ((comp & ODM_BB_ANT_DIV) ?
2541 ((pause_comp & ODM_BB_ANT_DIV) ? "P" : "V") : "."),
2542 "ANT_DIV",
2543 dm->ant_div_type,
2544 (dm->dm_fat_table.rx_idle_ant == MAIN_ANT) ? "MAIN" : "AUX");
2545 #endif
2546
2547 #ifdef PHYDM_POWER_TRAINING_SUPPORT
2548 pr_debug("08.(%s) %-12s: PT_score=%d, disable_PT=%d\n",
2549 ((comp & ODM_BB_PWR_TRAIN) ?
2550 ((pause_comp & ODM_BB_PWR_TRAIN) ? "P" : "V") : "."),
2551 "PwrTrain",
2552 dm->pow_train_table.pow_train_score,
2553 dm->is_disable_power_training);
2554 #endif
2555
2556 #ifdef CONFIG_PHYDM_DFS_MASTER
2557 pr_debug("11.(%s) %-12s: dbg_mode=%d, region_domain=%d\n",
2558 ((comp & ODM_BB_DFS) ?
2559 ((pause_comp & ODM_BB_DFS) ? "P" : "V") : "."),
2560 "DFS",
2561 dm->dfs.dbg_mode, dm->dfs_region_domain);
2562 #endif
2563 #ifdef PHYDM_SUPPORT_ADAPTIVITY
2564 pr_debug("13.(%s) %-12s: th{l2h, h2l}={%d, %d}, edcca_flag=%d\n",
2565 ((comp & ODM_BB_ADAPTIVITY) ?
2566 ((pause_comp & ODM_BB_ADAPTIVITY) ? "P" : "V") : "."),
2567 "Adaptivity",
2568 dm->adaptivity.th_l2h, dm->adaptivity.th_h2l,
2569 dm->false_alm_cnt.edcca_flag);
2570 #endif
2571 pr_debug("14.(%s) %-12s: CFO_avg=%d kHz, CFO_traking=%s%d\n",
2572 ((comp & ODM_BB_CFO_TRACKING) ?
2573 ((pause_comp & ODM_BB_CFO_TRACKING) ? "P" : "V") : "."),
2574 "CfoTrack",
2575 cfo_t->CFO_ave_pre,
2576 ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
2577 DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
2578
2579 pr_debug("15.(%s) %-12s: ratio{nhm, clm}={%d, %d}\n",
2580 ((comp & ODM_BB_ENV_MONITOR) ?
2581 ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."),
2582 "EnvMntr",
2583 dm->dm_ccx_info.nhm_ratio, dm->dm_ccx_info.clm_ratio);
2584
2585 #ifdef PHYDM_PRIMARY_CCA
2586 pr_debug("16.(%s) %-12s: CCA @ (%s SB)\n",
2587 ((comp & ODM_BB_PRIMARY_CCA) ?
2588 ((pause_comp & ODM_BB_PRIMARY_CCA) ? "P" : "V") : "."),
2589 "PriCCA",
2590 ((dm->dm_pri_cca.mf_state == MF_USC_LSC) ? "D" :
2591 ((dm->dm_pri_cca.mf_state == MF_LSC) ? "L" : "U")));
2592 #endif
2593 #ifdef CONFIG_ADAPTIVE_SOML
2594 pr_debug("17.(%s) %-12s: soml_en = %s\n",
2595 ((comp & ODM_BB_ADAPTIVE_SOML) ?
2596 ((pause_comp & ODM_BB_ADAPTIVE_SOML) ? "P" : "V") : "."),
2597 "A-SOML",
2598 (dm->dm_soml_table.soml_last_state == SOML_ON) ?
2599 "ON" : "OFF");
2600 #endif
2601 #ifdef PHYDM_LNA_SAT_CHK_SUPPORT
2602 pr_debug("18.(%s) %-12s:\n",
2603 ((comp & ODM_BB_LNA_SAT_CHK) ?
2604 ((pause_comp & ODM_BB_LNA_SAT_CHK) ? "P" : "V") : "."),
2605 "LNA_SAT_CHK");
2606 #endif
2607 }
2608
phydm_basic_dbg_message(void * dm_void)2609 void phydm_basic_dbg_message(void *dm_void)
2610 {
2611 struct dm_struct *dm = (struct dm_struct *)dm_void;
2612 struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
2613 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
2614 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2615 struct odm_phy_dbg_info *dbg_b = &dm->phy_dbg_info_win_bkp;
2616 #endif
2617 #ifdef NHM_SUPPORT
2618 struct ccx_info *ccx = &dm->dm_ccx_info;
2619 #endif
2620
2621 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2622 /* backup memory*/
2623 odm_move_memory(dm, dbg_b, dbg, sizeof(struct odm_phy_dbg_info));
2624 #endif
2625
2626 if (!(dm->debug_components & DBG_CMN)) {
2627 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2628 /* reset rx rate distribution*/
2629 phydm_reset_rx_rate_distribution(dm);
2630 /* cal & reset avg of rssi/snr/evm*/
2631 phydm_get_avg_phystatus_val(dm);
2632 /* reset sum of rssi/snr/evm*/
2633 phydm_reset_phystatus_statistic(dm);
2634 #endif
2635 return;
2636 }
2637
2638 if (dm->cmn_dbg_msg_cnt >= dm->cmn_dbg_msg_period) {
2639 dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD;
2640 } else {
2641 dm->cmn_dbg_msg_cnt += PHYDM_WATCH_DOG_PERIOD;
2642 return;
2643 }
2644
2645 PHYDM_DBG(dm, DBG_CMN, "[%s] System up time: ((%d sec))---->\n",
2646 __func__, dm->phydm_sys_up_time);
2647
2648 if (dm->is_linked)
2649 phydm_basic_dbg_msg_linked(dm);
2650 else
2651 PHYDM_DBG(dm, DBG_CMN, "No Link !!!\n");
2652
2653 PHYDM_DBG(dm, DBG_CMN,
2654 "[Tx cnt] {CCK_TxEN, CCK_TxON, OFDM_TxEN, OFDM_TxON} = {%d, %d, %d, %d}\n",
2655 fa_t->cnt_cck_txen, fa_t->cnt_cck_txon, fa_t->cnt_ofdm_txen,
2656 fa_t->cnt_ofdm_txon);
2657 PHYDM_DBG(dm, DBG_CMN, "[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
2658 fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all);
2659 PHYDM_DBG(dm, DBG_CMN, "[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
2660 fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all);
2661 PHYDM_DBG(dm, DBG_CMN,
2662 "[FA duration(us)] {exp, ifs_clm, fahm} = {%d, %d, %d}\n",
2663 fa_t->time_fa_exp, fa_t->time_fa_ifs_clm,
2664 fa_t->time_fa_fahm);
2665 PHYDM_DBG(dm, DBG_CMN,
2666 "[OFDM FA] Parity=%d, Rate=%d, Fast_Fsync=%d, SBD=%d\n",
2667 fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal,
2668 fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail);
2669 PHYDM_DBG(dm, DBG_CMN, "[HT FA] CRC8=%d, MCS=%d\n",
2670 fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail);
2671 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
2672 if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) {
2673 PHYDM_DBG(dm, DBG_CMN,
2674 "[VHT FA] SIGA_CRC8=%d, SIGB_CRC8=%d, MCS=%d\n",
2675 fa_t->cnt_crc8_fail_vhta, fa_t->cnt_crc8_fail_vhtb,
2676 fa_t->cnt_mcs_fail_vht);
2677 }
2678 #endif
2679 PHYDM_DBG(dm, DBG_CMN,
2680 "[CRC32 OK Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}\n",
2681 fa_t->cnt_cck_crc32_ok, fa_t->cnt_ofdm_crc32_ok,
2682 fa_t->cnt_ht_crc32_ok, fa_t->cnt_vht_crc32_ok,
2683 fa_t->cnt_crc32_ok_all);
2684 PHYDM_DBG(dm, DBG_CMN,
2685 "[CRC32 Err Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}\n",
2686 fa_t->cnt_cck_crc32_error, fa_t->cnt_ofdm_crc32_error,
2687 fa_t->cnt_ht_crc32_error, fa_t->cnt_vht_crc32_error,
2688 fa_t->cnt_crc32_error_all);
2689
2690 if (dm->support_ic_type & (ODM_IC_11N_SERIES | ODM_IC_11AC_SERIES))
2691 PHYDM_DBG(dm, DBG_CMN,
2692 "is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n",
2693 dm->is_linked, dm->number_linked_client, dm->rssi_min,
2694 dm->dm_dig_table.cur_ig_value, dm->noisy_decision);
2695 else
2696 PHYDM_DBG(dm, DBG_CMN,
2697 "is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x\n",
2698 dm->is_linked, dm->number_linked_client, dm->rssi_min,
2699 dm->dm_dig_table.cur_ig_value);
2700
2701 PHYDM_DBG(dm, DBG_CMN,
2702 "ratio{nhm, nhm_env, clm, idle, tx}={%d, %d, %d, %d, %d}, nhm_pwr=%d\n",
2703 ccx->nhm_ratio, ccx->nhm_env_ratio, ccx->clm_ratio,
2704 ccx->nhm_idle_ratio, ccx->nhm_tx_ratio, ccx->nhm_pwr);
2705
2706 PHYDM_DBG(dm, DBG_CMN,
2707 "NHM_Rpt(H->L)[%d %d %d %d %d %d %d %d %d %d %d %d]\n",
2708 ccx->nhm_result[11], ccx->nhm_result[10], ccx->nhm_result[9],
2709 ccx->nhm_result[8], ccx->nhm_result[7], ccx->nhm_result[6],
2710 ccx->nhm_result[5], ccx->nhm_result[4], ccx->nhm_result[3],
2711 ccx->nhm_result[2], ccx->nhm_result[1], ccx->nhm_result[0]);
2712
2713 #ifdef EDCCA_CLM_SUPPORT
2714 if (dm->support_ic_type & PHYDM_IC_SUPPORT_EDCCA_CLM) {
2715 PHYDM_DBG(dm, DBG_CMN, "edcca_clm_ratio=%d\n",
2716 ccx->edcca_clm_ratio);
2717 }
2718 #endif
2719 }
2720
phydm_basic_profile(void * dm_void,u32 * _used,char * output,u32 * _out_len)2721 void phydm_basic_profile(void *dm_void, u32 *_used, char *output, u32 *_out_len)
2722 {
2723 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
2724 struct dm_struct *dm = (struct dm_struct *)dm_void;
2725 char *cut = NULL;
2726 char *ic_type = NULL;
2727 u32 used = *_used;
2728 u32 out_len = *_out_len;
2729 u32 date = 0;
2730 char *commit_by = NULL;
2731 u32 release_ver = 0;
2732
2733 PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n",
2734 "% Basic Profile %");
2735
2736 if (dm->support_ic_type == ODM_RTL8188E) {
2737 #if (RTL8188E_SUPPORT)
2738 ic_type = "RTL8188E";
2739 date = RELEASE_DATE_8188E;
2740 commit_by = COMMIT_BY_8188E;
2741 release_ver = RELEASE_VERSION_8188E;
2742 #endif
2743 #if (RTL8812A_SUPPORT)
2744 } else if (dm->support_ic_type == ODM_RTL8812) {
2745 ic_type = "RTL8812A";
2746 date = RELEASE_DATE_8812A;
2747 commit_by = COMMIT_BY_8812A;
2748 release_ver = RELEASE_VERSION_8812A;
2749 #endif
2750 #if (RTL8821A_SUPPORT)
2751 } else if (dm->support_ic_type == ODM_RTL8821) {
2752 ic_type = "RTL8821A";
2753 date = RELEASE_DATE_8821A;
2754 commit_by = COMMIT_BY_8821A;
2755 release_ver = RELEASE_VERSION_8821A;
2756 #endif
2757 #if (RTL8192E_SUPPORT)
2758 } else if (dm->support_ic_type == ODM_RTL8192E) {
2759 ic_type = "RTL8192E";
2760 date = RELEASE_DATE_8192E;
2761 commit_by = COMMIT_BY_8192E;
2762 release_ver = RELEASE_VERSION_8192E;
2763 #endif
2764 #if (RTL8723B_SUPPORT)
2765 } else if (dm->support_ic_type == ODM_RTL8723B) {
2766 ic_type = "RTL8723B";
2767 date = RELEASE_DATE_8723B;
2768 commit_by = COMMIT_BY_8723B;
2769 release_ver = RELEASE_VERSION_8723B;
2770 #endif
2771 #if (RTL8814A_SUPPORT)
2772 } else if (dm->support_ic_type == ODM_RTL8814A) {
2773 ic_type = "RTL8814A";
2774 date = RELEASE_DATE_8814A;
2775 commit_by = COMMIT_BY_8814A;
2776 release_ver = RELEASE_VERSION_8814A;
2777 #endif
2778 #if (RTL8881A_SUPPORT)
2779 } else if (dm->support_ic_type == ODM_RTL8881A) {
2780 ic_type = "RTL8881A";
2781 #endif
2782 #if (RTL8822B_SUPPORT)
2783 } else if (dm->support_ic_type == ODM_RTL8822B) {
2784 ic_type = "RTL8822B";
2785 date = RELEASE_DATE_8822B;
2786 commit_by = COMMIT_BY_8822B;
2787 release_ver = RELEASE_VERSION_8822B;
2788 #endif
2789 #if (RTL8197F_SUPPORT)
2790 } else if (dm->support_ic_type == ODM_RTL8197F) {
2791 ic_type = "RTL8197F";
2792 date = RELEASE_DATE_8197F;
2793 commit_by = COMMIT_BY_8197F;
2794 release_ver = RELEASE_VERSION_8197F;
2795 #endif
2796 #if (RTL8703B_SUPPORT)
2797 } else if (dm->support_ic_type == ODM_RTL8703B) {
2798 ic_type = "RTL8703B";
2799 date = RELEASE_DATE_8703B;
2800 commit_by = COMMIT_BY_8703B;
2801 release_ver = RELEASE_VERSION_8703B;
2802 #endif
2803 #if (RTL8195A_SUPPORT)
2804 } else if (dm->support_ic_type == ODM_RTL8195A) {
2805 ic_type = "RTL8195A";
2806 #endif
2807 #if (RTL8188F_SUPPORT)
2808 } else if (dm->support_ic_type == ODM_RTL8188F) {
2809 ic_type = "RTL8188F";
2810 date = RELEASE_DATE_8188F;
2811 commit_by = COMMIT_BY_8188F;
2812 release_ver = RELEASE_VERSION_8188F;
2813 #endif
2814 #if (RTL8723D_SUPPORT)
2815 } else if (dm->support_ic_type == ODM_RTL8723D) {
2816 ic_type = "RTL8723D";
2817 date = RELEASE_DATE_8723D;
2818 commit_by = COMMIT_BY_8723D;
2819 release_ver = RELEASE_VERSION_8723D;
2820 #endif
2821 }
2822
2823 /* @JJ ADD 20161014 */
2824 #if (RTL8710B_SUPPORT)
2825 else if (dm->support_ic_type == ODM_RTL8710B) {
2826 ic_type = "RTL8710B";
2827 date = RELEASE_DATE_8710B;
2828 commit_by = COMMIT_BY_8710B;
2829 release_ver = RELEASE_VERSION_8710B;
2830 }
2831 #endif
2832
2833 #if (RTL8721D_SUPPORT)
2834 else if (dm->support_ic_type == ODM_RTL8721D) {
2835 ic_type = "RTL8721D";
2836 date = RELEASE_DATE_8721D;
2837 commit_by = COMMIT_BY_8721D;
2838 release_ver = RELEASE_VERSION_8721D;
2839 }
2840 #endif
2841
2842 #if (RTL8710C_SUPPORT)
2843 else if (dm->support_ic_type == ODM_RTL8710C) {
2844 ic_type = "RTL8710C";
2845 date = RELEASE_DATE_8710C;
2846 commit_by = COMMIT_BY_8710C;
2847 release_ver = RELEASE_VERSION_8710C;
2848 }
2849 #endif
2850
2851 #if (RTL8821C_SUPPORT)
2852 else if (dm->support_ic_type == ODM_RTL8821C) {
2853 ic_type = "RTL8821C";
2854 date = RELEASE_DATE_8821C;
2855 commit_by = COMMIT_BY_8821C;
2856 release_ver = RELEASE_VERSION_8821C;
2857 }
2858 #endif
2859
2860 /*@jj add 20170822*/
2861 #if (RTL8192F_SUPPORT)
2862 else if (dm->support_ic_type == ODM_RTL8192F) {
2863 ic_type = "RTL8192F";
2864 date = RELEASE_DATE_8192F;
2865 commit_by = COMMIT_BY_8192F;
2866 release_ver = RELEASE_VERSION_8192F;
2867 }
2868 #endif
2869
2870 #if (RTL8198F_SUPPORT)
2871 else if (dm->support_ic_type == ODM_RTL8198F) {
2872 ic_type = "RTL8198F";
2873 date = RELEASE_DATE_8198F;
2874 commit_by = COMMIT_BY_8198F;
2875 release_ver = RELEASE_VERSION_8198F;
2876 }
2877 #endif
2878
2879 #if (RTL8822C_SUPPORT)
2880 else if (dm->support_ic_type == ODM_RTL8822C) {
2881 ic_type = "RTL8822C";
2882 date = RELEASE_DATE_8822C;
2883 commit_by = COMMIT_BY_8822C;
2884 release_ver = RELEASE_VERSION_8822C;
2885 }
2886 #endif
2887
2888 #if (RTL8723F_SUPPORT)
2889 else if (dm->support_ic_type == ODM_RTL8723F) {
2890 ic_type = "RTL8723F";
2891 date = RELEASE_DATE_8723F;
2892 commit_by = COMMIT_BY_8723F;
2893 release_ver = RELEASE_VERSION_8723F;
2894 }
2895 #endif
2896 #if (RTL8812F_SUPPORT)
2897 else if (dm->support_ic_type == ODM_RTL8812F) {
2898 ic_type = "RTL8812F";
2899 date = RELEASE_DATE_8812F;
2900 commit_by = COMMIT_BY_8812F;
2901 release_ver = RELEASE_VERSION_8812F;
2902 }
2903 #endif
2904
2905 #if (RTL8197G_SUPPORT)
2906 else if (dm->support_ic_type == ODM_RTL8197G) {
2907 ic_type = "RTL8197G";
2908 date = RELEASE_DATE_8197G;
2909 commit_by = COMMIT_BY_8197G;
2910 release_ver = RELEASE_VERSION_8197G;
2911 }
2912 #endif
2913
2914 #if (RTL8814B_SUPPORT)
2915 else if (dm->support_ic_type == ODM_RTL8814B) {
2916 ic_type = "RTL8814B";
2917 date = RELEASE_DATE_8814B;
2918 commit_by = COMMIT_BY_8814B;
2919 release_ver = RELEASE_VERSION_8814B;
2920 }
2921 #endif
2922 #if (RTL8814C_SUPPORT)
2923 else if (dm->support_ic_type == ODM_RTL8814C) {
2924 ic_type = "RTL8814C";
2925 date = RELEASE_DATE_8814C;
2926 commit_by = COMMIT_BY_8814C;
2927 release_ver = RELEASE_VERSION_8814C;
2928 }
2929 #endif
2930
2931 PDM_SNPF(out_len, used, output + used, out_len - used,
2932 " %-35s: %s (MP Chip: %s)\n", "IC type", ic_type,
2933 dm->is_mp_chip ? "Yes" : "No");
2934
2935 if (dm->cut_version == ODM_CUT_A)
2936 cut = "A";
2937 else if (dm->cut_version == ODM_CUT_B)
2938 cut = "B";
2939 else if (dm->cut_version == ODM_CUT_C)
2940 cut = "C";
2941 else if (dm->cut_version == ODM_CUT_D)
2942 cut = "D";
2943 else if (dm->cut_version == ODM_CUT_E)
2944 cut = "E";
2945 else if (dm->cut_version == ODM_CUT_F)
2946 cut = "F";
2947 else if (dm->cut_version == ODM_CUT_G)
2948 cut = "G";
2949 else if (dm->cut_version == ODM_CUT_H)
2950 cut = "H";
2951 else if (dm->cut_version == ODM_CUT_I)
2952 cut = "I";
2953 else if (dm->cut_version == ODM_CUT_J)
2954 cut = "J";
2955 else if (dm->cut_version == ODM_CUT_K)
2956 cut = "K";
2957 else if (dm->cut_version == ODM_CUT_L)
2958 cut = "L";
2959 else if (dm->cut_version == ODM_CUT_M)
2960 cut = "M";
2961 else if (dm->cut_version == ODM_CUT_N)
2962 cut = "N";
2963 else if (dm->cut_version == ODM_CUT_O)
2964 cut = "O";
2965 else if (dm->cut_version == ODM_CUT_TEST)
2966 cut = "TEST";
2967 else
2968 cut = "UNKNOWN";
2969
2970 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2971 "RFE type", dm->rfe_type);
2972 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2973 "CART_Ver", cut);
2974 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2975 "PHY Para Ver", odm_get_hw_img_version(dm));
2976 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2977 "PHY Para Commit date", date);
2978 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2979 "PHY Para Commit by", commit_by);
2980 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2981 "PHY Para Release Ver", release_ver);
2982
2983 PDM_SNPF(out_len, used, output + used, out_len - used,
2984 " %-35s: %d (Subversion: %d)\n", "FW Ver", dm->fw_version,
2985 dm->fw_sub_version);
2986
2987 /* @1 PHY DM version List */
2988 PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n",
2989 "% PHYDM version %");
2990 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2991 "Code base", PHYDM_CODE_BASE);
2992 #ifdef PHYDM_SVN_REV
2993 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2994 "PHYDM SVN Ver", PHYDM_SVN_REV);
2995 #endif
2996 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2997 "Release Date", PHYDM_RELEASE_DATE);
2998 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2999 "Adaptivity", ADAPTIVITY_VERSION);
3000 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3001 "DIG", DIG_VERSION);
3002 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3003 "CFO Tracking", CFO_TRACKING_VERSION);
3004 #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
3005 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3006 "AntDiv", ANTDIV_VERSION);
3007 #endif
3008 #ifdef CONFIG_DYNAMIC_TX_TWR
3009 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3010 "Dynamic TxPower", DYNAMIC_TXPWR_VERSION);
3011 #endif
3012 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3013 "RA Info", RAINFO_VERSION);
3014 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
3015 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3016 "AntDetect", ANTDECT_VERSION);
3017 #endif
3018 #ifdef CONFIG_PATH_DIVERSITY
3019 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3020 "PathDiv", PATHDIV_VERSION);
3021 #endif
3022 #ifdef CONFIG_ADAPTIVE_SOML
3023 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3024 "Adaptive SOML", ADAPTIVE_SOML_VERSION);
3025 #endif
3026 #if (PHYDM_LA_MODE_SUPPORT)
3027 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3028 "LA mode", DYNAMIC_LA_MODE);
3029 #endif
3030 #ifdef PHYDM_PRIMARY_CCA
3031 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3032 "Primary CCA", PRIMARYCCA_VERSION);
3033 #endif
3034 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
3035 "DFS", DFS_VERSION);
3036
3037 #if (RTL8822B_SUPPORT)
3038 if (dm->support_ic_type & ODM_RTL8822B)
3039 PDM_SNPF(out_len, used, output + used, out_len - used,
3040 " %-35s: %s\n", "PHY config 8822B",
3041 PHY_CONFIG_VERSION_8822B);
3042
3043 #endif
3044 #if (RTL8197F_SUPPORT)
3045 if (dm->support_ic_type & ODM_RTL8197F)
3046 PDM_SNPF(out_len, used, output + used, out_len - used,
3047 " %-35s: %s\n", "PHY config 8197F",
3048 PHY_CONFIG_VERSION_8197F);
3049 #endif
3050
3051 /*@jj add 20170822*/
3052 #if (RTL8192F_SUPPORT)
3053 if (dm->support_ic_type & ODM_RTL8192F)
3054 PDM_SNPF(out_len, used, output + used, out_len - used,
3055 " %-35s: %s\n", "PHY config 8192F",
3056 PHY_CONFIG_VERSION_8192F);
3057 #endif
3058 #if (RTL8721D_SUPPORT)
3059 if (dm->support_ic_type & ODM_RTL8721D)
3060 PDM_SNPF(out_len, used, output + used, out_len - used,
3061 " %-35s: %s\n", "PHY config 8721D",
3062 PHY_CONFIG_VERSION_8721D);
3063 #endif
3064
3065 #if (RTL8710C_SUPPORT)
3066 if (dm->support_ic_type & ODM_RTL8710C)
3067 PDM_SNPF(out_len, used, output + used, out_len - used,
3068 " %-35s: %s\n", "PHY config 8710C",
3069 PHY_CONFIG_VERSION_8710C);
3070 #endif
3071
3072 *_used = used;
3073 *_out_len = out_len;
3074
3075 #endif /*@#if CONFIG_PHYDM_DEBUG_FUNCTION*/
3076 }
3077
3078 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
phydm_fw_trace_en_h2c(void * dm_void,boolean enable,u32 fw_dbg_comp,u32 monitor_mode,u32 macid)3079 void phydm_fw_trace_en_h2c(void *dm_void, boolean enable,
3080 u32 fw_dbg_comp, u32 monitor_mode, u32 macid)
3081 {
3082 struct dm_struct *dm = (struct dm_struct *)dm_void;
3083 u8 h2c_parameter[7] = {0};
3084 u8 cmd_length;
3085
3086 if (dm->support_ic_type & PHYDM_IC_3081_SERIES) {
3087 h2c_parameter[0] = enable;
3088 h2c_parameter[1] = (u8)(fw_dbg_comp & MASKBYTE0);
3089 h2c_parameter[2] = (u8)((fw_dbg_comp & MASKBYTE1) >> 8);
3090 h2c_parameter[3] = (u8)((fw_dbg_comp & MASKBYTE2) >> 16);
3091 h2c_parameter[4] = (u8)((fw_dbg_comp & MASKBYTE3) >> 24);
3092 h2c_parameter[5] = (u8)monitor_mode;
3093 h2c_parameter[6] = (u8)macid;
3094 cmd_length = 7;
3095
3096 } else {
3097 h2c_parameter[0] = enable;
3098 h2c_parameter[1] = (u8)monitor_mode;
3099 h2c_parameter[2] = (u8)macid;
3100 cmd_length = 3;
3101 }
3102
3103 PHYDM_DBG(dm, DBG_FW_TRACE,
3104 "[H2C] FW_debug_en: (( %d )), mode: (( %d )), macid: (( %d ))\n",
3105 enable, monitor_mode, macid);
3106
3107 odm_fill_h2c_cmd(dm, PHYDM_H2C_FW_TRACE_EN, cmd_length, h2c_parameter);
3108 }
3109
phydm_get_per_path_txagc(void * dm_void,u8 path,u32 * _used,char * output,u32 * _out_len)3110 void phydm_get_per_path_txagc(void *dm_void, u8 path, u32 *_used, char *output,
3111 u32 *_out_len)
3112 {
3113 struct dm_struct *dm = (struct dm_struct *)dm_void;
3114 u8 rate_idx = 0;
3115 u8 txagc = 0;
3116 u32 used = *_used;
3117 u32 out_len = *_out_len;
3118
3119 #ifdef PHYDM_COMMON_API_SUPPORT
3120 if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
3121 return;
3122
3123 if (dm->num_rf_path == 1 && path > RF_PATH_A)
3124 return;
3125 else if (dm->num_rf_path == 2 && path > RF_PATH_B)
3126 return;
3127 else if (dm->num_rf_path == 3 && path > RF_PATH_C)
3128 return;
3129 else if (dm->num_rf_path == 4 && path > RF_PATH_D)
3130 return;
3131
3132 for (rate_idx = 0; rate_idx <= 0x53; rate_idx++) {
3133 if (!(dm->support_ic_type & PHYDM_IC_ABOVE_3SS) &&
3134 ((rate_idx >= ODM_RATEMCS16 &&
3135 rate_idx < ODM_RATEVHTSS1MCS0) ||
3136 rate_idx >= ODM_RATEVHTSS3MCS0))
3137 continue;
3138
3139 if (rate_idx == ODM_RATE1M)
3140 PDM_SNPF(out_len, used, output + used, out_len - used,
3141 " %-35s\n", "CCK====>");
3142 else if (rate_idx == ODM_RATE6M)
3143 PDM_SNPF(out_len, used, output + used, out_len - used,
3144 "\n %-35s\n", "OFDM====>");
3145 else if (rate_idx == ODM_RATEMCS0)
3146 PDM_SNPF(out_len, used, output + used, out_len - used,
3147 "\n %-35s\n", "HT 1ss====>");
3148 else if (rate_idx == ODM_RATEMCS8)
3149 PDM_SNPF(out_len, used, output + used, out_len - used,
3150 "\n %-35s\n", "HT 2ss====>");
3151 else if (rate_idx == ODM_RATEMCS16)
3152 PDM_SNPF(out_len, used, output + used, out_len - used,
3153 "\n %-35s\n", "HT 3ss====>");
3154 else if (rate_idx == ODM_RATEMCS24)
3155 PDM_SNPF(out_len, used, output + used, out_len - used,
3156 "\n %-35s\n", "HT 4ss====>");
3157 else if (rate_idx == ODM_RATEVHTSS1MCS0)
3158 PDM_SNPF(out_len, used, output + used, out_len - used,
3159 "\n %-35s\n", "VHT 1ss====>");
3160 else if (rate_idx == ODM_RATEVHTSS2MCS0)
3161 PDM_SNPF(out_len, used, output + used, out_len - used,
3162 "\n %-35s\n", "VHT 2ss====>");
3163 else if (rate_idx == ODM_RATEVHTSS3MCS0)
3164 PDM_SNPF(out_len, used, output + used, out_len - used,
3165 "\n %-35s\n", "VHT 3ss====>");
3166 else if (rate_idx == ODM_RATEVHTSS4MCS0)
3167 PDM_SNPF(out_len, used, output + used, out_len - used,
3168 "\n %-35s\n", "VHT 4ss====>");
3169
3170 txagc = phydm_api_get_txagc(dm, (enum rf_path)path, rate_idx);
3171 if (config_phydm_read_txagc_check(txagc))
3172 PDM_SNPF(out_len, used, output + used,
3173 out_len - used, " 0x%02x ", txagc);
3174 else
3175 PDM_SNPF(out_len, used, output + used,
3176 out_len - used, " 0x%s ", "xx");
3177 }
3178 #endif
3179
3180 *_used = used;
3181 *_out_len = out_len;
3182 }
3183
phydm_get_txagc(void * dm_void,u32 * _used,char * output,u32 * _out_len)3184 void phydm_get_txagc(void *dm_void, u32 *_used, char *output, u32 *_out_len)
3185 {
3186 struct dm_struct *dm = (struct dm_struct *)dm_void;
3187 u32 used = *_used;
3188 u32 out_len = *_out_len;
3189 u8 i = 0;
3190
3191 #if (RTL8822C_SUPPORT)
3192 PDM_SNPF(out_len, used, output + used,
3193 out_len - used, "Disabled DPD rate mask: 0x%x\n",
3194 dm->dis_dpd_rate);
3195 #endif
3196
3197 for (i = RF_PATH_A; i < dm->num_rf_path; i++) {
3198 if (i == RF_PATH_A)
3199 PDM_SNPF(out_len, used, output + used, out_len - used,
3200 "%-35s\n", "path-A====================");
3201 else if (i == RF_PATH_B)
3202 PDM_SNPF(out_len, used, output + used, out_len - used,
3203 "\n%-35s\n", "path-B====================");
3204 else if (i == RF_PATH_C)
3205 PDM_SNPF(out_len, used, output + used, out_len - used,
3206 "\n%-35s\n", "path-C====================");
3207 else if (i == RF_PATH_D)
3208 PDM_SNPF(out_len, used, output + used, out_len - used,
3209 "\n%-35s\n", "path-D====================");
3210
3211 phydm_get_per_path_txagc(dm, i, &used, output, &out_len);
3212 }
3213 *_used = used;
3214 *_out_len = out_len;
3215 }
3216
phydm_set_txagc(void * dm_void,u32 * const val,u32 * _used,char * output,u32 * _out_len)3217 void phydm_set_txagc(void *dm_void, u32 *const val, u32 *_used,
3218 char *output, u32 *_out_len)
3219 {
3220 struct dm_struct *dm = (struct dm_struct *)dm_void;
3221 u32 used = *_used;
3222 u32 out_len = *_out_len;
3223 u8 i = 0;
3224 u32 pow = 0; /*power index*/
3225 u8 vht_start_rate = ODM_RATEVHTSS1MCS0;
3226 boolean rpt = true;
3227 enum rf_path path = RF_PATH_A;
3228
3229 /*@val[1] = path*/
3230 /*@val[2] = hw_rate*/
3231 /*@val[3] = power_index*/
3232
3233 #ifdef PHYDM_COMMON_API_SUPPORT
3234 if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
3235 return;
3236
3237 path = (enum rf_path)val[1];
3238
3239 if (val[1] >= dm->num_rf_path) {
3240 PDM_SNPF(out_len, used, output + used, out_len - used,
3241 "Write path-%d rate_idx-0x%x fail\n", val[1], val[2]);
3242 } else if ((u8)val[2] != 0xff) {
3243 if (phydm_api_set_txagc(dm, val[3], path, (u8)val[2], true))
3244 PDM_SNPF(out_len, used, output + used, out_len - used,
3245 "Write path-%d rate_idx-0x%x = 0x%x\n",
3246 val[1], val[2], val[3]);
3247 else
3248 PDM_SNPF(out_len, used, output + used, out_len - used,
3249 "Write path-%d rate index-0x%x fail\n",
3250 val[1], val[2]);
3251 } else {
3252
3253 if (dm->support_ic_type &
3254 (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8195B)) {
3255 pow = (val[3] & 0x3f);
3256 pow = BYTE_DUPLICATE_2_DWORD(pow);
3257
3258 for (i = 0; i < ODM_RATEVHTSS2MCS9; i += 4)
3259 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3260 } else if (dm->support_ic_type &
3261 (ODM_RTL8197F | ODM_RTL8192F)) {
3262 pow = (val[3] & 0x3f);
3263 for (i = 0; i <= ODM_RATEMCS15; i++)
3264 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3265 } else if (dm->support_ic_type & ODM_RTL8198F) {
3266 pow = (val[3] & 0x7f);
3267 for (i = 0; i <= ODM_RATEVHTSS4MCS9; i++)
3268 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3269 } else if (dm->support_ic_type &
3270 (ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G)) {
3271 pow = (val[3] & 0x7f);
3272 for (i = 0; i <= ODM_RATEMCS15; i++)
3273 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3274 for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++)
3275 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3276 } else if (dm->support_ic_type &
3277 (ODM_RTL8721D | ODM_RTL8710C)) {
3278 pow = (val[3] & 0x3f);
3279 for (i = 0; i <= ODM_RATEMCS7; i++)
3280 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3281 } else if (dm->support_ic_type &(ODM_RTL8723F)) {
3282 pow = (val[3] & 0x7f);
3283 for (i = 0; i <= ODM_RATEMCS7; i++)
3284 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3285 }
3286
3287 if (rpt)
3288 PDM_SNPF(out_len, used, output + used, out_len - used,
3289 "Write all TXAGC of path-%d = 0x%x\n",
3290 val[1], val[3]);
3291 else
3292 PDM_SNPF(out_len, used, output + used, out_len - used,
3293 "Write all TXAGC of path-%d fail\n", val[1]);
3294 }
3295
3296 #endif
3297 *_used = used;
3298 *_out_len = out_len;
3299 }
3300
phydm_shift_txagc(void * dm_void,u32 * const val,u32 * _used,char * output,u32 * _out_len)3301 void phydm_shift_txagc(void *dm_void, u32 *const val, u32 *_used, char *output,
3302 u32 *_out_len)
3303 {
3304 struct dm_struct *dm = (struct dm_struct *)dm_void;
3305 u32 used = *_used;
3306 u32 out_len = *_out_len;
3307 u8 i = 0;
3308 u32 pow = 0; /*Power index*/
3309 boolean rpt = true;
3310 u8 vht_start_rate = ODM_RATEVHTSS1MCS0;
3311 enum rf_path path = RF_PATH_A;
3312
3313 #ifdef PHYDM_COMMON_API_SUPPORT
3314 if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
3315 return;
3316
3317 if (val[1] >= dm->num_rf_path) {
3318 PDM_SNPF(out_len, used, output + used, out_len - used,
3319 "Write path-%d fail\n", val[1]);
3320 return;
3321 }
3322
3323 path = (enum rf_path)val[1];
3324
3325 if ((u8)val[2] == 0) {
3326 /*@{0:-, 1:+} {Pwr Offset}*/
3327 if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C)) {
3328 for (i = 0; i <= ODM_RATEMCS7; i++) {
3329 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3330 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3331 }
3332 for (i = vht_start_rate; i <= ODM_RATEVHTSS1MCS9; i++) {
3333 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3334 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3335 }
3336 } else if (dm->support_ic_type & (ODM_RTL8822B)) {
3337 for (i = 0; i <= ODM_RATEMCS15; i++) {
3338 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3339 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3340 }
3341 for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) {
3342 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3343 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3344 }
3345 } else if (dm->support_ic_type &
3346 (ODM_RTL8197F | ODM_RTL8192F)) {
3347 for (i = 0; i <= ODM_RATEMCS15; i++) {
3348 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3349 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3350 }
3351 } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
3352 rpt &= phydm_api_shift_txagc(dm, val[3], path, 0);
3353 } else if (dm->support_ic_type &
3354 (ODM_RTL8721D | ODM_RTL8710C)) {
3355 for (i = 0; i <= ODM_RATEMCS7; i++) {
3356 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3357 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3358 }
3359 }
3360 } else if ((u8)val[2] == 1) {
3361 /*@{0:-, 1:+} {Pwr Offset}*/
3362 if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C)) {
3363 for (i = 0; i <= ODM_RATEMCS7; i++) {
3364 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3365 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3366 }
3367 for (i = vht_start_rate; i <= ODM_RATEVHTSS1MCS9; i++) {
3368 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3369 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3370 }
3371 } else if (dm->support_ic_type & (ODM_RTL8822B)) {
3372 for (i = 0; i <= ODM_RATEMCS15; i++) {
3373 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3374 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3375 }
3376 for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) {
3377 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3378 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3379 }
3380 } else if (dm->support_ic_type &
3381 (ODM_RTL8197F | ODM_RTL8192F)) {
3382 for (i = 0; i <= ODM_RATEMCS15; i++) {
3383 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3384 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3385 }
3386 } else if (dm->support_ic_type & (ODM_RTL8721D |
3387 ODM_RTL8710C)) {
3388 for (i = 0; i <= ODM_RATEMCS7; i++) {
3389 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3390 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3391 }
3392 } else if (dm->support_ic_type &
3393 (ODM_RTL8822C | ODM_RTL8814B | ODM_RTL8814C |
3394 ODM_RTL8812F | ODM_RTL8197G | ODM_RTL8723F)) {
3395 rpt &= phydm_api_shift_txagc(dm, val[3], path, 1);
3396 }
3397 }
3398 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3399 if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
3400 PDM_SNPF(out_len, used, output + used, out_len - used,
3401 "[All rate] Set Path-%d Pow_idx: %s %d\n",
3402 val[1], (val[2] ? "+" : "-"), val[3]);
3403 else
3404 #endif
3405 PDM_SNPF(out_len, used, output + used, out_len - used,
3406 "[All rate] Set Path-%d Pow_idx: %s %d(%d.%s dB)\n",
3407 val[1], (val[2] ? "+" : "-"), val[3], val[3] >> 1,
3408 ((val[3] & 1) ? "5" : "0"));
3409
3410 #endif
3411 *_used = used;
3412 *_out_len = out_len;
3413 }
3414
phydm_set_txagc_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)3415 void phydm_set_txagc_dbg(void *dm_void, char input[][16], u32 *_used,
3416 char *output, u32 *_out_len)
3417 {
3418 struct dm_struct *dm = (struct dm_struct *)dm_void;
3419 u32 used = *_used;
3420 u32 out_len = *_out_len;
3421 u32 var1[10] = {0};
3422 char help[] = "-h";
3423 u8 i = 0, input_idx = 0;
3424
3425 for (i = 0; i < 5; i++) {
3426 PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
3427 input_idx++;
3428 }
3429
3430 if ((strcmp(input[1], help) == 0)) {
3431 PDM_SNPF(out_len, used, output + used, out_len - used,
3432 "{Dis:0, En:1} {pathA~D(0~3)} {rate_idx(Hex), All_rate:0xff} {txagc_idx (Hex)}\n");
3433 PDM_SNPF(out_len, used, output + used, out_len - used,
3434 "{Pwr Shift(All rate):2} {pathA~D(0~3)} {0:-, 1:+} {Pwr Offset(Hex)}\n");
3435 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3436 PDM_SNPF(out_len, used, output + used, out_len - used,
3437 "{reset all rate ref/diff to 0x0:0xff}\n");
3438 #endif
3439 } else if (var1[0] == 0) {
3440 dm->is_disable_phy_api = false;
3441 PDM_SNPF(out_len, used, output + used, out_len - used,
3442 "Disable API debug mode\n");
3443 } else if (var1[0] == 1) {
3444 dm->is_disable_phy_api = false;
3445 #ifdef CONFIG_TXAGC_DEBUG_8822C
3446 config_phydm_write_txagc_8822c(dm, var1[3],
3447 (enum rf_path)var1[1],
3448 (u8)var1[2]);
3449 #elif (defined(CONFIG_TXAGC_DEBUG_8814B))
3450 config_phydm_write_txagc_8814b(dm, var1[3],
3451 (enum rf_path)var1[1],
3452 (u8)var1[2]);
3453 #else
3454 phydm_set_txagc(dm, (u32 *)var1, &used, output, &out_len);
3455 #endif
3456 dm->is_disable_phy_api = true;
3457 } else if (var1[0] == 2) {
3458 PHYDM_SSCANF(input[4], DCMD_HEX, &var1[3]);
3459 dm->is_disable_phy_api = false;
3460 phydm_shift_txagc(dm, (u32 *)var1, &used, output, &out_len);
3461 dm->is_disable_phy_api = true;
3462 }
3463 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3464 else if (var1[0] == 0xff) {
3465 dm->is_disable_phy_api = false;
3466 phydm_reset_txagc(dm);
3467 dm->is_disable_phy_api = true;
3468 }
3469 #endif
3470 #ifdef CONFIG_TXAGC_DEBUG_8822C
3471 else if (var1[0] == 3) {
3472 dm->is_disable_phy_api = false;
3473 phydm_txagc_tab_buff_show_8822c(dm);
3474 dm->is_disable_phy_api = true;
3475 } else if (var1[0] == 4) {
3476 dm->is_disable_phy_api = false;
3477 config_phydm_set_txagc_to_hw_8822c(dm);
3478 dm->is_disable_phy_api = true;
3479 }
3480 #elif (defined(CONFIG_TXAGC_DEBUG_8814B))
3481 else if (var1[0] == 3) {
3482 dm->is_disable_phy_api = false;
3483 phydm_txagc_tab_buff_show_8814b(dm);
3484 dm->is_disable_phy_api = true;
3485 } else if (var1[0] == 4) {
3486 dm->is_disable_phy_api = false;
3487 config_phydm_set_txagc_to_hw_8814b(dm);
3488 dm->is_disable_phy_api = true;
3489 }
3490 #endif
3491
3492 *_used = used;
3493 *_out_len = out_len;
3494 }
3495
phydm_cmn_msg_setting(void * dm_void,u32 * val,u32 * _used,char * output,u32 * _out_len)3496 void phydm_cmn_msg_setting(void *dm_void, u32 *val, u32 *_used,
3497 char *output, u32 *_out_len)
3498 {
3499 struct dm_struct *dm = (struct dm_struct *)dm_void;
3500 u32 used = *_used;
3501 u32 out_len = *_out_len;
3502
3503 if (val[1] == 1) {
3504 dm->cmn_dbg_msg_period = (u8)val[2];
3505
3506 if (dm->cmn_dbg_msg_period < PHYDM_WATCH_DOG_PERIOD)
3507 dm->cmn_dbg_msg_period = PHYDM_WATCH_DOG_PERIOD;
3508
3509 PDM_SNPF(out_len, used, output + used, out_len - used,
3510 "cmn_dbg_msg_period=%d\n", dm->cmn_dbg_msg_period);
3511 }
3512
3513 #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH
3514 if (val[1] == 1)
3515 phydm_physts_auto_switch_jgr3_set(dm, true, BIT(4) | BIT(1));
3516 else
3517 phydm_physts_auto_switch_jgr3_set(dm, false, BIT(1));
3518 #endif
3519 *_used = used;
3520 *_out_len = out_len;
3521 }
3522
phydm_debug_trace(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)3523 void phydm_debug_trace(void *dm_void, char input[][16], u32 *_used,
3524 char *output, u32 *_out_len)
3525 {
3526 struct dm_struct *dm = (struct dm_struct *)dm_void;
3527 u64 pre_debug_components, one = 1;
3528 u64 comp = 0;
3529 u32 used = *_used;
3530 u32 out_len = *_out_len;
3531 u32 val[10] = {0};
3532 u8 i = 0;
3533
3534 for (i = 0; i < 5; i++) {
3535 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
3536 }
3537 comp = dm->debug_components;
3538 pre_debug_components = dm->debug_components;
3539
3540 PDM_SNPF(out_len, used, output + used, out_len - used,
3541 "\n================================\n");
3542 if (val[0] == 100) {
3543 PDM_SNPF(out_len, used, output + used, out_len - used,
3544 "[DBG MSG] Component Selection\n");
3545 PDM_SNPF(out_len, used, output + used, out_len - used,
3546 "================================\n");
3547 PDM_SNPF(out_len, used, output + used, out_len - used,
3548 "00. (( %s ))DIG\n",
3549 ((comp & DBG_DIG) ? ("V") : (".")));
3550 PDM_SNPF(out_len, used, output + used, out_len - used,
3551 "01. (( %s ))RA_MASK\n",
3552 ((comp & DBG_RA_MASK) ? ("V") : (".")));
3553 PDM_SNPF(out_len, used, output + used, out_len - used,
3554 "02. (( %s ))DYN_TXPWR\n",
3555 ((comp & DBG_DYN_TXPWR) ? ("V") : (".")));
3556 PDM_SNPF(out_len, used, output + used, out_len - used,
3557 "03. (( %s ))FA_CNT\n",
3558 ((comp & DBG_FA_CNT) ? ("V") : (".")));
3559 PDM_SNPF(out_len, used, output + used, out_len - used,
3560 "04. (( %s ))RSSI_MNTR\n",
3561 ((comp & DBG_RSSI_MNTR) ? ("V") : (".")));
3562 PDM_SNPF(out_len, used, output + used, out_len - used,
3563 "05. (( %s ))CCKPD\n",
3564 ((comp & DBG_CCKPD) ? ("V") : (".")));
3565 PDM_SNPF(out_len, used, output + used, out_len - used,
3566 "06. (( %s ))ANT_DIV\n",
3567 ((comp & DBG_ANT_DIV) ? ("V") : (".")));
3568 PDM_SNPF(out_len, used, output + used, out_len - used,
3569 "07. (( %s ))SMT_ANT\n",
3570 ((comp & DBG_SMT_ANT) ? ("V") : (".")));
3571 PDM_SNPF(out_len, used, output + used, out_len - used,
3572 "08. (( %s ))PWR_TRAIN\n",
3573 ((comp & DBG_PWR_TRAIN) ? ("V") : (".")));
3574 PDM_SNPF(out_len, used, output + used, out_len - used,
3575 "09. (( %s ))RA\n",
3576 ((comp & DBG_RA) ? ("V") : (".")));
3577 PDM_SNPF(out_len, used, output + used, out_len - used,
3578 "10. (( %s ))PATH_DIV\n",
3579 ((comp & DBG_PATH_DIV) ? ("V") : (".")));
3580 PDM_SNPF(out_len, used, output + used, out_len - used,
3581 "11. (( %s ))DFS\n",
3582 ((comp & DBG_DFS) ? ("V") : (".")));
3583 PDM_SNPF(out_len, used, output + used, out_len - used,
3584 "12. (( %s ))DYN_ARFR\n",
3585 ((comp & DBG_DYN_ARFR) ? ("V") : (".")));
3586 PDM_SNPF(out_len, used, output + used, out_len - used,
3587 "13. (( %s ))ADAPTIVITY\n",
3588 ((comp & DBG_ADPTVTY) ? ("V") : (".")));
3589 PDM_SNPF(out_len, used, output + used, out_len - used,
3590 "14. (( %s ))CFO_TRK\n",
3591 ((comp & DBG_CFO_TRK) ? ("V") : (".")));
3592 PDM_SNPF(out_len, used, output + used, out_len - used,
3593 "15. (( %s ))ENV_MNTR\n",
3594 ((comp & DBG_ENV_MNTR) ? ("V") : (".")));
3595 PDM_SNPF(out_len, used, output + used, out_len - used,
3596 "16. (( %s ))PRI_CCA\n",
3597 ((comp & DBG_PRI_CCA) ? ("V") : (".")));
3598 PDM_SNPF(out_len, used, output + used, out_len - used,
3599 "17. (( %s ))ADPTV_SOML\n",
3600 ((comp & DBG_ADPTV_SOML) ? ("V") : (".")));
3601 PDM_SNPF(out_len, used, output + used, out_len - used,
3602 "18. (( %s ))LNA_SAT_CHK\n",
3603 ((comp & DBG_LNA_SAT_CHK) ? ("V") : (".")));
3604 PDM_SNPF(out_len, used, output + used, out_len - used,
3605 "20. (( %s ))PHY_STATUS\n",
3606 ((comp & DBG_PHY_STATUS) ? ("V") : (".")));
3607 PDM_SNPF(out_len, used, output + used, out_len - used,
3608 "21. (( %s ))TMP\n",
3609 ((comp & DBG_TMP) ? ("V") : (".")));
3610 PDM_SNPF(out_len, used, output + used, out_len - used,
3611 "22. (( %s ))FW_DBG_TRACE\n",
3612 ((comp & DBG_FW_TRACE) ? ("V") : (".")));
3613 PDM_SNPF(out_len, used, output + used, out_len - used,
3614 "23. (( %s ))TXBF\n",
3615 ((comp & DBG_TXBF) ? ("V") : (".")));
3616 PDM_SNPF(out_len, used, output + used, out_len - used,
3617 "24. (( %s ))COMMON_FLOW\n",
3618 ((comp & DBG_COMMON_FLOW) ? ("V") : (".")));
3619 PDM_SNPF(out_len, used, output + used, out_len - used,
3620 "28. (( %s ))PHY_CONFIG\n",
3621 ((comp & ODM_PHY_CONFIG) ? ("V") : (".")));
3622 PDM_SNPF(out_len, used, output + used, out_len - used,
3623 "29. (( %s ))INIT\n",
3624 ((comp & ODM_COMP_INIT) ? ("V") : (".")));
3625 PDM_SNPF(out_len, used, output + used, out_len - used,
3626 "30. (( %s ))COMMON\n",
3627 ((comp & DBG_CMN) ? ("V") : (".")));
3628 PDM_SNPF(out_len, used, output + used, out_len - used,
3629 "31. (( %s ))API\n",
3630 ((comp & ODM_COMP_API) ? ("V") : (".")));
3631 PDM_SNPF(out_len, used, output + used, out_len - used,
3632 "================================\n");
3633
3634 } else if (val[0] == 101) {
3635 dm->debug_components = 0;
3636 PDM_SNPF(out_len, used, output + used, out_len - used,
3637 "Disable all debug components\n");
3638 } else {
3639 if (val[1] == 1) /*@enable*/
3640 dm->debug_components |= (one << val[0]);
3641 else if (val[1] == 2) /*@disable*/
3642 dm->debug_components &= ~(one << val[0]);
3643 else
3644 PDM_SNPF(out_len, used, output + used, out_len - used,
3645 "[Warning] 1:on, 2:off\n");
3646
3647 if ((BIT(val[0]) == DBG_PHY_STATUS) && val[1] == 1) {
3648 dm->phy_dbg_info.show_phy_sts_all_pkt = (u8)val[2];
3649 dm->phy_dbg_info.show_phy_sts_max_cnt = (u16)val[3];
3650
3651 PDM_SNPF(out_len, used, output + used, out_len - used,
3652 "show_all_pkt=%d, show_max_num=%d\n\n",
3653 dm->phy_dbg_info.show_phy_sts_all_pkt,
3654 dm->phy_dbg_info.show_phy_sts_max_cnt);
3655
3656 } else if (BIT(val[0]) == DBG_CMN) {
3657 phydm_cmn_msg_setting(dm, val, &used, output, &out_len);
3658 }
3659 }
3660 PDM_SNPF(out_len, used, output + used, out_len - used,
3661 "pre-DbgComponents = 0x%llx\n", pre_debug_components);
3662 PDM_SNPF(out_len, used, output + used, out_len - used,
3663 "Curr-DbgComponents = 0x%llx\n", dm->debug_components);
3664 PDM_SNPF(out_len, used, output + used, out_len - used,
3665 "================================\n");
3666
3667 *_used = used;
3668 *_out_len = out_len;
3669 }
3670
phydm_fw_debug_trace(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)3671 void phydm_fw_debug_trace(void *dm_void, char input[][16], u32 *_used,
3672 char *output, u32 *_out_len)
3673 {
3674 struct dm_struct *dm = (struct dm_struct *)dm_void;
3675 u32 used = *_used;
3676 u32 out_len = *_out_len;
3677 u32 val[10] = {0};
3678 u8 i, input_idx = 0;
3679 char help[] = "-h";
3680 u32 pre_fw_debug_components = 0, one = 1;
3681 u32 comp = 0;
3682
3683 for (i = 0; i < 5; i++) {
3684 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
3685 input_idx++;
3686 }
3687
3688 if (input_idx == 0)
3689 return;
3690
3691 pre_fw_debug_components = dm->fw_debug_components;
3692 comp = dm->fw_debug_components;
3693
3694 if ((strcmp(input[1], help) == 0)) {
3695 PDM_SNPF(out_len, used, output + used, out_len - used,
3696 "{dbg_comp} {1:en, 2:dis} {mode} {macid}\n");
3697 } else {
3698 if (val[0] == 101) {
3699 dm->fw_debug_components = 0;
3700 PDM_SNPF(out_len, used, output + used, out_len - used,
3701 "%s\n", "Clear all fw debug components");
3702 } else {
3703 if (val[1] == 1) /*@enable*/
3704 dm->fw_debug_components |= (one << val[0]);
3705 else if (val[1] == 2) /*@disable*/
3706 dm->fw_debug_components &= ~(one << val[0]);
3707 else
3708 PDM_SNPF(out_len, used, output + used,
3709 out_len - used, "%s\n",
3710 "[Warning!!!] 1:enable, 2:disable");
3711 }
3712
3713 comp = dm->fw_debug_components;
3714
3715 if (comp == 0) {
3716 dm->debug_components &= ~DBG_FW_TRACE;
3717 /*@H2C to enable C2H Msg*/
3718 phydm_fw_trace_en_h2c(dm, false, comp, val[2], val[3]);
3719 } else {
3720 dm->debug_components |= DBG_FW_TRACE;
3721 /*@H2C to enable C2H Msg*/
3722 phydm_fw_trace_en_h2c(dm, true, comp, val[2], val[3]);
3723 }
3724 }
3725 }
3726
3727 #if (ODM_IC_11N_SERIES_SUPPORT)
phydm_dump_bb_reg_n(void * dm_void,u32 * _used,char * output,u32 * _out_len)3728 void phydm_dump_bb_reg_n(void *dm_void, u32 *_used, char *output, u32 *_out_len)
3729 {
3730 struct dm_struct *dm = (struct dm_struct *)dm_void;
3731 u32 addr = 0;
3732 u32 used = *_used;
3733 u32 out_len = *_out_len;
3734
3735 /*@For Nseries IC we only need to dump page8 to pageF using 3 digits*/
3736 for (addr = 0x800; addr < 0xfff; addr += 4) {
3737 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3738 "0x%03x 0x%08x\n",
3739 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3740 }
3741
3742 *_used = used;
3743 *_out_len = out_len;
3744 }
3745 #endif
3746
3747 #if (ODM_IC_11AC_SERIES_SUPPORT)
phydm_dump_bb_reg_ac(void * dm_void,u32 * _used,char * output,u32 * _out_len)3748 void phydm_dump_bb_reg_ac(void *dm_void, u32 *_used, char *output,
3749 u32 *_out_len)
3750 {
3751 struct dm_struct *dm = (struct dm_struct *)dm_void;
3752 u32 addr = 0;
3753 u32 used = *_used;
3754 u32 out_len = *_out_len;
3755
3756 for (addr = 0x800; addr < 0xfff; addr += 4) {
3757 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3758 "0x%04x 0x%08x\n",
3759 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3760 }
3761
3762 if (!(dm->support_ic_type &
3763 (ODM_RTL8822B | ODM_RTL8814A | ODM_RTL8821C | ODM_RTL8195B)))
3764 goto rpt_reg;
3765
3766 if (dm->rf_type > RF_2T2R) {
3767 for (addr = 0x1800; addr < 0x18ff; addr += 4)
3768 PDM_VAST_SNPF(out_len, used, output + used,
3769 out_len - used, "0x%04x 0x%08x\n",
3770 addr,
3771 odm_get_bb_reg(dm, addr, MASKDWORD));
3772 }
3773
3774 if (dm->rf_type > RF_3T3R) {
3775 for (addr = 0x1a00; addr < 0x1aff; addr += 4)
3776 PDM_VAST_SNPF(out_len, used, output + used,
3777 out_len - used, "0x%04x 0x%08x\n",
3778 addr,
3779 odm_get_bb_reg(dm, addr, MASKDWORD));
3780 }
3781
3782 for (addr = 0x1900; addr < 0x19ff; addr += 4)
3783 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3784 "0x%04x 0x%08x\n",
3785 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3786
3787 for (addr = 0x1c00; addr < 0x1cff; addr += 4)
3788 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3789 "0x%04x 0x%08x\n",
3790 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3791
3792 for (addr = 0x1f00; addr < 0x1fff; addr += 4)
3793 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3794 "0x%04x 0x%08x\n",
3795 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3796
3797 rpt_reg:
3798
3799 *_used = used;
3800 *_out_len = out_len;
3801 }
3802
3803 #endif
3804
3805 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
phydm_dump_bb_reg_jgr3(void * dm_void,u32 * _used,char * output,u32 * _out_len)3806 void phydm_dump_bb_reg_jgr3(void *dm_void, u32 *_used, char *output,
3807 u32 *_out_len)
3808 {
3809 struct dm_struct *dm = (struct dm_struct *)dm_void;
3810 u32 addr = 0;
3811 u32 used = *_used;
3812 u32 out_len = *_out_len;
3813
3814 if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
3815 for (addr = 0x800; addr < 0xdff; addr += 4)
3816 PDM_VAST_SNPF(out_len, used, output + used,
3817 out_len - used, "0x%04x 0x%08x\n", addr,
3818 odm_get_bb_reg(dm, addr, MASKDWORD));
3819
3820 for (addr = 0x1800; addr < 0x1aff; addr += 4)
3821 PDM_VAST_SNPF(out_len, used, output + used,
3822 out_len - used, "0x%04x 0x%08x\n", addr,
3823 odm_get_bb_reg(dm, addr, MASKDWORD));
3824
3825 for (addr = 0x1c00; addr < 0x1eff; addr += 4)
3826 PDM_VAST_SNPF(out_len, used, output + used,
3827 out_len - used, "0x%04x 0x%08x\n", addr,
3828 odm_get_bb_reg(dm, addr, MASKDWORD));
3829
3830 #if (defined(RTL8723F_SUPPORT))
3831 if (dm->support_ic_type & ODM_RTL8723F) {
3832 for (addr = 0x2a00; addr < 0x2a5c; addr += 4) {
3833 PDM_VAST_SNPF(out_len, used, output + used,
3834 out_len - used, "0x%04x 0x%08x\n",
3835 addr,
3836 odm_get_bb_reg(dm, addr,
3837 MASKDWORD));
3838 }
3839 }
3840 #endif
3841
3842 for (addr = 0x4000; addr < 0x41ff; addr += 4)
3843 PDM_VAST_SNPF(out_len, used, output + used,
3844 out_len - used, "0x%04x 0x%08x\n", addr,
3845 odm_get_bb_reg(dm, addr, MASKDWORD));
3846
3847 #if (defined(RTL8723F_SUPPORT))
3848 if (dm->support_ic_type & ODM_RTL8723F) {
3849 for (addr = 0x4300; addr < 0x43bf; addr += 4) {
3850 PDM_VAST_SNPF(out_len, used, output + used,
3851 out_len - used, "0x%04x 0x%08x\n",
3852 addr,
3853 odm_get_bb_reg(dm, addr,
3854 MASKDWORD));
3855 }
3856 }
3857 #endif
3858 }
3859 *_used = used;
3860 *_out_len = out_len;
3861 }
3862
phydm_dump_bb_reg2_jgr3(void * dm_void,u32 * _used,char * output,u32 * _out_len)3863 void phydm_dump_bb_reg2_jgr3(void *dm_void, u32 *_used, char *output,
3864 u32 *_out_len)
3865 {
3866 struct dm_struct *dm = (struct dm_struct *)dm_void;
3867 u32 addr = 0;
3868 u32 used = *_used;
3869 u32 out_len = *_out_len;
3870
3871 if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
3872 return;
3873
3874 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
3875 if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
3876 for (addr = 0x5000; addr < 0x53ff; addr += 4) {
3877 PDM_VAST_SNPF(out_len, used, output + used,
3878 out_len - used, "0x%04x 0x%08x\n",
3879 addr,
3880 odm_get_bb_reg(dm, addr, MASKDWORD));
3881 }
3882 }
3883 #endif
3884
3885 /* @Do not change the order of page-2C/2D*/
3886 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3887 "------ BB report-register start ------\n");
3888
3889 #if (defined(RTL8723F_SUPPORT))
3890 if (dm->support_ic_type & ODM_RTL8723F) {
3891 for (addr = 0x2aa0; addr < 0x2aff; addr += 4) {
3892 PDM_VAST_SNPF(out_len, used, output + used,
3893 out_len - used, "0x%04x 0x%08x\n",
3894 addr,
3895 odm_get_bb_reg(dm, addr, MASKDWORD));
3896 }
3897 }
3898 #endif
3899
3900 for (addr = 0x2c00; addr < 0x2dff; addr += 4) {
3901 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3902 "0x%04x 0x%08x\n",
3903 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3904 }
3905
3906 *_used = used;
3907 *_out_len = out_len;
3908 }
3909
phydm_get_per_path_anapar_jgr3(void * dm_void,u8 path,u32 * _used,char * output,u32 * _out_len)3910 void phydm_get_per_path_anapar_jgr3(void *dm_void, u8 path, u32 *_used,
3911 char *output, u32 *_out_len)
3912 {
3913 struct dm_struct *dm = (struct dm_struct *)dm_void;
3914 u8 state = 0;
3915 u8 state_bp = 0;
3916 u32 control_bb = 0;
3917 u32 control_pow = 0;
3918 u32 used = *_used;
3919 u32 out_len = *_out_len;
3920 u32 reg_idx = 0;
3921 u32 dbgport_idx = 0;
3922 u32 dbgport_val = 0;
3923
3924 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3925 "path-%d:\n", path);
3926
3927 if (path == RF_PATH_A) {
3928 reg_idx = R_0x1830;
3929 dbgport_idx = 0x9F0;
3930 } else if (path == RF_PATH_B) {
3931 reg_idx = R_0x4130;
3932 dbgport_idx = 0xBF0;
3933 } else if (path == RF_PATH_C) {
3934 reg_idx = R_0x5230;
3935 dbgport_idx = 0xDF0;
3936 } else if (path == RF_PATH_D) {
3937 reg_idx = R_0x5330;
3938 dbgport_idx = 0xFF0;
3939 }
3940
3941 state_bp = (u8)odm_get_bb_reg(dm, reg_idx, 0xf00000);
3942 odm_set_bb_reg(dm, reg_idx, 0x38000000, 0x5); /* @read en*/
3943
3944 for (state = 0; state <= 0xf; state++) {
3945 odm_set_bb_reg(dm, reg_idx, 0xF00000, state);
3946 if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbgport_idx)) {
3947 dbgport_val = phydm_get_bb_dbg_port_val(dm);
3948 phydm_release_bb_dbg_port(dm);
3949 } else {
3950 PDM_VAST_SNPF(out_len, used, output + used,
3951 out_len - used,
3952 "state:0x%x = read dbg_port error!\n",
3953 state);
3954 }
3955 control_bb = (dbgport_val & 0xFFFF0) >> 4;
3956 control_pow = dbgport_val & 0xF;
3957 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3958 "state:0x%x = control_bb:0x%x pow_bb:0x%x\n",
3959 state, control_bb, control_pow);
3960 }
3961 odm_set_bb_reg(dm, reg_idx, 0xf00000, state_bp);
3962 odm_set_bb_reg(dm, reg_idx, 0x38000000, 0x6); /* @write en*/
3963
3964 *_used = used;
3965 *_out_len = out_len;
3966 }
3967
phydm_get_csi_table_jgr3(void * dm_void,u32 * _used,char * output,u32 * _out_len)3968 void phydm_get_csi_table_jgr3(void *dm_void, u32 *_used, char *output,
3969 u32 *_out_len)
3970 {
3971 struct dm_struct *dm = (struct dm_struct *)dm_void;
3972 u8 table_idx = 0;
3973 u8 table_val = 0;
3974 u32 used = *_used;
3975 u32 out_len = *_out_len;
3976 u32 dbgport_idx = 0x39e;
3977 u32 dbgport_val = 0;
3978
3979 /*enable clk*/
3980 odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x3);
3981 /*enable read table*/
3982 odm_set_bb_reg(dm, R_0x1d94, BIT(31) | BIT(30), 0x2);
3983
3984 for (table_idx = 0; table_idx < 128; table_idx++) {
3985 odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, table_idx);
3986 if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbgport_idx)) {
3987 dbgport_val = phydm_get_bb_dbg_port_val(dm);
3988 phydm_release_bb_dbg_port(dm);
3989 } else {
3990 PDM_VAST_SNPF(out_len, used, output + used,
3991 out_len - used,
3992 "table_idx:0x%x = read dbg_port error!\n",
3993 table_idx);
3994 }
3995 table_val = dbgport_val >> 24;
3996 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3997 "table_idx: 0x%x = 0x%x\n",
3998 table_idx, table_val);
3999 }
4000 /*enable write table*/
4001 odm_set_bb_reg(dm, R_0x1d94, BIT(31) | BIT(30), 0x1);
4002 /*disable clk*/
4003 odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x0);
4004
4005 *_used = used;
4006 *_out_len = out_len;
4007 }
4008
4009 #endif
4010
phydm_dump_bb_reg(void * dm_void,u32 * _used,char * output,u32 * _out_len)4011 void phydm_dump_bb_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
4012 {
4013 struct dm_struct *dm = (struct dm_struct *)dm_void;
4014 u32 used = *_used;
4015 u32 out_len = *_out_len;
4016
4017 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4018 "BB==========\n");
4019 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4020 "------ BB control register start ------\n");
4021
4022 switch (dm->ic_ip_series) {
4023 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4024 case PHYDM_IC_JGR3:
4025 phydm_dump_bb_reg_jgr3(dm, &used, output, &out_len);
4026 break;
4027 #endif
4028
4029 #if (ODM_IC_11AC_SERIES_SUPPORT)
4030 case PHYDM_IC_AC:
4031 phydm_dump_bb_reg_ac(dm, &used, output, &out_len);
4032 break;
4033 #endif
4034
4035 #if (ODM_IC_11N_SERIES_SUPPORT)
4036 case PHYDM_IC_N:
4037 phydm_dump_bb_reg_n(dm, &used, output, &out_len);
4038 break;
4039 #endif
4040
4041 default:
4042 break;
4043 }
4044
4045 *_used = used;
4046 *_out_len = out_len;
4047 }
4048
phydm_dump_rf_reg(void * dm_void,u32 * _used,char * output,u32 * _out_len)4049 void phydm_dump_rf_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
4050 {
4051 struct dm_struct *dm = (struct dm_struct *)dm_void;
4052 u32 addr = 0;
4053 u32 used = *_used;
4054 u32 out_len = *_out_len;
4055 u32 reg = 0;
4056
4057 /* @dump RF register */
4058 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4059 "RF-A==========\n");
4060
4061 for (addr = 0; addr <= 0xFF; addr++) {
4062 reg = odm_get_rf_reg(dm, RF_PATH_A, addr, RFREG_MASK);
4063 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4064 "0x%02x 0x%05x\n", addr, reg);
4065 }
4066
4067 #ifdef PHYDM_COMPILE_ABOVE_2SS
4068 if (dm->rf_type > RF_1T1R) {
4069 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4070 "RF-B==========\n");
4071
4072 for (addr = 0; addr <= 0xFF; addr++) {
4073 reg = odm_get_rf_reg(dm, RF_PATH_B, addr, RFREG_MASK);
4074 PDM_VAST_SNPF(out_len, used, output + used,
4075 out_len - used, "0x%02x 0x%05x\n",
4076 addr, reg);
4077 }
4078 }
4079 #endif
4080
4081 #ifdef PHYDM_COMPILE_ABOVE_3SS
4082 if (dm->rf_type > RF_2T2R) {
4083 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4084 "RF-C==========\n");
4085
4086 for (addr = 0; addr <= 0xFF; addr++) {
4087 reg = odm_get_rf_reg(dm, RF_PATH_C, addr, RFREG_MASK);
4088 PDM_VAST_SNPF(out_len, used, output + used,
4089 out_len - used, "0x%02x 0x%05x\n",
4090 addr, reg);
4091 }
4092 }
4093 #endif
4094
4095 #ifdef PHYDM_COMPILE_ABOVE_4SS
4096 if (dm->rf_type > RF_3T3R) {
4097 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4098 "RF-D==========\n");
4099
4100 for (addr = 0; addr <= 0xFF; addr++) {
4101 reg = odm_get_rf_reg(dm, RF_PATH_D, addr, RFREG_MASK);
4102 PDM_VAST_SNPF(out_len, used, output + used,
4103 out_len - used, "0x%02x 0x%05x\n",
4104 addr, reg);
4105 }
4106 }
4107 #endif
4108
4109 *_used = used;
4110 *_out_len = out_len;
4111 }
4112
phydm_dump_mac_reg(void * dm_void,u32 * _used,char * output,u32 * _out_len)4113 void phydm_dump_mac_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
4114 {
4115 struct dm_struct *dm = (struct dm_struct *)dm_void;
4116 u32 addr = 0;
4117 u32 used = *_used;
4118 u32 out_len = *_out_len;
4119
4120 /* @dump MAC register */
4121 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4122 "MAC==========\n");
4123
4124 for (addr = 0; addr < 0x7ff; addr += 4)
4125 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4126 "0x%04x 0x%08x\n",
4127 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
4128
4129 for (addr = 0x1000; addr < 0x17ff; addr += 4)
4130 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4131 "0x%04x 0x%08x\n",
4132 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
4133
4134 *_used = used;
4135 *_out_len = out_len;
4136 }
4137
phydm_dump_reg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4138 void phydm_dump_reg(void *dm_void, char input[][16], u32 *_used, char *output,
4139 u32 *_out_len)
4140 {
4141 struct dm_struct *dm = (struct dm_struct *)dm_void;
4142 char help[] = "-h";
4143 u32 var1[10] = {0};
4144 u32 used = *_used;
4145 u32 out_len = *_out_len;
4146 u32 addr = 0;
4147
4148 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
4149
4150 if ((strcmp(input[1], help) == 0)) {
4151 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4152 if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
4153 PDM_SNPF(out_len, used, output + used, out_len - used,
4154 "dumpreg {0:all, 1:BB, 2:RF, 3:MAC 4:BB2 for jgr3}\n");
4155 else
4156 #endif
4157 PDM_SNPF(out_len, used, output + used, out_len - used,
4158 "dumpreg {0:all, 1:BB, 2:RF, 3:MAC}\n");
4159 } else if (var1[0] == 0) {
4160 phydm_dump_mac_reg(dm, &used, output, &out_len);
4161 phydm_dump_bb_reg(dm, &used, output, &out_len);
4162 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4163 if (dm->ic_ip_series == PHYDM_IC_JGR3)
4164 phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len);
4165 #endif
4166
4167 phydm_dump_rf_reg(dm, &used, output, &out_len);
4168 } else if (var1[0] == 1) {
4169 phydm_dump_bb_reg(dm, &used, output, &out_len);
4170 } else if (var1[0] == 2) {
4171 phydm_dump_rf_reg(dm, &used, output, &out_len);
4172 } else if (var1[0] == 3) {
4173 phydm_dump_mac_reg(dm, &used, output, &out_len);
4174 } else if (var1[0] == 4) {
4175 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4176 if (dm->ic_ip_series == PHYDM_IC_JGR3)
4177 phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len);
4178 #endif
4179 }
4180
4181 *_used = used;
4182 *_out_len = out_len;
4183 }
4184
phydm_enable_big_jump(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4185 void phydm_enable_big_jump(void *dm_void, char input[][16], u32 *_used,
4186 char *output, u32 *_out_len)
4187 {
4188 #if (RTL8822B_SUPPORT)
4189 struct dm_struct *dm = (struct dm_struct *)dm_void;
4190 struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
4191 u32 dm_value[10] = {0};
4192 u8 i, input_idx = 0;
4193 u32 val;
4194
4195 if (!(dm->support_ic_type & ODM_RTL8822B))
4196 return;
4197
4198 for (i = 0; i < 5; i++) {
4199 if (input[i + 1]) {
4200 PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]);
4201 input_idx++;
4202 }
4203 }
4204
4205 if (input_idx == 0)
4206 return;
4207
4208 if (dm_value[0] == 0) {
4209 dm->dm_dig_table.enable_adjust_big_jump = false;
4210
4211 val = (dig_t->big_jump_step3 << 5) |
4212 (dig_t->big_jump_step2 << 3) |
4213 dig_t->big_jump_step1;
4214
4215 odm_set_bb_reg(dm, R_0x8c8, 0xfe, val);
4216 } else {
4217 dm->dm_dig_table.enable_adjust_big_jump = true;
4218 }
4219 #endif
4220 }
4221
phydm_show_rx_rate(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4222 void phydm_show_rx_rate(void *dm_void, char input[][16], u32 *_used,
4223 char *output, u32 *_out_len)
4224 {
4225 #if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8814B_SUPPORT ||\
4226 RTL8195B_SUPPORT || RTL8822C_SUPPORT || RTL8723F_SUPPORT)
4227 struct dm_struct *dm = (struct dm_struct *)dm_void;
4228 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
4229 u32 used = *_used;
4230 u32 out_len = *_out_len;
4231 u32 var1[10] = {0};
4232 char help[] = "-h";
4233 u8 i, input_idx = 0;
4234
4235 for (i = 0; i < 5; i++) {
4236 PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
4237 input_idx++;
4238 }
4239
4240 if (input_idx == 0)
4241 return;
4242
4243 if ((strcmp(input[1], help) == 0)) {
4244 PDM_SNPF(out_len, used, output + used, out_len - used,
4245 "{1: show Rx rate, 0:reset counter}\n");
4246 *_used = used;
4247 *_out_len = out_len;
4248 return;
4249
4250 } else if (var1[0] == 0) {
4251 phydm_reset_rx_rate_distribution(dm);
4252 *_used = used;
4253 *_out_len = out_len;
4254 return;
4255 }
4256
4257 /* @==Show SU Rate====================================================*/
4258 PDM_SNPF(out_len, used, output + used, out_len - used,
4259 "=====Rx SU rate Statistics=====\n");
4260 PDM_SNPF(out_len, used, output + used, out_len - used,
4261 "[SU][1SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4262 dbg->num_qry_vht_pkt[0], dbg->num_qry_vht_pkt[1],
4263 dbg->num_qry_vht_pkt[2], dbg->num_qry_vht_pkt[3],
4264 dbg->num_qry_vht_pkt[4], dbg->num_qry_vht_pkt[5],
4265 dbg->num_qry_vht_pkt[6], dbg->num_qry_vht_pkt[7],
4266 dbg->num_qry_vht_pkt[8], dbg->num_qry_vht_pkt[9]);
4267
4268 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4269 if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) {
4270 PDM_SNPF(out_len, used, output + used, out_len - used,
4271 "[SU][2SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4272 dbg->num_qry_vht_pkt[10], dbg->num_qry_vht_pkt[11],
4273 dbg->num_qry_vht_pkt[12], dbg->num_qry_vht_pkt[13],
4274 dbg->num_qry_vht_pkt[14], dbg->num_qry_vht_pkt[15],
4275 dbg->num_qry_vht_pkt[16], dbg->num_qry_vht_pkt[17],
4276 dbg->num_qry_vht_pkt[18], dbg->num_qry_vht_pkt[19]);
4277 }
4278 #endif
4279 /* @==Show MU Rate====================================================*/
4280 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) || (defined(PHYSTS_3RD_TYPE_SUPPORT))
4281 PDM_SNPF(out_len, used, output + used, out_len - used,
4282 "=====Rx MU rate Statistics=====\n");
4283 PDM_SNPF(out_len, used, output + used, out_len - used,
4284 "[MU][1SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4285 dbg->num_mu_vht_pkt[0], dbg->num_mu_vht_pkt[1],
4286 dbg->num_mu_vht_pkt[2], dbg->num_mu_vht_pkt[3],
4287 dbg->num_mu_vht_pkt[4], dbg->num_mu_vht_pkt[5],
4288 dbg->num_mu_vht_pkt[6], dbg->num_mu_vht_pkt[7],
4289 dbg->num_mu_vht_pkt[8], dbg->num_mu_vht_pkt[9]);
4290
4291 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4292 if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) {
4293 PDM_SNPF(out_len, used, output + used, out_len - used,
4294 "[MU][2SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4295 dbg->num_mu_vht_pkt[10], dbg->num_mu_vht_pkt[11],
4296 dbg->num_mu_vht_pkt[12], dbg->num_mu_vht_pkt[13],
4297 dbg->num_mu_vht_pkt[14], dbg->num_mu_vht_pkt[15],
4298 dbg->num_mu_vht_pkt[16], dbg->num_mu_vht_pkt[17],
4299 dbg->num_mu_vht_pkt[18], dbg->num_mu_vht_pkt[19]);
4300 }
4301 #endif
4302 #endif
4303 *_used = used;
4304 *_out_len = out_len;
4305 #endif
4306 }
4307
phydm_per_tone_evm(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4308 void phydm_per_tone_evm(void *dm_void, char input[][16], u32 *_used,
4309 char *output, u32 *_out_len)
4310 {
4311 struct dm_struct *dm = (struct dm_struct *)dm_void;
4312 u8 i, j;
4313 u32 used = *_used;
4314 u32 out_len = *_out_len;
4315 u32 var1[4] = {0};
4316 u32 val, tone_num, round;
4317 s8 rxevm_0, rxevm_1;
4318 s32 avg_num, evm_tone_0[256] = {0}, evm_tone_1[256] = {0};
4319 s32 rxevm_sum_0, rxevm_sum_1;
4320
4321 if (dm->support_ic_type & ODM_IC_11N_SERIES) {
4322 pr_debug("n series not support yet !\n");
4323 return;
4324 }
4325
4326 for (i = 0; i < 4; i++) {
4327 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
4328 }
4329
4330 avg_num = var1[0];
4331 round = var1[1];
4332
4333 if (!dm->is_linked) {
4334 PDM_SNPF(out_len, used, output + used, out_len - used,
4335 "No Link !!\n");
4336
4337 *_used = used;
4338 *_out_len = out_len;
4339
4340 return;
4341 }
4342
4343 pr_debug("ID=((%d)), BW=((%d)), fc=((CH-%d))\n", dm->curr_station_id,
4344 20 << *dm->band_width, *dm->channel);
4345 pr_debug("avg_num =((%d)), round =((%d))\n", avg_num, round);
4346 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
4347 watchdog_stop(dm->priv);
4348 #endif
4349 for (j = 0; j < round; j++) {
4350 pr_debug("\nround((%d))\n", (j + 1));
4351 if (*dm->band_width == CHANNEL_WIDTH_20) {
4352 for (tone_num = 228; tone_num <= 255; tone_num++) {
4353 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4354 rxevm_sum_0 = 0;
4355 rxevm_sum_1 = 0;
4356 for (i = 0; i < avg_num; i++) {
4357 val = odm_read_4byte(dm, R_0xf8c);
4358
4359 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4360 rxevm_0 = (rxevm_0 / 2);
4361 if (rxevm_0 < -63)
4362 rxevm_0 = 0;
4363
4364 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4365 rxevm_1 = (rxevm_1 / 2);
4366 if (rxevm_1 < -63)
4367 rxevm_1 = 0;
4368 rxevm_sum_0 += rxevm_0;
4369 rxevm_sum_1 += rxevm_1;
4370 ODM_delay_ms(1);
4371 }
4372 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4373 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4374 pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4375 (256 - tone_num), evm_tone_0[tone_num],
4376 evm_tone_1[tone_num]);
4377 }
4378
4379 for (tone_num = 1; tone_num <= 28; tone_num++) {
4380 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4381 rxevm_sum_0 = 0;
4382 rxevm_sum_1 = 0;
4383 for (i = 0; i < avg_num; i++) {
4384 val = odm_read_4byte(dm, R_0xf8c);
4385
4386 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4387 rxevm_0 = (rxevm_0 / 2);
4388 if (rxevm_0 < -63)
4389 rxevm_0 = 0;
4390
4391 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4392 rxevm_1 = (rxevm_1 / 2);
4393 if (rxevm_1 < -63)
4394 rxevm_1 = 0;
4395 rxevm_sum_0 += rxevm_0;
4396 rxevm_sum_1 += rxevm_1;
4397 ODM_delay_ms(1);
4398 }
4399 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4400 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4401 pr_debug("Tone(%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4402 tone_num, evm_tone_0[tone_num],
4403 evm_tone_1[tone_num]);
4404 }
4405 } else if (*dm->band_width == CHANNEL_WIDTH_40) {
4406 for (tone_num = 198; tone_num <= 254; tone_num++) {
4407 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4408 rxevm_sum_0 = 0;
4409 rxevm_sum_1 = 0;
4410 for (i = 0; i < avg_num; i++) {
4411 val = odm_read_4byte(dm, R_0xf8c);
4412
4413 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4414 rxevm_0 = (rxevm_0 / 2);
4415 if (rxevm_0 < -63)
4416 rxevm_0 = 0;
4417
4418 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4419 rxevm_1 = (rxevm_1 / 2);
4420 if (rxevm_1 < -63)
4421 rxevm_1 = 0;
4422
4423 rxevm_sum_0 += rxevm_0;
4424 rxevm_sum_1 += rxevm_1;
4425 ODM_delay_ms(1);
4426 }
4427 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4428 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4429 pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4430 (256 - tone_num), evm_tone_0[tone_num],
4431 evm_tone_1[tone_num]);
4432 }
4433
4434 for (tone_num = 2; tone_num <= 58; tone_num++) {
4435 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4436 rxevm_sum_0 = 0;
4437 rxevm_sum_1 = 0;
4438 for (i = 0; i < avg_num; i++) {
4439 val = odm_read_4byte(dm, R_0xf8c);
4440
4441 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4442 rxevm_0 = (rxevm_0 / 2);
4443 if (rxevm_0 < -63)
4444 rxevm_0 = 0;
4445
4446 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4447 rxevm_1 = (rxevm_1 / 2);
4448 if (rxevm_1 < -63)
4449 rxevm_1 = 0;
4450 rxevm_sum_0 += rxevm_0;
4451 rxevm_sum_1 += rxevm_1;
4452 ODM_delay_ms(1);
4453 }
4454 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4455 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4456 pr_debug("Tone(%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4457 tone_num, evm_tone_0[tone_num],
4458 evm_tone_1[tone_num]);
4459 }
4460 } else if (*dm->band_width == CHANNEL_WIDTH_80) {
4461 for (tone_num = 134; tone_num <= 254; tone_num++) {
4462 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4463 rxevm_sum_0 = 0;
4464 rxevm_sum_1 = 0;
4465 for (i = 0; i < avg_num; i++) {
4466 val = odm_read_4byte(dm, R_0xf8c);
4467
4468 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4469 rxevm_0 = (rxevm_0 / 2);
4470 if (rxevm_0 < -63)
4471 rxevm_0 = 0;
4472
4473 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4474 rxevm_1 = (rxevm_1 / 2);
4475 if (rxevm_1 < -63)
4476 rxevm_1 = 0;
4477 rxevm_sum_0 += rxevm_0;
4478 rxevm_sum_1 += rxevm_1;
4479 ODM_delay_ms(1);
4480 }
4481 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4482 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4483 pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4484 (256 - tone_num), evm_tone_0[tone_num],
4485 evm_tone_1[tone_num]);
4486 }
4487
4488 for (tone_num = 2; tone_num <= 122; tone_num++) {
4489 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4490 rxevm_sum_0 = 0;
4491 rxevm_sum_1 = 0;
4492 for (i = 0; i < avg_num; i++) {
4493 val = odm_read_4byte(dm, R_0xf8c);
4494
4495 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4496 rxevm_0 = (rxevm_0 / 2);
4497 if (rxevm_0 < -63)
4498 rxevm_0 = 0;
4499
4500 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4501 rxevm_1 = (rxevm_1 / 2);
4502 if (rxevm_1 < -63)
4503 rxevm_1 = 0;
4504 rxevm_sum_0 += rxevm_0;
4505 rxevm_sum_1 += rxevm_1;
4506 ODM_delay_ms(1);
4507 }
4508 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4509 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4510 pr_debug("Tone(%-3d) RXEVM (1ss/2ss)=%d, %d\n",
4511 tone_num, evm_tone_0[tone_num],
4512 evm_tone_1[tone_num]);
4513 }
4514 }
4515 }
4516 *_used = used;
4517 *_out_len = out_len;
4518 }
4519
phydm_bw_ch_adjust(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4520 void phydm_bw_ch_adjust(void *dm_void, char input[][16],
4521 u32 *_used, char *output, u32 *_out_len)
4522 {
4523 struct dm_struct *dm = (struct dm_struct *)dm_void;
4524 char help[] = "-h";
4525 u32 var1[10] = {0};
4526 u32 used = *_used;
4527 u32 out_len = *_out_len;
4528 u8 i;
4529 boolean is_enable_dbg_mode;
4530 u8 central_ch, primary_ch_idx;
4531 enum channel_width bw;
4532
4533 #ifdef PHYDM_COMMON_API_SUPPORT
4534
4535 if ((strcmp(input[1], help) == 0)) {
4536 PDM_SNPF(out_len, used, output + used, out_len - used,
4537 "{en} {CH} {pr_ch_idx 1/2/3/4/9/10} {0:20M,1:40M,2:80M}\n");
4538 goto out;
4539 }
4540
4541 if (!(dm->support_ic_type & CMN_API_SUPPORT_IC)) {
4542 PDM_SNPF(out_len, used, output + used, out_len - used,
4543 "Not support this API\n");
4544 goto out;
4545 }
4546
4547 for (i = 0; i < 4; i++) {
4548 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
4549 }
4550
4551 is_enable_dbg_mode = (boolean)var1[0];
4552 central_ch = (u8)var1[1];
4553 primary_ch_idx = (u8)var1[2];
4554 bw = (enum channel_width)var1[3];
4555
4556 if (is_enable_dbg_mode) {
4557 dm->is_disable_phy_api = false;
4558 phydm_api_switch_bw_channel(dm, central_ch, primary_ch_idx, bw);
4559 dm->is_disable_phy_api = true;
4560 PDM_SNPF(out_len, used, output + used, out_len - used,
4561 "central_ch = %d, primary_ch_idx = %d, bw = %d\n",
4562 central_ch, primary_ch_idx, bw);
4563 }
4564 out:
4565 #endif
4566
4567 *_used = used;
4568 *_out_len = out_len;
4569 }
4570
phydm_ext_rf_element_ctrl(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4571 void phydm_ext_rf_element_ctrl(void *dm_void, char input[][16], u32 *_used,
4572 char *output, u32 *_out_len)
4573 {
4574 struct dm_struct *dm = (struct dm_struct *)dm_void;
4575 u32 val[10] = {0};
4576 u8 i = 0, input_idx = 0;
4577
4578 for (i = 0; i < 5; i++) {
4579 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
4580 input_idx++;
4581 }
4582
4583 if (input_idx == 0)
4584 return;
4585
4586 if (val[0] == 1) /*@ext switch*/ {
4587 phydm_set_ext_switch(dm, val[1]);
4588 }
4589 }
4590
phydm_print_dbgport(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4591 void phydm_print_dbgport(void *dm_void, char input[][16], u32 *_used,
4592 char *output, u32 *_out_len)
4593 {
4594 struct dm_struct *dm = (struct dm_struct *)dm_void;
4595 char help[] = "-h";
4596 u32 var1[10] = {0};
4597 u32 used = *_used;
4598 u32 out_len = *_out_len;
4599 u32 dbg_port_value = 0;
4600 u8 val[32];
4601 u8 tmp = 0;
4602 u8 i;
4603
4604 if (strcmp(input[1], help) == 0) {
4605 PDM_SNPF(out_len, used, output + used, out_len - used,
4606 "{dbg_port_idx}\n");
4607 goto out;
4608 }
4609
4610 PHYDM_SSCANF(input[1], DCMD_HEX, &var1[0]);
4611
4612 dm->debug_components |= ODM_COMP_API;
4613 if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, var1[0])) {
4614 dbg_port_value = phydm_get_bb_dbg_port_val(dm);
4615 phydm_release_bb_dbg_port(dm);
4616
4617 for (i = 0; i < 32; i++)
4618 val[i] = (u8)((dbg_port_value & BIT(i)) >> i);
4619
4620 PDM_SNPF(out_len, used, output + used, out_len - used,
4621 "Dbg Port[0x%x] = ((0x%x))\n", var1[0],
4622 dbg_port_value);
4623
4624 for (i = 4; i != 0; i--) {
4625 tmp = 8 * (i - 1);
4626 PDM_SNPF(out_len, used, output + used, out_len - used,
4627 "val[%d:%d] = 8b'%d %d %d %d %d %d %d %d\n",
4628 tmp + 7, tmp, val[tmp + 7], val[tmp + 6],
4629 val[tmp + 5], val[tmp + 4], val[tmp + 3],
4630 val[tmp + 2], val[tmp + 1], val[tmp + 0]);
4631 }
4632 }
4633 dm->debug_components &= (~ODM_COMP_API);
4634 out:
4635 *_used = used;
4636 *_out_len = out_len;
4637 }
4638
phydm_get_anapar_table(void * dm_void,u32 * _used,char * output,u32 * _out_len)4639 void phydm_get_anapar_table(void *dm_void, u32 *_used, char *output,
4640 u32 *_out_len)
4641 {
4642 struct dm_struct *dm = (struct dm_struct *)dm_void;
4643 u32 used = *_used;
4644 u32 out_len = *_out_len;
4645 enum rf_path i = RF_PATH_A;
4646
4647 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4648 if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
4649 return;
4650
4651 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4652 "------ Analog parameters start ------\n");
4653
4654 for (i = RF_PATH_A; i < (enum rf_path)dm->num_rf_path; i++)
4655 phydm_get_per_path_anapar_jgr3(dm, i, &used, output, &out_len);
4656 #endif
4657
4658 *_used = used;
4659 *_out_len = out_len;
4660 }
4661
phydm_get_csi_table(void * dm_void,u32 * _used,char * output,u32 * _out_len)4662 void phydm_get_csi_table(void *dm_void, u32 *_used, char *output,
4663 u32 *_out_len)
4664 {
4665 struct dm_struct *dm = (struct dm_struct *)dm_void;
4666 u32 used = *_used;
4667 u32 out_len = *_out_len;
4668
4669 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4670 if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
4671 return;
4672
4673 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4674 "------ CSI Table Parsing start ------\n");
4675
4676 phydm_get_csi_table_jgr3(dm, &used, output, &out_len);
4677 #endif
4678
4679 *_used = used;
4680 *_out_len = out_len;
4681 }
4682
phydm_dd_dbg_dump(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4683 void phydm_dd_dbg_dump(void *dm_void, char input[][16], u32 *_used,
4684 char *output, u32 *_out_len)
4685 {
4686 struct dm_struct *dm = (struct dm_struct *)dm_void;
4687 char help[] = "-h";
4688 u32 var1[10] = {0};
4689 u32 used = *_used;
4690 u32 out_len = *_out_len;
4691
4692 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
4693
4694 if ((strcmp(input[1], help) == 0)) {
4695 PDM_SNPF(out_len, used, output + used, out_len - used,
4696 "dump: {1}\n");
4697 return;
4698 } else if (var1[0] == 1) {
4699 /*[Reg]*/
4700 phydm_dump_mac_reg(dm, &used, output, &out_len);
4701 phydm_dump_bb_reg(dm, &used, output, &out_len);
4702 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4703 if (dm->ic_ip_series == PHYDM_IC_JGR3)
4704 phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len);
4705 #endif
4706
4707 phydm_dump_rf_reg(dm, &used, output, &out_len);
4708 /*[Dbg Port]*/
4709 #ifdef PHYDM_AUTO_DEGBUG
4710 phydm_dbg_port_dump(dm, &used, output, &out_len);
4711 #endif
4712 /*[Analog Parameters]*/
4713 phydm_get_anapar_table(dm, &used, output, &out_len);
4714 }
4715 }
4716
phydm_nss_hitogram_mp(void * dm_void,enum PDM_RATE_TYPE rate_type,u32 * _used,char * output,u32 * _out_len)4717 void phydm_nss_hitogram_mp(void *dm_void, enum PDM_RATE_TYPE rate_type,
4718 u32 *_used, char *output, u32 *_out_len)
4719 {
4720 struct dm_struct *dm = (struct dm_struct *)dm_void;
4721 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
4722 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
4723 u32 used = *_used;
4724 u32 out_len = *_out_len;
4725 char buf[PHYDM_SNPRINT_SIZE] = {0};
4726 u16 buf_size = PHYDM_SNPRINT_SIZE;
4727 u16 h_size = PHY_HIST_SIZE;
4728 u16 *evm_hist = &dbg_s->evm_1ss_hist[0];
4729 u16 *snr_hist = &dbg_s->snr_1ss_hist[0];
4730 u8 i = 0;
4731 u8 ss = phydm_rate_type_2_num_ss(dm, rate_type);
4732
4733 if (rate_type == PDM_OFDM) {
4734 phydm_print_hist_2_buf(dm, dbg_s->evm_ofdm_hist, PHY_HIST_SIZE,
4735 buf, buf_size);
4736 PDM_SNPF(out_len, used, output + used, out_len - used,
4737 "%-14s=%s\n", "[OFDM][EVM]", buf);
4738
4739 phydm_print_hist_2_buf(dm, dbg_s->snr_ofdm_hist, PHY_HIST_SIZE,
4740 buf, buf_size);
4741 PDM_SNPF(out_len, used, output + used, out_len - used,
4742 "%-14s=%s\n", "[OFDM][SNR]", buf);
4743
4744 *_used = used;
4745 *_out_len = out_len;
4746 return;
4747 }
4748
4749 for (i = 0; i < ss; i++) {
4750 if (rate_type == PDM_1SS) {
4751 evm_hist = &dbg_s->evm_1ss_hist[0];
4752 snr_hist = &dbg_s->snr_1ss_hist[0];
4753 } else if (rate_type == PDM_2SS) {
4754 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4755 evm_hist = &dbg_s->evm_2ss_hist[i][0];
4756 snr_hist = &dbg_s->snr_2ss_hist[i][0];
4757 #endif
4758 } else if (rate_type == PDM_3SS) {
4759 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4760 evm_hist = &dbg_s->evm_3ss_hist[i][0];
4761 snr_hist = &dbg_s->snr_3ss_hist[i][0];
4762 #endif
4763 } else if (rate_type == PDM_4SS) {
4764 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4765 evm_hist = &dbg_s->evm_4ss_hist[i][0];
4766 snr_hist = &dbg_s->snr_4ss_hist[i][0];
4767 #endif
4768 }
4769
4770 phydm_print_hist_2_buf(dm, evm_hist, h_size, buf, buf_size);
4771 PDM_SNPF(out_len, used, output + used, out_len - used,
4772 "[%d-SS][EVM][%d]=%s\n", ss, i, buf);
4773 phydm_print_hist_2_buf(dm, snr_hist, h_size, buf, buf_size);
4774 PDM_SNPF(out_len, used, output + used, out_len - used,
4775 "[%d-SS][SNR][%d]=%s\n", ss, i, buf);
4776 }
4777 *_used = used;
4778 *_out_len = out_len;
4779 }
4780
phydm_mp_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4781 void phydm_mp_dbg(void *dm_void, char input[][16], u32 *_used, char *output,
4782 u32 *_out_len)
4783 {
4784 struct dm_struct *dm = (struct dm_struct *)dm_void;
4785 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
4786 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
4787 struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg;
4788 char *rate_type = NULL;
4789 u8 tmp_rssi_avg[4];
4790 u8 tmp_snr_avg[4];
4791 u8 tmp_evm_avg[4];
4792 u32 tmp_cnt = 0;
4793 char buf[PHYDM_SNPRINT_SIZE] = {0};
4794 u32 used = *_used;
4795 u32 out_len = *_out_len;
4796 u32 var1[10] = {0};
4797 u16 buf_size = PHYDM_SNPRINT_SIZE;
4798 u16 th_size = PHY_HIST_SIZE - 1;
4799 u8 i = 0;
4800
4801 if (!(*dm->mp_mode))
4802 return;
4803
4804 PDM_SNPF(out_len, used, output + used, out_len - used,
4805 "BW=((%d)), fc=((CH-%d))\n",
4806 20 << *dm->band_width, *dm->channel);
4807
4808 /*@===[PHY Histogram]================================================*/
4809 PDM_SNPF(out_len, used, output + used, out_len - used,
4810 "[PHY Histogram] ==============>\n");
4811 /*@===[Threshold]===*/
4812 phydm_print_hist_2_buf(dm, dbg_i->evm_hist_th, th_size, buf, buf_size);
4813 PDM_SNPF(out_len, used, output + used, out_len - used,
4814 "%-16s=%s\n", "[EVM_TH]", buf);
4815 phydm_print_hist_2_buf(dm, dbg_i->snr_hist_th, th_size, buf, buf_size);
4816 PDM_SNPF(out_len, used, output + used, out_len - used,
4817 "%-16s=%s\n", "[SNR_TH]", buf);
4818 /*@===[OFDM]===*/
4819 phydm_nss_hitogram_mp(dm, PDM_OFDM, &used, output, &out_len);
4820 /*@===[1-SS]===*/
4821 phydm_nss_hitogram_mp(dm, PDM_1SS, &used, output, &out_len);
4822 /*@===[2-SS]===*/
4823 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4824 if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS)
4825 phydm_nss_hitogram_mp(dm, PDM_2SS, &used, output, &out_len);
4826 #endif
4827 /*@===[3-SS]===*/
4828 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4829 if (dm->support_ic_type & PHYDM_IC_ABOVE_3SS)
4830 phydm_nss_hitogram_mp(dm, PDM_3SS, &used, output, &out_len);
4831 #endif
4832 /*@===[4-SS]===*/
4833 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4834 if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS)
4835 phydm_nss_hitogram_mp(dm, PDM_4SS, &used, output, &out_len);
4836 #endif
4837 /*@===[PHY Avg]======================================================*/
4838 phydm_get_avg_phystatus_val(dm);
4839 PDM_SNPF(out_len, used, output + used, out_len - used,
4840 "[PHY Avg] ==============>\n");
4841
4842 phydm_get_avg_phystatus_val(dm);
4843
4844 switch (dm->num_rf_path) {
4845 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4846 case 4:
4847 PDM_SNPF(out_len, used, output + used, out_len - used,
4848 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
4849 "[Beacon]", dbg_s->rssi_beacon_cnt,
4850 dbg_avg->rssi_beacon_avg[0],
4851 dbg_avg->rssi_beacon_avg[1],
4852 dbg_avg->rssi_beacon_avg[2],
4853 dbg_avg->rssi_beacon_avg[3]);
4854 break;
4855 #endif
4856 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4857 case 3:
4858 PDM_SNPF(out_len, used, output + used, out_len - used,
4859 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
4860 "[Beacon]", dbg_s->rssi_beacon_cnt,
4861 dbg_avg->rssi_beacon_avg[0],
4862 dbg_avg->rssi_beacon_avg[1],
4863 dbg_avg->rssi_beacon_avg[2]);
4864 break;
4865 #endif
4866 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4867 case 2:
4868 PDM_SNPF(out_len, used, output + used, out_len - used,
4869 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
4870 "[Beacon]", dbg_s->rssi_beacon_cnt,
4871 dbg_avg->rssi_beacon_avg[0],
4872 dbg_avg->rssi_beacon_avg[1]);
4873 break;
4874 #endif
4875 default:
4876 PDM_SNPF(out_len, used, output + used, out_len - used,
4877 "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
4878 "[Beacon]", dbg_s->rssi_beacon_cnt,
4879 dbg_avg->rssi_beacon_avg[0]);
4880 break;
4881 }
4882
4883 switch (dm->num_rf_path) {
4884 #ifdef PHYSTS_3RD_TYPE_SUPPORT
4885 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4886 case 4:
4887 PDM_SNPF(out_len, used, output + used, out_len - used,
4888 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
4889 "[CCK]", dbg_s->rssi_cck_cnt,
4890 dbg_avg->rssi_cck_avg,
4891 dbg_avg->rssi_cck_avg_abv_2ss[0],
4892 dbg_avg->rssi_cck_avg_abv_2ss[1],
4893 dbg_avg->rssi_cck_avg_abv_2ss[2]);
4894 break;
4895 #endif
4896 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4897 case 3:
4898 PDM_SNPF(out_len, used, output + used, out_len - used,
4899 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
4900 "[CCK]", dbg_s->rssi_cck_cnt,
4901 dbg_avg->rssi_cck_avg,
4902 dbg_avg->rssi_cck_avg_abv_2ss[0],
4903 dbg_avg->rssi_cck_avg_abv_2ss[1]);
4904 break;
4905 #endif
4906 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4907 case 2:
4908 PDM_SNPF(out_len, used, output + used, out_len - used,
4909 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
4910 "[CCK]", dbg_s->rssi_cck_cnt,
4911 dbg_avg->rssi_cck_avg,
4912 dbg_avg->rssi_cck_avg_abv_2ss[0]);
4913 break;
4914 #endif
4915 #endif
4916 default:
4917 PDM_SNPF(out_len, used, output + used, out_len - used,
4918 "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
4919 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg);
4920 break;
4921 }
4922
4923 for (i = 0; i <= 4; i++) {
4924 if (i > dm->num_rf_path)
4925 break;
4926
4927 odm_memory_set(dm, tmp_rssi_avg, 0, 4);
4928 odm_memory_set(dm, tmp_snr_avg, 0, 4);
4929 odm_memory_set(dm, tmp_evm_avg, 0, 4);
4930
4931 switch (i) {
4932 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4933 case 4:
4934 rate_type = "[4-SS]";
4935 tmp_cnt = dbg_s->rssi_4ss_cnt;
4936 odm_move_memory(dm, tmp_rssi_avg,
4937 dbg_avg->rssi_4ss_avg, dm->num_rf_path);
4938 odm_move_memory(dm, tmp_snr_avg,
4939 dbg_avg->snr_4ss_avg, dm->num_rf_path);
4940 odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_4ss_avg,
4941 4);
4942 break;
4943 #endif
4944 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4945 case 3:
4946 rate_type = "[3-SS]";
4947 tmp_cnt = dbg_s->rssi_3ss_cnt;
4948 odm_move_memory(dm, tmp_rssi_avg,
4949 dbg_avg->rssi_3ss_avg, dm->num_rf_path);
4950 odm_move_memory(dm, tmp_snr_avg,
4951 dbg_avg->snr_3ss_avg, dm->num_rf_path);
4952 odm_move_memory(dm, tmp_evm_avg,
4953 dbg_avg->evm_3ss_avg, 3);
4954 break;
4955 #endif
4956 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4957 case 2:
4958 rate_type = "[2-SS]";
4959 tmp_cnt = dbg_s->rssi_2ss_cnt;
4960 odm_move_memory(dm, tmp_rssi_avg,
4961 dbg_avg->rssi_2ss_avg, dm->num_rf_path);
4962 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_2ss_avg,
4963 dm->num_rf_path);
4964 odm_move_memory(dm, tmp_evm_avg,
4965 dbg_avg->evm_2ss_avg, 2);
4966 break;
4967 #endif
4968 case 1:
4969 rate_type = "[1-SS]";
4970 tmp_cnt = dbg_s->rssi_1ss_cnt;
4971 odm_move_memory(dm, tmp_rssi_avg,
4972 dbg_avg->rssi_1ss_avg, dm->num_rf_path);
4973 odm_move_memory(dm, tmp_snr_avg,
4974 dbg_avg->snr_1ss_avg, dm->num_rf_path);
4975 odm_move_memory(dm, tmp_evm_avg,
4976 &dbg_avg->evm_1ss_avg, 1);
4977 break;
4978 default:
4979 rate_type = "[L-OFDM]";
4980 tmp_cnt = dbg_s->rssi_ofdm_cnt;
4981 odm_move_memory(dm, tmp_rssi_avg,
4982 dbg_avg->rssi_ofdm_avg,
4983 dm->num_rf_path);
4984 odm_move_memory(dm, tmp_snr_avg,
4985 dbg_avg->snr_ofdm_avg, dm->num_rf_path);
4986 odm_move_memory(dm, tmp_evm_avg,
4987 &dbg_avg->evm_ofdm_avg, 1);
4988 break;
4989 }
4990
4991 PDM_SNPF(out_len, used, output + used, out_len - used,
4992 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n",
4993 rate_type, tmp_cnt,
4994 tmp_rssi_avg[0], tmp_rssi_avg[1],
4995 tmp_rssi_avg[2], tmp_rssi_avg[3],
4996 tmp_snr_avg[0], tmp_snr_avg[1],
4997 tmp_snr_avg[2], tmp_snr_avg[3],
4998 tmp_evm_avg[0], tmp_evm_avg[1],
4999 tmp_evm_avg[2], tmp_evm_avg[3]);
5000 }
5001
5002 phydm_reset_phystatus_statistic(dm);
5003
5004 PDM_SNPF(out_len, used, output + used, out_len - used,
5005 "rxsc_idx {Legacy, 20, 40, 80} = {%d, %d, %d, %d}\n",
5006 dm->rxsc_l, dm->rxsc_20, dm->rxsc_40, dm->rxsc_80);
5007
5008 *_used = used;
5009 *_out_len = out_len;
5010 }
5011
phydm_reg_monitor(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)5012 void phydm_reg_monitor(void *dm_void, char input[][16], u32 *_used,
5013 char *output, u32 *_out_len)
5014 {
5015 struct dm_struct *dm = (struct dm_struct *)dm_void;
5016 char help[] = "-h";
5017 u32 var1[10] = {0};
5018 u32 used = *_used;
5019 u32 out_len = *_out_len;
5020 boolean en_mntr = false;
5021 u8 i = 0;
5022
5023 for (i = 0; i < 7; i++) {
5024 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
5025 }
5026
5027 if ((strcmp(input[1], help) == 0)) {
5028 PDM_SNPF(out_len, used, output + used, out_len - used,
5029 "reg_mntr {en} {0:all, 1:BB, 2:RF, 3:MAC 4:1/2/4 byte}\n");
5030 } else {
5031 if (var1[0] == 1)
5032 en_mntr = true;
5033 else
5034 en_mntr = false;
5035
5036 if (var1[1] == 0) {
5037 dm->en_reg_mntr_bb = en_mntr;
5038 dm->en_reg_mntr_rf = en_mntr;
5039 dm->en_reg_mntr_mac = en_mntr;
5040 dm->en_reg_mntr_byte = en_mntr;
5041 } else if (var1[1] == 1) {
5042 dm->en_reg_mntr_bb = en_mntr;
5043 } else if (var1[1] == 2) {
5044 dm->en_reg_mntr_rf = en_mntr;
5045 } else if (var1[1] == 3) {
5046 dm->en_reg_mntr_mac = en_mntr;
5047 } else if (var1[1] == 4) {
5048 dm->en_reg_mntr_byte = en_mntr;
5049 }
5050 }
5051
5052 PDM_SNPF(out_len, used, output + used, out_len - used,
5053 "en: BB:%d, RF:%d, MAC:%d, byte:%d\n", dm->en_reg_mntr_bb,
5054 dm->en_reg_mntr_rf, dm->en_reg_mntr_mac, dm->en_reg_mntr_byte);
5055
5056 *_used = used;
5057 *_out_len = out_len;
5058 }
5059
5060 #if (RTL8822C_SUPPORT)
phydm_get_agc_rf_gain(void * dm_void,boolean is_mod,u8 tab,u8 mp_gain_i)5061 u16 phydm_get_agc_rf_gain(void *dm_void, boolean is_mod, u8 tab, u8 mp_gain_i)
5062 {
5063 struct dm_struct *dm = (struct dm_struct *)dm_void;
5064 u16 rf_gain = 0x0;
5065
5066 if (is_mod)
5067 rf_gain = dm->agc_rf_gain[tab][mp_gain_i];
5068 else
5069 rf_gain = dm->agc_rf_gain_ori[tab][mp_gain_i];
5070
5071 return rf_gain;
5072 }
5073 #endif
5074
phydm_get_rxagc_table_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)5075 void phydm_get_rxagc_table_dbg(void *dm_void, char input[][16], u32 *_used,
5076 char *output, u32 *_out_len)
5077 {
5078 struct dm_struct *dm = (struct dm_struct *)dm_void;
5079 char help[] = "-h";
5080 u32 var1[10] = {0};
5081 u32 used = *_used;
5082 u32 out_len = *_out_len;
5083 u8 tab = 0;
5084 boolean is_modified = false;
5085 u8 mp_gain = 0;
5086 u16 rf_gain = 0;
5087 u8 i = 0;
5088
5089 #if (RTL8822C_SUPPORT)
5090 if (!(dm->support_ic_type & ODM_RTL8822C))
5091 return;
5092
5093 if ((strcmp(input[1], help) == 0)) {
5094 PDM_SNPF(out_len, used, output + used, out_len - used,
5095 "get rxagc table : {0:ori, 1:modified} {table:0~15} {mp_gain_idx:0~63, all:0xff}\n");
5096 } else {
5097 for (i = 0; i < 3; i++) {
5098 PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
5099 }
5100
5101 is_modified = (boolean)var1[0];
5102 tab = (u8)var1[1];
5103 mp_gain = (u8)var1[2];
5104
5105 PDM_SNPF(out_len, used, output + used, out_len - used,
5106 "agc_table_cnt:%d, is_agc_tab_pos_shift:%d, agc_table_shift:%d\n",
5107 dm->agc_table_cnt, dm->is_agc_tab_pos_shift,
5108 dm->agc_table_shift);
5109
5110 if (mp_gain == 0xff) {
5111 for (i = 0; i < 64; i++) {
5112 rf_gain = phydm_get_agc_rf_gain(dm, is_modified,
5113 tab, i);
5114
5115 PDM_SNPF(out_len, used, output + used,
5116 out_len - used,
5117 "agc_table:%d, mp_gain_idx:0x%x, rf_gain_idx:0x%x\n",
5118 tab, i, rf_gain);
5119 }
5120 } else {
5121 rf_gain = phydm_get_agc_rf_gain(dm, is_modified, tab,
5122 mp_gain);
5123
5124 PDM_SNPF(out_len, used, output + used, out_len - used,
5125 "agc_table:%d, mp_gain_idx:0x%x, rf_gain_idx:0x%x\n",
5126 tab, mp_gain, rf_gain);
5127 }
5128 }
5129 #endif
5130 *_used = used;
5131 *_out_len = out_len;
5132 }
5133
phydm_shift_rxagc_table_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)5134 void phydm_shift_rxagc_table_dbg(void *dm_void, char input[][16], u32 *_used,
5135 char *output, u32 *_out_len)
5136 {
5137 struct dm_struct *dm = (struct dm_struct *)dm_void;
5138 char help[] = "-h";
5139 u32 var1[10] = {0};
5140 u32 used = *_used;
5141 u32 out_len = *_out_len;
5142 u8 i = 0;
5143 u16 value_db = 0;
5144
5145 #if (RTL8822C_SUPPORT)
5146 if (!(dm->support_ic_type & ODM_RTL8822C))
5147 return;
5148
5149 if ((strcmp(input[1], help) == 0)) {
5150 PDM_SNPF(out_len, used, output + used, out_len - used,
5151 "shift rxagc table : {0:-, 1:+} {value(0~63, unit:2dB)}\n");
5152 } else {
5153 for (i = 0; i < 3; i++) {
5154 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL,
5155 &var1[i]);
5156 }
5157
5158 if ((u8)var1[1] > 63) {
5159 PDM_SNPF(out_len, used, output + used, out_len - used,
5160 "Do not enter the value larger than 63!\n");
5161 } else {
5162 phydm_shift_rxagc_table(dm, (boolean)var1[0],
5163 (u8)var1[1]);
5164
5165 value_db = (u8)var1[1] << 1;
5166 PDM_SNPF(out_len, used, output + used, out_len - used,
5167 "shift %s%d dB gain\n",
5168 (((boolean)var1[0]) ? "+" : "-"), value_db);
5169 }
5170 }
5171 #endif
5172 }
5173
5174 #if (RTL8814B_SUPPORT || RTL8198F_SUPPORT)
phydm_spur_detect_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)5175 void phydm_spur_detect_dbg(void *dm_void, char input[][16], u32 *_used,
5176 char *output, u32 *_out_len)
5177 {
5178 struct dm_struct *dm = (struct dm_struct *)dm_void;
5179 char help[] = "-h";
5180 u32 var1[10] = {0};
5181 u32 used = *_used;
5182 u32 out_len = *_out_len;
5183 u32 i;
5184
5185 if ((strcmp(input[1], help) == 0)) {
5186 PDM_SNPF(out_len, used, output + used, out_len - used,
5187 "{0: Auto spur detect(NBI+CSI), 1:NBI always ON/ CSI Auto,");
5188 PDM_SNPF(out_len, used, output + used, out_len - used,
5189 "2: CSI always On/ NBI Auto, 3: Disable, 4: CSI & NBI ON}\n");
5190 PDM_SNPF(out_len, used, output + used, out_len - used,
5191 "{If CSI always ON (Mode 2 or 4) -> CSI wgt manual(0~7)}\n");
5192 PDM_SNPF(out_len, used, output + used, out_len - used,
5193 "{5: Adjust CSI weight threshold} {0:-,1:+} {th offset}\n");
5194 } else {
5195 for (i = 0; i < 10; i++) {
5196 if (input[i + 1])
5197 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL,
5198 &var1[i]);
5199 }
5200
5201 if (var1[0] == 1) {
5202 dm->dsde_sel = DET_NBI;
5203 } else if (var1[0] == 2) {
5204 dm->dsde_sel = DET_CSI;
5205 } else if (var1[0] == 3) {
5206 dm->dsde_sel = DET_DISABLE;
5207 } else if (var1[0] == 4) {
5208 dm->dsde_sel = DET_CSI_NBI_EN;
5209 } else if (var1[0] == 0) {
5210 dm->dsde_sel = DET_AUTO;
5211 } else if (var1[0] == 5) {
5212 if (var1[1] == 0)
5213 for (i = 0; i < 5; i++)
5214 dm->csi_wgt_th_db[i] -= (u8)var1[2];
5215 else if (var1[1] == 1)
5216 for (i = 0; i < 5; i++)
5217 dm->csi_wgt_th_db[i] += (u8)var1[2];
5218 PDM_SNPF(out_len, used, output + used, out_len - used, "current csi weight threshold:\n");
5219 for (i = 0; i < 5; i++)
5220 PDM_SNPF(out_len, used, output + used,
5221 out_len - used, "----%2d",
5222 dm->csi_wgt_th_db[i]);
5223 PDM_SNPF(out_len, used, output + used, out_len - used, "\n");
5224 for (i = 0; i < 5; i++)
5225 PDM_SNPF(out_len, used, output + used,
5226 out_len - used, "--%d--|", i);
5227 PDM_SNPF(out_len, used, output + used, out_len - used, "\n");
5228 } else {
5229 PDM_SNPF(out_len, used, output + used, out_len - used,
5230 "Spur detection mode invalid!\n");
5231 return;
5232 }
5233 if (var1[0] < 5)
5234 PDM_SNPF(out_len, used, output + used, out_len - used,
5235 "spur detect mode = %d\n", dm->dsde_sel);
5236
5237 if (dm->dsde_sel == DET_CSI_NBI_EN) {
5238 if (var1[1] < 8) {
5239 dm->csi_wgt = (u8)var1[1];
5240 PDM_SNPF(out_len, used, output + used,
5241 out_len - used, "CSI wgt %d\n",
5242 dm->csi_wgt);
5243 } else {
5244 PDM_SNPF(out_len, used, output + used,
5245 out_len - used,
5246 "CSI wgt setting invalid. Please set the correct wgt!\n");
5247 return;
5248 }
5249 }
5250 }
5251
5252 *_used = used;
5253 *_out_len = out_len;
5254 }
5255 #endif
5256
5257 struct phydm_command {
5258 char name[16];
5259 u8 id;
5260 };
5261
5262 enum PHYDM_CMD_ID {
5263 PHYDM_HELP,
5264 PHYDM_DEMO,
5265 PHYDM_RF_CMD,
5266 PHYDM_DIG,
5267 PHYDM_RA,
5268 PHYDM_PROFILE,
5269 PHYDM_ANTDIV,
5270 PHYDM_PATHDIV,
5271 PHYDM_DEBUG,
5272 PHYDM_MP_DEBUG,
5273 PHYDM_FW_DEBUG,
5274 PHYDM_SUPPORT_ABILITY,
5275 PHYDM_GET_TXAGC,
5276 PHYDM_SET_TXAGC,
5277 PHYDM_SMART_ANT,
5278 PHYDM_CH_BW,
5279 PHYDM_TRX_PATH,
5280 PHYDM_LA_MODE,
5281 PHYDM_DUMP_REG,
5282 PHYDM_AUTO_DBG,
5283 PHYDM_DD_DBG,
5284 PHYDM_BIG_JUMP,
5285 PHYDM_SHOW_RXRATE,
5286 PHYDM_NBI_EN,
5287 PHYDM_CSI_MASK_EN,
5288 PHYDM_DFS_DEBUG,
5289 PHYDM_DFS_HIST,
5290 PHYDM_NHM,
5291 PHYDM_CLM,
5292 PHYDM_FAHM,
5293 PHYDM_ENV_MNTR,
5294 PHYDM_BB_INFO,
5295 //PHYDM_TXBF,
5296 PHYDM_H2C,
5297 PHYDM_EXT_RF_E_CTRL,
5298 PHYDM_ADAPTIVE_SOML,
5299 PHYDM_PSD,
5300 PHYDM_DEBUG_PORT,
5301 PHYDM_DIS_HTSTF_CONTROL,
5302 PHYDM_CFO_TRK,
5303 PHYDM_ADAPTIVITY_DEBUG,
5304 PHYDM_DIS_DYM_ANT_WEIGHTING,
5305 PHYDM_FORECE_PT_STATE,
5306 PHYDM_STA_INFO,
5307 PHYDM_PAUSE_FUNC,
5308 PHYDM_PER_TONE_EVM,
5309 PHYDM_DYN_TXPWR,
5310 PHYDM_LNA_SAT,
5311 PHYDM_ANAPAR,
5312 PHYDM_CCK_RX_PATHDIV,
5313 PHYDM_BEAM_FORMING,
5314 PHYDM_REG_MONITOR,
5315 #if RTL8814B_SUPPORT
5316 PHYDM_SPUR_DETECT,
5317 #endif
5318 PHYDM_PHY_STATUS,
5319 PHYDM_CRC32_CNT,
5320 PHYDM_DCC,
5321 #ifdef PHYDM_HW_IGI
5322 PHYDM_HWIGI,
5323 #endif
5324 #ifdef PHYDM_HW_SWITCH_AGC_TAB
5325 PHYDM_HW_AGCTAB,
5326 #endif
5327 PHYDM_PMAC_TX,
5328 PHYDM_GET_RXAGC,
5329 PHYDM_SHIFT_RXAGC,
5330 PHYDM_IFS_CLM,
5331 PHYDM_ENHANCE_MNTR,
5332 PHYDM_CSI_DBG,
5333 PHYDM_EDCCA_CLM
5334 };
5335
5336 struct phydm_command phy_dm_ary[] = {
5337 {"-h", PHYDM_HELP}, /*@do not move this element to other position*/
5338 {"demo", PHYDM_DEMO}, /*@do not move this element to other position*/
5339 {"rf", PHYDM_RF_CMD},
5340 {"dig", PHYDM_DIG},
5341 {"ra", PHYDM_RA},
5342 {"profile", PHYDM_PROFILE},
5343 {"antdiv", PHYDM_ANTDIV},
5344 {"pathdiv", PHYDM_PATHDIV},
5345 {"dbg", PHYDM_DEBUG},
5346 {"mp_dbg", PHYDM_MP_DEBUG},
5347 {"fw_dbg", PHYDM_FW_DEBUG},
5348 {"ability", PHYDM_SUPPORT_ABILITY},
5349 {"get_txagc", PHYDM_GET_TXAGC},
5350 {"set_txagc", PHYDM_SET_TXAGC},
5351 {"smtant", PHYDM_SMART_ANT},
5352 {"ch_bw", PHYDM_CH_BW},
5353 {"trxpath", PHYDM_TRX_PATH},
5354 {"lamode", PHYDM_LA_MODE},
5355 {"dumpreg", PHYDM_DUMP_REG},
5356 {"auto_dbg", PHYDM_AUTO_DBG},
5357 {"dd_dbg", PHYDM_DD_DBG},
5358 {"bigjump", PHYDM_BIG_JUMP},
5359 {"rxrate", PHYDM_SHOW_RXRATE},
5360 {"nbi", PHYDM_NBI_EN},
5361 {"csi_mask", PHYDM_CSI_MASK_EN},
5362 {"dfs", PHYDM_DFS_DEBUG},
5363 {"dfs_hist", PHYDM_DFS_HIST},
5364 {"nhm", PHYDM_NHM},
5365 {"clm", PHYDM_CLM},
5366 {"fahm", PHYDM_FAHM},
5367 {"env_mntr", PHYDM_ENV_MNTR},
5368 {"bbinfo", PHYDM_BB_INFO},
5369 /*{"txbf", PHYDM_TXBF},*/
5370 {"h2c", PHYDM_H2C},
5371 {"ext_rfe", PHYDM_EXT_RF_E_CTRL},
5372 {"soml", PHYDM_ADAPTIVE_SOML},
5373 {"psd", PHYDM_PSD},
5374 {"dbgport", PHYDM_DEBUG_PORT},
5375 {"dis_htstf", PHYDM_DIS_HTSTF_CONTROL},
5376 {"cfo_trk", PHYDM_CFO_TRK},
5377 {"adapt_debug", PHYDM_ADAPTIVITY_DEBUG},
5378 {"dis_dym_ant_wgt", PHYDM_DIS_DYM_ANT_WEIGHTING},
5379 {"force_pt_state", PHYDM_FORECE_PT_STATE},
5380 {"sta_info", PHYDM_STA_INFO},
5381 {"pause", PHYDM_PAUSE_FUNC},
5382 {"evm", PHYDM_PER_TONE_EVM},
5383 {"dyn_txpwr", PHYDM_DYN_TXPWR},
5384 {"lna_sat", PHYDM_LNA_SAT},
5385 {"anapar", PHYDM_ANAPAR},
5386 {"cck_rx_pathdiv", PHYDM_CCK_RX_PATHDIV},
5387 {"bf", PHYDM_BEAM_FORMING},
5388 {"reg_mntr", PHYDM_REG_MONITOR},
5389 #if RTL8814B_SUPPORT
5390 {"spur_detect", PHYDM_SPUR_DETECT},
5391 #endif
5392 {"physts", PHYDM_PHY_STATUS},
5393 {"crc32_cnt", PHYDM_CRC32_CNT},
5394 #ifdef PHYDM_PMAC_TX_SETTING_SUPPORT
5395 {"pmac_tx", PHYDM_PMAC_TX},
5396 #endif
5397 #ifdef PHYDM_HW_IGI
5398 {"hwigi", PHYDM_HWIGI},
5399 #endif
5400 #ifdef PHYDM_HW_SWITCH_AGC_TAB
5401 {"hw_agctab", PHYDM_HW_AGCTAB},
5402 #endif
5403 {"dcc", PHYDM_DCC},
5404 {"get_rxagc", PHYDM_GET_RXAGC},
5405 {"shift_rxagc", PHYDM_SHIFT_RXAGC},
5406 {"ifs_clm", PHYDM_IFS_CLM},
5407 {"enh_mntr", PHYDM_ENHANCE_MNTR},
5408 {"csi_dbg", PHYDM_CSI_DBG},
5409 {"edcca_clm", PHYDM_EDCCA_CLM}
5410 };
5411
5412 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5413
phydm_cmd_parser(struct dm_struct * dm,char input[][MAX_ARGV],u32 input_num,u8 flag,char * output,u32 out_len)5414 void phydm_cmd_parser(struct dm_struct *dm, char input[][MAX_ARGV],
5415 u32 input_num, u8 flag, char *output, u32 out_len)
5416 {
5417 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
5418 u32 used = 0;
5419 u8 id = 0;
5420 u32 var1[10] = {0};
5421 u32 i;
5422 u32 phydm_ary_size = sizeof(phy_dm_ary) / sizeof(struct phydm_command);
5423
5424 if (flag == 0) {
5425 PDM_SNPF(out_len, used, output + used, out_len - used,
5426 "GET, nothing to print\n");
5427 return;
5428 }
5429
5430 PDM_SNPF(out_len, used, output + used, out_len - used, "\n");
5431
5432 /* Parsing Cmd ID */
5433 if (input_num) {
5434 for (i = 0; i < phydm_ary_size; i++) {
5435 if (strcmp(phy_dm_ary[i].name, input[0]) == 0) {
5436 id = phy_dm_ary[i].id;
5437 break;
5438 }
5439 }
5440 if (i == phydm_ary_size) {
5441 PDM_SNPF(out_len, used, output + used, out_len - used,
5442 "PHYDM command not found!\n");
5443 return;
5444 }
5445 }
5446
5447 switch (id) {
5448 case PHYDM_HELP: {
5449 PDM_SNPF(out_len, used, output + used, out_len - used,
5450 "BB cmd ==>\n");
5451
5452 for (i = 0; i < phydm_ary_size - 2; i++)
5453 PDM_SNPF(out_len, used, output + used, out_len - used,
5454 " %-5d: %s\n", i, phy_dm_ary[i + 2].name);
5455 } break;
5456
5457 case PHYDM_DEMO: { /*@echo demo 10 0x3a z abcde >cmd*/
5458 u32 directory = 0;
5459
5460 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))
5461 char char_temp;
5462 #else
5463 u32 char_temp = ' ';
5464 #endif
5465
5466 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &directory);
5467 PDM_SNPF(out_len, used, output + used, out_len - used,
5468 "Decimal value = %d\n", directory);
5469 PHYDM_SSCANF(input[2], DCMD_HEX, &directory);
5470 PDM_SNPF(out_len, used, output + used, out_len - used,
5471 "Hex value = 0x%x\n", directory);
5472 PHYDM_SSCANF(input[3], DCMD_CHAR, &char_temp);
5473 PDM_SNPF(out_len, used, output + used, out_len - used,
5474 "Char = %c\n", char_temp);
5475 PDM_SNPF(out_len, used, output + used, out_len - used,
5476 "String = %s\n", input[4]);
5477 } break;
5478 case PHYDM_RF_CMD:
5479 halrf_cmd_parser(dm, input, &used, output, &out_len, input_num);
5480 break;
5481
5482 case PHYDM_DIG:
5483 phydm_dig_debug(dm, input, &used, output, &out_len);
5484 break;
5485
5486 case PHYDM_RA:
5487 phydm_ra_debug(dm, input, &used, output, &out_len);
5488 break;
5489
5490 case PHYDM_ANTDIV:
5491 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
5492 phydm_antdiv_debug(dm, input, &used, output, &out_len);
5493 #endif
5494 break;
5495
5496 case PHYDM_PATHDIV:
5497 #if (defined(CONFIG_PATH_DIVERSITY))
5498 phydm_pathdiv_debug(dm, input, &used, output, &out_len);
5499 #endif
5500 break;
5501
5502 case PHYDM_DEBUG:
5503 phydm_debug_trace(dm, input, &used, output, &out_len);
5504 break;
5505
5506 case PHYDM_MP_DEBUG:
5507 phydm_mp_dbg(dm, input, &used, output, &out_len);
5508 break;
5509
5510 case PHYDM_FW_DEBUG:
5511 phydm_fw_debug_trace(dm, input, &used, output, &out_len);
5512 break;
5513
5514 case PHYDM_SUPPORT_ABILITY:
5515 phydm_supportability_en(dm, input, &used, output, &out_len);
5516 break;
5517
5518 case PHYDM_SMART_ANT:
5519 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
5520
5521 #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
5522 phydm_hl_smt_ant_dbg_type2(dm, input, &used, output, &out_len);
5523 #elif (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))
5524 phydm_hl_smart_ant_debug(dm, input, &used, output, &out_len);
5525 #endif
5526
5527 #elif (defined(CONFIG_CUMITEK_SMART_ANTENNA))
5528 phydm_cumitek_smt_ant_debug(dm, input, &used, output, &out_len);
5529 #endif
5530
5531 break;
5532
5533 case PHYDM_CH_BW:
5534 phydm_bw_ch_adjust(dm, input, &used, output, &out_len);
5535 break;
5536
5537 case PHYDM_PROFILE:
5538 phydm_basic_profile(dm, &used, output, &out_len);
5539 break;
5540
5541 case PHYDM_GET_TXAGC:
5542 phydm_get_txagc(dm, &used, output, &out_len);
5543 break;
5544
5545 case PHYDM_SET_TXAGC:
5546 phydm_set_txagc_dbg(dm, input, &used, output, &out_len);
5547 break;
5548
5549 case PHYDM_TRX_PATH:
5550 phydm_config_trx_path(dm, input, &used, output, &out_len);
5551 break;
5552
5553 case PHYDM_LA_MODE:
5554 #if (PHYDM_LA_MODE_SUPPORT)
5555 phydm_la_cmd(dm, input, &used, output, &out_len);
5556 #endif
5557 break;
5558
5559 case PHYDM_DUMP_REG:
5560 phydm_dump_reg(dm, input, &used, output, &out_len);
5561 break;
5562
5563 case PHYDM_BIG_JUMP:
5564 phydm_enable_big_jump(dm, input, &used, output, &out_len);
5565 break;
5566
5567 case PHYDM_AUTO_DBG:
5568 #ifdef PHYDM_AUTO_DEGBUG
5569 phydm_auto_dbg_console(dm, input, &used, output, &out_len);
5570 #endif
5571 break;
5572
5573 case PHYDM_DD_DBG:
5574 phydm_dd_dbg_dump(dm, input, &used, output, &out_len);
5575 break;
5576
5577 case PHYDM_SHOW_RXRATE:
5578 phydm_show_rx_rate(dm, input, &used, output, &out_len);
5579 break;
5580
5581 case PHYDM_NBI_EN:
5582 phydm_nbi_debug(dm, input, &used, output, &out_len);
5583 break;
5584
5585 case PHYDM_CSI_MASK_EN:
5586 phydm_csi_debug(dm, input, &used, output, &out_len);
5587 break;
5588
5589 #ifdef CONFIG_PHYDM_DFS_MASTER
5590 case PHYDM_DFS_DEBUG:
5591 phydm_dfs_debug(dm, input, &used, output, &out_len);
5592 break;
5593
5594 case PHYDM_DFS_HIST:
5595 phydm_dfs_hist_dbg(dm, input, &used, output, &out_len);
5596 break;
5597 #endif
5598
5599 case PHYDM_NHM:
5600 #ifdef NHM_SUPPORT
5601 phydm_nhm_dbg(dm, input, &used, output, &out_len);
5602 #endif
5603 break;
5604
5605 case PHYDM_CLM:
5606 #ifdef CLM_SUPPORT
5607 phydm_clm_dbg(dm, input, &used, output, &out_len);
5608 #endif
5609 break;
5610
5611 #ifdef FAHM_SUPPORT
5612 case PHYDM_FAHM:
5613 phydm_fahm_dbg(dm, input, &used, output, &out_len);
5614 break;
5615 #endif
5616
5617 case PHYDM_ENV_MNTR:
5618 phydm_env_mntr_dbg(dm, input, &used, output, &out_len);
5619 break;
5620
5621 case PHYDM_BB_INFO:
5622 phydm_bb_hw_dbg_info(dm, input, &used, output, &out_len);
5623 break;
5624 /*
5625 case PHYDM_TXBF: {
5626 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
5627 #ifdef PHYDM_BEAMFORMING_SUPPORT
5628 struct _RT_BEAMFORMING_INFO *beamforming_info = NULL;
5629
5630 beamforming_info = &dm->beamforming_info;
5631
5632 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
5633 if (var1[0] == 0) {
5634 beamforming_info->apply_v_matrix = false;
5635 beamforming_info->snding3ss = true;
5636 PDM_SNPF(out_len, used, output + used, out_len - used,
5637 "\r\n dont apply V matrix and 3SS 789 snding\n");
5638 } else if (var1[0] == 1) {
5639 beamforming_info->apply_v_matrix = true;
5640 beamforming_info->snding3ss = true;
5641 PDM_SNPF(out_len, used, output + used, out_len - used,
5642 "\r\n apply V matrix and 3SS 789 snding\n");
5643 } else if (var1[0] == 2) {
5644 beamforming_info->apply_v_matrix = true;
5645 beamforming_info->snding3ss = false;
5646 PDM_SNPF(out_len, used, output + used, out_len - used,
5647 "\r\n default txbf setting\n");
5648 } else
5649 PDM_SNPF(out_len, used, output + used, out_len - used,
5650 "\r\n unknown cmd!!\n");
5651 #endif
5652 #endif
5653 } break;
5654 */
5655 case PHYDM_H2C:
5656 phydm_h2C_debug(dm, input, &used, output, &out_len);
5657 break;
5658
5659 case PHYDM_EXT_RF_E_CTRL:
5660 phydm_ext_rf_element_ctrl(dm, input, &used, output, &out_len);
5661 break;
5662
5663 case PHYDM_ADAPTIVE_SOML:
5664 #ifdef CONFIG_ADAPTIVE_SOML
5665 phydm_soml_debug(dm, input, &used, output, &out_len);
5666 #endif
5667 break;
5668
5669 case PHYDM_PSD:
5670
5671 #ifdef CONFIG_PSD_TOOL
5672 phydm_psd_debug(dm, input, &used, output, &out_len);
5673 #endif
5674
5675 break;
5676
5677 case PHYDM_DEBUG_PORT:
5678 phydm_print_dbgport(dm, input, &used, output, &out_len);
5679 break;
5680
5681 case PHYDM_DIS_HTSTF_CONTROL: {
5682 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
5683
5684 if (var1[0] == 1) {
5685 /* setting being false is for debug */
5686 dm->bhtstfdisabled = true;
5687 PDM_SNPF(out_len, used, output + used, out_len - used,
5688 "Dynamic HT-STF Gain Control is Disable\n");
5689 } else {
5690 /* @default setting should be true,
5691 * always be dynamic control
5692 */
5693 dm->bhtstfdisabled = false;
5694 PDM_SNPF(out_len, used, output + used, out_len - used,
5695 "Dynamic HT-STF Gain Control is Enable\n");
5696 }
5697 } break;
5698
5699 case PHYDM_CFO_TRK:
5700 phydm_cfo_tracking_debug(dm, input, &used, output, &out_len);
5701 break;
5702
5703 case PHYDM_ADAPTIVITY_DEBUG:
5704 #ifdef PHYDM_SUPPORT_ADAPTIVITY
5705 phydm_adaptivity_debug(dm, input, &used, output, &out_len);
5706 #endif
5707 break;
5708
5709 case PHYDM_DIS_DYM_ANT_WEIGHTING:
5710 #ifdef DYN_ANT_WEIGHTING_SUPPORT
5711 phydm_ant_weight_dbg(dm, input, &used, output, &out_len);
5712 #endif
5713 break;
5714
5715 case PHYDM_FORECE_PT_STATE:
5716 #ifdef PHYDM_POWER_TRAINING_SUPPORT
5717 phydm_pow_train_debug(dm, input, &used, output, &out_len);
5718 #endif
5719 break;
5720
5721 case PHYDM_STA_INFO:
5722 phydm_show_sta_info(dm, input, &used, output, &out_len);
5723 break;
5724
5725 case PHYDM_PAUSE_FUNC:
5726 phydm_pause_func_console(dm, input, &used, output, &out_len);
5727 break;
5728
5729 case PHYDM_PER_TONE_EVM:
5730 phydm_per_tone_evm(dm, input, &used, output, &out_len);
5731 break;
5732
5733 #ifdef CONFIG_DYNAMIC_TX_TWR
5734 case PHYDM_DYN_TXPWR:
5735 phydm_dtp_debug(dm, input, &used, output, &out_len);
5736 break;
5737 #endif
5738
5739 case PHYDM_LNA_SAT:
5740 #ifdef PHYDM_LNA_SAT_CHK_SUPPORT
5741 phydm_lna_sat_debug(dm, input, &used, output, &out_len);
5742 #endif
5743 break;
5744
5745 case PHYDM_ANAPAR:
5746 phydm_get_anapar_table(dm, &used, output, &out_len);
5747 break;
5748 case PHYDM_CCK_RX_PATHDIV:
5749 #ifdef PHYDM_CCK_RX_PATHDIV_SUPPORT
5750 phydm_cck_rx_pathdiv_dbg(dm, input, &used, output, &out_len);
5751 #endif
5752 break;
5753
5754 case PHYDM_BEAM_FORMING:
5755 #ifdef CONFIG_BB_TXBF_API
5756 phydm_bf_debug(dm, input, &used, output, &out_len);
5757 #endif
5758 break;
5759 case PHYDM_REG_MONITOR:
5760 phydm_reg_monitor(dm, input, &used, output, &out_len);
5761 break;
5762
5763 #if RTL8814B_SUPPORT
5764 case PHYDM_SPUR_DETECT:
5765 phydm_spur_detect_dbg(dm, input, &used, output, &out_len);
5766 break;
5767 #endif
5768 case PHYDM_CRC32_CNT:
5769 phydm_crc32_cnt_dbg(dm, input, &used, output, &out_len);
5770 break;
5771 case PHYDM_PHY_STATUS:
5772 phydm_physts_dbg(dm, input, &used, output, &out_len);
5773 break;
5774 #ifdef PHYDM_DCC_ENHANCE
5775 case PHYDM_DCC:
5776 phydm_dig_cckpd_coex_dbg(dm, input, &used, output, &out_len);
5777 break;
5778 #endif
5779 #ifdef PHYDM_PMAC_TX_SETTING_SUPPORT
5780 case PHYDM_PMAC_TX:
5781 phydm_pmac_tx_dbg(dm, input, &used, output, &out_len);
5782 break;
5783 #endif
5784 #ifdef PHYDM_HW_IGI
5785 case PHYDM_HWIGI:
5786 phydm_hwigi_dbg(dm, input, &used, output, &out_len);
5787 break;
5788 #endif
5789 #ifdef PHYDM_HW_SWITCH_AGC_TAB
5790 case PHYDM_HW_AGCTAB:
5791 phydm_auto_agc_tab_debug(dm, input, &used, output, &out_len);
5792 break;
5793 #endif
5794 case PHYDM_GET_RXAGC:
5795 phydm_get_rxagc_table_dbg(dm, input, &used, output, &out_len);
5796 break;
5797 case PHYDM_SHIFT_RXAGC:
5798 phydm_shift_rxagc_table_dbg(dm, input, &used, output, &out_len);
5799 break;
5800 case PHYDM_IFS_CLM:
5801 #ifdef IFS_CLM_SUPPORT
5802 phydm_ifs_clm_dbg(dm, input, &used, output, &out_len);
5803 #endif
5804 break;
5805 case PHYDM_ENHANCE_MNTR:
5806 phydm_enhance_mntr_dbg(dm, input, &used, output, &out_len);
5807 break;
5808 case PHYDM_CSI_DBG:
5809 phydm_get_csi_table(dm, &used, output, &out_len);
5810 break;
5811 case PHYDM_EDCCA_CLM:
5812 #ifdef EDCCA_CLM_SUPPORT
5813 phydm_edcca_clm_dbg(dm, input, &used, output, &out_len);
5814 #endif
5815 break;
5816 default:
5817 PDM_SNPF(out_len, used, output + used, out_len - used,
5818 "Do not support this command\n");
5819 break;
5820 }
5821 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5822 }
5823
5824 #if defined __ECOS || defined __ICCARM__
5825 #ifndef strsep
strsep(char ** s,const char * ct)5826 char *strsep(char **s, const char *ct)
5827 {
5828 char *sbegin = *s;
5829 char *end;
5830
5831 if (!sbegin)
5832 return NULL;
5833
5834 end = strpbrk(sbegin, ct);
5835 if (end)
5836 *end++ = '\0';
5837 *s = end;
5838 return sbegin;
5839 }
5840 #endif
5841 #endif
5842
5843 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP | ODM_IOT))
phydm_cmd(struct dm_struct * dm,char * input,u32 in_len,u8 flag,char * output,u32 out_len)5844 s32 phydm_cmd(struct dm_struct *dm, char *input, u32 in_len, u8 flag,
5845 char *output, u32 out_len)
5846 {
5847 char *token;
5848 u32 argc = 0;
5849 char argv[MAX_ARGC][MAX_ARGV];
5850
5851 do {
5852 token = strsep(&input, ", ");
5853 if (token) {
5854 if (strlen(token) <= MAX_ARGV)
5855 strcpy(argv[argc], token);
5856
5857 argc++;
5858 } else {
5859 break;
5860 }
5861 } while (argc < MAX_ARGC);
5862
5863 if (argc == 1)
5864 argv[0][strlen(argv[0]) - 1] = '\0';
5865
5866 phydm_cmd_parser(dm, argv, argc, flag, output, out_len);
5867
5868 return 0;
5869 }
5870 #endif
5871
phydm_fw_trace_handler(void * dm_void,u8 * cmd_buf,u8 cmd_len)5872 void phydm_fw_trace_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len)
5873 {
5874 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
5875 struct dm_struct *dm = (struct dm_struct *)dm_void;
5876
5877 /*@u8 debug_trace_11byte[60];*/
5878 u8 freg_num, c2h_seq, buf_0 = 0;
5879
5880 if (!(dm->support_ic_type & PHYDM_IC_3081_SERIES))
5881 return;
5882
5883 if (cmd_len > 12 || cmd_len == 0) {
5884 pr_debug("[Warning] Error C2H cmd_len=%d\n", cmd_len);
5885 return;
5886 }
5887
5888 buf_0 = cmd_buf[0];
5889 freg_num = (buf_0 & 0xf);
5890 c2h_seq = (buf_0 & 0xf0) >> 4;
5891
5892 #if 0
5893 PHYDM_DBG(dm, DBG_FW_TRACE,
5894 "[FW debug message] freg_num = (( %d )), c2h_seq=(( %d ))\n",
5895 freg_num, c2h_seq);
5896
5897 strncpy(debug_trace_11byte, &cmd_buf[1], (cmd_len - 1));
5898 debug_trace_11byte[cmd_len - 1] = '\0';
5899 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] %s\n",
5900 debug_trace_11byte);
5901 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] cmd_len = (( %d ))\n",
5902 cmd_len);
5903 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] c2h_cmd_start=((%d))\n",
5904 dm->c2h_cmd_start);
5905
5906 PHYDM_DBG(dm, DBG_FW_TRACE, "pre_seq = (( %d )), current_seq=((%d))\n",
5907 dm->pre_c2h_seq, c2h_seq);
5908 PHYDM_DBG(dm, DBG_FW_TRACE, "fw_buff_is_enpty = (( %d ))\n",
5909 dm->fw_buff_is_enpty);
5910 #endif
5911
5912 if (c2h_seq != dm->pre_c2h_seq && dm->fw_buff_is_enpty == false) {
5913 dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
5914 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW Dbg Queue Overflow] %s\n",
5915 dm->fw_debug_trace);
5916 dm->c2h_cmd_start = 0;
5917 }
5918
5919 if ((cmd_len - 1) > (60 - dm->c2h_cmd_start)) {
5920 dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
5921 PHYDM_DBG(dm, DBG_FW_TRACE,
5922 "[FW Dbg Queue error: wrong C2H length] %s\n",
5923 dm->fw_debug_trace);
5924 dm->c2h_cmd_start = 0;
5925 return;
5926 }
5927
5928 strncpy((char *)&dm->fw_debug_trace[dm->c2h_cmd_start],
5929 (char *)&cmd_buf[1], (cmd_len - 1));
5930 dm->c2h_cmd_start += (cmd_len - 1);
5931 dm->fw_buff_is_enpty = false;
5932
5933 if (freg_num == 0 || dm->c2h_cmd_start >= 60) {
5934 if (dm->c2h_cmd_start < 60)
5935 dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
5936 else
5937 dm->fw_debug_trace[59] = '\0';
5938
5939 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s\n",
5940 dm->fw_debug_trace);
5941
5942 dm->c2h_cmd_start = 0;
5943 dm->fw_buff_is_enpty = true;
5944 }
5945
5946 dm->pre_c2h_seq = c2h_seq;
5947 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5948 }
5949
phydm_fw_trace_handler_code(void * dm_void,u8 * buffer,u8 cmd_len)5950 void phydm_fw_trace_handler_code(void *dm_void, u8 *buffer, u8 cmd_len)
5951 {
5952 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
5953 struct dm_struct *dm = (struct dm_struct *)dm_void;
5954 u8 function = buffer[0];
5955 u8 dbg_num = buffer[1];
5956 u16 content_0 = (((u16)buffer[3]) << 8) | ((u16)buffer[2]);
5957 u16 content_1 = (((u16)buffer[5]) << 8) | ((u16)buffer[4]);
5958 u16 content_2 = (((u16)buffer[7]) << 8) | ((u16)buffer[6]);
5959 u16 content_3 = (((u16)buffer[9]) << 8) | ((u16)buffer[8]);
5960 u16 content_4 = (((u16)buffer[11]) << 8) | ((u16)buffer[10]);
5961
5962 if (cmd_len > 12)
5963 PHYDM_DBG(dm, DBG_FW_TRACE,
5964 "[FW Msg] Invalid cmd length (( %d )) >12\n",
5965 cmd_len);
5966 /*@--------------------------------------------*/
5967 #ifdef CONFIG_RA_FW_DBG_CODE
5968 if (function == RATE_DECISION) {
5969 if (dbg_num == 0) {
5970 if (content_0 == 1)
5971 PHYDM_DBG(dm, DBG_FW_TRACE,
5972 "[FW] RA_CNT=((%d)) Max_device=((%d))--------------------------->\n",
5973 content_1, content_2);
5974 else if (content_0 == 2)
5975 PHYDM_DBG(dm, DBG_FW_TRACE,
5976 "[FW] Check RA macid= ((%d)), MediaStatus=((%d)), Dis_RA=((%d)), try_bit=((0x%x))\n",
5977 content_1, content_2, content_3,
5978 content_4);
5979 else if (content_0 == 3)
5980 PHYDM_DBG(dm, DBG_FW_TRACE,
5981 "[FW] Check RA total=((%d)), drop=((0x%x)), TXRPT_TRY_bit=((%x)), bNoisy=((%x))\n",
5982 content_1, content_2, content_3,
5983 content_4);
5984 } else if (dbg_num == 1) {
5985 if (content_0 == 1)
5986 PHYDM_DBG(dm, DBG_FW_TRACE,
5987 "[FW] RTY[0,1,2,3]=[ %d , %d , %d , %d ]\n",
5988 content_1, content_2, content_3,
5989 content_4);
5990 else if (content_0 == 2) {
5991 PHYDM_DBG(dm, DBG_FW_TRACE,
5992 "[FW] RTY[4]=[ %d ], drop=(( %d )), total=(( %d )), current_rate=((0x %x ))",
5993 content_1, content_2, content_3,
5994 content_4);
5995 phydm_print_rate(dm, (u8)content_4,
5996 DBG_FW_TRACE);
5997 } else if (content_0 == 3)
5998 PHYDM_DBG(dm, DBG_FW_TRACE,
5999 "[FW] penality_idx=(( %d ))\n",
6000 content_1);
6001 else if (content_0 == 4)
6002 PHYDM_DBG(dm, DBG_FW_TRACE,
6003 "[FW] RSSI=(( %d )), ra_stage = (( %d ))\n",
6004 content_1, content_2);
6005 } else if (dbg_num == 3) {
6006 if (content_0 == 1)
6007 PHYDM_DBG(dm, DBG_FW_TRACE,
6008 "[FW] Fast_RA (( DOWN )) total=((%d)), total>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n",
6009 content_1, content_2, content_3,
6010 content_4);
6011 else if (content_0 == 2)
6012 PHYDM_DBG(dm, DBG_FW_TRACE,
6013 "[FW] Fast_RA (( UP )) total_acc=((%d)), total_acc>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n",
6014 content_1, content_2, content_3,
6015 content_4);
6016 else if (content_0 == 3)
6017 PHYDM_DBG(dm, DBG_FW_TRACE,
6018 "[FW] Fast_RA (( UP )) ((rate Down Hold)) RA_CNT=((%d))\n",
6019 content_1);
6020 else if (content_0 == 4)
6021 PHYDM_DBG(dm, DBG_FW_TRACE,
6022 "[FW] Fast_RA (( UP )) ((tota_accl<5 skip)) RA_CNT=((%d))\n",
6023 content_1);
6024 else if (content_0 == 8)
6025 PHYDM_DBG(dm, DBG_FW_TRACE,
6026 "[FW] Fast_RA (( Reset Tx Rpt )) RA_CNT=((%d))\n",
6027 content_1);
6028 } else if (dbg_num == 4) {
6029 if (content_0 == 3)
6030 PHYDM_DBG(dm, DBG_FW_TRACE,
6031 "[FW] RER_CNT PCR_ori =(( %d )), ratio_ori =(( %d )), pcr_updown_bitmap =(( 0x%x )), pcr_var_diff =(( %d ))\n",
6032 content_1, content_2, content_3,
6033 content_4);
6034 else if (content_0 == 4)
6035 PHYDM_DBG(dm, DBG_FW_TRACE,
6036 "[FW] pcr_shift_value =(( %s%d )), rate_down_threshold =(( %d )), rate_up_threshold =(( %d ))\n",
6037 ((content_1) ? "+" : "-"), content_2,
6038 content_3, content_4);
6039 else if (content_0 == 5)
6040 PHYDM_DBG(dm, DBG_FW_TRACE,
6041 "[FW] pcr_mean =(( %d )), PCR_VAR =(( %d )), offset =(( %d )), decision_offset_p =(( %d ))\n",
6042 content_1, content_2, content_3,
6043 content_4);
6044 } else if (dbg_num == 5) {
6045 if (content_0 == 1)
6046 PHYDM_DBG(dm, DBG_FW_TRACE,
6047 "[FW] (( UP)) Nsc=(( %d )), N_High=(( %d )), RateUp_Waiting=(( %d )), RateUp_Fail=(( %d ))\n",
6048 content_1, content_2, content_3,
6049 content_4);
6050 else if (content_0 == 2)
6051 PHYDM_DBG(dm, DBG_FW_TRACE,
6052 "[FW] ((DOWN)) Nsc=(( %d )), N_Low=(( %d ))\n",
6053 content_1, content_2);
6054 else if (content_0 == 3)
6055 PHYDM_DBG(dm, DBG_FW_TRACE,
6056 "[FW] ((HOLD)) Nsc=((%d)), N_High=((%d)), N_Low=((%d)), Reset_CNT=((%d))\n",
6057 content_1, content_2, content_3,
6058 content_4);
6059 } else if (dbg_num == 0x60) {
6060 if (content_0 == 1)
6061 PHYDM_DBG(dm, DBG_FW_TRACE,
6062 "[FW] ((AP RPT)) macid=((%d)), BUPDATE[macid]=((%d))\n",
6063 content_1, content_2);
6064 else if (content_0 == 4)
6065 PHYDM_DBG(dm, DBG_FW_TRACE,
6066 "[FW] ((AP RPT)) pass=((%d)), rty_num=((%d)), drop=((%d)), total=((%d))\n",
6067 content_1, content_2, content_3,
6068 content_4);
6069 else if (content_0 == 5)
6070 PHYDM_DBG(dm, DBG_FW_TRACE,
6071 "[FW] ((AP RPT)) PASS=((%d)), RTY_NUM=((%d)), DROP=((%d)), TOTAL=((%d))\n",
6072 content_1, content_2, content_3,
6073 content_4);
6074 }
6075 } else if (function == INIT_RA_TABLE) {
6076 if (dbg_num == 3)
6077 PHYDM_DBG(dm, DBG_FW_TRACE,
6078 "[FW][INIT_RA_INFO] Ra_init, RA_SKIP_CNT = (( %d ))\n",
6079 content_0);
6080 } else if (function == RATE_UP) {
6081 if (dbg_num == 2) {
6082 if (content_0 == 1)
6083 PHYDM_DBG(dm, DBG_FW_TRACE,
6084 "[FW][RateUp] ((Highest rate->return)), macid=((%d)) Nsc=((%d))\n",
6085 content_1, content_2);
6086 } else if (dbg_num == 5) {
6087 if (content_0 == 0)
6088 PHYDM_DBG(dm, DBG_FW_TRACE,
6089 "[FW][RateUp] ((rate UP)), up_rate_tmp=((0x%x)), rate_idx=((0x%x)), SGI_en=((%d)), SGI=((%d))\n",
6090 content_1, content_2, content_3,
6091 content_4);
6092 else if (content_0 == 1)
6093 PHYDM_DBG(dm, DBG_FW_TRACE,
6094 "[FW][RateUp] ((rate UP)), rate_1=((0x%x)), rate_2=((0x%x)), BW=((%d)), Try_Bit=((%d))\n",
6095 content_1, content_2, content_3,
6096 content_4);
6097 }
6098 } else if (function == RATE_DOWN) {
6099 if (dbg_num == 5) {
6100 if (content_0 == 1)
6101 PHYDM_DBG(dm, DBG_FW_TRACE,
6102 "[FW][RateDownStep] ((rate Down)), macid=((%d)), rate1=((0x%x)), rate2=((0x%x)), BW=((%d))\n",
6103 content_1, content_2, content_3,
6104 content_4);
6105 }
6106 } else if (function == TRY_DONE) {
6107 if (dbg_num == 1) {
6108 if (content_0 == 1)
6109 PHYDM_DBG(dm, DBG_FW_TRACE,
6110 "[FW][Try Done] ((try succsess )) macid=((%d)), Try_Done_cnt=((%d))\n",
6111 content_1, content_2);
6112 } else if (dbg_num == 2) {
6113 if (content_0 == 1)
6114 PHYDM_DBG(dm, DBG_FW_TRACE,
6115 "[FW][Try Done] ((try)) macid=((%d)), Try_Done_cnt=((%d)), rate_2=((%d)), try_succes=((%d))\n",
6116 content_1, content_2, content_3,
6117 content_4);
6118 }
6119 } else if (function == RA_H2C) {
6120 if (dbg_num == 1) {
6121 if (content_0 == 0)
6122 PHYDM_DBG(dm, DBG_FW_TRACE,
6123 "[FW][H2C=0x49] fw_trace_en=((%d)), mode =((%d)), macid=((%d))\n",
6124 content_1, content_2, content_3);
6125 }
6126 } else if (function == F_RATE_AP_RPT) {
6127 if (dbg_num == 1) {
6128 if (content_0 == 1)
6129 PHYDM_DBG(dm, DBG_FW_TRACE,
6130 "[FW][AP RPT] ((1)), SPE_STATIS=((0x%x))---------->\n",
6131 content_3);
6132 } else if (dbg_num == 2) {
6133 if (content_0 == 1)
6134 PHYDM_DBG(dm, DBG_FW_TRACE,
6135 "[FW][AP RPT] RTY_all=((%d))\n",
6136 content_1);
6137 } else if (dbg_num == 3) {
6138 if (content_0 == 1)
6139 PHYDM_DBG(dm, DBG_FW_TRACE,
6140 "[FW][AP RPT] MACID1[%d], TOTAL=((%d)), RTY=((%d))\n",
6141 content_3, content_1, content_2);
6142 } else if (dbg_num == 4) {
6143 if (content_0 == 1)
6144 PHYDM_DBG(dm, DBG_FW_TRACE,
6145 "[FW][AP RPT] MACID2[%d], TOTAL=((%d)), RTY=((%d))\n",
6146 content_3, content_1, content_2);
6147 } else if (dbg_num == 5) {
6148 if (content_0 == 1)
6149 PHYDM_DBG(dm, DBG_FW_TRACE,
6150 "[FW][AP RPT] MACID1[%d], PASS=((%d)), DROP=((%d))\n",
6151 content_3, content_1, content_2);
6152 } else if (dbg_num == 6) {
6153 if (content_0 == 1)
6154 PHYDM_DBG(dm, DBG_FW_TRACE,
6155 "[FW][AP RPT] MACID2[%d],, PASS=((%d)), DROP=((%d))\n",
6156 content_3, content_1, content_2);
6157 }
6158 } else if (function == DBC_FW_CLM) {
6159 PHYDM_DBG(dm, DBG_FW_TRACE,
6160 "[FW][CLM][%d, %d] = {%d, %d, %d, %d}\n", dbg_num,
6161 content_0, content_1, content_2, content_3,
6162 content_4);
6163 } else {
6164 PHYDM_DBG(dm, DBG_FW_TRACE,
6165 "[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n",
6166 function, dbg_num, content_0, content_1, content_2,
6167 content_3, content_4);
6168 }
6169 #else
6170 PHYDM_DBG(dm, DBG_FW_TRACE,
6171 "[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n", function,
6172 dbg_num, content_0, content_1, content_2, content_3,
6173 content_4);
6174 #endif
6175 /*@--------------------------------------------*/
6176
6177 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
6178 }
6179
phydm_fw_trace_handler_8051(void * dm_void,u8 * buffer,u8 cmd_len)6180 void phydm_fw_trace_handler_8051(void *dm_void, u8 *buffer, u8 cmd_len)
6181 {
6182 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
6183 struct dm_struct *dm = (struct dm_struct *)dm_void;
6184 int i = 0;
6185 u8 extend_c2h_sub_id = 0, extend_c2h_dbg_len = 0;
6186 u8 extend_c2h_dbg_seq = 0;
6187 u8 fw_debug_trace[128];
6188 u8 *extend_c2h_dbg_content = 0;
6189
6190 if (cmd_len > 127)
6191 return;
6192
6193 extend_c2h_sub_id = buffer[0];
6194 extend_c2h_dbg_len = buffer[1];
6195 extend_c2h_dbg_content = buffer + 2; /*@DbgSeq+DbgContent for show HEX*/
6196
6197 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
6198 RT_DISP(FC2H, C2H_Summary, ("[Extend C2H packet], Extend_c2hSubId=0x%x, extend_c2h_dbg_len=%d\n",
6199 extend_c2h_sub_id, extend_c2h_dbg_len));
6200
6201 RT_DISP_DATA(FC2H, C2H_Summary, "[Extend C2H packet], Content Hex:", extend_c2h_dbg_content, cmd_len - 2);
6202 #endif
6203
6204 go_backfor_aggre_dbg_pkt:
6205 i = 0;
6206 extend_c2h_dbg_seq = buffer[2];
6207 extend_c2h_dbg_content = buffer + 3;
6208
6209 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
6210 RT_DISP(FC2H, C2H_Summary, ("[RTKFW, SEQ= %d] :", extend_c2h_dbg_seq));
6211 #endif
6212
6213 for (;; i++) {
6214 fw_debug_trace[i] = extend_c2h_dbg_content[i];
6215 if (extend_c2h_dbg_content[i + 1] == '\0') {
6216 fw_debug_trace[i + 1] = '\0';
6217 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s",
6218 &fw_debug_trace[0]);
6219 break;
6220 } else if (extend_c2h_dbg_content[i] == '\n') {
6221 fw_debug_trace[i + 1] = '\0';
6222 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s",
6223 &fw_debug_trace[0]);
6224 buffer = extend_c2h_dbg_content + i + 3;
6225 goto go_backfor_aggre_dbg_pkt;
6226 }
6227 }
6228 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
6229 }
6230