1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2017 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called LICENSE. 16 * 17 * Contact Information: 18 * wlanfae <wlanfae@realtek.com> 19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20 * Hsinchu 300, Taiwan. 21 * 22 * Larry Finger <Larry.Finger@lwfinger.net> 23 * 24 *****************************************************************************/ 25 26 #ifndef __PHYDMCCX_H__ 27 #define __PHYDMCCX_H__ 28 29 /* 2021.03.10 Add 8814C flag*/ 30 #define CCX_VERSION "4.9" 31 32 /* @1 ============================================================ 33 * 1 Definition 34 * 1 ============================================================ 35 */ 36 #define CCX_EN 1 37 38 #define MAX_ENV_MNTR_TIME 8 /*second*/ 39 #define MS_TO_US 1000 40 #define MS_TO_4US_RATIO 250 41 #define CCA_CAP 14 42 /*CLM*/ 43 #define CLM_MAX_REPORT_TIME 10 44 #define CLM_PERIOD_MAX 65535 45 /*NHM*/ 46 #define NHM_PERIOD_MAX 65534 47 #define NHM_TH_NUM 11 /*threshold number of NHM*/ 48 #define NHM_RPT_NUM 12 49 #define NHM_IC_NOISE_TH 60 /*60/2 - 10 = 20 = -80 dBm*/ 50 #define NHM_RPT_MAX 255 51 #ifdef NHM_DYM_PW_TH_SUPPORT 52 #define DYM_PWTH_CCA_CAP 24 53 #endif 54 #define IGI_2_NHM_TH(igi) ((igi) << 1)/*NHM/FAHM threshold = IGI * 2*/ 55 #define NTH_TH_2_RSSI(th) ((th >> 1) - 10) 56 /*FAHM*/ 57 #define FAHM_INCLU_FA BIT(0) 58 #define FAHM_INCLU_CRC_OK BIT(1) 59 #define FAHM_INCLU_CRC_ERR BIT(2) 60 #define FAHM_PERIOD_MAX 65534 61 #define FAHM_TH_NUM 11 /*threshold number of FAHM*/ 62 #define FAHM_RPT_NUM 12 63 /*IFS-CLM*/ 64 #define IFS_CLM_PERIOD_MAX 65535 65 #define IFS_CLM_NUM 4 66 /*EDCCA-CLM*/ 67 #define EDCCA_CLM_PERIOD 65535 68 69 #define NHM_SUCCESS BIT(0) 70 #define CLM_SUCCESS BIT(1) 71 #define FAHM_SUCCESS BIT(2) 72 #define IFS_CLM_SUCCESS BIT(3) 73 #define EDCCA_CLM_SUCCESS BIT(4) 74 #define ENV_MNTR_FAIL 0xff 75 76 /* @1 ============================================================ 77 * 1 enumrate 78 * 1 ============================================================ 79 */ 80 enum phydm_clm_level { 81 CLM_RELEASE = 0, 82 CLM_LV_1 = 1, /* @Low Priority function */ 83 CLM_LV_2 = 2, /* @Middle Priority function */ 84 CLM_LV_3 = 3, /* @High priority function (ex: Check hang function) */ 85 CLM_LV_4 = 4, /* @Debug function (the highest priority) */ 86 CLM_MAX_NUM = 5 87 }; 88 89 enum phydm_nhm_level { 90 NHM_RELEASE = 0, 91 NHM_LV_1 = 1, /* @Low Priority function */ 92 NHM_LV_2 = 2, /* @Middle Priority function */ 93 NHM_LV_3 = 3, /* @High priority function (ex: Check hang function) */ 94 NHM_LV_4 = 4, /* @Debug function (the highest priority) */ 95 NHM_MAX_NUM = 5 96 }; 97 98 enum phydm_fahm_level { 99 FAHM_RELEASE = 0, 100 FAHM_LV_1 = 1, /* Low Priority function */ 101 FAHM_LV_2 = 2, /* Middle Priority function */ 102 FAHM_LV_3 = 3, /* High priority function (ex: Check hang function) */ 103 FAHM_LV_4 = 4, /* Debug function (the highest priority) */ 104 FAHM_MAX_NUM = 5 105 }; 106 107 enum phydm_ifs_clm_level { 108 IFS_CLM_RELEASE = 0, 109 IFS_CLM_LV_1 = 1, /* @Low Priority function */ 110 IFS_CLM_LV_2 = 2, /* @Middle Priority function */ 111 IFS_CLM_LV_3 = 3, /* @High priority function (ex: Check hang function) */ 112 IFS_CLM_LV_4 = 4, /* @Debug function (the highest priority) */ 113 IFS_CLM_MAX_NUM = 5 114 }; 115 116 enum phydm_edcca_clm_level { 117 EDCCA_CLM_RELEASE = 0, 118 EDCCA_CLM_LV_1 = 1, /* @Low Priority function */ 119 EDCCA_CLM_LV_2 = 2, /* @Middle Priority function */ 120 EDCCA_CLM_LV_3 = 3, /* @High priority function (ex: Check hang function) */ 121 EDCCA_CLM_LV_4 = 4, /* @Debug function (the highest priority) */ 122 EDCCA_CLM_MAX_NUM = 5 123 }; 124 125 enum nhm_divider_opt_all { 126 NHM_CNT_ALL = 0, /*nhm SUM report <= 255*/ 127 NHM_VALID = 1, /*nhm SUM report = 255*/ 128 NHM_CNT_INIT 129 }; 130 131 enum nhm_setting { 132 SET_NHM_SETTING, 133 STORE_NHM_SETTING, 134 RESTORE_NHM_SETTING 135 }; 136 137 enum nhm_option_cca_all { 138 NHM_EXCLUDE_CCA = 0, 139 NHM_INCLUDE_CCA = 1, 140 NHM_CCA_INIT 141 }; 142 143 enum nhm_option_txon_all { 144 NHM_EXCLUDE_TXON = 0, 145 NHM_INCLUDE_TXON = 1, 146 NHM_TXON_INIT 147 }; 148 149 enum nhm_application { 150 NHM_BACKGROUND = 0,/*@default*/ 151 NHM_ACS = 1, 152 IEEE_11K_HIGH = 2, 153 IEEE_11K_LOW = 3, 154 INTEL_XBOX = 4, 155 NHM_DBG = 5, /*@manual trigger*/ 156 }; 157 158 enum clm_application { 159 CLM_BACKGROUND = 0,/*@default*/ 160 CLM_ACS = 1, 161 }; 162 163 enum fahm_application { 164 FAHM_BACKGROUND = 0,/*default*/ 165 FAHM_ACS = 1, 166 FAHM_DBG = 2, /*manual trigger*/ 167 }; 168 169 enum ifs_clm_application { 170 IFS_CLM_BACKGROUND = 0,/*default*/ 171 IFS_CLM_ACS = 1, 172 IFS_CLM_HP_TAS = 2, 173 IFS_CLM_DBG = 3, 174 }; 175 176 enum clm_monitor_mode { 177 CLM_DRIVER_MNTR = 1, 178 CLM_FW_MNTR = 2 179 }; 180 181 enum phydm_ifs_clm_unit { 182 IFS_CLM_4 = 0, /*4us*/ 183 IFS_CLM_8 = 1, /*8us*/ 184 IFS_CLM_12 = 2, /*12us*/ 185 IFS_CLM_16 = 3, /*16us*/ 186 IFS_CLM_INIT 187 }; 188 189 enum edcca_clm_application { 190 EDCCA_CLM_BACKGROUND = 0,/*@default*/ 191 EDCCA_CLM_ACS = 1, 192 EDCCA_CLM_DBG = 2, 193 }; 194 195 /* @1 ============================================================ 196 * 1 structure 197 * 1 ============================================================ 198 */ 199 struct env_trig_rpt { 200 u8 nhm_rpt_stamp; 201 u8 clm_rpt_stamp; 202 }; 203 204 struct env_mntr_rpt { 205 u8 nhm_ratio; 206 u8 nhm_env_ratio; /*exclude nhm_r[0] above -80dBm or first cluster under -80dBm*/ 207 u8 nhm_idle_ratio; 208 u8 nhm_tx_ratio; 209 u8 nhm_result[NHM_RPT_NUM]; 210 u8 clm_ratio; 211 u8 nhm_rpt_stamp; 212 u8 clm_rpt_stamp; 213 u8 nhm_noise_pwr; /*including r[0]~r[10]*/ 214 u8 nhm_pwr; /*including r[0]~r[11]*/ 215 }; 216 217 struct enhance_mntr_trig_rpt { 218 u8 nhm_rpt_stamp; 219 u8 clm_rpt_stamp; 220 u8 fahm_rpt_stamp; 221 u8 ifs_clm_rpt_stamp; 222 }; 223 224 struct enhance_mntr_rpt { 225 u8 nhm_ratio; 226 u8 nhm_env_ratio; /*exclude nhm_r[0] above -80dBm or first cluster under -80dBm*/ 227 u8 nhm_idle_ratio; 228 u8 nhm_tx_ratio; 229 u8 nhm_result[NHM_RPT_NUM]; 230 u8 clm_ratio; 231 u8 nhm_rpt_stamp; 232 u8 clm_rpt_stamp; 233 u8 nhm_noise_pwr; /*including r[0]~r[10]*/ 234 u8 nhm_pwr; /*including r[0]~r[11]*/ 235 u16 fahm_result[NHM_RPT_NUM]; 236 u8 fahm_rpt_stamp; 237 u8 fahm_pwr; 238 u8 fahm_ratio; 239 u8 fahm_denom_ratio; 240 u8 fahm_inclu_cck; 241 u8 ifs_clm_rpt_stamp; 242 u8 ifs_clm_tx_ratio; 243 u8 ifs_clm_edcca_excl_cca_ratio; 244 u8 ifs_clm_cck_fa_ratio; 245 u8 ifs_clm_cck_cca_excl_fa_ratio; 246 u8 ifs_clm_ofdm_fa_ratio; 247 u8 ifs_clm_ofdm_cca_excl_fa_ratio; 248 }; 249 250 struct nhm_para_info { 251 enum nhm_option_txon_all incld_txon; /*@Include TX on*/ 252 enum nhm_option_cca_all incld_cca; /*@Include CCA*/ 253 enum nhm_divider_opt_all div_opt; /*@divider option*/ 254 enum nhm_application nhm_app; 255 enum phydm_nhm_level nhm_lv; 256 u16 mntr_time; /*@0~262 unit ms*/ 257 boolean en_1db_mode; 258 u8 nhm_th0_manual; /* for 1-db mode*/ 259 }; 260 261 struct clm_para_info { 262 enum clm_application clm_app; 263 enum phydm_clm_level clm_lv; 264 u16 mntr_time; /*@0~262 unit ms*/ 265 }; 266 267 struct fahm_para_info { 268 enum fahm_application app; 269 enum phydm_fahm_level lv; 270 u16 mntr_time; /*0~262 unit ms*/ 271 u8 numer_opt; 272 u8 denom_opt; 273 boolean en_1db_mode; 274 u8 th0_manual;/* for 1-db mode*/ 275 }; 276 277 struct ifs_clm_para_info { 278 enum ifs_clm_application ifs_clm_app; 279 enum phydm_ifs_clm_level ifs_clm_lv; 280 enum phydm_ifs_clm_unit ifs_clm_ctrl_unit; /*unit*/ 281 u16 mntr_time; /*ms*/ 282 boolean ifs_clm_th_en[IFS_CLM_NUM]; 283 u16 ifs_clm_th_low[IFS_CLM_NUM]; 284 u16 ifs_clm_th_high[IFS_CLM_NUM]; 285 s16 th_shift; 286 }; 287 288 struct edcca_clm_para_info { 289 enum edcca_clm_application edcca_clm_app; 290 enum phydm_edcca_clm_level edcca_clm_lv; 291 }; 292 293 struct ccx_info { 294 u32 nhm_trigger_time; 295 u32 clm_trigger_time; 296 u32 fahm_trigger_time; 297 u32 ifs_clm_trigger_time; 298 u32 edcca_clm_trigger_time; 299 u64 start_time; /*@monitor for the test duration*/ 300 u8 ccx_watchdog_result; 301 #ifdef NHM_SUPPORT 302 enum nhm_application nhm_app; 303 enum nhm_option_txon_all nhm_include_txon; 304 enum nhm_option_cca_all nhm_include_cca; 305 enum nhm_divider_opt_all nhm_divider_opt; 306 /*Report*/ 307 u8 nhm_th[NHM_TH_NUM]; 308 u8 nhm_result[NHM_RPT_NUM]; 309 u8 nhm_wgt[NHM_RPT_NUM]; 310 u16 nhm_period; /* @4us per unit */ 311 u8 nhm_igi; 312 u8 nhm_manual_ctrl; 313 u8 nhm_ratio; /*@1% per nuit, it means the interference igi can't overcome.*/ 314 u8 nhm_env_ratio; /*exclude nhm_r[0] above -80dBm or first cluster under -80dBm*/ 315 u8 nhm_idle_ratio; 316 u8 nhm_tx_ratio; 317 u8 nhm_rpt_sum; 318 u16 nhm_duration; /*@Real time of NHM_VALID */ 319 u8 nhm_set_lv; 320 boolean nhm_ongoing; 321 u8 nhm_rpt_stamp; 322 u8 nhm_level; /*including r[0]~r[10]*/ 323 u8 nhm_level_valid; 324 u8 nhm_pwr; /*including r[0]~r[11]*/ 325 #ifdef NHM_DYM_PW_TH_SUPPORT 326 boolean nhm_dym_pw_th_en; 327 boolean dym_pwth_manual_ctrl; 328 u8 pw_th_rf20_ori; 329 u8 pw_th_rf20_cur; 330 u8 nhm_pw_th_max; 331 u8 nhm_period_decre; 332 u8 nhm_sl_pw_th; 333 #endif 334 #endif 335 336 #ifdef CLM_SUPPORT 337 enum clm_application clm_app; 338 u8 clm_manual_ctrl; 339 u8 clm_set_lv; 340 boolean clm_ongoing; 341 u16 clm_period; /* @4us per unit */ 342 u16 clm_result; 343 u8 clm_ratio; 344 u32 clm_fw_result_acc; 345 u8 clm_fw_result_cnt; 346 enum clm_monitor_mode clm_mntr_mode; 347 u8 clm_rpt_stamp; 348 #endif 349 #ifdef FAHM_SUPPORT 350 enum fahm_application fahm_app; 351 boolean fahm_ongoing; 352 u8 fahm_numer_opt; 353 u8 fahm_denom_opt; 354 boolean fahm_inclu_cck; 355 u8 fahm_th[NHM_TH_NUM]; 356 u16 fahm_result[NHM_RPT_NUM]; 357 u16 fahm_result_sum; 358 u16 fahm_denom_result; 359 u16 fahm_period; /*unit: 4us*/ 360 u8 fahm_igi; 361 u8 fahm_manual_ctrl; 362 u8 fahm_set_lv; 363 u8 fahm_rpt_stamp; 364 u8 fahm_pwr; /*including r[0]~r[11]*/ 365 u8 fahm_ratio; 366 u8 fahm_denom_ratio; 367 #endif 368 #ifdef IFS_CLM_SUPPORT 369 enum ifs_clm_application ifs_clm_app; 370 /*Control*/ 371 enum phydm_ifs_clm_unit ifs_clm_ctrl_unit; /*4,8,12,16us per unit*/ 372 u16 ifs_clm_period; 373 boolean ifs_clm_th_en[IFS_CLM_NUM]; 374 u16 ifs_clm_th_low[IFS_CLM_NUM]; 375 u16 ifs_clm_th_high[IFS_CLM_NUM]; 376 /*Flow control*/ 377 u8 ifs_clm_set_lv; 378 u8 ifs_clm_manual_ctrl; 379 boolean ifs_clm_ongoing; 380 /*Report*/ 381 u8 ifs_clm_rpt_stamp; 382 u16 ifs_clm_tx; 383 u16 ifs_clm_edcca_excl_cca; 384 u16 ifs_clm_ofdmfa; 385 u16 ifs_clm_ofdmcca_excl_fa; 386 u16 ifs_clm_cckfa; 387 u16 ifs_clm_cckcca_excl_fa; 388 u8 ifs_clm_his[IFS_CLM_NUM]; /*trx_neg_edge to CCA/FA posedge per times*/ 389 u16 ifs_clm_total_cca; 390 u16 ifs_clm_avg[IFS_CLM_NUM]; /*4,8,12,16us per unit*/ 391 u16 ifs_clm_avg_cca[IFS_CLM_NUM]; /*4,8,12,16us per unit*/ 392 u8 ifs_clm_tx_ratio; 393 u8 ifs_clm_edcca_excl_cca_ratio; 394 u8 ifs_clm_cck_fa_ratio; 395 u8 ifs_clm_cck_cca_excl_fa_ratio; 396 u8 ifs_clm_ofdm_fa_ratio; 397 u8 ifs_clm_ofdm_cca_excl_fa_ratio; 398 #endif 399 #ifdef EDCCA_CLM_SUPPORT 400 enum edcca_clm_application edcca_clm_app; 401 u8 edcca_clm_manual_ctrl; 402 u8 edcca_clm_set_lv; 403 boolean edcca_clm_ongoing; 404 u16 edcca_clm_result; 405 u8 edcca_clm_ratio; 406 u8 edcca_clm_rpt_stamp; 407 #endif 408 }; 409 410 /* @1 ============================================================ 411 * 1 Function Prototype 412 * 1 ============================================================ 413 */ 414 415 #ifdef FAHM_SUPPORT 416 void phydm_fahm_init(void *dm_void); 417 418 void phydm_fahm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, 419 u32 *_out_len); 420 #endif 421 422 #ifdef NHM_SUPPORT 423 void phydm_nhm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, 424 u32 *_out_len); 425 u8 phydm_get_igi(void *dm_void, enum bb_path path); 426 #endif 427 428 #ifdef CLM_SUPPORT 429 void phydm_clm_c2h_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len); 430 431 void phydm_clm_dbg(void *dm_void, char input[][16], u32 *_used, char *output, 432 u32 *_out_len); 433 #endif 434 435 u8 phydm_env_mntr_trigger(void *dm_void, struct nhm_para_info *nhm_para, 436 struct clm_para_info *clm_para, 437 struct env_trig_rpt *rpt); 438 439 u8 phydm_env_mntr_result(void *dm_void, struct env_mntr_rpt *rpt); 440 441 void phydm_env_mntr_dbg(void *dm_void, char input[][16], u32 *_used, 442 char *output, u32 *_out_len); 443 444 #ifdef IFS_CLM_SUPPORT 445 void phydm_ifs_clm_dbg(void *dm_void, char input[][16], u32 *_used, 446 char *output, u32 *_out_len); 447 #endif 448 449 u8 phydm_enhance_mntr_trigger(void *dm_void, 450 struct nhm_para_info *nhm_para, 451 struct clm_para_info *clm_para, 452 struct fahm_para_info *fahm_para, 453 struct ifs_clm_para_info *ifs_clm_para, 454 struct enhance_mntr_trig_rpt *trig_rpt); 455 456 u8 phydm_enhance_mntr_result(void *dm_void, struct enhance_mntr_rpt *rpt); 457 458 void phydm_enhance_mntr_dbg(void *dm_void, char input[][16], u32 *_used, 459 char *output, u32 *_out_len); 460 461 #ifdef EDCCA_CLM_SUPPORT 462 void phydm_edcca_clm_dbg(void *dm_void, char input[][16], u32 *_used, 463 char *output, u32 *_out_len); 464 #endif 465 466 void phydm_env_mntr_result_watchdog(void *dm_void); 467 468 void phydm_env_mntr_set_watchdog(void *dm_void); 469 470 u8 phydm_env_mntr_get_802_11_k_rsni(void *dm_void, s8 rcpi, s8 anpi); 471 472 void phydm_env_monitor_init(void *dm_void); 473 474 #endif 475