1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 #define _RTW_RF_C_
16
17 #include <drv_types.h>
18 #include <hal_data.h>
19
20 u8 center_ch_2g[CENTER_CH_2G_NUM] = {
21 /* G00 */1, 2,
22 /* G01 */3, 4, 5,
23 /* G02 */6, 7, 8,
24 /* G03 */9, 10, 11,
25 /* G04 */12, 13,
26 /* G05 */14
27 };
28
29 #define ch_to_cch_2g_idx(ch) ((ch) - 1)
30
31 u8 center_ch_2g_40m[CENTER_CH_2G_40M_NUM] = {
32 3,
33 4,
34 5,
35 6,
36 7,
37 8,
38 9,
39 10,
40 11,
41 };
42
43 u8 op_chs_of_cch_2g_40m[CENTER_CH_2G_40M_NUM][2] = {
44 {1, 5}, /* 3 */
45 {2, 6}, /* 4 */
46 {3, 7}, /* 5 */
47 {4, 8}, /* 6 */
48 {5, 9}, /* 7 */
49 {6, 10}, /* 8 */
50 {7, 11}, /* 9 */
51 {8, 12}, /* 10 */
52 {9, 13}, /* 11 */
53 };
54
55 u8 center_ch_5g_all[CENTER_CH_5G_ALL_NUM] = {
56 /* G00 */36, 38, 40,
57 42,
58 /* G01 */44, 46, 48,
59 /* 50, */
60 /* G02 */52, 54, 56,
61 58,
62 /* G03 */60, 62, 64,
63 /* G04 */100, 102, 104,
64 106,
65 /* G05 */108, 110, 112,
66 /* 114, */
67 /* G06 */116, 118, 120,
68 122,
69 /* G07 */124, 126, 128,
70 /* G08 */132, 134, 136,
71 138,
72 /* G09 */140, 142, 144,
73 /* G10 */149, 151, 153,
74 155,
75 /* G11 */157, 159, 161,
76 /* 163, */
77 /* G12 */165, 167, 169,
78 171,
79 /* G13 */173, 175, 177
80 };
81
82 u8 center_ch_5g_20m[CENTER_CH_5G_20M_NUM] = {
83 /* G00 */36, 40,
84 /* G01 */44, 48,
85 /* G02 */52, 56,
86 /* G03 */60, 64,
87 /* G04 */100, 104,
88 /* G05 */108, 112,
89 /* G06 */116, 120,
90 /* G07 */124, 128,
91 /* G08 */132, 136,
92 /* G09 */140, 144,
93 /* G10 */149, 153,
94 /* G11 */157, 161,
95 /* G12 */165, 169,
96 /* G13 */173, 177
97 };
98
99 #define ch_to_cch_5g_20m_idx(ch) \
100 ( \
101 ((ch) >= 36 && (ch) <= 64) ? (((ch) - 36) >> 2) : \
102 ((ch) >= 100 && (ch) <= 144) ? 8 + (((ch) - 100) >> 2) : \
103 ((ch) >= 149 && (ch) <= 177) ? 20 + (((ch) - 149) >> 2) : 255 \
104 )
105
106 u8 center_ch_5g_40m[CENTER_CH_5G_40M_NUM] = {
107 /* G00 */38,
108 /* G01 */46,
109 /* G02 */54,
110 /* G03 */62,
111 /* G04 */102,
112 /* G05 */110,
113 /* G06 */118,
114 /* G07 */126,
115 /* G08 */134,
116 /* G09 */142,
117 /* G10 */151,
118 /* G11 */159,
119 /* G12 */167,
120 /* G13 */175
121 };
122
123 u8 center_ch_5g_20m_40m[CENTER_CH_5G_20M_NUM + CENTER_CH_5G_40M_NUM] = {
124 /* G00 */36, 38, 40,
125 /* G01 */44, 46, 48,
126 /* G02 */52, 54, 56,
127 /* G03 */60, 62, 64,
128 /* G04 */100, 102, 104,
129 /* G05 */108, 110, 112,
130 /* G06 */116, 118, 120,
131 /* G07 */124, 126, 128,
132 /* G08 */132, 134, 136,
133 /* G09 */140, 142, 144,
134 /* G10 */149, 151, 153,
135 /* G11 */157, 159, 161,
136 /* G12 */165, 167, 169,
137 /* G13 */173, 175, 177
138 };
139
140 u8 op_chs_of_cch_5g_40m[CENTER_CH_5G_40M_NUM][2] = {
141 {36, 40}, /* 38 */
142 {44, 48}, /* 46 */
143 {52, 56}, /* 54 */
144 {60, 64}, /* 62 */
145 {100, 104}, /* 102 */
146 {108, 112}, /* 110 */
147 {116, 120}, /* 118 */
148 {124, 128}, /* 126 */
149 {132, 136}, /* 134 */
150 {140, 144}, /* 142 */
151 {149, 153}, /* 151 */
152 {157, 161}, /* 159 */
153 {165, 169}, /* 167 */
154 {173, 177}, /* 175 */
155 };
156
157 u8 center_ch_5g_80m[CENTER_CH_5G_80M_NUM] = {
158 /* G00 ~ G01*/42,
159 /* G02 ~ G03*/58,
160 /* G04 ~ G05*/106,
161 /* G06 ~ G07*/122,
162 /* G08 ~ G09*/138,
163 /* G10 ~ G11*/155,
164 /* G12 ~ G13*/171
165 };
166
167 u8 op_chs_of_cch_5g_80m[CENTER_CH_5G_80M_NUM][4] = {
168 {36, 40, 44, 48}, /* 42 */
169 {52, 56, 60, 64}, /* 58 */
170 {100, 104, 108, 112}, /* 106 */
171 {116, 120, 124, 128}, /* 122 */
172 {132, 136, 140, 144}, /* 138 */
173 {149, 153, 157, 161}, /* 155 */
174 {165, 169, 173, 177}, /* 171 */
175 };
176
177 u8 center_ch_5g_160m[CENTER_CH_5G_160M_NUM] = {
178 /* G00 ~ G03*/50,
179 /* G04 ~ G07*/114,
180 /* G10 ~ G13*/163
181 };
182
183 u8 op_chs_of_cch_5g_160m[CENTER_CH_5G_160M_NUM][8] = {
184 {36, 40, 44, 48, 52, 56, 60, 64}, /* 50 */
185 {100, 104, 108, 112, 116, 120, 124, 128}, /* 114 */
186 {149, 153, 157, 161, 165, 169, 173, 177}, /* 163 */
187 };
188
189 struct center_chs_ent_t {
190 u8 ch_num;
191 u8 *chs;
192 };
193
194 struct center_chs_ent_t center_chs_2g_by_bw[] = {
195 {CENTER_CH_2G_NUM, center_ch_2g},
196 {CENTER_CH_2G_40M_NUM, center_ch_2g_40m},
197 };
198
199 struct center_chs_ent_t center_chs_5g_by_bw[] = {
200 {CENTER_CH_5G_20M_NUM, center_ch_5g_20m},
201 {CENTER_CH_5G_40M_NUM, center_ch_5g_40m},
202 {CENTER_CH_5G_80M_NUM, center_ch_5g_80m},
203 {CENTER_CH_5G_160M_NUM, center_ch_5g_160m},
204 };
205
206 /*
207 * Get center channel of smaller bandwidth by @param cch, @param bw, @param offset
208 * @cch: the given center channel
209 * @bw: the given bandwidth
210 * @offset: the given primary SC offset of the given bandwidth
211 *
212 * return center channel of smaller bandiwdth if valid, or 0
213 */
rtw_get_scch_by_cch_offset(u8 cch,u8 bw,u8 offset)214 u8 rtw_get_scch_by_cch_offset(u8 cch, u8 bw, u8 offset)
215 {
216 u8 t_cch = 0;
217
218 if (bw == CHANNEL_WIDTH_20) {
219 t_cch = cch;
220 goto exit;
221 }
222
223 if (offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) {
224 rtw_warn_on(1);
225 goto exit;
226 }
227
228 /* 2.4G, 40MHz */
229 if (cch >= 3 && cch <= 11 && bw == CHANNEL_WIDTH_40) {
230 t_cch = (offset == HAL_PRIME_CHNL_OFFSET_UPPER) ? cch + 2 : cch - 2;
231 goto exit;
232 }
233
234 /* 5G, 160MHz */
235 if (cch >= 50 && cch <= 163 && bw == CHANNEL_WIDTH_160) {
236 t_cch = (offset == HAL_PRIME_CHNL_OFFSET_UPPER) ? cch + 8 : cch - 8;
237 goto exit;
238
239 /* 5G, 80MHz */
240 } else if (cch >= 42 && cch <= 171 && bw == CHANNEL_WIDTH_80) {
241 t_cch = (offset == HAL_PRIME_CHNL_OFFSET_UPPER) ? cch + 4 : cch - 4;
242 goto exit;
243
244 /* 5G, 40MHz */
245 } else if (cch >= 38 && cch <= 175 && bw == CHANNEL_WIDTH_40) {
246 t_cch = (offset == HAL_PRIME_CHNL_OFFSET_UPPER) ? cch + 2 : cch - 2;
247 goto exit;
248
249 } else {
250 rtw_warn_on(1);
251 goto exit;
252 }
253
254 exit:
255 return t_cch;
256 }
257
258 /*
259 * Get center channel of smaller bandwidth by @param cch, @param bw, @param opch
260 * @cch: the given center channel
261 * @bw: the given bandwidth
262 * @opch: the given operating channel
263 *
264 * return center channel of smaller bandiwdth if valid, or 0
265 */
rtw_get_scch_by_cch_opch(u8 cch,u8 bw,u8 opch)266 u8 rtw_get_scch_by_cch_opch(u8 cch, u8 bw, u8 opch)
267 {
268 u8 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
269
270 if (opch > cch)
271 offset = HAL_PRIME_CHNL_OFFSET_UPPER;
272 else if (opch < cch)
273 offset = HAL_PRIME_CHNL_OFFSET_LOWER;
274
275 return rtw_get_scch_by_cch_offset(cch, bw, offset);
276 }
277
278 struct op_chs_ent_t {
279 u8 ch_num;
280 u8 *chs;
281 };
282
283 struct op_chs_ent_t op_chs_of_cch_2g_by_bw[] = {
284 {1, center_ch_2g},
285 {2, (u8 *)op_chs_of_cch_2g_40m},
286 };
287
288 struct op_chs_ent_t op_chs_of_cch_5g_by_bw[] = {
289 {1, center_ch_5g_20m},
290 {2, (u8 *)op_chs_of_cch_5g_40m},
291 {4, (u8 *)op_chs_of_cch_5g_80m},
292 {8, (u8 *)op_chs_of_cch_5g_160m},
293 };
294
center_chs_2g_num(u8 bw)295 inline u8 center_chs_2g_num(u8 bw)
296 {
297 if (bw > CHANNEL_WIDTH_40)
298 return 0;
299
300 return center_chs_2g_by_bw[bw].ch_num;
301 }
302
center_chs_2g(u8 bw,u8 id)303 inline u8 center_chs_2g(u8 bw, u8 id)
304 {
305 if (bw > CHANNEL_WIDTH_40)
306 return 0;
307
308 if (id >= center_chs_2g_num(bw))
309 return 0;
310
311 return center_chs_2g_by_bw[bw].chs[id];
312 }
313
center_chs_5g_num(u8 bw)314 inline u8 center_chs_5g_num(u8 bw)
315 {
316 if (bw > CHANNEL_WIDTH_160)
317 return 0;
318
319 return center_chs_5g_by_bw[bw].ch_num;
320 }
321
center_chs_5g(u8 bw,u8 id)322 inline u8 center_chs_5g(u8 bw, u8 id)
323 {
324 if (bw > CHANNEL_WIDTH_160)
325 return 0;
326
327 if (id >= center_chs_5g_num(bw))
328 return 0;
329
330 return center_chs_5g_by_bw[bw].chs[id];
331 }
332
333 /*
334 * Get available op channels by @param cch, @param bw
335 * @cch: the given center channel
336 * @bw: the given bandwidth
337 * @op_chs: the pointer to return pointer of op channel array
338 * @op_ch_num: the pointer to return pointer of op channel number
339 *
340 * return valid (1) or not (0)
341 */
rtw_get_op_chs_by_cch_bw(u8 cch,u8 bw,u8 ** op_chs,u8 * op_ch_num)342 u8 rtw_get_op_chs_by_cch_bw(u8 cch, u8 bw, u8 **op_chs, u8 *op_ch_num)
343 {
344 int i;
345 struct center_chs_ent_t *c_chs_ent = NULL;
346 struct op_chs_ent_t *op_chs_ent = NULL;
347 u8 valid = 1;
348
349 if (cch <= 14
350 && bw <= CHANNEL_WIDTH_40
351 ) {
352 c_chs_ent = ¢er_chs_2g_by_bw[bw];
353 op_chs_ent = &op_chs_of_cch_2g_by_bw[bw];
354 } else if (cch >= 36 && cch <= 177
355 && bw <= CHANNEL_WIDTH_160
356 ) {
357 c_chs_ent = ¢er_chs_5g_by_bw[bw];
358 op_chs_ent = &op_chs_of_cch_5g_by_bw[bw];
359 } else {
360 valid = 0;
361 goto exit;
362 }
363
364 for (i = 0; i < c_chs_ent->ch_num; i++)
365 if (cch == *(c_chs_ent->chs + i))
366 break;
367
368 if (i == c_chs_ent->ch_num) {
369 valid = 0;
370 goto exit;
371 }
372
373 *op_chs = op_chs_ent->chs + op_chs_ent->ch_num * i;
374 *op_ch_num = op_chs_ent->ch_num;
375
376 exit:
377 return valid;
378 }
379
rtw_get_offset_by_chbw(u8 ch,u8 bw,u8 * r_offset)380 u8 rtw_get_offset_by_chbw(u8 ch, u8 bw, u8 *r_offset)
381 {
382 u8 valid = 1;
383 u8 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
384
385 if (bw == CHANNEL_WIDTH_20)
386 goto exit;
387
388 if (bw >= CHANNEL_WIDTH_80 && ch <= 14) {
389 valid = 0;
390 goto exit;
391 }
392
393 if (ch >= 1 && ch <= 4)
394 offset = HAL_PRIME_CHNL_OFFSET_LOWER;
395 else if (ch >= 5 && ch <= 9) {
396 if (*r_offset == HAL_PRIME_CHNL_OFFSET_LOWER || *r_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
397 offset = *r_offset; /* both lower and upper is valid, obey input value */
398 else
399 offset = HAL_PRIME_CHNL_OFFSET_UPPER; /* default use upper */
400 } else if (ch >= 10 && ch <= 13)
401 offset = HAL_PRIME_CHNL_OFFSET_UPPER;
402 else if (ch == 14) {
403 valid = 0; /* ch14 doesn't support 40MHz bandwidth */
404 goto exit;
405 } else if (ch >= 36 && ch <= 177) {
406 switch (ch) {
407 case 36:
408 case 44:
409 case 52:
410 case 60:
411 case 100:
412 case 108:
413 case 116:
414 case 124:
415 case 132:
416 case 140:
417 case 149:
418 case 157:
419 case 165:
420 case 173:
421 offset = HAL_PRIME_CHNL_OFFSET_LOWER;
422 break;
423 case 40:
424 case 48:
425 case 56:
426 case 64:
427 case 104:
428 case 112:
429 case 120:
430 case 128:
431 case 136:
432 case 144:
433 case 153:
434 case 161:
435 case 169:
436 case 177:
437 offset = HAL_PRIME_CHNL_OFFSET_UPPER;
438 break;
439 default:
440 valid = 0;
441 break;
442 }
443 } else
444 valid = 0;
445
446 exit:
447 if (valid && r_offset)
448 *r_offset = offset;
449 return valid;
450 }
451
rtw_get_center_ch(u8 ch,u8 bw,u8 offset)452 u8 rtw_get_center_ch(u8 ch, u8 bw, u8 offset)
453 {
454 u8 cch = ch;
455
456 if (bw == CHANNEL_WIDTH_160) {
457 if (ch % 4 == 0) {
458 if (ch >= 36 && ch <= 64)
459 cch = 50;
460 else if (ch >= 100 && ch <= 128)
461 cch = 114;
462 } else if (ch % 4 == 1) {
463 if (ch >= 149 && ch <= 177)
464 cch = 163;
465 }
466
467 } else if (bw == CHANNEL_WIDTH_80) {
468 if (ch <= 14)
469 cch = 7; /* special case for 2.4G */
470 else if (ch % 4 == 0) {
471 if (ch >= 36 && ch <= 48)
472 cch = 42;
473 else if (ch >= 52 && ch <= 64)
474 cch = 58;
475 else if (ch >= 100 && ch <= 112)
476 cch = 106;
477 else if (ch >= 116 && ch <= 128)
478 cch = 122;
479 else if (ch >= 132 && ch <= 144)
480 cch = 138;
481 } else if (ch % 4 == 1) {
482 if (ch >= 149 && ch <= 161)
483 cch = 155;
484 else if (ch >= 165 && ch <= 177)
485 cch = 171;
486 }
487
488 } else if (bw == CHANNEL_WIDTH_40) {
489 if (offset == HAL_PRIME_CHNL_OFFSET_LOWER)
490 cch = ch + 2;
491 else if (offset == HAL_PRIME_CHNL_OFFSET_UPPER)
492 cch = ch - 2;
493
494 } else if (bw == CHANNEL_WIDTH_20
495 || bw == CHANNEL_WIDTH_10
496 || bw == CHANNEL_WIDTH_5
497 )
498 ; /* same as ch */
499 else
500 rtw_warn_on(1);
501
502 return cch;
503 }
504
rtw_get_ch_group(u8 ch,u8 * group,u8 * cck_group)505 u8 rtw_get_ch_group(u8 ch, u8 *group, u8 *cck_group)
506 {
507 BAND_TYPE band = BAND_MAX;
508 s8 gp = -1, cck_gp = -1;
509
510 if (ch <= 14) {
511 band = BAND_ON_2_4G;
512
513 if (1 <= ch && ch <= 2)
514 gp = 0;
515 else if (3 <= ch && ch <= 5)
516 gp = 1;
517 else if (6 <= ch && ch <= 8)
518 gp = 2;
519 else if (9 <= ch && ch <= 11)
520 gp = 3;
521 else if (12 <= ch && ch <= 14)
522 gp = 4;
523 else
524 band = BAND_MAX;
525
526 if (ch == 14)
527 cck_gp = 5;
528 else
529 cck_gp = gp;
530 } else {
531 band = BAND_ON_5G;
532
533 if (36 <= ch && ch <= 42)
534 gp = 0;
535 else if (44 <= ch && ch <= 48)
536 gp = 1;
537 else if (50 <= ch && ch <= 58)
538 gp = 2;
539 else if (60 <= ch && ch <= 64)
540 gp = 3;
541 else if (100 <= ch && ch <= 106)
542 gp = 4;
543 else if (108 <= ch && ch <= 114)
544 gp = 5;
545 else if (116 <= ch && ch <= 122)
546 gp = 6;
547 else if (124 <= ch && ch <= 130)
548 gp = 7;
549 else if (132 <= ch && ch <= 138)
550 gp = 8;
551 else if (140 <= ch && ch <= 144)
552 gp = 9;
553 else if (149 <= ch && ch <= 155)
554 gp = 10;
555 else if (157 <= ch && ch <= 161)
556 gp = 11;
557 else if (165 <= ch && ch <= 171)
558 gp = 12;
559 else if (173 <= ch && ch <= 177)
560 gp = 13;
561 else
562 band = BAND_MAX;
563 }
564
565 if (band == BAND_MAX
566 || (band == BAND_ON_2_4G && cck_gp == -1)
567 || gp == -1
568 ) {
569 RTW_WARN("%s invalid channel:%u", __func__, ch);
570 rtw_warn_on(1);
571 goto exit;
572 }
573
574 if (group)
575 *group = gp;
576 if (cck_group && band == BAND_ON_2_4G)
577 *cck_group = cck_gp;
578
579 exit:
580 return band;
581 }
582
583 #if CONFIG_IEEE80211_BAND_6GHZ
rtw_6gch2freq(int chan)584 int rtw_6gch2freq(int chan)
585 {
586 if (chan >= 1 && chan <= 253)
587 return 5950 + chan * 5;
588
589 return 0; /* not supported */
590 }
591 #endif
592
rtw_ch2freq(int chan)593 int rtw_ch2freq(int chan)
594 {
595 /* see 802.11 17.3.8.3.2 and Annex J
596 * there are overlapping channel numbers in 5GHz and 2GHz bands */
597
598 /*
599 * RTK: don't consider the overlapping channel numbers: 5G channel <= 14,
600 * because we don't support it. simply judge from channel number
601 */
602
603 if (chan >= 1 && chan <= 14) {
604 if (chan == 14)
605 return 2484;
606 else if (chan < 14)
607 return 2407 + chan * 5;
608 } else if (chan >= 36 && chan <= 177)
609 return 5000 + chan * 5;
610
611 return 0; /* not supported */
612 }
613
rtw_ch2freq_by_band(BAND_TYPE band,int ch)614 int rtw_ch2freq_by_band(BAND_TYPE band, int ch)
615 {
616 #if CONFIG_IEEE80211_BAND_6GHZ
617 if (band == BAND_ON_6G)
618 return rtw_6gch2freq(ch);
619 else
620 #endif
621 return rtw_ch2freq(ch);
622 }
623
rtw_freq2ch(int freq)624 int rtw_freq2ch(int freq)
625 {
626 /* see 802.11 17.3.8.3.2 and Annex J */
627 if (freq == 2484)
628 return 14;
629 else if (freq < 2484)
630 return (freq - 2407) / 5;
631 else if (freq >= 4910 && freq <= 4980)
632 return (freq - 4000) / 5;
633 else if (freq >= 5000 && freq < 5950)
634 return (freq - 5000) / 5;
635 else if (freq >= 5950 && freq <= 7215)
636 return (freq - 5950) / 5;
637 else if (freq >= 58320 && freq <= 64800)
638 return (freq - 56160) / 2160;
639 else
640 return 0;
641 }
642
rtw_freq2band(int freq)643 BAND_TYPE rtw_freq2band(int freq)
644 {
645 if (freq <= 2484)
646 return BAND_ON_2_4G;
647 else if (freq >= 5000 && freq < 5950)
648 return BAND_ON_5G;
649 #if CONFIG_IEEE80211_BAND_6GHZ
650 else if (freq >= 5950 && freq <= 7215)
651 return BAND_ON_6G;
652 #endif
653 else
654 return BAND_MAX;
655 }
656
rtw_freq_consecutive(int a,int b)657 bool rtw_freq_consecutive(int a, int b)
658 {
659 BAND_TYPE band_a, band_b;
660
661 band_a = rtw_freq2band(a);
662 if (band_a == BAND_MAX)
663 return 0;
664 band_b = rtw_freq2band(b);
665 if (band_b == BAND_MAX || band_a != band_b)
666 return 0;
667
668 switch (band_a) {
669 case BAND_ON_2_4G:
670 return rtw_abs(a - b) == 5;
671 case BAND_ON_5G:
672 #if CONFIG_IEEE80211_BAND_6GHZ
673 case BAND_ON_6G:
674 #endif
675 return rtw_abs(a - b) == 20;
676 default:
677 return 0;
678 }
679 }
680
rtw_chbw_to_freq_range(u8 ch,u8 bw,u8 offset,u32 * hi,u32 * lo)681 bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo)
682 {
683 u8 c_ch;
684 u32 freq;
685 u32 hi_ret = 0, lo_ret = 0;
686 bool valid = _FALSE;
687
688 if (hi)
689 *hi = 0;
690 if (lo)
691 *lo = 0;
692
693 c_ch = rtw_get_center_ch(ch, bw, offset);
694 freq = rtw_ch2freq(c_ch);
695
696 if (!freq) {
697 rtw_warn_on(1);
698 goto exit;
699 }
700
701 if (bw == CHANNEL_WIDTH_160) {
702 hi_ret = freq + 80;
703 lo_ret = freq - 80;
704 } else if (bw == CHANNEL_WIDTH_80) {
705 hi_ret = freq + 40;
706 lo_ret = freq - 40;
707 } else if (bw == CHANNEL_WIDTH_40) {
708 hi_ret = freq + 20;
709 lo_ret = freq - 20;
710 } else if (bw == CHANNEL_WIDTH_20) {
711 hi_ret = freq + 10;
712 lo_ret = freq - 10;
713 } else
714 rtw_warn_on(1);
715
716 if (hi)
717 *hi = hi_ret;
718 if (lo)
719 *lo = lo_ret;
720
721 valid = _TRUE;
722
723 exit:
724 return valid;
725 }
726
727 const char *const _ch_width_str[CHANNEL_WIDTH_MAX] = {
728 [CHANNEL_WIDTH_20] = "20MHz",
729 [CHANNEL_WIDTH_40] = "40MHz",
730 [CHANNEL_WIDTH_80] = "80MHz",
731 [CHANNEL_WIDTH_160] = "160MHz",
732 [CHANNEL_WIDTH_80_80] = "80_80MHz",
733 [CHANNEL_WIDTH_5] = "5MHz",
734 [CHANNEL_WIDTH_10] = "10MHz",
735 };
736
737 const u8 _ch_width_to_bw_cap[CHANNEL_WIDTH_MAX] = {
738 [CHANNEL_WIDTH_20] = BW_CAP_20M,
739 [CHANNEL_WIDTH_40] = BW_CAP_40M,
740 [CHANNEL_WIDTH_80] = BW_CAP_80M,
741 [CHANNEL_WIDTH_160] = BW_CAP_160M,
742 [CHANNEL_WIDTH_80_80] = BW_CAP_80_80M,
743 [CHANNEL_WIDTH_5] = BW_CAP_5M,
744 [CHANNEL_WIDTH_10] = BW_CAP_10M,
745 };
746
747 const char *const _band_str[] = {
748 [BAND_ON_2_4G] = "2.4G",
749 [BAND_ON_5G] = "5G",
750 #if CONFIG_IEEE80211_BAND_6GHZ
751 [BAND_ON_6G] = "6G",
752 #endif
753 [BAND_MAX] = "BAND_MAX",
754 };
755
756 const u8 _band_to_band_cap[] = {
757 [BAND_ON_2_4G] = BAND_CAP_2G,
758 [BAND_ON_5G] = BAND_CAP_5G,
759 #if CONFIG_IEEE80211_BAND_6GHZ
760 [BAND_ON_6G] = BAND_CAP_6G,
761 #endif
762 [BAND_MAX] = 0,
763 };
764
765 const char *const _opc_bw_str[OPC_BW_NUM] = {
766 "20M ", /* OPC_BW20 */
767 "40M+", /* OPC_BW40PLUS */
768 "40M-", /* OPC_BW40MINUS */
769 "80M ", /* OPC_BW80 */
770 "160M ", /* OPC_BW160 */
771 "80+80M ", /* OPC_BW80P80 */
772 };
773
774 const u8 _opc_bw_to_ch_width[OPC_BW_NUM] = {
775 CHANNEL_WIDTH_20, /* OPC_BW20 */
776 CHANNEL_WIDTH_40, /* OPC_BW40PLUS */
777 CHANNEL_WIDTH_40, /* OPC_BW40MINUS */
778 CHANNEL_WIDTH_80, /* OPC_BW80 */
779 CHANNEL_WIDTH_160, /* OPC_BW160 */
780 CHANNEL_WIDTH_80_80, /* OPC_BW80P80 */
781 };
782
783 /* global operating class database */
784
785 struct op_class_t {
786 u8 class_id;
787 BAND_TYPE band;
788 enum opc_bw bw;
789 u8 *len_ch_attr;
790 };
791
792 #define OPC_CH_LIST_LEN(_opc) (_opc.len_ch_attr[0])
793 #define OPC_CH_LIST_CH(_opc, _i) (_opc.len_ch_attr[_i + 1])
794
795 #define OP_CLASS_ENT(_class, _band, _bw, _len, arg...) \
796 {.class_id = _class, .band = _band, .bw = _bw, .len_ch_attr = (uint8_t[_len + 1]) {_len, ##arg},}
797
798 /* 802.11-2020, 802.11ax-2021 Table E-4, partial */
799 static const struct op_class_t global_op_class[] = {
800 /* 2G ch1~13, 20M */
801 OP_CLASS_ENT(81, BAND_ON_2_4G, OPC_BW20, 13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),
802 /* 2G ch14, 20M */
803 OP_CLASS_ENT(82, BAND_ON_2_4G, OPC_BW20, 1, 14),
804 /* 2G, 40M */
805 OP_CLASS_ENT(83, BAND_ON_2_4G, OPC_BW40PLUS, 9, 1, 2, 3, 4, 5, 6, 7, 8, 9),
806 OP_CLASS_ENT(84, BAND_ON_2_4G, OPC_BW40MINUS, 9, 5, 6, 7, 8, 9, 10, 11, 12, 13),
807 /* 5G band 1, 20M & 40M */
808 OP_CLASS_ENT(115, BAND_ON_5G, OPC_BW20, 4, 36, 40, 44, 48),
809 OP_CLASS_ENT(116, BAND_ON_5G, OPC_BW40PLUS, 2, 36, 44),
810 OP_CLASS_ENT(117, BAND_ON_5G, OPC_BW40MINUS, 2, 40, 48),
811 /* 5G band 2, 20M & 40M */
812 OP_CLASS_ENT(118, BAND_ON_5G, OPC_BW20, 4, 52, 56, 60, 64),
813 OP_CLASS_ENT(119, BAND_ON_5G, OPC_BW40PLUS, 2, 52, 60),
814 OP_CLASS_ENT(120, BAND_ON_5G, OPC_BW40MINUS, 2, 56, 64),
815 /* 5G band 3, 20M & 40M */
816 OP_CLASS_ENT(121, BAND_ON_5G, OPC_BW20, 12, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144),
817 OP_CLASS_ENT(122, BAND_ON_5G, OPC_BW40PLUS, 6, 100, 108, 116, 124, 132, 140),
818 OP_CLASS_ENT(123, BAND_ON_5G, OPC_BW40MINUS, 6, 104, 112, 120, 128, 136, 144),
819 /* 5G band 4, 20M & 40M */
820 OP_CLASS_ENT(124, BAND_ON_5G, OPC_BW20, 4, 149, 153, 157, 161),
821 OP_CLASS_ENT(125, BAND_ON_5G, OPC_BW20, 8, 149, 153, 157, 161, 165, 169, 173, 177),
822 OP_CLASS_ENT(126, BAND_ON_5G, OPC_BW40PLUS, 4, 149, 157, 165, 173),
823 OP_CLASS_ENT(127, BAND_ON_5G, OPC_BW40MINUS, 4, 153, 161, 169, 177),
824 /* 5G, 80M & 160M */
825 OP_CLASS_ENT(128, BAND_ON_5G, OPC_BW80, 28, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165, 169, 173, 177),
826 OP_CLASS_ENT(129, BAND_ON_5G, OPC_BW160, 24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 149, 153, 157, 161, 165, 169, 173, 177),
827 #if 0 /* TODO */
828 /* 5G, 80+80M */
829 OP_CLASS_ENT(130, BAND_ON_5G, OPC_BW80P80, 28, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165, 169, 173, 177),
830 #endif
831 };
832
833 static const int global_op_class_num = sizeof(global_op_class) / sizeof(struct op_class_t);
834
get_global_op_class_by_id(u8 gid)835 static const struct op_class_t *get_global_op_class_by_id(u8 gid)
836 {
837 int i;
838
839 for (i = 0; i < global_op_class_num; i++)
840 if (global_op_class[i].class_id == gid)
841 break;
842
843 return i < global_op_class_num ? &global_op_class[i] : NULL;
844 }
845
is_valid_global_op_class_id(u8 gid)846 bool is_valid_global_op_class_id(u8 gid)
847 {
848 return get_global_op_class_by_id(gid) ? 1 : 0;
849 }
850
is_valid_global_op_class_ch(const struct op_class_t * opc,u8 ch)851 static bool is_valid_global_op_class_ch(const struct op_class_t *opc, u8 ch)
852 {
853 int array_idx;
854 int i;
855
856 if (opc < global_op_class
857 || (((u8 *)opc) - ((u8 *)global_op_class)) % sizeof(struct op_class_t)
858 ) {
859 RTW_ERR("Invalid opc pointer:%p (global_op_class:%p, sizeof(struct op_class_t):%zu, %zu)\n"
860 , opc, global_op_class, sizeof(struct op_class_t), (((u8 *)opc) - ((u8 *)global_op_class)) % sizeof(struct op_class_t));
861 return 0;
862 }
863
864 array_idx = (((u8 *)opc) - ((u8 *)global_op_class)) / sizeof(struct op_class_t);
865
866 for (i = 0; i < OPC_CH_LIST_LEN(global_op_class[array_idx]); i++)
867 if (OPC_CH_LIST_CH(global_op_class[array_idx], i) == ch)
868 break;
869
870 return i < OPC_CH_LIST_LEN(global_op_class[array_idx]);
871 }
872
get_global_opc_bw_by_id(u8 gid)873 static enum opc_bw get_global_opc_bw_by_id(u8 gid)
874 {
875 int i;
876
877 for (i = 0; i < global_op_class_num; i++)
878 if (global_op_class[i].class_id == gid)
879 break;
880
881 return i < global_op_class_num ? global_op_class[i].bw : OPC_BW_NUM;
882 }
883
884 /* -2: logic error, -1: error, 0: is already BW20 */
get_sub_op_class(u8 gid,u8 ch)885 s16 get_sub_op_class(u8 gid, u8 ch)
886 {
887 const struct op_class_t *opc = get_global_op_class_by_id(gid);
888 int i;
889 enum channel_width bw;
890
891 if (!opc)
892 return -1;
893
894 if (!is_valid_global_op_class_ch(opc, ch)) {
895 return -1;
896 }
897
898 if (opc->bw == OPC_BW20)
899 return 0;
900
901 bw = opc_bw_to_ch_width(opc->bw);
902
903 for (i = 0; i < global_op_class_num; i++) {
904 if (bw != opc_bw_to_ch_width(global_op_class[i].bw) + 1)
905 continue;
906 if (is_valid_global_op_class_ch(&global_op_class[i], ch))
907 break;
908 }
909
910 return i < global_op_class_num ? global_op_class[i].class_id : -2;
911 }
912
dump_op_class_ch_title(void * sel)913 static void dump_op_class_ch_title(void *sel)
914 {
915 RTW_PRINT_SEL(sel, "%-5s %-4s %-7s ch_list\n"
916 , "class", "band", "bw");
917 }
918
dump_global_op_class_ch_single(void * sel,u8 gid)919 static void dump_global_op_class_ch_single(void *sel, u8 gid)
920 {
921 u8 i;
922
923 RTW_PRINT_SEL(sel, "%5u %4s %7s"
924 , global_op_class[gid].class_id
925 , band_str(global_op_class[gid].band)
926 , opc_bw_str(global_op_class[gid].bw));
927
928 for (i = 0; i < OPC_CH_LIST_LEN(global_op_class[gid]); i++)
929 _RTW_PRINT_SEL(sel, " %u", OPC_CH_LIST_CH(global_op_class[gid], i));
930
931 _RTW_PRINT_SEL(sel, "\n");
932 }
933
934 #ifdef CONFIG_RTW_DEBUG
dbg_global_op_class_validate(u8 gid)935 static bool dbg_global_op_class_validate(u8 gid)
936 {
937 u8 i;
938 u8 ch, bw, offset, cch;
939 bool ret = 1;
940
941 switch (global_op_class[gid].bw) {
942 case OPC_BW20:
943 bw = CHANNEL_WIDTH_20;
944 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
945 break;
946 case OPC_BW40PLUS:
947 bw = CHANNEL_WIDTH_40;
948 offset = HAL_PRIME_CHNL_OFFSET_LOWER;
949 break;
950 case OPC_BW40MINUS:
951 bw = CHANNEL_WIDTH_40;
952 offset = HAL_PRIME_CHNL_OFFSET_UPPER;
953 break;
954 case OPC_BW80:
955 bw = CHANNEL_WIDTH_80;
956 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
957 break;
958 case OPC_BW160:
959 bw = CHANNEL_WIDTH_160;
960 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
961 break;
962 case OPC_BW80P80: /* TODO */
963 default:
964 RTW_ERR("%s class:%u unsupported opc_bw:%u\n"
965 , __func__, global_op_class[gid].class_id, global_op_class[gid].bw);
966 ret = 0;
967 goto exit;
968 }
969
970 for (i = 0; i < OPC_CH_LIST_LEN(global_op_class[gid]); i++) {
971 u8 *op_chs;
972 u8 op_ch_num;
973 u8 k;
974
975 ch = OPC_CH_LIST_CH(global_op_class[gid], i);
976 cch = rtw_get_center_ch(ch ,bw, offset);
977 if (!cch) {
978 RTW_ERR("%s can't get cch from class:%u ch:%u\n"
979 , __func__, global_op_class[gid].class_id, ch);
980 ret = 0;
981 continue;
982 }
983
984 if (!rtw_get_op_chs_by_cch_bw(cch, bw, &op_chs, &op_ch_num)) {
985 RTW_ERR("%s can't get op chs from class:%u cch:%u\n"
986 , __func__, global_op_class[gid].class_id, cch);
987 ret = 0;
988 continue;
989 }
990
991 for (k = 0; k < op_ch_num; k++) {
992 if (*(op_chs + k) == ch)
993 break;
994 }
995 if (k >= op_ch_num) {
996 RTW_ERR("%s can't get ch:%u from op_chs class:%u cch:%u\n"
997 , __func__, ch, global_op_class[i].class_id, cch);
998 ret = 0;
999 }
1000 }
1001
1002 exit:
1003 return ret;
1004 }
1005 #endif /* CONFIG_RTW_DEBUG */
1006
dump_global_op_class(void * sel)1007 void dump_global_op_class(void *sel)
1008 {
1009 u8 i;
1010
1011 dump_op_class_ch_title(sel);
1012
1013 for (i = 0; i < global_op_class_num; i++)
1014 dump_global_op_class_ch_single(sel, i);
1015 }
1016
rtw_get_op_class_by_chbw(u8 ch,u8 bw,u8 offset)1017 u8 rtw_get_op_class_by_chbw(u8 ch, u8 bw, u8 offset)
1018 {
1019 BAND_TYPE band = BAND_MAX;
1020 int i;
1021 u8 gid = 0; /* invalid */
1022
1023 if (rtw_is_2g_ch(ch))
1024 band = BAND_ON_2_4G;
1025 else if (rtw_is_5g_ch(ch))
1026 band = BAND_ON_5G;
1027 else
1028 goto exit;
1029
1030 switch (bw) {
1031 case CHANNEL_WIDTH_20:
1032 case CHANNEL_WIDTH_40:
1033 case CHANNEL_WIDTH_80:
1034 case CHANNEL_WIDTH_160:
1035 #if 0 /* TODO */
1036 case CHANNEL_WIDTH_80_80:
1037 #endif
1038 break;
1039 default:
1040 goto exit;
1041 }
1042
1043 for (i = 0; i < global_op_class_num; i++) {
1044 if (band != global_op_class[i].band)
1045 continue;
1046
1047 if (opc_bw_to_ch_width(global_op_class[i].bw) != bw)
1048 continue;
1049
1050 if ((global_op_class[i].bw == OPC_BW40PLUS
1051 && offset != HAL_PRIME_CHNL_OFFSET_LOWER)
1052 || (global_op_class[i].bw == OPC_BW40MINUS
1053 && offset != HAL_PRIME_CHNL_OFFSET_UPPER)
1054 )
1055 continue;
1056
1057 if (is_valid_global_op_class_ch(&global_op_class[i], ch))
1058 goto get;
1059 }
1060
1061 get:
1062 if (i < global_op_class_num) {
1063 #if 0 /* TODO */
1064 if (bw == CHANNEL_WIDTH_80_80) {
1065 /* search another ch */
1066 if (!is_valid_global_op_class_ch(&global_op_class[i], ch2))
1067 goto exit;
1068 }
1069 #endif
1070
1071 gid = global_op_class[i].class_id;
1072 }
1073
1074 exit:
1075 return gid;
1076 }
1077
rtw_get_bw_offset_by_op_class_ch(u8 gid,u8 ch,u8 * bw,u8 * offset)1078 u8 rtw_get_bw_offset_by_op_class_ch(u8 gid, u8 ch, u8 *bw, u8 *offset)
1079 {
1080 enum opc_bw opc_bw;
1081 u8 valid = 0;
1082 int i;
1083
1084 opc_bw = get_global_opc_bw_by_id(gid);
1085 if (opc_bw == OPC_BW_NUM)
1086 goto exit;
1087
1088 *bw = opc_bw_to_ch_width(opc_bw);
1089
1090 if (opc_bw == OPC_BW40PLUS)
1091 *offset = HAL_PRIME_CHNL_OFFSET_LOWER;
1092 else if (opc_bw == OPC_BW40MINUS)
1093 *offset = HAL_PRIME_CHNL_OFFSET_UPPER;
1094
1095 if (rtw_get_offset_by_chbw(ch, *bw, offset))
1096 valid = 1;
1097
1098 exit:
1099 return valid;
1100 }
1101
opc_pref_alloc(u8 class_id)1102 static struct op_class_pref_t *opc_pref_alloc(u8 class_id)
1103 {
1104 int i, j;
1105 struct op_class_pref_t *opc_pref = NULL;
1106 u8 ch_num;
1107
1108 for (i = 0; i < global_op_class_num; i++)
1109 if (global_op_class[i].class_id == class_id)
1110 break;
1111
1112 if (i >= global_op_class_num)
1113 goto exit;
1114
1115 ch_num = OPC_CH_LIST_LEN(global_op_class[i]);
1116 opc_pref = rtw_zmalloc(sizeof(*opc_pref) + (sizeof(struct op_ch_t) * ch_num));
1117 if (!opc_pref)
1118 goto exit;
1119
1120 opc_pref->class_id = global_op_class[i].class_id;
1121 opc_pref->band = global_op_class[i].band;
1122 opc_pref->bw = global_op_class[i].bw;
1123
1124 for (j = 0; j < OPC_CH_LIST_LEN(global_op_class[i]); j++) {
1125 opc_pref->chs[j].ch = OPC_CH_LIST_CH(global_op_class[i], j);
1126 opc_pref->chs[j].static_non_op = 1;
1127 opc_pref->chs[j].no_ir = 1;
1128 opc_pref->chs[j].max_txpwr = UNSPECIFIED_MBM;
1129 }
1130 opc_pref->ch_num = ch_num;
1131
1132 exit:
1133 return opc_pref;
1134 }
1135
opc_pref_free(struct op_class_pref_t * opc_pref)1136 static void opc_pref_free(struct op_class_pref_t *opc_pref)
1137 {
1138 rtw_mfree(opc_pref, sizeof(*opc_pref) + (sizeof(struct op_ch_t) * opc_pref->ch_num));
1139 }
1140
op_class_pref_init(_adapter * adapter)1141 int op_class_pref_init(_adapter *adapter)
1142 {
1143 struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
1144 struct registry_priv *regsty = adapter_to_regsty(adapter);
1145 u8 bw;
1146 struct op_class_pref_t *opc_pref;
1147 int i;
1148 u8 op_class_num = 0;
1149 u8 band_bmp = 0;
1150 u8 bw_bmp[BAND_MAX] = {0};
1151 int ret = _FAIL;
1152
1153 rfctl->spt_op_class_ch = rtw_zmalloc(sizeof(struct op_class_pref_t *) * global_op_class_num);
1154 if (!rfctl->spt_op_class_ch) {
1155 RTW_ERR("%s alloc rfctl->spt_op_class_ch fail\n", __func__);
1156 goto exit;
1157 }
1158
1159 if (IsSupported24G(regsty->wireless_mode) && hal_chk_band_cap(adapter, BAND_CAP_2G))
1160 band_bmp |= BAND_CAP_2G;
1161 if (is_supported_5g(regsty->wireless_mode) && hal_chk_band_cap(adapter, BAND_CAP_5G))
1162 band_bmp |= BAND_CAP_5G;
1163
1164 bw_bmp[BAND_ON_2_4G] = (ch_width_to_bw_cap(REGSTY_BW_2G(regsty) + 1) - 1) & (GET_HAL_SPEC(adapter)->bw_cap);
1165 bw_bmp[BAND_ON_5G] = (ch_width_to_bw_cap(REGSTY_BW_5G(regsty) + 1) - 1) & (GET_HAL_SPEC(adapter)->bw_cap);
1166 if (!REGSTY_IS_11AC_ENABLE(regsty)
1167 || !is_supported_vht(regsty->wireless_mode)
1168 )
1169 bw_bmp[BAND_ON_5G] &= ~(BW_CAP_80M | BW_CAP_160M);
1170
1171 if (0) {
1172 RTW_INFO("REGSTY_BW_2G(regsty):%u\n", REGSTY_BW_2G(regsty));
1173 RTW_INFO("REGSTY_BW_5G(regsty):%u\n", REGSTY_BW_5G(regsty));
1174 RTW_INFO("GET_HAL_SPEC(adapter)->bw_cap:0x%x\n", GET_HAL_SPEC(adapter)->bw_cap);
1175 RTW_INFO("band_bmp:0x%x\n", band_bmp);
1176 RTW_INFO("bw_bmp[2G]:0x%x\n", bw_bmp[BAND_ON_2_4G]);
1177 RTW_INFO("bw_bmp[5G]:0x%x\n", bw_bmp[BAND_ON_5G]);
1178 }
1179
1180 for (i = 0; i < global_op_class_num; i++) {
1181 #ifdef CONFIG_RTW_DEBUG
1182 rtw_warn_on(!dbg_global_op_class_validate(i));
1183 #endif
1184
1185 if (!(band_bmp & band_to_band_cap(global_op_class[i].band)))
1186 continue;
1187
1188 bw = opc_bw_to_ch_width(global_op_class[i].bw);
1189 if (bw == CHANNEL_WIDTH_MAX
1190 || bw == CHANNEL_WIDTH_80_80 /* TODO */
1191 )
1192 continue;
1193
1194 if (!(bw_bmp[global_op_class[i].band] & ch_width_to_bw_cap(bw)))
1195 continue;
1196
1197 opc_pref = opc_pref_alloc(global_op_class[i].class_id);
1198 if (!opc_pref) {
1199 RTW_ERR("%s opc_pref_alloc(%u) fail\n", __func__, global_op_class[i].class_id);
1200 goto exit;
1201 }
1202
1203 if (opc_pref->ch_num) {
1204 rfctl->spt_op_class_ch[i] = opc_pref;
1205 op_class_num++;
1206 } else
1207 opc_pref_free(opc_pref);
1208 }
1209
1210 rfctl->cap_spt_op_class_num = op_class_num;
1211 ret = _SUCCESS;
1212
1213 exit:
1214 return ret;
1215 }
1216
op_class_pref_deinit(_adapter * adapter)1217 void op_class_pref_deinit(_adapter *adapter)
1218 {
1219 struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
1220 int i;
1221
1222 if (!rfctl->spt_op_class_ch)
1223 return;
1224
1225 for (i = 0; i < global_op_class_num; i++) {
1226 if (rfctl->spt_op_class_ch[i]) {
1227 opc_pref_free(rfctl->spt_op_class_ch[i]);
1228 rfctl->spt_op_class_ch[i] = NULL;
1229 }
1230 }
1231
1232 rtw_mfree(rfctl->spt_op_class_ch, sizeof(struct op_class_pref_t *) * global_op_class_num);
1233 rfctl->spt_op_class_ch = NULL;
1234 }
1235
op_class_pref_apply_regulatory(_adapter * adapter,u8 reason)1236 void op_class_pref_apply_regulatory(_adapter *adapter, u8 reason)
1237 {
1238 struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
1239 RT_CHANNEL_INFO *chset = rfctl->channel_set;
1240 struct registry_priv *regsty = adapter_to_regsty(adapter);
1241 u8 ch, bw, offset, cch;
1242 struct op_class_pref_t *opc_pref;
1243 int i, j;
1244 u8 reg_op_class_num = 0;
1245 u8 op_class_num = 0;
1246
1247 for (i = 0; i < global_op_class_num; i++) {
1248 if (!rfctl->spt_op_class_ch[i])
1249 continue;
1250 opc_pref = rfctl->spt_op_class_ch[i];
1251
1252 /* reset all channel */
1253 for (j = 0; j < opc_pref->ch_num; j++) {
1254 if (reason >= REG_CHANGE)
1255 opc_pref->chs[j].static_non_op = 1;
1256 if (reason != REG_TXPWR_CHANGE)
1257 opc_pref->chs[j].no_ir = 1;
1258 if (reason >= REG_TXPWR_CHANGE)
1259 opc_pref->chs[j].max_txpwr = UNSPECIFIED_MBM;
1260 }
1261 if (reason >= REG_CHANGE)
1262 opc_pref->op_ch_num = 0;
1263 if (reason != REG_TXPWR_CHANGE)
1264 opc_pref->ir_ch_num = 0;
1265
1266 switch (opc_pref->bw) {
1267 case OPC_BW20:
1268 bw = CHANNEL_WIDTH_20;
1269 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
1270 break;
1271 case OPC_BW40PLUS:
1272 bw = CHANNEL_WIDTH_40;
1273 offset = HAL_PRIME_CHNL_OFFSET_LOWER;
1274 break;
1275 case OPC_BW40MINUS:
1276 bw = CHANNEL_WIDTH_40;
1277 offset = HAL_PRIME_CHNL_OFFSET_UPPER;
1278 break;
1279 case OPC_BW80:
1280 bw = CHANNEL_WIDTH_80;
1281 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
1282 break;
1283 case OPC_BW160:
1284 bw = CHANNEL_WIDTH_160;
1285 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
1286 break;
1287 case OPC_BW80P80: /* TODO */
1288 default:
1289 continue;
1290 }
1291
1292 if (!RFCTL_REG_EN_11AC(rfctl)
1293 && (bw == CHANNEL_WIDTH_80 || bw == CHANNEL_WIDTH_160))
1294 continue;
1295
1296 for (j = 0; j < opc_pref->ch_num; j++) {
1297 u8 *op_chs;
1298 u8 op_ch_num;
1299 u8 k, l;
1300 int chset_idx;
1301
1302 ch = opc_pref->chs[j].ch;
1303
1304 if (reason >= REG_TXPWR_CHANGE)
1305 opc_pref->chs[j].max_txpwr = rtw_rfctl_get_reg_max_txpwr_mbm(rfctl, ch, bw, offset, 1);
1306
1307 if (reason == REG_TXPWR_CHANGE)
1308 continue;
1309
1310 cch = rtw_get_center_ch(ch ,bw, offset);
1311 if (!cch)
1312 continue;
1313
1314 if (!rtw_get_op_chs_by_cch_bw(cch, bw, &op_chs, &op_ch_num))
1315 continue;
1316
1317 for (k = 0, l = 0; k < op_ch_num; k++) {
1318 chset_idx = rtw_chset_search_ch(chset, *(op_chs + k));
1319 if (chset_idx == -1)
1320 break;
1321 if (bw >= CHANNEL_WIDTH_40) {
1322 if ((chset[chset_idx].flags & RTW_CHF_NO_HT40U) && k % 2 == 0)
1323 break;
1324 if ((chset[chset_idx].flags & RTW_CHF_NO_HT40L) && k % 2 == 1)
1325 break;
1326 }
1327 if (bw >= CHANNEL_WIDTH_80 && (chset[chset_idx].flags & RTW_CHF_NO_80MHZ))
1328 break;
1329 if (bw >= CHANNEL_WIDTH_160 && (chset[chset_idx].flags & RTW_CHF_NO_160MHZ))
1330 break;
1331 if ((chset[chset_idx].flags & RTW_CHF_DFS) && rtw_rfctl_dfs_domain_unknown(rfctl))
1332 continue;
1333 if (chset[chset_idx].flags & RTW_CHF_NO_IR)
1334 continue;
1335 l++;
1336 }
1337 if (k < op_ch_num)
1338 continue;
1339
1340 if (reason >= REG_CHANGE) {
1341 opc_pref->chs[j].static_non_op = 0;
1342 opc_pref->op_ch_num++;
1343 }
1344
1345 if (l >= op_ch_num) {
1346 opc_pref->chs[j].no_ir = 0;
1347 opc_pref->ir_ch_num++;
1348 }
1349 }
1350
1351 if (opc_pref->op_ch_num)
1352 reg_op_class_num++;
1353 if (opc_pref->ir_ch_num)
1354 op_class_num++;
1355 }
1356
1357 rfctl->reg_spt_op_class_num = reg_op_class_num;
1358 rfctl->cur_spt_op_class_num = op_class_num;
1359 }
1360
dump_opc_pref_single(void * sel,struct op_class_pref_t * opc_pref,bool show_snon_ocp,bool show_no_ir,bool detail)1361 static void dump_opc_pref_single(void *sel, struct op_class_pref_t *opc_pref, bool show_snon_ocp, bool show_no_ir, bool detail)
1362 {
1363 u8 i;
1364 u8 ch_num = 0;
1365
1366 if (!show_snon_ocp && !opc_pref->op_ch_num)
1367 return;
1368 if (!show_no_ir && !opc_pref->ir_ch_num)
1369 return;
1370
1371 RTW_PRINT_SEL(sel, "%5u %4s %7s"
1372 , opc_pref->class_id
1373 , band_str(opc_pref->band)
1374 , opc_bw_str(opc_pref->bw));
1375 for (i = 0; i < opc_pref->ch_num; i++) {
1376 if ((show_snon_ocp || !opc_pref->chs[i].static_non_op)
1377 && (show_no_ir || !opc_pref->chs[i].no_ir)
1378 ) {
1379 if (detail)
1380 _RTW_PRINT_SEL(sel, " %4u", opc_pref->chs[i].ch);
1381 else
1382 _RTW_PRINT_SEL(sel, " %u", opc_pref->chs[i].ch);
1383 }
1384 }
1385 _RTW_PRINT_SEL(sel, "\n");
1386
1387 if (!detail)
1388 return;
1389
1390 RTW_PRINT_SEL(sel, " ");
1391 for (i = 0; i < opc_pref->ch_num; i++) {
1392 if ((show_snon_ocp || !opc_pref->chs[i].static_non_op)
1393 && (show_no_ir || !opc_pref->chs[i].no_ir)
1394 ) {
1395 _RTW_PRINT_SEL(sel, " %c%c"
1396 , opc_pref->chs[i].no_ir ? ' ' : 'I'
1397 , opc_pref->chs[i].static_non_op ? ' ' : 'E'
1398 );
1399 }
1400 }
1401 _RTW_PRINT_SEL(sel, "\n");
1402
1403 RTW_PRINT_SEL(sel, " ");
1404 for (i = 0; i < opc_pref->ch_num; i++) {
1405 if ((show_snon_ocp || !opc_pref->chs[i].static_non_op)
1406 && (show_no_ir || !opc_pref->chs[i].no_ir)
1407 ) {
1408 if (opc_pref->chs[i].max_txpwr == UNSPECIFIED_MBM)
1409 _RTW_PRINT_SEL(sel, " ");
1410 else
1411 _RTW_PRINT_SEL(sel, " %4d", opc_pref->chs[i].max_txpwr);
1412 }
1413 }
1414 _RTW_PRINT_SEL(sel, "\n");
1415 }
1416
dump_cap_spt_op_class_ch(void * sel,struct rf_ctl_t * rfctl,bool detail)1417 void dump_cap_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail)
1418 {
1419 u8 i;
1420
1421 dump_op_class_ch_title(sel);
1422
1423 for (i = 0; i < global_op_class_num; i++) {
1424 if (!rfctl->spt_op_class_ch[i])
1425 continue;
1426 dump_opc_pref_single(sel, rfctl->spt_op_class_ch[i], 1, 1, detail);
1427 }
1428
1429 RTW_PRINT_SEL(sel, "op_class number:%d\n", rfctl->cap_spt_op_class_num);
1430 }
1431
dump_reg_spt_op_class_ch(void * sel,struct rf_ctl_t * rfctl,bool detail)1432 void dump_reg_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail)
1433 {
1434 u8 i;
1435
1436 dump_op_class_ch_title(sel);
1437
1438 for (i = 0; i < global_op_class_num; i++) {
1439 if (!rfctl->spt_op_class_ch[i])
1440 continue;
1441 dump_opc_pref_single(sel, rfctl->spt_op_class_ch[i], 0, 1, detail);
1442 }
1443
1444 RTW_PRINT_SEL(sel, "op_class number:%d\n", rfctl->reg_spt_op_class_num);
1445 }
1446
dump_cur_spt_op_class_ch(void * sel,struct rf_ctl_t * rfctl,bool detail)1447 void dump_cur_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail)
1448 {
1449 u8 i;
1450
1451 dump_op_class_ch_title(sel);
1452
1453 for (i = 0; i < global_op_class_num; i++) {
1454 if (!rfctl->spt_op_class_ch[i])
1455 continue;
1456 dump_opc_pref_single(sel, rfctl->spt_op_class_ch[i], 0, 0, detail);
1457 }
1458
1459 RTW_PRINT_SEL(sel, "op_class number:%d\n", rfctl->cur_spt_op_class_num);
1460 }
1461
1462 const u8 _rf_type_to_rf_tx_cnt[RF_TYPE_MAX] = {
1463 [RF_1T1R] = 1,
1464 [RF_1T2R] = 1,
1465 [RF_1T3R] = 1,
1466 [RF_1T4R] = 1,
1467 [RF_2T1R] = 2,
1468 [RF_2T2R] = 2,
1469 [RF_2T3R] = 2,
1470 [RF_2T4R] = 2,
1471 [RF_3T1R] = 3,
1472 [RF_3T2R] = 3,
1473 [RF_3T3R] = 3,
1474 [RF_3T4R] = 3,
1475 [RF_4T1R] = 4,
1476 [RF_4T2R] = 4,
1477 [RF_4T3R] = 4,
1478 [RF_4T4R] = 4,
1479 };
1480
1481 const u8 _rf_type_to_rf_rx_cnt[RF_TYPE_MAX] = {
1482 [RF_1T1R] = 1,
1483 [RF_1T2R] = 2,
1484 [RF_1T3R] = 3,
1485 [RF_1T4R] = 4,
1486 [RF_2T1R] = 1,
1487 [RF_2T2R] = 2,
1488 [RF_2T3R] = 3,
1489 [RF_2T4R] = 4,
1490 [RF_3T1R] = 1,
1491 [RF_3T2R] = 2,
1492 [RF_3T3R] = 3,
1493 [RF_3T4R] = 4,
1494 [RF_4T1R] = 1,
1495 [RF_4T2R] = 2,
1496 [RF_4T3R] = 3,
1497 [RF_4T4R] = 4,
1498 };
1499
1500 const char *const _rf_type_to_rfpath_str[RF_TYPE_MAX] = {
1501 [RF_1T1R] = "RF_1T1R",
1502 [RF_1T2R] = "RF_1T2R",
1503 [RF_1T3R] = "RF_1T3R",
1504 [RF_1T4R] = "RF_1T4R",
1505 [RF_2T1R] = "RF_2T1R",
1506 [RF_2T2R] = "RF_2T2R",
1507 [RF_2T3R] = "RF_2T3R",
1508 [RF_2T4R] = "RF_2T4R",
1509 [RF_3T1R] = "RF_3T1R",
1510 [RF_3T2R] = "RF_3T2R",
1511 [RF_3T3R] = "RF_3T3R",
1512 [RF_3T4R] = "RF_3T4R",
1513 [RF_4T1R] = "RF_4T1R",
1514 [RF_4T2R] = "RF_4T2R",
1515 [RF_4T3R] = "RF_4T3R",
1516 [RF_4T4R] = "RF_4T4R",
1517 };
1518
rf_type_to_default_trx_bmp(enum rf_type rf,enum bb_path * tx,enum bb_path * rx)1519 void rf_type_to_default_trx_bmp(enum rf_type rf, enum bb_path *tx, enum bb_path *rx)
1520 {
1521 u8 tx_num = rf_type_to_rf_tx_cnt(rf);
1522 u8 rx_num = rf_type_to_rf_rx_cnt(rf);
1523 int i;
1524
1525 *tx = *rx = 0;
1526
1527 for (i = 0; i < tx_num; i++)
1528 *tx |= BIT(i);
1529 for (i = 0; i < rx_num; i++)
1530 *rx |= BIT(i);
1531 }
1532
1533 static const u8 _trx_num_to_rf_type[RF_PATH_MAX][RF_PATH_MAX] = {
1534 {RF_1T1R, RF_1T2R, RF_1T3R, RF_1T4R},
1535 {RF_2T1R, RF_2T2R, RF_2T3R, RF_2T4R},
1536 {RF_3T1R, RF_3T2R, RF_3T3R, RF_3T4R},
1537 {RF_4T1R, RF_4T2R, RF_4T3R, RF_4T4R},
1538 };
1539
trx_num_to_rf_type(u8 tx_num,u8 rx_num)1540 enum rf_type trx_num_to_rf_type(u8 tx_num, u8 rx_num)
1541 {
1542 if (tx_num > 0 && tx_num <= RF_PATH_MAX && rx_num > 0 && rx_num <= RF_PATH_MAX)
1543 return _trx_num_to_rf_type[tx_num - 1][rx_num - 1];
1544 return RF_TYPE_MAX;
1545 }
1546
trx_bmp_to_rf_type(u8 tx_bmp,u8 rx_bmp)1547 enum rf_type trx_bmp_to_rf_type(u8 tx_bmp, u8 rx_bmp)
1548 {
1549 u8 tx_num = 0;
1550 u8 rx_num = 0;
1551 int i;
1552
1553 for (i = 0; i < RF_PATH_MAX; i++) {
1554 if (tx_bmp >> i & BIT0)
1555 tx_num++;
1556 if (rx_bmp >> i & BIT0)
1557 rx_num++;
1558 }
1559
1560 return trx_num_to_rf_type(tx_num, rx_num);
1561 }
1562
rf_type_is_a_in_b(enum rf_type a,enum rf_type b)1563 bool rf_type_is_a_in_b(enum rf_type a, enum rf_type b)
1564 {
1565 return rf_type_to_rf_tx_cnt(a) <= rf_type_to_rf_tx_cnt(b)
1566 && rf_type_to_rf_rx_cnt(a) <= rf_type_to_rf_rx_cnt(b);
1567 }
1568
rtw_path_bmp_limit_from_higher(u8 * bmp,u8 * bmp_bit_cnt,u8 bit_cnt_lmt)1569 static void rtw_path_bmp_limit_from_higher(u8 *bmp, u8 *bmp_bit_cnt, u8 bit_cnt_lmt)
1570 {
1571 int i;
1572
1573 for (i = RF_PATH_MAX - 1; *bmp_bit_cnt > bit_cnt_lmt && i >= 0; i--) {
1574 if (*bmp & BIT(i)) {
1575 *bmp &= ~BIT(i);
1576 (*bmp_bit_cnt)--;
1577 }
1578 }
1579 }
1580
rtw_restrict_trx_path_bmp_by_trx_num_lmt(u8 trx_path_bmp,u8 tx_num_lmt,u8 rx_num_lmt,u8 * tx_num,u8 * rx_num)1581 u8 rtw_restrict_trx_path_bmp_by_trx_num_lmt(u8 trx_path_bmp, u8 tx_num_lmt, u8 rx_num_lmt, u8 *tx_num, u8 *rx_num)
1582 {
1583 u8 bmp_tx = (trx_path_bmp & 0xF0) >> 4;
1584 u8 bmp_rx = trx_path_bmp & 0x0F;
1585 u8 bmp_tx_num = 0, bmp_rx_num = 0;
1586 enum rf_type ret_type = RF_TYPE_MAX;
1587 int i, j;
1588
1589 for (i = 0; i < RF_PATH_MAX; i++) {
1590 if (bmp_tx & BIT(i))
1591 bmp_tx_num++;
1592 if (bmp_rx & BIT(i))
1593 bmp_rx_num++;
1594 }
1595
1596 /* limit higher bit first according to input type */
1597 if (tx_num_lmt)
1598 rtw_path_bmp_limit_from_higher(&bmp_tx, &bmp_tx_num, tx_num_lmt);
1599 if (rx_num_lmt)
1600 rtw_path_bmp_limit_from_higher(&bmp_rx, &bmp_rx_num, rx_num_lmt);
1601
1602 /* search for valid rf_type (larger RX prefer) */
1603 for (j = bmp_rx_num; j > 0; j--) {
1604 for (i = bmp_tx_num; i > 0; i--) {
1605 ret_type = trx_num_to_rf_type(i, j);
1606 if (RF_TYPE_VALID(ret_type)) {
1607 rtw_path_bmp_limit_from_higher(&bmp_tx, &bmp_tx_num, i);
1608 rtw_path_bmp_limit_from_higher(&bmp_rx, &bmp_rx_num, j);
1609 if (tx_num)
1610 *tx_num = bmp_tx_num;
1611 if (rx_num)
1612 *rx_num = bmp_rx_num;
1613 goto exit;
1614 }
1615 }
1616 }
1617
1618 exit:
1619 return RF_TYPE_VALID(ret_type) ? ((bmp_tx << 4) | bmp_rx) : 0x00;
1620 }
1621
rtw_restrict_trx_path_bmp_by_rftype(u8 trx_path_bmp,enum rf_type type,u8 * tx_num,u8 * rx_num)1622 u8 rtw_restrict_trx_path_bmp_by_rftype(u8 trx_path_bmp, enum rf_type type, u8 *tx_num, u8 *rx_num)
1623 {
1624 return rtw_restrict_trx_path_bmp_by_trx_num_lmt(trx_path_bmp
1625 , rf_type_to_rf_tx_cnt(type), rf_type_to_rf_rx_cnt(type), tx_num, rx_num);
1626 }
1627
1628 /* config to non N-TX value, path with lower index prefer */
tx_path_nss_set_default(enum bb_path txpath_nss[],u8 txpath_num_nss[],u8 txpath)1629 void tx_path_nss_set_default(enum bb_path txpath_nss[], u8 txpath_num_nss[], u8 txpath)
1630 {
1631 int i, j;
1632 u8 cnt;
1633
1634 for (i = 4; i > 0; i--) {
1635 cnt = 0;
1636 txpath_nss[i - 1] = 0;
1637 for (j = 0; j < RF_PATH_MAX; j++) {
1638 if (txpath & BIT(j)) {
1639 txpath_nss[i - 1] |= BIT(j);
1640 if (++cnt == i)
1641 break;
1642 }
1643 }
1644 txpath_num_nss[i - 1] = i;
1645 }
1646 }
1647
1648 /* config to full N-TX value */
tx_path_nss_set_full_tx(enum bb_path txpath_nss[],u8 txpath_num_nss[],u8 txpath)1649 void tx_path_nss_set_full_tx(enum bb_path txpath_nss[], u8 txpath_num_nss[], u8 txpath)
1650 {
1651 u8 tx_num = 0;
1652 int i;
1653
1654 for (i = 0; i < RF_PATH_MAX; i++)
1655 if (txpath & BIT(i))
1656 tx_num++;
1657
1658 for (i = 4; i > 0; i--) {
1659 txpath_nss[i - 1] = txpath;
1660 txpath_num_nss[i - 1] = tx_num;
1661 }
1662 }
1663
1664 /*
1665 * input with txpwr value in unit of txpwr index
1666 * return string in length 6 at least (for -xx.xx)
1667 */
txpwr_idx_get_dbm_str(s8 idx,u8 txgi_max,u8 txgi_pdbm,SIZE_T cwidth,char dbm_str[],u8 dbm_str_len)1668 void txpwr_idx_get_dbm_str(s8 idx, u8 txgi_max, u8 txgi_pdbm, SIZE_T cwidth, char dbm_str[], u8 dbm_str_len)
1669 {
1670 char fmt[16];
1671
1672 if (idx == txgi_max) {
1673 snprintf(fmt, 16, "%%%zus", cwidth >= 6 ? cwidth + 1 : 6);
1674 snprintf(dbm_str, dbm_str_len, fmt, "NA");
1675 } else if (idx > -txgi_pdbm && idx < 0) { /* -0.xx */
1676 snprintf(fmt, 16, "%%%zus-0.%%02d", cwidth >= 6 ? cwidth - 4 : 1);
1677 snprintf(dbm_str, dbm_str_len, fmt, "", (rtw_abs(idx) % txgi_pdbm) * 100 / txgi_pdbm);
1678 } else if (idx % txgi_pdbm) { /* d.xx */
1679 snprintf(fmt, 16, "%%%zud.%%02d", cwidth >= 6 ? cwidth - 2 : 3);
1680 snprintf(dbm_str, dbm_str_len, fmt, idx / txgi_pdbm, (rtw_abs(idx) % txgi_pdbm) * 100 / txgi_pdbm);
1681 } else { /* d */
1682 snprintf(fmt, 16, "%%%zud", cwidth >= 6 ? cwidth + 1 : 6);
1683 snprintf(dbm_str, dbm_str_len, fmt, idx / txgi_pdbm);
1684 }
1685 }
1686
1687 /*
1688 * input with txpwr value in unit of mbm
1689 * return string in length 6 at least (for -xx.xx)
1690 */
txpwr_mbm_get_dbm_str(s16 mbm,SIZE_T cwidth,char dbm_str[],u8 dbm_str_len)1691 void txpwr_mbm_get_dbm_str(s16 mbm, SIZE_T cwidth, char dbm_str[], u8 dbm_str_len)
1692 {
1693 char fmt[16];
1694
1695 if (mbm == UNSPECIFIED_MBM) {
1696 snprintf(fmt, 16, "%%%zus", cwidth >= 6 ? cwidth + 1 : 6);
1697 snprintf(dbm_str, dbm_str_len, fmt, "NA");
1698 } else if (mbm > -MBM_PDBM && mbm < 0) { /* -0.xx */
1699 snprintf(fmt, 16, "%%%zus-0.%%02d", cwidth >= 6 ? cwidth - 4 : 1);
1700 snprintf(dbm_str, dbm_str_len, fmt, "", (rtw_abs(mbm) % MBM_PDBM) * 100 / MBM_PDBM);
1701 } else if (mbm % MBM_PDBM) { /* d.xx */
1702 snprintf(fmt, 16, "%%%zud.%%02d", cwidth >= 6 ? cwidth - 2 : 3);
1703 snprintf(dbm_str, dbm_str_len, fmt, mbm / MBM_PDBM, (rtw_abs(mbm) % MBM_PDBM) * 100 / MBM_PDBM);
1704 } else { /* d */
1705 snprintf(fmt, 16, "%%%zud", cwidth >= 6 ? cwidth + 1 : 6);
1706 snprintf(dbm_str, dbm_str_len, fmt, mbm / MBM_PDBM);
1707 }
1708 }
1709
1710 static const s16 _mb_of_ntx[] = {
1711 0, /* 1TX */
1712 301, /* 2TX */
1713 477, /* 3TX */
1714 602, /* 4TX */
1715 699, /* 5TX */
1716 778, /* 6TX */
1717 845, /* 7TX */
1718 903, /* 8TX */
1719 };
1720
1721 /* get mB(100 *dB) for specifc TX count relative to 1TX */
mb_of_ntx(u8 ntx)1722 s16 mb_of_ntx(u8 ntx)
1723 {
1724 if (ntx == 0 || ntx > 8) {
1725 RTW_ERR("ntx=%u, out of range\n", ntx);
1726 rtw_warn_on(1);
1727 }
1728
1729 return _mb_of_ntx[ntx - 1];
1730 }
1731
1732 #if CONFIG_TXPWR_LIMIT
_dump_regd_exc_list(void * sel,struct rf_ctl_t * rfctl)1733 void _dump_regd_exc_list(void *sel, struct rf_ctl_t *rfctl)
1734 {
1735 struct regd_exc_ent *ent;
1736 _list *cur, *head;
1737
1738 RTW_PRINT_SEL(sel, "regd_exc_num:%u\n", rfctl->regd_exc_num);
1739
1740 if (!rfctl->regd_exc_num)
1741 goto exit;
1742
1743 RTW_PRINT_SEL(sel, "%-7s %-6s %-8s\n", "country", "domain", "lmt_name");
1744
1745 head = &rfctl->reg_exc_list;
1746 cur = get_next(head);
1747
1748 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
1749 u8 has_country;
1750
1751 ent = LIST_CONTAINOR(cur, struct regd_exc_ent, list);
1752 cur = get_next(cur);
1753 has_country = (ent->country[0] == '\0' && ent->country[1] == '\0') ? 0 : 1;
1754
1755 RTW_PRINT_SEL(sel, " %c%c 0x%02x %s\n"
1756 , has_country ? ent->country[0] : '0'
1757 , has_country ? ent->country[1] : '0'
1758 , ent->domain
1759 , ent->lmt_name
1760 );
1761 }
1762
1763 exit:
1764 return;
1765 }
1766
dump_regd_exc_list(void * sel,struct rf_ctl_t * rfctl)1767 inline void dump_regd_exc_list(void *sel, struct rf_ctl_t *rfctl)
1768 {
1769 _irqL irqL;
1770
1771 _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1772 _dump_regd_exc_list(sel, rfctl);
1773 _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1774 }
1775
rtw_regd_exc_add_with_nlen(struct rf_ctl_t * rfctl,const char * country,u8 domain,const char * lmt_name,u32 nlen)1776 void rtw_regd_exc_add_with_nlen(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *lmt_name, u32 nlen)
1777 {
1778 struct regd_exc_ent *ent;
1779 _irqL irqL;
1780
1781 if (!lmt_name || !nlen) {
1782 rtw_warn_on(1);
1783 goto exit;
1784 }
1785
1786 ent = (struct regd_exc_ent *)rtw_zmalloc(sizeof(struct regd_exc_ent) + nlen + 1);
1787 if (!ent)
1788 goto exit;
1789
1790 _rtw_init_listhead(&ent->list);
1791 if (country)
1792 _rtw_memcpy(ent->country, country, 2);
1793 ent->domain = domain;
1794 _rtw_memcpy(ent->lmt_name, lmt_name, nlen);
1795
1796 _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1797
1798 rtw_list_insert_tail(&ent->list, &rfctl->reg_exc_list);
1799 rfctl->regd_exc_num++;
1800
1801 _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1802
1803 exit:
1804 return;
1805 }
1806
rtw_regd_exc_add(struct rf_ctl_t * rfctl,const char * country,u8 domain,const char * lmt_name)1807 inline void rtw_regd_exc_add(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *lmt_name)
1808 {
1809 rtw_regd_exc_add_with_nlen(rfctl, country, domain, lmt_name, strlen(lmt_name));
1810 }
1811
_rtw_regd_exc_search(struct rf_ctl_t * rfctl,const char * country,u8 domain)1812 struct regd_exc_ent *_rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain)
1813 {
1814 struct regd_exc_ent *ent;
1815 _list *cur, *head;
1816 u8 match = 0;
1817
1818 head = &rfctl->reg_exc_list;
1819 cur = get_next(head);
1820
1821 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
1822 u8 has_country;
1823
1824 ent = LIST_CONTAINOR(cur, struct regd_exc_ent, list);
1825 cur = get_next(cur);
1826 has_country = (ent->country[0] == '\0' && ent->country[1] == '\0') ? 0 : 1;
1827
1828 /* entry has country condition to match */
1829 if (has_country) {
1830 if (!country)
1831 continue;
1832 if (ent->country[0] != country[0]
1833 || ent->country[1] != country[1])
1834 continue;
1835 }
1836
1837 /* entry has domain condition to match */
1838 if (ent->domain != 0xFF) {
1839 if (domain == 0xFF)
1840 continue;
1841 if (ent->domain != domain)
1842 continue;
1843 }
1844
1845 match = 1;
1846 break;
1847 }
1848
1849 if (match)
1850 return ent;
1851 else
1852 return NULL;
1853 }
1854
rtw_regd_exc_search(struct rf_ctl_t * rfctl,const char * country,u8 domain)1855 inline struct regd_exc_ent *rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain)
1856 {
1857 struct regd_exc_ent *ent;
1858 _irqL irqL;
1859
1860 _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1861 ent = _rtw_regd_exc_search(rfctl, country, domain);
1862 _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1863
1864 return ent;
1865 }
1866
rtw_regd_exc_list_free(struct rf_ctl_t * rfctl)1867 void rtw_regd_exc_list_free(struct rf_ctl_t *rfctl)
1868 {
1869 struct regd_exc_ent *ent;
1870 _irqL irqL;
1871 _list *cur, *head;
1872
1873 _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1874
1875 head = &rfctl->reg_exc_list;
1876 cur = get_next(head);
1877
1878 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
1879 ent = LIST_CONTAINOR(cur, struct regd_exc_ent, list);
1880 cur = get_next(cur);
1881 rtw_list_delete(&ent->list);
1882 rtw_mfree((u8 *)ent, sizeof(struct regd_exc_ent) + strlen(ent->lmt_name) + 1);
1883 }
1884 rfctl->regd_exc_num = 0;
1885
1886 _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1887 }
1888
dump_txpwr_lmt(void * sel,_adapter * adapter)1889 void dump_txpwr_lmt(void *sel, _adapter *adapter)
1890 {
1891 #define TMP_STR_LEN 16
1892 struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
1893 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
1894 struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
1895 _irqL irqL;
1896 char fmt[16];
1897 char tmp_str[TMP_STR_LEN];
1898 s8 *lmt_idx = NULL;
1899 int bw, band, ch_num, tlrs, ntx_idx, rs, i, path;
1900 u8 ch, n, rfpath_num;
1901
1902 _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1903
1904 _dump_regd_exc_list(sel, rfctl);
1905 RTW_PRINT_SEL(sel, "\n");
1906
1907 if (!rfctl->txpwr_lmt_num)
1908 goto release_lock;
1909
1910 lmt_idx = rtw_malloc(sizeof(s8) * RF_PATH_MAX * rfctl->txpwr_lmt_num);
1911 if (!lmt_idx) {
1912 RTW_ERR("%s alloc fail\n", __func__);
1913 goto release_lock;
1914 }
1915
1916 RTW_PRINT_SEL(sel, "txpwr_lmt_2g_cck_ofdm_state:0x%02x\n", rfctl->txpwr_lmt_2g_cck_ofdm_state);
1917 #if CONFIG_IEEE80211_BAND_5GHZ
1918 if (IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) {
1919 RTW_PRINT_SEL(sel, "txpwr_lmt_5g_cck_ofdm_state:0x%02x\n", rfctl->txpwr_lmt_5g_cck_ofdm_state);
1920 RTW_PRINT_SEL(sel, "txpwr_lmt_5g_20_40_ref:0x%02x\n", rfctl->txpwr_lmt_5g_20_40_ref);
1921 }
1922 #endif
1923 RTW_PRINT_SEL(sel, "\n");
1924
1925 for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) {
1926 if (!hal_is_band_support(adapter, band))
1927 continue;
1928
1929 rfpath_num = (band == BAND_ON_2_4G ? hal_spec->rfpath_num_2g : hal_spec->rfpath_num_5g);
1930
1931 for (bw = 0; bw < MAX_5G_BANDWIDTH_NUM; bw++) {
1932
1933 if (bw >= CHANNEL_WIDTH_160)
1934 break;
1935 if (band == BAND_ON_2_4G && bw >= CHANNEL_WIDTH_80)
1936 break;
1937
1938 if (band == BAND_ON_2_4G)
1939 ch_num = CENTER_CH_2G_NUM;
1940 else
1941 ch_num = center_chs_5g_num(bw);
1942
1943 if (ch_num == 0) {
1944 rtw_warn_on(1);
1945 break;
1946 }
1947
1948 for (tlrs = TXPWR_LMT_RS_CCK; tlrs < TXPWR_LMT_RS_NUM; tlrs++) {
1949
1950 if (band == BAND_ON_2_4G && tlrs == TXPWR_LMT_RS_VHT)
1951 continue;
1952 if (band == BAND_ON_5G && tlrs == TXPWR_LMT_RS_CCK)
1953 continue;
1954 if (bw > CHANNEL_WIDTH_20 && (tlrs == TXPWR_LMT_RS_CCK || tlrs == TXPWR_LMT_RS_OFDM))
1955 continue;
1956 if (bw > CHANNEL_WIDTH_40 && tlrs == TXPWR_LMT_RS_HT)
1957 continue;
1958 if (tlrs == TXPWR_LMT_RS_VHT && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter))
1959 continue;
1960
1961 for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) {
1962 struct txpwr_lmt_ent *ent;
1963 _list *cur, *head;
1964
1965 if (ntx_idx + 1 > hal_data->max_tx_cnt)
1966 continue;
1967
1968 /* bypass CCK multi-TX is not defined */
1969 if (tlrs == TXPWR_LMT_RS_CCK && ntx_idx > RF_1TX) {
1970 if (band == BAND_ON_2_4G
1971 && !(rfctl->txpwr_lmt_2g_cck_ofdm_state & (TXPWR_LMT_HAS_CCK_1T << ntx_idx)))
1972 continue;
1973 }
1974
1975 /* bypass OFDM multi-TX is not defined */
1976 if (tlrs == TXPWR_LMT_RS_OFDM && ntx_idx > RF_1TX) {
1977 if (band == BAND_ON_2_4G
1978 && !(rfctl->txpwr_lmt_2g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx)))
1979 continue;
1980 #if CONFIG_IEEE80211_BAND_5GHZ
1981 if (band == BAND_ON_5G
1982 && !(rfctl->txpwr_lmt_5g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx)))
1983 continue;
1984 #endif
1985 }
1986
1987 /* bypass 5G 20M, 40M pure reference */
1988 #if CONFIG_IEEE80211_BAND_5GHZ
1989 if (band == BAND_ON_5G && (bw == CHANNEL_WIDTH_20 || bw == CHANNEL_WIDTH_40)) {
1990 if (rfctl->txpwr_lmt_5g_20_40_ref == TXPWR_LMT_REF_HT_FROM_VHT) {
1991 if (tlrs == TXPWR_LMT_RS_HT)
1992 continue;
1993 } else if (rfctl->txpwr_lmt_5g_20_40_ref == TXPWR_LMT_REF_VHT_FROM_HT) {
1994 if (tlrs == TXPWR_LMT_RS_VHT && bw <= CHANNEL_WIDTH_40)
1995 continue;
1996 }
1997 }
1998 #endif
1999
2000 /* choose n-SS mapping rate section to get lmt diff value */
2001 if (tlrs == TXPWR_LMT_RS_CCK)
2002 rs = CCK;
2003 else if (tlrs == TXPWR_LMT_RS_OFDM)
2004 rs = OFDM;
2005 else if (tlrs == TXPWR_LMT_RS_HT)
2006 rs = HT_1SS + ntx_idx;
2007 else if (tlrs == TXPWR_LMT_RS_VHT)
2008 rs = VHT_1SS + ntx_idx;
2009 else {
2010 RTW_ERR("%s invalid tlrs %u\n", __func__, tlrs);
2011 continue;
2012 }
2013
2014 RTW_PRINT_SEL(sel, "[%s][%s][%s][%uT]\n"
2015 , band_str(band)
2016 , ch_width_str(bw)
2017 , txpwr_lmt_rs_str(tlrs)
2018 , ntx_idx + 1
2019 );
2020
2021 /* header for limit in db */
2022 RTW_PRINT_SEL(sel, "%3s ", "ch");
2023
2024 head = &rfctl->txpwr_lmt_list;
2025 cur = get_next(head);
2026 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
2027 ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
2028 cur = get_next(cur);
2029
2030 sprintf(fmt, "%%%zus%%s ", strlen(ent->name) >= 6 ? 1 : 6 - strlen(ent->name));
2031 snprintf(tmp_str, TMP_STR_LEN, fmt
2032 , rtw_rfctl_is_current_txpwr_lmt(rfctl, ent->name) ? "*" : ""
2033 , ent->name);
2034 _RTW_PRINT_SEL(sel, "%s", tmp_str);
2035 }
2036 sprintf(fmt, "%%%zus%%s ", strlen(txpwr_lmt_str(TXPWR_LMT_WW)) >= 6 ? 1 : 6 - strlen(txpwr_lmt_str(TXPWR_LMT_WW)));
2037 snprintf(tmp_str, TMP_STR_LEN, fmt
2038 , rtw_rfctl_is_current_txpwr_lmt(rfctl, txpwr_lmt_str(TXPWR_LMT_WW)) ? "*" : ""
2039 , txpwr_lmt_str(TXPWR_LMT_WW));
2040 _RTW_PRINT_SEL(sel, "%s", tmp_str);
2041
2042 /* header for limit offset */
2043 for (path = 0; path < RF_PATH_MAX; path++) {
2044 if (path >= rfpath_num)
2045 break;
2046 _RTW_PRINT_SEL(sel, "|");
2047 head = &rfctl->txpwr_lmt_list;
2048 cur = get_next(head);
2049 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
2050 ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
2051 cur = get_next(cur);
2052 _RTW_PRINT_SEL(sel, "%3c "
2053 , rtw_rfctl_is_current_txpwr_lmt(rfctl, ent->name) ? rf_path_char(path) : ' ');
2054 }
2055 _RTW_PRINT_SEL(sel, "%3c "
2056 , rtw_rfctl_is_current_txpwr_lmt(rfctl, txpwr_lmt_str(TXPWR_LMT_WW)) ? rf_path_char(path) : ' ');
2057 }
2058 _RTW_PRINT_SEL(sel, "\n");
2059
2060 for (n = 0; n < ch_num; n++) {
2061 s8 lmt;
2062 s8 lmt_offset;
2063 u8 base;
2064
2065 if (band == BAND_ON_2_4G)
2066 ch = n + 1;
2067 else
2068 ch = center_chs_5g(bw, n);
2069
2070 if (ch == 0) {
2071 rtw_warn_on(1);
2072 break;
2073 }
2074
2075 /* dump limit in dBm */
2076 RTW_PRINT_SEL(sel, "%3u ", ch);
2077 head = &rfctl->txpwr_lmt_list;
2078 cur = get_next(head);
2079 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
2080 ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
2081 cur = get_next(cur);
2082 lmt = phy_get_txpwr_lmt(adapter, ent->name, band, bw, tlrs, ntx_idx, ch, 0);
2083 txpwr_idx_get_dbm_str(lmt, hal_spec->txgi_max, hal_spec->txgi_pdbm, strlen(ent->name), tmp_str, TMP_STR_LEN);
2084 _RTW_PRINT_SEL(sel, "%s ", tmp_str);
2085 }
2086 lmt = phy_get_txpwr_lmt(adapter, txpwr_lmt_str(TXPWR_LMT_WW), band, bw, tlrs, ntx_idx, ch, 0);
2087 txpwr_idx_get_dbm_str(lmt, hal_spec->txgi_max, hal_spec->txgi_pdbm, strlen(txpwr_lmt_str(TXPWR_LMT_WW)), tmp_str, TMP_STR_LEN);
2088 _RTW_PRINT_SEL(sel, "%s ", tmp_str);
2089
2090 /* dump limit offset of each path */
2091 for (path = RF_PATH_A; path < RF_PATH_MAX; path++) {
2092 if (path >= rfpath_num)
2093 break;
2094
2095 base = phy_get_target_txpwr(adapter, band, path, rs);
2096
2097 _RTW_PRINT_SEL(sel, "|");
2098 head = &rfctl->txpwr_lmt_list;
2099 cur = get_next(head);
2100 i = 0;
2101 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
2102 ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
2103 cur = get_next(cur);
2104 lmt_offset = phy_get_txpwr_lmt_diff(adapter, ent->name, band, bw, path, rs, tlrs, ntx_idx, ch, 0);
2105 if (lmt_offset == hal_spec->txgi_max) {
2106 *(lmt_idx + i * RF_PATH_MAX + path) = hal_spec->txgi_max;
2107 _RTW_PRINT_SEL(sel, "%3s ", "NA");
2108 } else {
2109 *(lmt_idx + i * RF_PATH_MAX + path) = lmt_offset + base;
2110 _RTW_PRINT_SEL(sel, "%3d ", lmt_offset);
2111 }
2112 i++;
2113 }
2114 lmt_offset = phy_get_txpwr_lmt_diff(adapter, txpwr_lmt_str(TXPWR_LMT_WW), band, bw, path, rs, tlrs, ntx_idx, ch, 0);
2115 if (lmt_offset == hal_spec->txgi_max)
2116 _RTW_PRINT_SEL(sel, "%3s ", "NA");
2117 else
2118 _RTW_PRINT_SEL(sel, "%3d ", lmt_offset);
2119
2120 }
2121
2122 /* compare limit_idx of each path, print 'x' when mismatch */
2123 if (rfpath_num > 1) {
2124 for (i = 0; i < rfctl->txpwr_lmt_num; i++) {
2125 for (path = 0; path < RF_PATH_MAX; path++) {
2126 if (path >= rfpath_num)
2127 break;
2128 if (*(lmt_idx + i * RF_PATH_MAX + path) != *(lmt_idx + i * RF_PATH_MAX + ((path + 1) % rfpath_num)))
2129 break;
2130 }
2131 if (path >= rfpath_num)
2132 _RTW_PRINT_SEL(sel, " ");
2133 else
2134 _RTW_PRINT_SEL(sel, "x");
2135 }
2136 }
2137 _RTW_PRINT_SEL(sel, "\n");
2138
2139 }
2140 RTW_PRINT_SEL(sel, "\n");
2141 }
2142 } /* loop for rate sections */
2143 } /* loop for bandwidths */
2144 } /* loop for bands */
2145
2146 if (lmt_idx)
2147 rtw_mfree(lmt_idx, sizeof(s8) * RF_PATH_MAX * rfctl->txpwr_lmt_num);
2148
2149 release_lock:
2150 _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
2151 }
2152
2153 /* search matcing first, if not found, alloc one */
rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t * rfctl,const char * lmt_name,u32 nlen,u8 band,u8 bw,u8 tlrs,u8 ntx_idx,u8 ch_idx,s8 lmt)2154 void rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t *rfctl, const char *lmt_name, u32 nlen
2155 , u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt)
2156 {
2157 struct hal_spec_t *hal_spec = GET_HAL_SPEC(dvobj_get_primary_adapter(rfctl_to_dvobj(rfctl)));
2158 struct txpwr_lmt_ent *ent;
2159 _irqL irqL;
2160 _list *cur, *head;
2161 s8 pre_lmt;
2162
2163 if (!lmt_name || !nlen) {
2164 rtw_warn_on(1);
2165 goto exit;
2166 }
2167
2168 _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
2169
2170 /* search for existed entry */
2171 head = &rfctl->txpwr_lmt_list;
2172 cur = get_next(head);
2173 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
2174 ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
2175 cur = get_next(cur);
2176
2177 if (strlen(ent->name) == nlen
2178 && _rtw_memcmp(ent->name, lmt_name, nlen) == _TRUE)
2179 goto chk_lmt_val;
2180 }
2181
2182 /* alloc new one */
2183 ent = (struct txpwr_lmt_ent *)rtw_zvmalloc(sizeof(struct txpwr_lmt_ent) + nlen + 1);
2184 if (!ent)
2185 goto release_lock;
2186
2187 _rtw_init_listhead(&ent->list);
2188 _rtw_memcpy(ent->name, lmt_name, nlen);
2189 {
2190 u8 j, k, l, m;
2191
2192 for (j = 0; j < MAX_2_4G_BANDWIDTH_NUM; ++j)
2193 for (k = 0; k < TXPWR_LMT_RS_NUM_2G; ++k)
2194 for (m = 0; m < CENTER_CH_2G_NUM; ++m)
2195 for (l = 0; l < MAX_TX_COUNT; ++l)
2196 ent->lmt_2g[j][k][m][l] = hal_spec->txgi_max;
2197 #if CONFIG_IEEE80211_BAND_5GHZ
2198 for (j = 0; j < MAX_5G_BANDWIDTH_NUM; ++j)
2199 for (k = 0; k < TXPWR_LMT_RS_NUM_5G; ++k)
2200 for (m = 0; m < CENTER_CH_5G_ALL_NUM; ++m)
2201 for (l = 0; l < MAX_TX_COUNT; ++l)
2202 ent->lmt_5g[j][k][m][l] = hal_spec->txgi_max;
2203 #endif
2204 }
2205
2206 rtw_list_insert_tail(&ent->list, &rfctl->txpwr_lmt_list);
2207 rfctl->txpwr_lmt_num++;
2208
2209 chk_lmt_val:
2210 if (band == BAND_ON_2_4G)
2211 pre_lmt = ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx];
2212 #if CONFIG_IEEE80211_BAND_5GHZ
2213 else if (band == BAND_ON_5G)
2214 pre_lmt = ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx];
2215 #endif
2216 else
2217 goto release_lock;
2218
2219 if (pre_lmt != hal_spec->txgi_max)
2220 RTW_PRINT("duplicate txpwr_lmt for [%s][%s][%s][%s][%uT][%d]\n"
2221 , lmt_name, band_str(band), ch_width_str(bw), txpwr_lmt_rs_str(tlrs), ntx_idx + 1
2222 , band == BAND_ON_2_4G ? ch_idx + 1 : center_ch_5g_all[ch_idx]);
2223
2224 lmt = rtw_min(pre_lmt, lmt);
2225 if (band == BAND_ON_2_4G)
2226 ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx] = lmt;
2227 #if CONFIG_IEEE80211_BAND_5GHZ
2228 else if (band == BAND_ON_5G)
2229 ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx] = lmt;
2230 #endif
2231
2232 if (0)
2233 RTW_PRINT("%s, %4s, %6s, %7s, %uT, ch%3d = %d\n"
2234 , lmt_name, band_str(band), ch_width_str(bw), txpwr_lmt_rs_str(tlrs), ntx_idx + 1
2235 , band == BAND_ON_2_4G ? ch_idx + 1 : center_ch_5g_all[ch_idx]
2236 , lmt);
2237
2238 release_lock:
2239 _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
2240
2241 exit:
2242 return;
2243 }
2244
rtw_txpwr_lmt_add(struct rf_ctl_t * rfctl,const char * lmt_name,u8 band,u8 bw,u8 tlrs,u8 ntx_idx,u8 ch_idx,s8 lmt)2245 inline void rtw_txpwr_lmt_add(struct rf_ctl_t *rfctl, const char *lmt_name
2246 , u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt)
2247 {
2248 rtw_txpwr_lmt_add_with_nlen(rfctl, lmt_name, strlen(lmt_name)
2249 , band, bw, tlrs, ntx_idx, ch_idx, lmt);
2250 }
2251
_rtw_txpwr_lmt_get_by_name(struct rf_ctl_t * rfctl,const char * lmt_name)2252 struct txpwr_lmt_ent *_rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *lmt_name)
2253 {
2254 struct txpwr_lmt_ent *ent;
2255 _list *cur, *head;
2256 u8 found = 0;
2257
2258 head = &rfctl->txpwr_lmt_list;
2259 cur = get_next(head);
2260
2261 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
2262 ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
2263 cur = get_next(cur);
2264
2265 if (strcmp(ent->name, lmt_name) == 0) {
2266 found = 1;
2267 break;
2268 }
2269 }
2270
2271 if (found)
2272 return ent;
2273 return NULL;
2274 }
2275
rtw_txpwr_lmt_get_by_name(struct rf_ctl_t * rfctl,const char * lmt_name)2276 inline struct txpwr_lmt_ent *rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *lmt_name)
2277 {
2278 struct txpwr_lmt_ent *ent;
2279 _irqL irqL;
2280
2281 _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
2282 ent = _rtw_txpwr_lmt_get_by_name(rfctl, lmt_name);
2283 _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
2284
2285 return ent;
2286 }
2287
rtw_txpwr_lmt_list_free(struct rf_ctl_t * rfctl)2288 void rtw_txpwr_lmt_list_free(struct rf_ctl_t *rfctl)
2289 {
2290 struct txpwr_lmt_ent *ent;
2291 _irqL irqL;
2292 _list *cur, *head;
2293 int band;
2294
2295 _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
2296
2297 head = &rfctl->txpwr_lmt_list;
2298 cur = get_next(head);
2299
2300 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
2301 ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
2302 cur = get_next(cur);
2303 rtw_list_delete(&ent->list);
2304 rtw_vmfree((u8 *)ent, sizeof(struct txpwr_lmt_ent) + strlen(ent->name) + 1);
2305 }
2306 rfctl->txpwr_lmt_num = 0;
2307
2308 for (band = 0; band < BAND_MAX; band++)
2309 rfctl->txpwr_lmt_name[band] = NULL;
2310
2311 _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
2312 }
2313 #endif /* CONFIG_TXPWR_LIMIT */
2314
rtw_ch_to_bb_gain_sel(int ch)2315 int rtw_ch_to_bb_gain_sel(int ch)
2316 {
2317 int sel = -1;
2318
2319 if (ch >= 1 && ch <= 14)
2320 sel = BB_GAIN_2G;
2321 #if CONFIG_IEEE80211_BAND_5GHZ
2322 else if (ch >= 36 && ch < 48)
2323 sel = BB_GAIN_5GLB1;
2324 else if (ch >= 52 && ch <= 64)
2325 sel = BB_GAIN_5GLB2;
2326 else if (ch >= 100 && ch <= 120)
2327 sel = BB_GAIN_5GMB1;
2328 else if (ch >= 124 && ch <= 144)
2329 sel = BB_GAIN_5GMB2;
2330 else if (ch >= 149 && ch <= 177)
2331 sel = BB_GAIN_5GHB;
2332 #endif
2333
2334 return sel;
2335 }
2336
rtw_rf_get_kfree_tx_gain_offset(_adapter * padapter,u8 path,u8 ch)2337 s8 rtw_rf_get_kfree_tx_gain_offset(_adapter *padapter, u8 path, u8 ch)
2338 {
2339 s8 kfree_offset = 0;
2340
2341 #ifdef CONFIG_RF_POWER_TRIM
2342 struct kfree_data_t *kfree_data = GET_KFREE_DATA(padapter);
2343 s8 bb_gain_sel = rtw_ch_to_bb_gain_sel(ch);
2344
2345 if (bb_gain_sel < BB_GAIN_2G || bb_gain_sel >= BB_GAIN_NUM) {
2346 rtw_warn_on(1);
2347 goto exit;
2348 }
2349
2350 if (kfree_data->flag & KFREE_FLAG_ON) {
2351 kfree_offset = kfree_data->bb_gain[bb_gain_sel][path];
2352 if (IS_HARDWARE_TYPE_8723D(padapter))
2353 RTW_INFO("%s path:%s, ch:%u, bb_gain_sel:%d, kfree_offset:%d\n"
2354 , __func__, (path == 0)?"S1":"S0",
2355 ch, bb_gain_sel, kfree_offset);
2356 else
2357 RTW_INFO("%s path:%u, ch:%u, bb_gain_sel:%d, kfree_offset:%d\n"
2358 , __func__, path, ch, bb_gain_sel, kfree_offset);
2359 }
2360 exit:
2361 #endif /* CONFIG_RF_POWER_TRIM */
2362 return kfree_offset;
2363 }
2364
rtw_rf_set_tx_gain_offset(_adapter * adapter,u8 path,s8 offset)2365 void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset)
2366 {
2367 #if !defined(CONFIG_RTL8814A) && !defined(CONFIG_RTL8822B) && !defined(CONFIG_RTL8821C) && !defined(CONFIG_RTL8822C) \
2368 && !defined(CONFIG_RTL8723F)
2369 u8 write_value;
2370 #endif
2371 u8 target_path = 0;
2372 u32 val32 = 0;
2373
2374 if (IS_HARDWARE_TYPE_8723D(adapter)) {
2375 target_path = RF_PATH_A; /*in 8723D case path means S0/S1*/
2376 if (path == PPG_8723D_S1)
2377 RTW_INFO("kfree gain_offset 0x55:0x%x ",
2378 rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff));
2379 else if (path == PPG_8723D_S0)
2380 RTW_INFO("kfree gain_offset 0x65:0x%x ",
2381 rtw_hal_read_rfreg(adapter, target_path, 0x65, 0xffffffff));
2382 } else {
2383 target_path = path;
2384 RTW_INFO("kfree gain_offset 0x55:0x%x ", rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff));
2385 }
2386
2387 switch (rtw_get_chip_type(adapter)) {
2388 #ifdef CONFIG_RTL8723D
2389 case RTL8723D:
2390 write_value = RF_TX_GAIN_OFFSET_8723D(offset);
2391 if (path == PPG_8723D_S1)
2392 rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value);
2393 else if (path == PPG_8723D_S0)
2394 rtw_hal_write_rfreg(adapter, target_path, 0x65, 0x0f8000, write_value);
2395 break;
2396 #endif /* CONFIG_RTL8723D */
2397 #ifdef CONFIG_RTL8703B
2398 case RTL8703B:
2399 write_value = RF_TX_GAIN_OFFSET_8703B(offset);
2400 rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value);
2401 break;
2402 #endif /* CONFIG_RTL8703B */
2403 #ifdef CONFIG_RTL8188F
2404 case RTL8188F:
2405 write_value = RF_TX_GAIN_OFFSET_8188F(offset);
2406 rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value);
2407 break;
2408 #endif /* CONFIG_RTL8188F */
2409 #ifdef CONFIG_RTL8188GTV
2410 case RTL8188GTV:
2411 write_value = RF_TX_GAIN_OFFSET_8188GTV(offset);
2412 rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value);
2413 break;
2414 #endif /* CONFIG_RTL8188GTV */
2415 #ifdef CONFIG_RTL8192E
2416 case RTL8192E:
2417 write_value = RF_TX_GAIN_OFFSET_8192E(offset);
2418 rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value);
2419 break;
2420 #endif /* CONFIG_RTL8188F */
2421
2422 #ifdef CONFIG_RTL8821A
2423 case RTL8821:
2424 write_value = RF_TX_GAIN_OFFSET_8821A(offset);
2425 rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value);
2426 break;
2427 #endif /* CONFIG_RTL8821A */
2428 #if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8822C) \
2429 || defined(CONFIG_RTL8723F)
2430 case RTL8814A:
2431 case RTL8822B:
2432 case RTL8822C:
2433 case RTL8821C:
2434 case RTL8192F:
2435 case RTL8723F:
2436 RTW_INFO("\nkfree by PhyDM on the sw CH. path %d\n", path);
2437 break;
2438 #endif /* CONFIG_RTL8814A || CONFIG_RTL8822B || CONFIG_RTL8821C || CONFIG_RTL8723F */
2439
2440 default:
2441 rtw_warn_on(1);
2442 break;
2443 }
2444
2445 if (IS_HARDWARE_TYPE_8723D(adapter)) {
2446 if (path == PPG_8723D_S1)
2447 val32 = rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff);
2448 else if (path == PPG_8723D_S0)
2449 val32 = rtw_hal_read_rfreg(adapter, target_path, 0x65, 0xffffffff);
2450 } else {
2451 val32 = rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff);
2452 }
2453 RTW_INFO(" after :0x%x\n", val32);
2454 }
2455
rtw_rf_apply_tx_gain_offset(_adapter * adapter,u8 ch)2456 void rtw_rf_apply_tx_gain_offset(_adapter *adapter, u8 ch)
2457 {
2458 struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
2459 s8 kfree_offset = 0;
2460 s8 tx_pwr_track_offset = 0; /* TODO: 8814A should consider tx pwr track when setting tx gain offset */
2461 s8 total_offset;
2462 int i, total = 0;
2463
2464 if (IS_HARDWARE_TYPE_8723D(adapter))
2465 total = 2; /* S1 and S0 */
2466 else
2467 total = hal_spec->rf_reg_path_num;
2468
2469 for (i = 0; i < total; i++) {
2470 kfree_offset = rtw_rf_get_kfree_tx_gain_offset(adapter, i, ch);
2471 total_offset = kfree_offset + tx_pwr_track_offset;
2472 rtw_rf_set_tx_gain_offset(adapter, i, total_offset);
2473 }
2474 }
2475
rtw_is_long_cac_range(u32 hi,u32 lo,u8 dfs_region)2476 bool rtw_is_long_cac_range(u32 hi, u32 lo, u8 dfs_region)
2477 {
2478 return (dfs_region == RTW_DFS_REGD_ETSI && rtw_is_range_overlap(hi, lo, 5650, 5600)) ? _TRUE : _FALSE;
2479 }
2480
rtw_is_long_cac_ch(u8 ch,u8 bw,u8 offset,u8 dfs_region)2481 bool rtw_is_long_cac_ch(u8 ch, u8 bw, u8 offset, u8 dfs_region)
2482 {
2483 u32 hi, lo;
2484
2485 if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE)
2486 return _FALSE;
2487
2488 return rtw_is_long_cac_range(hi, lo, dfs_region) ? _TRUE : _FALSE;
2489 }
2490