1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2019 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 #ifndef _RTW_XMIT_H_ 16 #define _RTW_XMIT_H_ 17 18 19 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) 20 #ifdef CONFIG_TX_AGGREGATION 21 #ifdef CONFIG_RTL8822C 22 #ifdef CONFIG_SDIO_TX_FORMAT_DUMMY_AUTO 23 #define MAX_XMITBUF_SZ (51200) 24 #else 25 #define MAX_XMITBUF_SZ (32764) 26 #endif 27 #else 28 #define MAX_XMITBUF_SZ (20480) /* 20k */ 29 #endif 30 /* #define SDIO_TX_AGG_MAX 5 */ 31 #else 32 #define MAX_XMITBUF_SZ (1664) 33 #define SDIO_TX_AGG_MAX 1 34 #endif 35 36 #if defined CONFIG_SDIO_HCI 37 #define NR_XMITBUFF (16) 38 #define SDIO_TX_DIV_NUM (2) 39 #endif 40 #if defined(CONFIG_GSPI_HCI) 41 #define NR_XMITBUFF (128) 42 #endif 43 44 #elif defined (CONFIG_USB_HCI) 45 46 #ifdef CONFIG_USB_TX_AGGREGATION 47 #if defined(CONFIG_PLATFORM_ARM_SUNxI) || defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) || defined(CONFIG_PLATFORM_ARM_SUN8I) || defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) 48 #define MAX_XMITBUF_SZ (12288) /* 12k 1536*8 */ 49 #elif defined (CONFIG_PLATFORM_MSTAR) 50 #define MAX_XMITBUF_SZ 7680 /* 7.5k */ 51 #else 52 #define MAX_XMITBUF_SZ (20480) /* 20k */ 53 #endif 54 #else 55 #define MAX_XMITBUF_SZ (2048) 56 #endif 57 58 #ifdef CONFIG_SINGLE_XMIT_BUF 59 #define NR_XMITBUFF (1) 60 #else 61 #define NR_XMITBUFF (4) 62 #endif /* CONFIG_SINGLE_XMIT_BUF */ 63 #elif defined (CONFIG_PCI_HCI) 64 #ifdef CONFIG_TX_AMSDU 65 #define MAX_XMITBUF_SZ (3500) 66 #else 67 #define MAX_XMITBUF_SZ (1664) 68 #endif 69 #ifdef CONFIG_PCI_TX_POLLING 70 #define NR_XMITBUFF (256) 71 #else 72 #define NR_XMITBUFF (128) 73 #endif 74 #endif 75 76 77 #ifdef CONFIG_PCI_HCI 78 #define XMITBUF_ALIGN_SZ 4 79 #else 80 #ifdef USB_XMITBUF_ALIGN_SZ 81 #define XMITBUF_ALIGN_SZ (USB_XMITBUF_ALIGN_SZ) 82 #else 83 #define XMITBUF_ALIGN_SZ 512 84 #endif 85 #endif 86 87 88 /* xmit extension buff defination */ 89 #define MAX_XMIT_EXTBUF_SZ (1536) 90 91 #ifdef CONFIG_SINGLE_XMIT_BUF 92 #define NR_XMIT_EXTBUFF (1) 93 #else 94 #define NR_XMIT_EXTBUFF (32) 95 #endif 96 97 #ifdef CONFIG_RTL8812A 98 #define MAX_CMDBUF_SZ (512 * 18) 99 #elif defined(CONFIG_RTL8723D) && defined(CONFIG_LPS_POFF) 100 #define MAX_CMDBUF_SZ (128*70) /*(8960)*/ 101 #elif defined(CONFIG_RTL8822C) && defined(CONFIG_WAR_OFFLOAD) 102 #define MAX_CMDBUF_SZ (128*128) /*(16k) */ 103 #else 104 #define MAX_CMDBUF_SZ (5120) /* (4096) */ 105 #endif 106 107 #define MAX_BEACON_LEN 512 108 109 #define MAX_NUMBLKS (1) 110 111 #define XMIT_VO_QUEUE (0) 112 #define XMIT_VI_QUEUE (1) 113 #define XMIT_BE_QUEUE (2) 114 #define XMIT_BK_QUEUE (3) 115 116 #define VO_QUEUE_INX 0 117 #define VI_QUEUE_INX 1 118 #define BE_QUEUE_INX 2 119 #define BK_QUEUE_INX 3 120 #define BCN_QUEUE_INX 4 121 #define MGT_QUEUE_INX 5 122 #define TXCMD_QUEUE_INX 6 123 #define HIGH_QUEUE_INX 7 124 /* keep high queue to be the last one, so we can extend HIQ to port 1, 2, ... */ 125 126 #ifndef CONFIG_PORT_BASED_HIQ 127 #define HW_QUEUE_ENTRY 8 128 #else 129 #define HI_QUEUE_INX(n) (HIGH_QUEUE_INX + (n)) 130 #define HW_QUEUE_ENTRY (8 + CONFIG_IFACE_NUMBER - 1) 131 #endif 132 133 #ifdef CONFIG_PCI_HCI 134 #ifdef CONFIG_TRX_BD_ARCH 135 #define TX_BD_NUM (128+1) /* +1 result from ring buffer */ 136 #else 137 #define TXDESC_NUM 128 138 #endif 139 #endif 140 141 #define WEP_IV(pattrib_iv, dot11txpn, keyidx)\ 142 do {\ 143 dot11txpn.val = (dot11txpn.val == 0xffffff) ? 0 : (dot11txpn.val + 1);\ 144 pattrib_iv[0] = dot11txpn._byte_.TSC0;\ 145 pattrib_iv[1] = dot11txpn._byte_.TSC1;\ 146 pattrib_iv[2] = dot11txpn._byte_.TSC2;\ 147 pattrib_iv[3] = ((keyidx & 0x3)<<6);\ 148 } while (0) 149 150 151 #define TKIP_IV(pattrib_iv, dot11txpn, keyidx)\ 152 do {\ 153 dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\ 154 pattrib_iv[0] = dot11txpn._byte_.TSC1;\ 155 pattrib_iv[1] = (dot11txpn._byte_.TSC1 | 0x20) & 0x7f;\ 156 pattrib_iv[2] = dot11txpn._byte_.TSC0;\ 157 pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\ 158 pattrib_iv[4] = dot11txpn._byte_.TSC2;\ 159 pattrib_iv[5] = dot11txpn._byte_.TSC3;\ 160 pattrib_iv[6] = dot11txpn._byte_.TSC4;\ 161 pattrib_iv[7] = dot11txpn._byte_.TSC5;\ 162 } while (0) 163 164 #define AES_IV(pattrib_iv, dot11txpn, keyidx)\ 165 do {\ 166 dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\ 167 pattrib_iv[0] = dot11txpn._byte_.TSC0;\ 168 pattrib_iv[1] = dot11txpn._byte_.TSC1;\ 169 pattrib_iv[2] = 0;\ 170 pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\ 171 pattrib_iv[4] = dot11txpn._byte_.TSC2;\ 172 pattrib_iv[5] = dot11txpn._byte_.TSC3;\ 173 pattrib_iv[6] = dot11txpn._byte_.TSC4;\ 174 pattrib_iv[7] = dot11txpn._byte_.TSC5;\ 175 } while (0) 176 177 #define GCMP_IV(a, b, c) AES_IV(a, b, c) 178 179 /* Check if AMPDU Tx is supported or not. If it is supported, 180 * it need to check "amsdu in ampdu" is supported or not. 181 * (ampdu_en, amsdu_ampdu_en) = 182 * (0, x) : AMPDU is not enable, but AMSDU is valid to send. 183 * (1, 0) : AMPDU is enable, AMSDU in AMPDU is not enable. So, AMSDU is not valid to send. 184 * (1, 1) : AMPDU and AMSDU in AMPDU are enable. So, AMSDU is valid to send. 185 */ 186 #define IS_AMSDU_AMPDU_NOT_VALID(pattrib)\ 187 ((pattrib->ampdu_en == _TRUE) && (pattrib->amsdu_ampdu_en == _FALSE)) 188 189 #define IS_AMSDU_AMPDU_VALID(pattrib)\ 190 !((pattrib->ampdu_en == _TRUE) && (pattrib->amsdu_ampdu_en == _FALSE)) 191 192 #ifdef CONFIG_RTW_MGMT_QUEUE 193 #define HWXMIT_ENTRY 5 194 #else 195 #define HWXMIT_ENTRY 4 196 #endif 197 198 /* For Buffer Descriptor ring architecture */ 199 #if defined(BUF_DESC_ARCH) || defined(CONFIG_TRX_BD_ARCH) 200 #if defined(CONFIG_RTL8192E) 201 #define TX_BUFFER_SEG_NUM 1 /* 0:2 seg, 1: 4 seg, 2: 8 seg. */ 202 #elif defined(CONFIG_RTL8814A) 203 #define TX_BUFFER_SEG_NUM 1 /* 0:2 seg, 1: 4 seg, 2: 8 seg. */ 204 #else 205 #define TX_BUFFER_SEG_NUM 1 /* 0:2 seg, 1: 4 seg, 2: 8 seg. */ 206 #endif 207 #endif 208 209 #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ||\ 210 defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8192E) ||\ 211 defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8703B) ||\ 212 defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8723D) ||\ 213 defined(CONFIG_RTL8710B) || defined(CONFIG_RTL8192F) ||\ 214 defined(CONFIG_RTL8723F) 215 #define TXDESC_SIZE 40 216 #elif defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C) 217 #define TXDESC_SIZE 48 /* HALMAC_TX_DESC_SIZE_8822B */ 218 #elif defined(CONFIG_RTL8821C) 219 #define TXDESC_SIZE 48 /* HALMAC_TX_DESC_SIZE_8821C */ 220 #elif defined(CONFIG_RTL8814B) 221 #define TXDESC_SIZE (16 + 32) 222 #else 223 #define TXDESC_SIZE 32 /* old IC (ex: 8188E) */ 224 #endif 225 226 #ifdef CONFIG_TX_EARLY_MODE 227 #define EARLY_MODE_INFO_SIZE 8 228 #endif 229 230 231 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) 232 #define TXDESC_OFFSET TXDESC_SIZE 233 #endif 234 235 #ifdef CONFIG_USB_HCI 236 #ifdef USB_PACKET_OFFSET_SZ 237 #define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ) 238 #else 239 #define PACKET_OFFSET_SZ (8) 240 #endif 241 #define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ) 242 #endif 243 244 #ifdef CONFIG_PCI_HCI 245 #if defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) || defined(CONFIG_TRX_BD_ARCH) 246 /* this section is defined for buffer descriptor ring architecture */ 247 #define TX_WIFI_INFO_SIZE (TXDESC_SIZE) /* it may add 802.11 hdr or others... */ 248 /* tx desc and payload are in the same buf */ 249 #define TXDESC_OFFSET (TX_WIFI_INFO_SIZE) 250 #else 251 /* tx desc and payload are NOT in the same buf */ 252 #define TXDESC_OFFSET (0) 253 /* 8188ee/8723be/8812ae/8821ae has extra PCI DMA info in tx desc */ 254 #define TX_DESC_NEXT_DESC_OFFSET (TXDESC_SIZE + 8) 255 #endif 256 #endif /* CONFIG_PCI_HCI */ 257 258 enum TXDESC_SC { 259 SC_DONT_CARE = 0x00, 260 SC_UPPER = 0x01, 261 SC_LOWER = 0x02, 262 SC_DUPLICATE = 0x03 263 }; 264 265 #ifdef CONFIG_PCI_HCI 266 #ifndef CONFIG_TRX_BD_ARCH /* CONFIG_TRX_BD_ARCH doesn't need this */ 267 #define TXDESC_64_BYTES 268 #endif 269 #elif defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8723B) \ 270 || defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV) || defined(CONFIG_RTL8723D) \ 271 || defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8723F) 272 #define TXDESC_40_BYTES 273 #endif 274 275 #ifdef CONFIG_TRX_BD_ARCH 276 struct tx_buf_desc { 277 #ifdef CONFIG_64BIT_DMA 278 #define TX_BUFFER_SEG_SIZE 4 /* in unit of DWORD */ 279 #else 280 #define TX_BUFFER_SEG_SIZE 2 /* in unit of DWORD */ 281 #endif 282 unsigned int dword[TX_BUFFER_SEG_SIZE * (2 << TX_BUFFER_SEG_NUM)]; 283 } __packed; 284 #elif (defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C)) && defined(CONFIG_PCI_HCI) /* 8192ee or 8814ae */ 285 /* 8192EE_TODO */ 286 struct tx_desc { 287 unsigned int txdw0; 288 unsigned int txdw1; 289 unsigned int txdw2; 290 unsigned int txdw3; 291 unsigned int txdw4; 292 unsigned int txdw5; 293 unsigned int txdw6; 294 unsigned int txdw7; 295 }; 296 #else 297 struct tx_desc { 298 unsigned int txdw0; 299 unsigned int txdw1; 300 unsigned int txdw2; 301 unsigned int txdw3; 302 unsigned int txdw4; 303 unsigned int txdw5; 304 unsigned int txdw6; 305 unsigned int txdw7; 306 307 #if defined(TXDESC_40_BYTES) || defined(TXDESC_64_BYTES) 308 unsigned int txdw8; 309 unsigned int txdw9; 310 #endif /* TXDESC_40_BYTES */ 311 312 #ifdef TXDESC_64_BYTES 313 unsigned int txdw10; 314 unsigned int txdw11; 315 316 /* 2008/05/15 MH Because PCIE HW memory R/W 4K limit. And now, our descriptor */ 317 /* size is 40 bytes. If you use more than 102 descriptor( 103*40>4096), HW will execute */ 318 /* memoryR/W CRC error. And then all DMA fetch will fail. We must decrease descriptor */ 319 /* number or enlarge descriptor size as 64 bytes. */ 320 unsigned int txdw12; 321 unsigned int txdw13; 322 unsigned int txdw14; 323 unsigned int txdw15; 324 #endif 325 }; 326 #endif 327 328 #ifndef CONFIG_TRX_BD_ARCH 329 union txdesc { 330 struct tx_desc txdesc; 331 unsigned int value[TXDESC_SIZE >> 2]; 332 }; 333 #endif 334 335 #ifdef CONFIG_PCI_HCI 336 #define PCI_MAX_TX_QUEUE_COUNT HW_QUEUE_ENTRY 337 338 struct rtw_tx_ring { 339 unsigned char qid; 340 #ifdef CONFIG_TRX_BD_ARCH 341 struct tx_buf_desc *buf_desc; 342 #else 343 struct tx_desc *desc; 344 #endif 345 dma_addr_t dma; 346 unsigned int idx; 347 unsigned int entries; 348 _queue queue; 349 u32 qlen; 350 #ifdef CONFIG_TRX_BD_ARCH 351 u16 hw_rp_cache; 352 #endif 353 }; 354 355 #ifdef DBG_TXBD_DESC_DUMP 356 357 #define TX_BAK_FRMAE_CNT 10 358 #define TX_BAK_DESC_LEN 48 /* byte */ 359 #define TX_BAK_DATA_LEN 30 /* byte */ 360 361 struct rtw_tx_desc_backup { 362 int tx_bak_rp; 363 int tx_bak_wp; 364 u8 tx_bak_desc[TX_BAK_DESC_LEN]; 365 u8 tx_bak_data_hdr[TX_BAK_DATA_LEN]; 366 u8 tx_desc_size; 367 }; 368 #endif 369 #endif 370 371 struct hw_xmit { 372 /* _lock xmit_lock; */ 373 /* _list pending; */ 374 _queue *sta_queue; 375 /* struct hw_txqueue *phwtxqueue; */ 376 /* sint txcmdcnt; */ 377 int accnt; 378 }; 379 380 struct pkt_attrib { 381 u8 type; 382 u8 subtype; 383 u8 bswenc; 384 u8 dhcp_pkt; 385 u16 ether_type; 386 u16 seqnum; 387 u8 hw_ssn_sel; /* for HW_SEQ0,1,2,3 */ 388 u16 pkt_hdrlen; /* the original 802.3 pkt header len */ 389 u16 hdrlen; /* the WLAN Header Len */ 390 u32 pktlen; /* the original 802.3 pkt raw_data len (not include ether_hdr data) */ 391 u32 last_txcmdsz; 392 u8 nr_frags; 393 u8 encrypt; /* when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith */ 394 u8 bmc_camid; 395 u8 iv_len; 396 u8 icv_len; 397 u8 iv[18]; 398 u8 icv[16]; 399 u8 priority; 400 u8 ack_policy; 401 u8 mac_id; 402 u8 vcs_mode; /* virtual carrier sense method */ 403 u8 dst[ETH_ALEN]; 404 u8 src[ETH_ALEN]; 405 u8 ta[ETH_ALEN]; 406 u8 ra[ETH_ALEN]; 407 #ifdef CONFIG_RTW_WDS 408 u8 wds; 409 #endif 410 #ifdef CONFIG_RTW_MESH 411 u8 mda[ETH_ALEN]; /* mesh da */ 412 u8 msa[ETH_ALEN]; /* mesh sa */ 413 u8 meshctrl_len; /* Length of Mesh Control field */ 414 u8 mesh_frame_mode; 415 #if CONFIG_RTW_MESH_DATA_BMC_TO_UC 416 u8 mb2u; 417 #endif 418 u8 mfwd_ttl; 419 u32 mseq; 420 #endif 421 #ifdef CONFIG_TCP_CSUM_OFFLOAD_TX 422 u8 hw_csum; 423 #endif 424 u8 key_idx; 425 u8 qos_en; 426 u8 ht_en; 427 u8 raid;/* rate adpative id */ 428 u8 bwmode; 429 u8 ch_offset;/* PRIME_CHNL_OFFSET */ 430 u8 sgi;/* short GI */ 431 u8 ampdu_en;/* tx ampdu enable */ 432 u8 ampdu_spacing; /* ampdu_min_spacing for peer sta's rx */ 433 u8 amsdu; 434 u8 amsdu_ampdu_en;/* tx amsdu in ampdu enable */ 435 u8 mdata;/* more data bit */ 436 u8 pctrl;/* per packet txdesc control enable */ 437 u8 triggered;/* for ap mode handling Power Saving sta */ 438 u8 qsel; 439 u8 order;/* order bit */ 440 u8 eosp; 441 u8 rate; 442 u8 intel_proxim; 443 u8 retry_ctrl; 444 u8 mbssid; 445 u8 ldpc; 446 u8 stbc; 447 #ifdef CONFIG_WMMPS_STA 448 u8 trigger_frame; 449 #endif /* CONFIG_WMMPS_STA */ 450 451 struct sta_info *psta; 452 453 u8 rtsen; 454 u8 cts2self; 455 union Keytype dot11tkiptxmickey; 456 /* union Keytype dot11tkiprxmickey; */ 457 union Keytype dot118021x_UncstKey; 458 459 #ifdef CONFIG_TDLS 460 u8 direct_link; 461 struct sta_info *ptdls_sta; 462 #endif /* CONFIG_TDLS */ 463 u8 key_type; 464 465 u8 icmp_pkt; 466 u8 hipriority_pkt; /* high priority packet */ 467 468 #ifdef CONFIG_BEAMFORMING 469 u16 txbf_p_aid;/*beamforming Partial_AID*/ 470 u16 txbf_g_id;/*beamforming Group ID*/ 471 472 /* 473 * 2'b00: Unicast NDPA 474 * 2'b01: Broadcast NDPA 475 * 2'b10: Beamforming Report Poll 476 * 2'b11: Final Beamforming Report Poll 477 */ 478 u8 bf_pkt_type; 479 #endif 480 481 #ifdef CONFIG_RTW_MGMT_QUEUE 482 u8 ps_dontq; /* 1: this frame can't be queued at PS state */ 483 #endif 484 }; 485 486 #ifdef CONFIG_RTW_WDS 487 #define XATTRIB_GET_WDS(xattrib) ((xattrib)->wds) 488 #else 489 #define XATTRIB_GET_WDS(xattrib) 0 490 #endif 491 492 #ifdef CONFIG_RTW_MESH 493 #define XATTRIB_GET_MCTRL_LEN(xattrib) ((xattrib)->meshctrl_len) 494 #else 495 #define XATTRIB_GET_MCTRL_LEN(xattrib) 0 496 #endif 497 498 #ifdef CONFIG_TX_AMSDU 499 enum { 500 RTW_AMSDU_TIMER_UNSET = 0, 501 RTW_AMSDU_TIMER_SETTING, 502 RTW_AMSDU_TIMER_TIMEOUT, 503 }; 504 #endif 505 506 #define WLANHDR_OFFSET 64 507 508 #define NULL_FRAMETAG (0x0) 509 #define DATA_FRAMETAG 0x01 510 #define L2_FRAMETAG 0x02 511 #define MGNT_FRAMETAG 0x03 512 #define AMSDU_FRAMETAG 0x04 513 514 #define EII_FRAMETAG 0x05 515 #define IEEE8023_FRAMETAG 0x06 516 517 #define MP_FRAMETAG 0x07 518 519 #define TXAGG_FRAMETAG 0x08 520 521 enum { 522 XMITBUF_DATA = 0, 523 XMITBUF_MGNT = 1, 524 XMITBUF_CMD = 2, 525 }; 526 527 bool rtw_xmit_ac_blocked(_adapter *adapter); 528 529 struct submit_ctx { 530 systime submit_time; /* */ 531 u32 timeout_ms; /* <0: not synchronous, 0: wait forever, >0: up to ms waiting */ 532 int status; /* status for operation */ 533 #ifdef PLATFORM_LINUX 534 struct completion done; 535 #endif 536 }; 537 538 enum { 539 RTW_SCTX_SUBMITTED = -1, 540 RTW_SCTX_DONE_SUCCESS = 0, 541 RTW_SCTX_DONE_UNKNOWN, 542 RTW_SCTX_DONE_TIMEOUT, 543 RTW_SCTX_DONE_BUF_ALLOC, 544 RTW_SCTX_DONE_BUF_FREE, 545 RTW_SCTX_DONE_WRITE_PORT_ERR, 546 RTW_SCTX_DONE_TX_DESC_NA, 547 RTW_SCTX_DONE_TX_DENY, 548 RTW_SCTX_DONE_CCX_PKT_FAIL, 549 RTW_SCTX_DONE_DRV_STOP, 550 RTW_SCTX_DONE_DEV_REMOVE, 551 RTW_SCTX_DONE_CMD_ERROR, 552 RTW_SCTX_DONE_CMD_DROP, 553 RTX_SCTX_CSTR_WAIT_RPT2, 554 }; 555 556 557 void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms); 558 int rtw_sctx_wait(struct submit_ctx *sctx, const char *msg); 559 void rtw_sctx_done_err(struct submit_ctx **sctx, int status); 560 void rtw_sctx_done(struct submit_ctx **sctx); 561 562 struct xmit_buf { 563 _list list; 564 565 _adapter *padapter; 566 567 u8 *pallocated_buf; 568 569 u8 *pbuf; 570 571 void *priv_data; 572 573 u16 buf_tag; /* 0: Normal xmitbuf, 1: extension xmitbuf, 2:cmd xmitbuf */ 574 u16 flags; 575 u32 alloc_sz; 576 577 u32 len; 578 579 struct submit_ctx *sctx; 580 581 #ifdef CONFIG_USB_HCI 582 583 /* u32 sz[8]; */ 584 u32 ff_hwaddr; 585 #ifdef RTW_HALMAC 586 u8 bulkout_id; /* for halmac */ 587 #endif /* RTW_HALMAC */ 588 589 PURB pxmit_urb[8]; 590 dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ 591 592 u8 bpending[8]; 593 594 sint last[8]; 595 596 #endif 597 598 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) 599 u8 *phead; 600 u8 *pdata; 601 u8 *ptail; 602 u8 *pend; 603 u32 ff_hwaddr; 604 u8 pg_num; 605 u8 agg_num; 606 #endif 607 608 #ifdef CONFIG_PCI_HCI 609 #ifdef CONFIG_TRX_BD_ARCH 610 /*struct tx_buf_desc *buf_desc;*/ 611 #else 612 struct tx_desc *desc; 613 #endif 614 #endif 615 616 #if defined(DBG_XMIT_BUF) || defined(DBG_XMIT_BUF_EXT) 617 u8 no; 618 #endif 619 620 }; 621 622 623 struct xmit_frame { 624 _list list; 625 626 struct pkt_attrib attrib; 627 628 u16 os_qid; 629 _pkt *pkt; 630 631 int frame_tag; 632 633 _adapter *padapter; 634 635 u8 *buf_addr; 636 637 struct xmit_buf *pxmitbuf; 638 639 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) 640 u8 pg_num; 641 u8 agg_num; 642 #endif 643 644 #ifdef CONFIG_USB_HCI 645 #ifdef CONFIG_USB_TX_AGGREGATION 646 u8 agg_num; 647 #endif 648 s8 pkt_offset; 649 #endif 650 651 #ifdef CONFIG_XMIT_ACK 652 u8 ack_report; 653 #endif 654 655 u8 *alloc_addr; /* the actual address this xmitframe allocated */ 656 u8 ext_tag; /* 0:data, 1:mgmt */ 657 658 }; 659 660 struct tx_servq { 661 _list tx_pending; 662 _queue sta_pending; 663 int qcnt; 664 }; 665 666 667 struct sta_xmit_priv { 668 _lock lock; 669 sint option; 670 sint apsd_setting; /* When bit mask is on, the associated edca queue supports APSD. */ 671 672 673 /* struct tx_servq blk_q[MAX_NUMBLKS]; */ 674 struct tx_servq be_q; /* priority == 0,3 */ 675 struct tx_servq bk_q; /* priority == 1,2 */ 676 struct tx_servq vi_q; /* priority == 4,5 */ 677 struct tx_servq vo_q; /* priority == 6,7 */ 678 #ifdef CONFIG_RTW_MGMT_QUEUE 679 struct tx_servq mgmt_q; 680 #endif 681 682 _list legacy_dz; 683 _list apsd; 684 685 u16 txseq_tid[16]; 686 687 /* uint sta_tx_bytes; */ 688 /* u64 sta_tx_pkts; */ 689 /* uint sta_tx_fail; */ 690 691 692 }; 693 694 695 struct hw_txqueue { 696 volatile sint head; 697 volatile sint tail; 698 volatile sint free_sz; /* in units of 64 bytes */ 699 volatile sint free_cmdsz; 700 volatile sint txsz[8]; 701 uint ff_hwaddr; 702 uint cmd_hwaddr; 703 sint ac_tag; 704 }; 705 706 struct agg_pkt_info { 707 u16 offset; 708 u16 pkt_len; 709 }; 710 711 enum cmdbuf_type { 712 CMDBUF_BEACON = 0x00, 713 CMDBUF_RSVD, 714 CMDBUF_MAX 715 }; 716 717 u8 rtw_get_hwseq_no(_adapter *padapter); 718 719 struct xmit_priv { 720 721 _lock lock; 722 723 _sema xmit_sema; 724 725 /* _queue blk_strms[MAX_NUMBLKS]; */ 726 _queue be_pending; 727 _queue bk_pending; 728 _queue vi_pending; 729 _queue vo_pending; 730 _queue mgmt_pending; 731 732 /* _queue legacy_dz_queue; */ 733 /* _queue apsd_queue; */ 734 735 u8 *pallocated_frame_buf; 736 u8 *pxmit_frame_buf; 737 uint free_xmitframe_cnt; 738 _queue free_xmit_queue; 739 740 /* uint mapping_addr; */ 741 /* uint pkt_sz; */ 742 743 u8 *xframe_ext_alloc_addr; 744 u8 *xframe_ext; 745 uint free_xframe_ext_cnt; 746 _queue free_xframe_ext_queue; 747 748 /* struct hw_txqueue be_txqueue; */ 749 /* struct hw_txqueue bk_txqueue; */ 750 /* struct hw_txqueue vi_txqueue; */ 751 /* struct hw_txqueue vo_txqueue; */ 752 /* struct hw_txqueue bmc_txqueue; */ 753 754 uint frag_len; 755 756 _adapter *adapter; 757 758 u8 vcs_setting; 759 u8 vcs; 760 u8 vcs_type; 761 /* u16 rts_thresh; */ 762 763 u64 tx_bytes; 764 u64 tx_pkts; 765 u64 tx_drop; 766 u64 last_tx_pkts; 767 768 struct hw_xmit *hwxmits; 769 u8 hwxmit_entry; 770 771 u8 wmm_para_seq[4];/* sequence for wmm ac parameter strength from large to small. it's value is 0->vo, 1->vi, 2->be, 3->bk. */ 772 773 #ifdef CONFIG_USB_HCI 774 _sema tx_retevt;/* all tx return event; */ 775 u8 txirp_cnt; 776 777 _tasklet xmit_tasklet; 778 779 /* per AC pending irp */ 780 int beq_cnt; 781 int bkq_cnt; 782 int viq_cnt; 783 int voq_cnt; 784 785 #endif 786 787 #ifdef CONFIG_PCI_HCI 788 /* Tx */ 789 struct rtw_tx_ring tx_ring[PCI_MAX_TX_QUEUE_COUNT]; 790 int txringcount[PCI_MAX_TX_QUEUE_COUNT]; 791 u8 beaconDMAing; /* flag of indicating beacon is transmiting to HW by DMA */ 792 _tasklet xmit_tasklet; 793 #endif 794 795 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) 796 #ifdef CONFIG_SDIO_TX_TASKLET 797 _tasklet xmit_tasklet; 798 #else 799 _thread_hdl_ SdioXmitThread; 800 _sema SdioXmitSema; 801 #ifdef SDIO_FREE_XMIT_BUF_SEMA 802 _sema sdio_free_xmitbuf_sema; 803 #endif 804 #endif /* CONFIG_SDIO_TX_TASKLET */ 805 #endif /* CONFIG_SDIO_HCI */ 806 807 _queue free_xmitbuf_queue; 808 _queue pending_xmitbuf_queue; 809 u8 *pallocated_xmitbuf; 810 u8 *pxmitbuf; 811 uint free_xmitbuf_cnt; 812 813 _queue free_xmit_extbuf_queue; 814 u8 *pallocated_xmit_extbuf; 815 u8 *pxmit_extbuf; 816 uint free_xmit_extbuf_cnt; 817 818 struct xmit_buf pcmd_xmitbuf[CMDBUF_MAX]; 819 u8 hw_ssn_seq_no;/* mapping to REG_HW_SEQ 0,1,2,3 */ 820 u16 nqos_ssn; 821 #ifdef CONFIG_TX_EARLY_MODE 822 823 #ifdef CONFIG_SDIO_HCI 824 #define MAX_AGG_PKT_NUM 20 825 #else 826 #define MAX_AGG_PKT_NUM 256 /* Max tx ampdu coounts */ 827 #endif 828 829 struct agg_pkt_info agg_pkt[MAX_AGG_PKT_NUM]; 830 #endif 831 832 #ifdef CONFIG_XMIT_ACK 833 int ack_tx; 834 _mutex ack_tx_mutex; 835 struct submit_ctx ack_tx_ops; 836 u8 seq_no; 837 #ifdef CONFIG_REMOVE_DUP_TX_STATE 838 u8 retry_count; 839 #endif 840 #endif 841 842 #ifdef CONFIG_TX_AMSDU 843 _timer amsdu_vo_timer; 844 u8 amsdu_vo_timeout; 845 846 _timer amsdu_vi_timer; 847 u8 amsdu_vi_timeout; 848 849 _timer amsdu_be_timer; 850 u8 amsdu_be_timeout; 851 852 _timer amsdu_bk_timer; 853 u8 amsdu_bk_timeout; 854 855 u32 amsdu_debug_set_timer; 856 u32 amsdu_debug_timeout; 857 u32 amsdu_debug_coalesce_one; 858 u32 amsdu_debug_coalesce_two; 859 860 #endif 861 #ifdef DBG_TXBD_DESC_DUMP 862 BOOLEAN dump_txbd_desc; 863 #endif 864 #ifdef CONFIG_PCI_TX_POLLING 865 _timer tx_poll_timer; 866 #endif 867 #ifdef CONFIG_LAYER2_ROAMING 868 _queue rpkt_queue; 869 #endif 870 _lock lock_sctx; 871 872 }; 873 874 extern struct xmit_frame *__rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv, 875 enum cmdbuf_type buf_type); 876 #define rtw_alloc_cmdxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_RSVD) 877 #if defined(CONFIG_RTL8192E) && defined(CONFIG_PCI_HCI) 878 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8192ee(struct xmit_priv *pxmitpriv, 879 enum cmdbuf_type buf_type); 880 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8192ee(p, CMDBUF_BEACON) 881 #elif defined(CONFIG_RTL8822B) && defined(CONFIG_PCI_HCI) 882 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8822be(struct xmit_priv *pxmitpriv, 883 enum cmdbuf_type buf_type); 884 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8822be(p, CMDBUF_BEACON) 885 #elif defined(CONFIG_RTL8822C) && defined(CONFIG_PCI_HCI) 886 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8822ce(struct xmit_priv *pxmitpriv, 887 enum cmdbuf_type buf_type); 888 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8822ce(p, CMDBUF_BEACON) 889 #elif defined(CONFIG_RTL8821C) && defined(CONFIG_PCI_HCI) 890 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8821ce(struct xmit_priv *pxmitpriv, 891 enum cmdbuf_type buf_type); 892 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8821ce(p, CMDBUF_BEACON) 893 #elif defined(CONFIG_RTL8192F) && defined(CONFIG_PCI_HCI) 894 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8192fe(struct xmit_priv *pxmitpriv, 895 enum cmdbuf_type buf_type); 896 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8192fe(p, CMDBUF_BEACON) 897 #elif defined(CONFIG_RTL8812A) && defined(CONFIG_PCI_HCI) 898 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8812ae(struct xmit_priv *pxmitpriv, 899 enum cmdbuf_type buf_type); 900 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8812ae(p, CMDBUF_BEACON) 901 #elif defined(CONFIG_RTL8723D) && defined(CONFIG_PCI_HCI) 902 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8723de(struct xmit_priv *pxmitpriv, 903 enum cmdbuf_type buf_type); 904 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8723de(p, CMDBUF_BEACON) 905 #elif defined(CONFIG_RTL8723B) && defined(CONFIG_PCI_HCI) 906 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8723be(struct xmit_priv *pxmitpriv, 907 enum cmdbuf_type buf_type); 908 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8723be(p, CMDBUF_BEACON) 909 #elif defined(CONFIG_RTL8814A) && defined(CONFIG_PCI_HCI) 910 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8814ae(struct xmit_priv *pxmitpriv, 911 enum cmdbuf_type buf_type); 912 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8814ae(p, CMDBUF_BEACON) 913 #elif defined(CONFIG_RTL8814B) && defined(CONFIG_PCI_HCI) 914 extern struct xmit_frame *__rtw_alloc_cmdxmitframe_8814be(struct xmit_priv *pxmitpriv, 915 enum cmdbuf_type buf_type); 916 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe_8814be(p, CMDBUF_BEACON) 917 #else 918 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_BEACON) 919 #endif 920 921 extern struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv); 922 extern s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); 923 924 extern struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv); 925 extern s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); 926 927 void rtw_count_tx_stats(_adapter *padapter, struct xmit_frame *pxmitframe, int sz); 928 extern void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len); 929 930 extern s32 rtw_make_wlanhdr(_adapter *padapter, u8 *hdr, struct pkt_attrib *pattrib); 931 extern s32 rtw_put_snap(u8 *data, u16 h_proto); 932 933 extern struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv, u16 os_qid); 934 struct xmit_frame *rtw_alloc_xmitframe_ext(struct xmit_priv *pxmitpriv); 935 struct xmit_frame *rtw_alloc_xmitframe_once(struct xmit_priv *pxmitpriv); 936 extern s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe); 937 extern void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *pframequeue); 938 struct tx_servq *rtw_get_sta_pending(_adapter *padapter, struct sta_info *psta, sint up, u8 *ac); 939 extern s32 rtw_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 940 941 #ifdef CONFIG_RTW_MGMT_QUEUE 942 void rtw_free_mgmt_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *mgmt_queue); 943 u8 rtw_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 944 struct xmit_frame *rtw_dequeue_mgmt_xframe(struct xmit_priv *pxmitpriv); 945 #endif /* CONFIG_RTW_MGMT_QUEUE */ 946 947 extern struct xmit_frame *rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit_i, sint entry); 948 949 extern s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe); 950 extern u32 rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib); 951 #define rtw_wlan_pkt_size(f) rtw_calculate_wlan_pkt_size_by_attribue(&f->attrib) 952 extern s32 rtw_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe); 953 #if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH) 954 extern s32 rtw_mgmt_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe); 955 #endif 956 #ifdef CONFIG_TDLS 957 extern struct tdls_txmgmt *ptxmgmt; 958 s32 rtw_xmit_tdls_coalesce(_adapter *padapter, struct xmit_frame *pxmitframe, struct tdls_txmgmt *ptxmgmt); 959 s32 update_tdls_attrib(_adapter *padapter, struct pkt_attrib *pattrib); 960 #endif 961 s32 _rtw_init_hw_txqueue(struct hw_txqueue *phw_txqueue, u8 ac_tag); 962 void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv); 963 964 965 s32 rtw_txframes_pending(_adapter *padapter); 966 s32 rtw_txframes_sta_ac_pending(_adapter *padapter, struct pkt_attrib *pattrib); 967 void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry); 968 969 970 s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter); 971 void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv); 972 973 974 void rtw_alloc_hwxmits(_adapter *padapter); 975 void rtw_free_hwxmits(_adapter *padapter); 976 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)) 977 s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev); 978 #endif 979 void rtw_xmit_dequeue_callback(_workitem *work); 980 void rtw_xmit_queue_set(struct sta_info *sta); 981 void rtw_xmit_queue_clear(struct sta_info *sta); 982 s32 rtw_xmit_posthandle(_adapter *padapter, struct xmit_frame *pxmitframe, _pkt *pkt); 983 s32 rtw_xmit(_adapter *padapter, _pkt **pkt, u16 os_qid); 984 bool xmitframe_hiq_filter(struct xmit_frame *xmitframe); 985 #if defined(CONFIG_AP_MODE) || defined(CONFIG_TDLS) 986 #ifdef CONFIG_RTW_MGMT_QUEUE 987 u8 mgmt_xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe); 988 #endif 989 sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe); 990 void stop_sta_xmit(_adapter *padapter, struct sta_info *psta); 991 void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta); 992 void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta); 993 #endif 994 995 u8 rtw_get_tx_bw_mode(_adapter *adapter, struct sta_info *sta); 996 997 void rtw_update_tx_rate_bmp(struct dvobj_priv *dvobj); 998 u8 rtw_get_tx_bw_bmp_of_ht_rate(struct dvobj_priv *dvobj, u8 rate, u8 max_bw); 999 u8 rtw_get_tx_bw_bmp_of_vht_rate(struct dvobj_priv *dvobj, u8 rate, u8 max_bw); 1000 s16 rtw_adapter_get_oper_txpwr_max_mbm(_adapter *adapter, bool eirp); 1001 s16 rtw_rfctl_get_oper_txpwr_max_mbm(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, u8 ifbmp_mod, u8 if_op, bool eirp); 1002 s16 rtw_get_oper_txpwr_max_mbm(struct dvobj_priv *dvobj, bool erip); 1003 s16 rtw_rfctl_get_reg_max_txpwr_mbm(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, bool eirp); 1004 1005 u8 query_ra_short_GI(struct sta_info *psta, u8 bw); 1006 1007 u8 qos_acm(u8 acm_mask, u8 priority); 1008 1009 #ifdef CONFIG_XMIT_THREAD_MODE 1010 void enqueue_pending_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); 1011 void enqueue_pending_xmitbuf_to_head(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); 1012 struct xmit_buf *dequeue_pending_xmitbuf(struct xmit_priv *pxmitpriv); 1013 struct xmit_buf *select_and_dequeue_pending_xmitbuf(_adapter *padapter); 1014 sint check_pending_xmitbuf(struct xmit_priv *pxmitpriv); 1015 thread_return rtw_xmit_thread(thread_context context); 1016 #endif 1017 1018 #ifdef CONFIG_TX_AMSDU 1019 extern void rtw_amsdu_vo_timeout_handler(void *FunctionContext); 1020 extern void rtw_amsdu_vi_timeout_handler(void *FunctionContext); 1021 extern void rtw_amsdu_be_timeout_handler(void *FunctionContext); 1022 extern void rtw_amsdu_bk_timeout_handler(void *FunctionContext); 1023 1024 extern u8 rtw_amsdu_get_timer_status(_adapter *padapter, u8 priority); 1025 extern void rtw_amsdu_set_timer_status(_adapter *padapter, u8 priority, u8 status); 1026 extern void rtw_amsdu_set_timer(_adapter *padapter, u8 priority); 1027 extern void rtw_amsdu_cancel_timer(_adapter *padapter, u8 priority); 1028 1029 extern s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitframe, struct xmit_frame *pxmitframe_queue); 1030 extern s32 check_amsdu(struct xmit_frame *pxmitframe); 1031 extern s32 check_amsdu_tx_support(_adapter *padapter); 1032 extern struct xmit_frame *rtw_get_xframe(struct xmit_priv *pxmitpriv, int *num_frame); 1033 #endif 1034 1035 #ifdef DBG_TXBD_DESC_DUMP 1036 void rtw_tx_desc_backup(_adapter *padapter, struct xmit_frame *pxmitframe, u8 desc_size, u8 hwq); 1037 void rtw_tx_desc_backup_reset(void); 1038 u8 rtw_get_tx_desc_backup(_adapter *padapter, u8 hwq, struct rtw_tx_desc_backup **pbak); 1039 #endif 1040 1041 #ifdef CONFIG_PCI_TX_POLLING 1042 void rtw_tx_poll_init(_adapter *padapter); 1043 void rtw_tx_poll_timeout_handler(void *FunctionContext); 1044 void rtw_tx_poll_timer_set(_adapter *padapter, u32 delay); 1045 void rtw_tx_poll_timer_cancel(_adapter *padapter); 1046 #endif 1047 1048 u32 rtw_get_ff_hwaddr(struct xmit_frame *pxmitframe); 1049 1050 #ifdef CONFIG_XMIT_ACK 1051 int rtw_ack_tx_wait(struct xmit_priv *pxmitpriv, u32 timeout_ms); 1052 void rtw_ack_tx_done(struct xmit_priv *pxmitpriv, int status); 1053 #endif /* CONFIG_XMIT_ACK */ 1054 1055 enum XMIT_BLOCK_REASON { 1056 XMIT_BLOCK_NONE = 0, 1057 XMIT_BLOCK_REDLMEM = BIT0, /*LPS-PG*/ 1058 XMIT_BLOCK_SUSPEND = BIT1, /*WOW*/ 1059 XMIT_BLOCK_MAX = 0xFF, 1060 }; 1061 void rtw_init_xmit_block(_adapter *padapter); 1062 void rtw_deinit_xmit_block(_adapter *padapter); 1063 1064 #ifdef DBG_XMIT_BLOCK 1065 void dump_xmit_block(void *sel, _adapter *padapter); 1066 #endif 1067 void rtw_set_xmit_block(_adapter *padapter, enum XMIT_BLOCK_REASON reason); 1068 void rtw_clr_xmit_block(_adapter *padapter, enum XMIT_BLOCK_REASON reason); 1069 bool rtw_is_xmit_blocked(_adapter *padapter); 1070 1071 /* include after declaring struct xmit_buf, in order to avoid warning */ 1072 #include <xmit_osdep.h> 1073 1074 #endif /* _RTL871X_XMIT_H_ */ 1075