1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 #define _RTL8723D_CMD_C_
16
17 #include <rtl8723d_hal.h>
18 #include "hal_com_h2c.h"
19
20 #define MAX_H2C_BOX_NUMS 4
21 #define MESSAGE_BOX_SIZE 4
22
23 #define RTL8723D_MAX_CMD_LEN 7
24 #define RTL8723D_EX_MESSAGE_BOX_SIZE 4
25
_is_fw_read_cmd_down(_adapter * padapter,u8 msgbox_num)26 static u8 _is_fw_read_cmd_down(_adapter *padapter, u8 msgbox_num)
27 {
28 u8 read_down = _FALSE;
29 int retry_cnts = 100;
30
31 u8 valid;
32
33 /* RTW_INFO(" _is_fw_read_cmd_down ,reg_1cc(%x),msg_box(%d)...\n",rtw_read8(padapter,REG_HMETFR),msgbox_num); */
34
35 do {
36 valid = rtw_read8(padapter, REG_HMETFR) & BIT(msgbox_num);
37 if (0 == valid)
38 read_down = _TRUE;
39 else
40 rtw_msleep_os(1);
41 } while ((!read_down) && (retry_cnts--));
42
43 return read_down;
44
45 }
46
47
48 /*****************************************
49 * H2C Msg format :
50 *| 31 - 8 |7-5 | 4 - 0 |
51 *| h2c_msg |Class |CMD_ID |
52 *| 31-0 |
53 *| Ext msg |
54 *
55 ******************************************/
FillH2CCmd8723D(PADAPTER padapter,u8 ElementID,u32 CmdLen,u8 * pCmdBuffer)56 s32 FillH2CCmd8723D(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer)
57 {
58 u8 h2c_box_num;
59 u8 h2c[RTL8723D_MAX_CMD_LEN + 1] = {0};
60 u32 msgbox_addr;
61 u32 msgbox_ex_addr = 0;
62 u32 h2c_cmd = 0;
63 u32 h2c_cmd_ex = 0;
64 s32 ret = _FAIL;
65 PHAL_DATA_TYPE pHalData;
66 struct dvobj_priv *psdpriv = padapter->dvobj;
67 struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
68
69
70 padapter = GET_PRIMARY_ADAPTER(padapter);
71 pHalData = GET_HAL_DATA(padapter);
72 #ifdef DBG_CHECK_FW_PS_STATE
73 #ifdef DBG_CHECK_FW_PS_STATE_H2C
74 if (rtw_fw_ps_state(padapter) == _FAIL) {
75 RTW_INFO("%s: h2c doesn't leave 32k ElementID=%02x\n", __FUNCTION__, ElementID);
76 pdbgpriv->dbg_h2c_leave32k_fail_cnt++;
77 }
78
79 /* RTW_INFO("H2C ElementID=%02x , pHalData->LastHMEBoxNum=%02x\n", ElementID, pHalData->LastHMEBoxNum); */
80 #endif /* DBG_CHECK_FW_PS_STATE_H2C */
81 #endif /* DBG_CHECK_FW_PS_STATE */
82 _enter_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL);
83
84 if (!pCmdBuffer)
85 goto exit;
86 if (CmdLen > RTL8723D_MAX_CMD_LEN)
87 goto exit;
88 if (rtw_is_surprise_removed(padapter))
89 goto exit;
90
91 h2c[0] = ElementID;
92 _rtw_memcpy(h2c + 1, pCmdBuffer, CmdLen);
93
94 /* pay attention to if race condition happened in H2C cmd setting. */
95 do {
96 h2c_box_num = pHalData->LastHMEBoxNum;
97
98 if (!_is_fw_read_cmd_down(padapter, h2c_box_num)) {
99 RTW_INFO(" fw read cmd failed...\n");
100 #ifdef DBG_CHECK_FW_PS_STATE
101 RTW_INFO("MAC_1C0=%08x, MAC_1C4=%08x, MAC_1C8=%08x, MAC_1CC=%08x\n", rtw_read32(padapter, 0x1c0), rtw_read32(padapter, 0x1c4)
102 , rtw_read32(padapter, 0x1c8), rtw_read32(padapter, 0x1cc));
103 #endif /* DBG_CHECK_FW_PS_STATE */
104 /* RTW_INFO(" 0x1c0: 0x%8x\n", rtw_read32(padapter, 0x1c0)); */
105 /* RTW_INFO(" 0x1c4: 0x%8x\n", rtw_read32(padapter, 0x1c4)); */
106 goto exit;
107 }
108
109 /* Write Ext command (byte 4~7) */
110 msgbox_ex_addr = REG_HMEBOX_EXT0_8723D + (h2c_box_num * RTL8723D_EX_MESSAGE_BOX_SIZE);
111 _rtw_memcpy((u8 *)(&h2c_cmd_ex), h2c + 4, RTL8723D_EX_MESSAGE_BOX_SIZE);
112 h2c_cmd_ex = le32_to_cpu(h2c_cmd_ex);
113 rtw_write32(padapter, msgbox_ex_addr, h2c_cmd_ex);
114 /* Write command (byte 0~3) */
115 msgbox_addr = REG_HMEBOX_0_8723D + (h2c_box_num * MESSAGE_BOX_SIZE);
116 _rtw_memcpy((u8 *)(&h2c_cmd), h2c, 4);
117 h2c_cmd = le32_to_cpu(h2c_cmd);
118 rtw_write32(padapter, msgbox_addr, h2c_cmd);
119
120 /* RTW_INFO("MSG_BOX:%d, CmdLen(%d), CmdID(0x%x), reg:0x%x =>h2c_cmd:0x%.8x, reg:0x%x =>h2c_cmd_ex:0x%.8x\n" */
121 /* ,pHalData->LastHMEBoxNum , CmdLen, ElementID, msgbox_addr, h2c_cmd, msgbox_ex_addr, h2c_cmd_ex); */
122
123 /* update last msg box number */
124 pHalData->LastHMEBoxNum = (h2c_box_num + 1) % MAX_H2C_BOX_NUMS;
125
126 } while (0);
127
128 ret = _SUCCESS;
129
130 exit:
131
132 _exit_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL);
133
134
135 return ret;
136 }
137
138 /*
139 * Description: Get the reserved page number in Tx packet buffer.
140 * Retrun value: the page number.
141 * 2012.08.09, by tynli.
142 * */
GetTxBufferRsvdPageNum8723D(_adapter * padapter,bool wowlan)143 u8 GetTxBufferRsvdPageNum8723D(_adapter *padapter, bool wowlan)
144 {
145 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
146 u8 RsvdPageNum = 0;
147 /* default reseved 1 page for the IC type which is undefined. */
148 u8 TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8723D;
149
150 rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&TxPageBndy);
151
152 RsvdPageNum = LAST_ENTRY_OF_TX_PKT_BUFFER_8723D - TxPageBndy + 1;
153
154 return RsvdPageNum;
155 }
156
rtl8723d_set_FwPwrMode_cmd(PADAPTER padapter,u8 psmode)157 void rtl8723d_set_FwPwrMode_cmd(PADAPTER padapter, u8 psmode)
158 {
159 u8 smart_ps = 0;
160 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
161 u8 u1H2CPwrModeParm[H2C_PWRMODE_LEN] = {0};
162 u8 PowerState = 0, awake_intvl = 1, rlbm = 0;
163 #ifdef CONFIG_P2P
164 struct wifidirect_info *wdinfo = &(padapter->wdinfo);
165 #endif /* CONFIG_P2P */
166 u8 allQueueUAPSD = 0;
167
168 #ifdef CONFIG_PLATFORM_INTEL_BYT
169 if (psmode == PS_MODE_DTIM)
170 psmode = PS_MODE_MAX;
171 #endif /* CONFIG_PLATFORM_INTEL_BYT */
172
173
174 if (pwrpriv->dtim > 0)
175 RTW_INFO("%s(): FW LPS mode = %d, SmartPS=%d, dtim=%d\n", __func__, psmode, pwrpriv->smart_ps, pwrpriv->dtim);
176 else
177 RTW_INFO("%s(): FW LPS mode = %d, SmartPS=%d\n", __func__, psmode, pwrpriv->smart_ps);
178
179 if (psmode == PS_MODE_MIN) {
180 rlbm = 0;
181 awake_intvl = 2;
182 smart_ps = pwrpriv->smart_ps;
183 } else if (psmode == PS_MODE_MAX) {
184 rlbm = 1;
185 awake_intvl = 2;
186 smart_ps = pwrpriv->smart_ps;
187 } else if (psmode == PS_MODE_DTIM) { /* For WOWLAN LPS, DTIM = (awake_intvl - 1) */
188 if (pwrpriv->dtim > 0 && pwrpriv->dtim < 16)
189 awake_intvl = pwrpriv->dtim + 1; /* DTIM = (awake_intvl - 1) */
190 else
191 awake_intvl = 4;/* DTIM=3 */
192
193
194 rlbm = 2;
195 smart_ps = pwrpriv->smart_ps;
196 } else {
197 rlbm = 2;
198 awake_intvl = 4;
199 smart_ps = pwrpriv->smart_ps;
200 }
201
202 #ifdef CONFIG_P2P
203 if (!rtw_p2p_chk_state(wdinfo, P2P_STATE_NONE)) {
204 awake_intvl = 2;
205 rlbm = 1;
206 }
207 #endif /* CONFIG_P2P */
208
209 if (padapter->registrypriv.wifi_spec == 1) {
210 awake_intvl = 2;
211 rlbm = 1;
212 }
213
214 if (psmode > 0) {
215 #ifdef CONFIG_BT_COEXIST
216 if (rtw_btcoex_IsBtControlLps(padapter) == _TRUE)
217 PowerState = rtw_btcoex_RpwmVal(padapter);
218 else
219 #endif /* CONFIG_BT_COEXIST */
220 PowerState = 0x00;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */
221 } else
222 PowerState = 0x0C;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */
223
224 SET_8723D_H2CCMD_PWRMODE_PARM_MODE(u1H2CPwrModeParm, (psmode > 0) ? 1 : 0);
225 SET_8723D_H2CCMD_PWRMODE_PARM_SMART_PS(u1H2CPwrModeParm, smart_ps);
226 SET_8723D_H2CCMD_PWRMODE_PARM_RLBM(u1H2CPwrModeParm, rlbm);
227 SET_8723D_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(u1H2CPwrModeParm, awake_intvl);
228 SET_8723D_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(u1H2CPwrModeParm, allQueueUAPSD);
229 SET_8723D_H2CCMD_PWRMODE_PARM_PWR_STATE(u1H2CPwrModeParm, PowerState);
230
231 #ifdef CONFIG_BT_COEXIST
232 rtw_btcoex_RecordPwrMode(padapter, u1H2CPwrModeParm, H2C_PWRMODE_LEN);
233 #endif /* CONFIG_BT_COEXIST */
234
235 RTW_DBG_DUMP("u1H2CPwrModeParm:",
236 u1H2CPwrModeParm, H2C_PWRMODE_LEN);
237
238 FillH2CCmd8723D(padapter, H2C_8723D_SET_PWR_MODE, H2C_PWRMODE_LEN, u1H2CPwrModeParm);
239 }
240
rtl8723d_set_FwPsTuneParam_cmd(PADAPTER padapter)241 void rtl8723d_set_FwPsTuneParam_cmd(PADAPTER padapter)
242 {
243 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
244 u8 u1H2CPsTuneParm[H2C_PSTUNEPARAM_LEN] = {0};
245 u8 bcn_to_limit = 10; /* 10 * 100 * awakeinterval (ms) */
246 u8 dtim_timeout = 5; /* ms //wait broadcast data timer */
247 u8 ps_timeout = 20; /* ms //Keep awake when tx */
248 u8 dtim_period = 3;
249
250 /* RTW_INFO("%s(): FW LPS mode = %d\n", __func__, psmode); */
251
252 SET_8723D_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(u1H2CPsTuneParm, bcn_to_limit);
253 SET_8723D_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(u1H2CPsTuneParm, dtim_timeout);
254 SET_8723D_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(u1H2CPsTuneParm, ps_timeout);
255 SET_8723D_H2CCMD_PSTUNE_PARM_ADOPT(u1H2CPsTuneParm, 1);
256 SET_8723D_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(u1H2CPsTuneParm, dtim_period);
257
258 RTW_DBG_DUMP("u1H2CPsTuneParm:",
259 u1H2CPsTuneParm, H2C_PSTUNEPARAM_LEN);
260
261 FillH2CCmd8723D(padapter, H2C_8723D_PS_TUNING_PARA, H2C_PSTUNEPARAM_LEN, u1H2CPsTuneParm);
262 }
263
rtl8723d_download_rsvd_page(PADAPTER padapter,u8 mstatus)264 void rtl8723d_download_rsvd_page(PADAPTER padapter, u8 mstatus)
265 {
266 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
267 struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
268 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
269 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
270 BOOLEAN bcn_valid = _FALSE;
271 u8 DLBcnCount = 0;
272 u32 poll = 0;
273 u8 RegFwHwTxQCtrl;
274
275
276 RTW_INFO("+" FUNC_ADPT_FMT ": hw_port=%d mstatus(%x)\n",
277 FUNC_ADPT_ARG(padapter), get_hw_port(padapter), mstatus);
278
279 if (mstatus == RT_MEDIA_CONNECT) {
280 u8 bcn_ctrl = rtw_read8(padapter, REG_BCN_CTRL);
281 BOOLEAN bRecover = _FALSE;
282 u8 v8;
283
284 /* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */
285 /* Suggested by filen. Added by tynli. */
286 rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000 | pmlmeinfo->aid));
287
288 /* set REG_CR bit 8 */
289 v8 = rtw_read8(padapter, REG_CR + 1);
290 v8 |= BIT(0); /* ENSWBCN */
291 rtw_write8(padapter, REG_CR + 1, v8);
292
293 /* Disable Hw protection for a time which revserd for Hw sending beacon. */
294 /* Fix download reserved page packet fail that access collision with the protection time. */
295 /* 2010.05.11. Added by tynli. */
296 rtw_write8(padapter, REG_BCN_CTRL, (bcn_ctrl & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT);
297
298 /* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */
299 RegFwHwTxQCtrl = rtw_read8(padapter, REG_FWHW_TXQ_CTRL + 2);
300 if (RegFwHwTxQCtrl & BIT(6))
301 bRecover = _TRUE;
302
303 /* To tell Hw the packet is not a real beacon frame. */
304 RegFwHwTxQCtrl &= ~BIT(6);
305 rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, RegFwHwTxQCtrl);
306
307 /* Clear beacon valid check bit. */
308 rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
309 rtw_hal_set_hwreg(padapter, HW_VAR_DL_BCN_SEL, NULL);
310
311 DLBcnCount = 0;
312 poll = 0;
313 do {
314 /* download rsvd page. */
315 rtw_hal_set_fw_rsvd_page(padapter, _FALSE);
316 DLBcnCount++;
317 do {
318 rtw_yield_os();
319 /* rtw_mdelay_os(10); */
320 /* check rsvd page download OK. */
321 rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid));
322 poll++;
323 } while (!bcn_valid && (poll % 10) != 0 && !RTW_CANNOT_RUN(padapter));
324
325 } while (!bcn_valid && DLBcnCount <= 100 && !RTW_CANNOT_RUN(padapter));
326
327 if (RTW_CANNOT_RUN(padapter))
328 ;
329 else if (!bcn_valid)
330 RTW_ERR(ADPT_FMT": 1 DL RSVD page failed! DLBcnCount:%u, poll:%u\n",
331 ADPT_ARG(padapter) , DLBcnCount, poll);
332 else {
333 struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
334
335 pwrctl->fw_psmode_iface_id = padapter->iface_id;
336 rtw_hal_set_fw_rsvd_page(padapter, _TRUE);
337 RTW_INFO(ADPT_FMT": 1 DL RSVD page success! DLBcnCount:%u, poll:%u\n",
338 ADPT_ARG(padapter), DLBcnCount, poll);
339 }
340
341 /* restore bcn_ctrl */
342 rtw_write8(padapter, REG_BCN_CTRL, bcn_ctrl);
343
344 /* To make sure that if there exists an adapter which would like to send beacon. */
345 /* If exists, the origianl value of 0x422[6] will be 1, we should check this to */
346 /* prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */
347 /* the beacon cannot be sent by HW. */
348 /* 2010.06.23. Added by tynli. */
349 if (bRecover) {
350 RegFwHwTxQCtrl |= BIT(6);
351 rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, RegFwHwTxQCtrl);
352 }
353
354 /* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */
355 #ifndef CONFIG_PCI_HCI
356 v8 = rtw_read8(padapter, REG_CR + 1);
357 v8 &= ~BIT(0); /* ~ENSWBCN */
358 rtw_write8(padapter, REG_CR + 1, v8);
359 #endif
360 }
361
362 }
363
rtl8723d_set_FwJoinBssRpt_cmd(PADAPTER padapter,u8 mstatus)364 void rtl8723d_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus)
365 {
366 if (mstatus == 1)
367 rtl8723d_download_rsvd_page(padapter, RT_MEDIA_CONNECT);
368 }
369
370 #ifdef CONFIG_BT_COEXIST
rtl8723d_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter)371 void rtl8723d_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter)
372 {
373 rtl8723d_download_rsvd_page(padapter, RT_MEDIA_CONNECT);
374 }
375 #endif /* CONFIG_BT_COEXIST */
376
377 #ifdef CONFIG_P2P
rtl8723d_set_p2p_ps_offload_cmd(_adapter * padapter,u8 p2p_ps_state)378 void rtl8723d_set_p2p_ps_offload_cmd(_adapter *padapter, u8 p2p_ps_state)
379 {
380 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
381 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
382 struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
383 struct P2P_PS_Offload_t *p2p_ps_offload = (struct P2P_PS_Offload_t *)(&pHalData->p2p_ps_offload);
384 u8 i;
385
386
387 #if 1
388 switch (p2p_ps_state) {
389 case P2P_PS_DISABLE:
390 RTW_INFO("P2P_PS_DISABLE\n");
391 _rtw_memset(p2p_ps_offload, 0 , 1);
392 break;
393 case P2P_PS_ENABLE:
394 RTW_INFO("P2P_PS_ENABLE\n");
395 /* update CTWindow value. */
396 if (pwdinfo->ctwindow > 0) {
397 p2p_ps_offload->CTWindow_En = 1;
398 rtw_write8(padapter, REG_P2P_CTWIN, pwdinfo->ctwindow);
399 }
400
401 /* hw only support 2 set of NoA */
402 for (i = 0 ; i < pwdinfo->noa_num ; i++) {
403 /* To control the register setting for which NOA */
404 rtw_write8(padapter, REG_NOA_DESC_SEL, (i << 4));
405 if (i == 0)
406 p2p_ps_offload->NoA0_En = 1;
407 else
408 p2p_ps_offload->NoA1_En = 1;
409
410 /* config P2P NoA Descriptor Register */
411 /* RTW_INFO("%s(): noa_duration = %x\n",__FUNCTION__,pwdinfo->noa_duration[i]); */
412 rtw_write32(padapter, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]);
413
414 /* RTW_INFO("%s(): noa_interval = %x\n",__FUNCTION__,pwdinfo->noa_interval[i]); */
415 rtw_write32(padapter, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]);
416
417 /* RTW_INFO("%s(): start_time = %x\n",__FUNCTION__,pwdinfo->noa_start_time[i]); */
418 rtw_write32(padapter, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]);
419
420 /* RTW_INFO("%s(): noa_count = %x\n",__FUNCTION__,pwdinfo->noa_count[i]); */
421 rtw_write8(padapter, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]);
422 }
423
424 if ((pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0)) {
425 /* rst p2p circuit */
426 rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4));
427
428 p2p_ps_offload->Offload_En = 1;
429
430 if (pwdinfo->role == P2P_ROLE_GO) {
431 p2p_ps_offload->role = 1;
432 p2p_ps_offload->AllStaSleep = 0;
433 } else
434 p2p_ps_offload->role = 0;
435
436 p2p_ps_offload->discovery = 0;
437 }
438 break;
439 case P2P_PS_SCAN:
440 RTW_INFO("P2P_PS_SCAN\n");
441 p2p_ps_offload->discovery = 1;
442 break;
443 case P2P_PS_SCAN_DONE:
444 RTW_INFO("P2P_PS_SCAN_DONE\n");
445 p2p_ps_offload->discovery = 0;
446 pwdinfo->p2p_ps_state = P2P_PS_ENABLE;
447 break;
448 default:
449 break;
450 }
451
452 FillH2CCmd8723D(padapter, H2C_8723D_P2P_PS_OFFLOAD, 1, (u8 *)p2p_ps_offload);
453 #endif
454
455
456 }
457 #endif /* CONFIG_P2P */
458
459