1 /****************************************************************************** 2 * 3 * Copyright(c) Semiconductor - 2017 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 16 17 #include "Hal8723DPwrSeq.h" 18 19 20 /* 21 drivers should parse below arrays and do the corresponding actions 22 */ 23 /* 3 Power on Array */ 24 WLAN_PWR_CFG rtl8723D_power_on_flow[RTL8723D_TRANS_CARDEMU_TO_ACT_STEPS + RTL8723D_TRANS_END_STEPS] = { 25 RTL8723D_TRANS_CARDEMU_TO_ACT 26 RTL8723D_TRANS_END 27 }; 28 29 /* 3Radio off GPIO Array */ 30 WLAN_PWR_CFG rtl8723D_radio_off_flow[RTL8723D_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723D_TRANS_END_STEPS] = { 31 RTL8723D_TRANS_ACT_TO_CARDEMU 32 RTL8723D_TRANS_END 33 }; 34 35 /* 3Card Disable Array */ 36 WLAN_PWR_CFG rtl8723D_card_disable_flow[RTL8723D_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723D_TRANS_CARDEMU_TO_CARDDIS_STEPS + RTL8723D_TRANS_END_STEPS] = { 37 RTL8723D_TRANS_ACT_TO_CARDEMU 38 RTL8723D_TRANS_CARDEMU_TO_CARDDIS 39 RTL8723D_TRANS_END 40 }; 41 42 /* 3 Card Enable Array */ 43 WLAN_PWR_CFG rtl8723D_card_enable_flow[RTL8723D_TRANS_CARDDIS_TO_CARDEMU_STEPS + RTL8723D_TRANS_CARDEMU_TO_ACT_STEPS + RTL8723D_TRANS_END_STEPS] = { 44 RTL8723D_TRANS_CARDDIS_TO_CARDEMU 45 RTL8723D_TRANS_CARDEMU_TO_ACT 46 RTL8723D_TRANS_END 47 }; 48 49 /* 3Suspend Array */ 50 WLAN_PWR_CFG rtl8723D_suspend_flow[RTL8723D_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723D_TRANS_CARDEMU_TO_SUS_STEPS + RTL8723D_TRANS_END_STEPS] = { 51 RTL8723D_TRANS_ACT_TO_CARDEMU 52 RTL8723D_TRANS_CARDEMU_TO_SUS 53 RTL8723D_TRANS_END 54 }; 55 56 /* 3 Resume Array */ 57 WLAN_PWR_CFG rtl8723D_resume_flow[RTL8723D_TRANS_SUS_TO_CARDEMU_STEPS + RTL8723D_TRANS_CARDEMU_TO_ACT_STEPS + RTL8723D_TRANS_END_STEPS] = { 58 RTL8723D_TRANS_SUS_TO_CARDEMU 59 RTL8723D_TRANS_CARDEMU_TO_ACT 60 RTL8723D_TRANS_END 61 }; 62 63 64 65 /* 3HWPDN Array */ 66 WLAN_PWR_CFG rtl8723D_hwpdn_flow[RTL8723D_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723D_TRANS_CARDEMU_TO_PDN_STEPS + RTL8723D_TRANS_END_STEPS] = { 67 RTL8723D_TRANS_ACT_TO_CARDEMU 68 RTL8723D_TRANS_CARDEMU_TO_PDN 69 RTL8723D_TRANS_END 70 }; 71 72 /* 3 Enter LPS */ 73 WLAN_PWR_CFG rtl8723D_enter_lps_flow[RTL8723D_TRANS_ACT_TO_LPS_STEPS + RTL8723D_TRANS_END_STEPS] = { 74 /* FW behavior */ 75 RTL8723D_TRANS_ACT_TO_LPS 76 RTL8723D_TRANS_END 77 }; 78 79 /* 3 Leave LPS */ 80 WLAN_PWR_CFG rtl8723D_leave_lps_flow[RTL8723D_TRANS_LPS_TO_ACT_STEPS + RTL8723D_TRANS_END_STEPS] = { 81 /* FW behavior */ 82 RTL8723D_TRANS_LPS_TO_ACT 83 RTL8723D_TRANS_END 84 }; 85