1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26 /*@************************************************************
27 * include files
28 ************************************************************/
29
30 #include "mp_precomp.h"
31 #include "phydm_precomp.h"
32
33 #define READ_AND_CONFIG_MP(ic, txt) (odm_read_and_config_mp_##ic##txt(dm))
34 #define READ_AND_CONFIG_TC(ic, txt) (odm_read_and_config_tc_##ic##txt(dm))
35
36 #if (PHYDM_TESTCHIP_SUPPORT == 1)
37 #define READ_AND_CONFIG(ic, txt) \
38 do { \
39 if (dm->is_mp_chip) \
40 READ_AND_CONFIG_MP(ic, txt); \
41 else \
42 READ_AND_CONFIG_TC(ic, txt); \
43 } while (0)
44 #else
45 #define READ_AND_CONFIG READ_AND_CONFIG_MP
46 #endif
47
48 #define GET_VERSION_MP(ic, txt) (odm_get_version_mp_##ic##txt())
49 #define GET_VERSION_TC(ic, txt) (odm_get_version_tc_##ic##txt())
50
51 #if (PHYDM_TESTCHIP_SUPPORT == 1)
52 #define GET_VERSION(ic, txt) (dm->is_mp_chip ? GET_VERSION_MP(ic, txt) : GET_VERSION_TC(ic, txt))
53 #else
54 #define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt)
55 #endif
56
57 enum hal_status
odm_config_rf_with_header_file(struct dm_struct * dm,enum odm_rf_config_type config_type,u8 e_rf_path)58 odm_config_rf_with_header_file(struct dm_struct *dm,
59 enum odm_rf_config_type config_type,
60 u8 e_rf_path)
61 {
62 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
63 void *adapter = dm->adapter;
64 PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo;
65 #endif
66 enum hal_status result = HAL_STATUS_SUCCESS;
67
68 PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__,
69 (dm->is_mp_chip) ? "MPChip" : "TestChip");
70 PHYDM_DBG(dm, ODM_COMP_INIT,
71 "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
72 dm->support_platform, dm->support_interface, dm->board_type);
73
74 /* @1 AP doesn't use PHYDM power tracking table in these ICs */
75 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
76 #if (RTL8812A_SUPPORT == 1)
77 if (dm->support_ic_type == ODM_RTL8812) {
78 if (config_type == CONFIG_RF_RADIO) {
79 if (e_rf_path == RF_PATH_A)
80 READ_AND_CONFIG_MP(8812a, _radioa);
81 else if (e_rf_path == RF_PATH_B)
82 READ_AND_CONFIG_MP(8812a, _radiob);
83 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
84 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE)
85 HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter));
86 if ((hal_data->EEPROMSVID == 0x17AA && hal_data->EEPROMSMID == 0xA811) ||
87 (hal_data->EEPROMSVID == 0x10EC && hal_data->EEPROMSMID == 0xA812) ||
88 (hal_data->EEPROMSVID == 0x10EC && hal_data->EEPROMSMID == 0x8812))
89 READ_AND_CONFIG_MP(8812a, _txpwr_lmt_hm812a03);
90 else
91 #endif
92 READ_AND_CONFIG_MP(8812a, _txpwr_lmt);
93 }
94 }
95 #endif
96 #if (RTL8821A_SUPPORT == 1)
97 if (dm->support_ic_type == ODM_RTL8821) {
98 if (config_type == CONFIG_RF_RADIO) {
99 if (e_rf_path == RF_PATH_A)
100 READ_AND_CONFIG_MP(8821a, _radioa);
101 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
102 if (dm->support_interface == ODM_ITRF_USB) {
103 if (dm->ext_pa_5g || dm->ext_lna_5g)
104 READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8811a_u_fem);
105 else
106 READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8811a_u_ipa);
107 } else {
108 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
109 if (mgnt_info->CustomerID == RT_CID_8821AE_ASUS_MB)
110 READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a_sar_8mm);
111 else if (mgnt_info->CustomerID == RT_CID_ASUS_NB)
112 READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a_sar_5mm);
113 else
114 #endif
115 READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a);
116 }
117 }
118 }
119 #endif
120 #if (RTL8192E_SUPPORT == 1)
121 if (dm->support_ic_type == ODM_RTL8192E) {
122 if (config_type == CONFIG_RF_RADIO) {
123 if (e_rf_path == RF_PATH_A)
124 READ_AND_CONFIG_MP(8192e, _radioa);
125 else if (e_rf_path == RF_PATH_B)
126 READ_AND_CONFIG_MP(8192e, _radiob);
127 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
128 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) /*Refine by Vincent Lan for 5mm SAR pwr limit*/
129 HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter));
130
131 if ((hal_data->EEPROMSVID == 0x11AD && hal_data->EEPROMSMID == 0x8192) ||
132 (hal_data->EEPROMSVID == 0x11AD && hal_data->EEPROMSMID == 0x8193))
133 READ_AND_CONFIG_MP(8192e, _txpwr_lmt_8192e_sar_5mm);
134 else
135 #endif
136 READ_AND_CONFIG_MP(8192e, _txpwr_lmt);
137 }
138 }
139 #endif
140 #if (RTL8723D_SUPPORT == 1)
141 if (dm->support_ic_type == ODM_RTL8723D) {
142 if (config_type == CONFIG_RF_RADIO) {
143 if (e_rf_path == RF_PATH_A)
144 READ_AND_CONFIG_MP(8723d, _radioa);
145 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
146 READ_AND_CONFIG_MP(8723d, _txpwr_lmt);
147 }
148 }
149 #endif
150 /* @JJ ADD 20161014 */
151 #if (RTL8710B_SUPPORT == 1)
152 if (dm->support_ic_type == ODM_RTL8710B) {
153 if (config_type == CONFIG_RF_RADIO) {
154 if (e_rf_path == RF_PATH_A)
155 READ_AND_CONFIG_MP(8710b, _radioa);
156 } else if (config_type == CONFIG_RF_TXPWR_LMT)
157 READ_AND_CONFIG_MP(8710b, _txpwr_lmt);
158 }
159 #endif
160
161 #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
162 /* @1 All platforms support */
163 #if (RTL8188E_SUPPORT == 1)
164 if (dm->support_ic_type == ODM_RTL8188E) {
165 if (config_type == CONFIG_RF_RADIO) {
166 if (e_rf_path == RF_PATH_A)
167 READ_AND_CONFIG_MP(8188e, _radioa);
168 } else if (config_type == CONFIG_RF_TXPWR_LMT)
169 READ_AND_CONFIG_MP(8188e, _txpwr_lmt);
170 }
171 #endif
172 #if (RTL8723B_SUPPORT == 1)
173 if (dm->support_ic_type == ODM_RTL8723B) {
174 if (config_type == CONFIG_RF_RADIO)
175 READ_AND_CONFIG_MP(8723b, _radioa);
176 else if (config_type == CONFIG_RF_TXPWR_LMT)
177 READ_AND_CONFIG_MP(8723b, _txpwr_lmt);
178 }
179 #endif
180 #if (RTL8814A_SUPPORT == 1)
181 if (dm->support_ic_type == ODM_RTL8814A) {
182 if (config_type == CONFIG_RF_RADIO) {
183 if (e_rf_path == RF_PATH_A)
184 READ_AND_CONFIG_MP(8814a, _radioa);
185 else if (e_rf_path == RF_PATH_B)
186 READ_AND_CONFIG_MP(8814a, _radiob);
187 else if (e_rf_path == RF_PATH_C)
188 READ_AND_CONFIG_MP(8814a, _radioc);
189 else if (e_rf_path == RF_PATH_D)
190 READ_AND_CONFIG_MP(8814a, _radiod);
191 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
192 if (dm->rfe_type == 0)
193 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type0);
194 else if (dm->rfe_type == 1)
195 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type1);
196 else if (dm->rfe_type == 2)
197 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type2);
198 else if (dm->rfe_type == 3)
199 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type3);
200 else if (dm->rfe_type == 5)
201 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type5);
202 else if (dm->rfe_type == 7)
203 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type7);
204 else if (dm->rfe_type == 8)
205 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type8);
206 else
207 READ_AND_CONFIG_MP(8814a, _txpwr_lmt);
208 }
209 }
210 #endif
211 #if (RTL8703B_SUPPORT == 1)
212 if (dm->support_ic_type == ODM_RTL8703B) {
213 if (config_type == CONFIG_RF_RADIO) {
214 if (e_rf_path == RF_PATH_A)
215 READ_AND_CONFIG_MP(8703b, _radioa);
216 }
217 }
218 #endif
219 #if (RTL8188F_SUPPORT == 1)
220 if (dm->support_ic_type == ODM_RTL8188F) {
221 if (config_type == CONFIG_RF_RADIO) {
222 if (e_rf_path == RF_PATH_A)
223 READ_AND_CONFIG_MP(8188f, _radioa);
224 } else if (config_type == CONFIG_RF_TXPWR_LMT)
225 READ_AND_CONFIG_MP(8188f, _txpwr_lmt);
226 }
227 #endif
228 #if (RTL8822B_SUPPORT == 1)
229 if (dm->support_ic_type == ODM_RTL8822B) {
230 if (config_type == CONFIG_RF_RADIO) {
231 if (e_rf_path == RF_PATH_A)
232 READ_AND_CONFIG_MP(8822b, _radioa);
233 else if (e_rf_path == RF_PATH_B)
234 READ_AND_CONFIG_MP(8822b, _radiob);
235 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
236 if (dm->rfe_type == 5)
237 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type5);
238 else if (dm->rfe_type == 2)
239 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type2);
240 else if (dm->rfe_type == 3)
241 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type3);
242 else if (dm->rfe_type == 4)
243 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type4);
244 else if (dm->rfe_type == 12)
245 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type12);
246 else if (dm->rfe_type == 15)
247 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type15);
248 else if (dm->rfe_type == 16)
249 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type16);
250 else if (dm->rfe_type == 17)
251 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type17);
252 else if (dm->rfe_type == 18)
253 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type18);
254 //else if (dm->rfe_type == 19)
255 //READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type19);
256 else
257 READ_AND_CONFIG_MP(8822b, _txpwr_lmt);
258 }
259 }
260 #endif
261
262 #if (RTL8197F_SUPPORT == 1)
263 if (dm->support_ic_type == ODM_RTL8197F) {
264 if (config_type == CONFIG_RF_RADIO) {
265 if (e_rf_path == RF_PATH_A)
266 READ_AND_CONFIG_MP(8197f, _radioa);
267 else if (e_rf_path == RF_PATH_B)
268 READ_AND_CONFIG_MP(8197f, _radiob);
269 }
270 }
271 #endif
272 /*@jj add 20170822*/
273 #if (RTL8192F_SUPPORT == 1)
274 if (dm->support_ic_type == ODM_RTL8192F) {
275 if (config_type == CONFIG_RF_RADIO) {
276 if (e_rf_path == RF_PATH_A)
277 READ_AND_CONFIG_MP(8192f, _radioa);
278 else if (e_rf_path == RF_PATH_B)
279 READ_AND_CONFIG_MP(8192f, _radiob);
280 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
281 if (dm->rfe_type == 0)
282 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type0);
283 else if (dm->rfe_type == 1)
284 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type1);
285 else if (dm->rfe_type == 2)
286 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type2);
287 else if (dm->rfe_type == 3)
288 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type3);
289 else if (dm->rfe_type == 4)
290 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type4);
291 else if (dm->rfe_type == 5)
292 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type5);
293 else if (dm->rfe_type == 6)
294 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type6);
295 else if (dm->rfe_type == 7)
296 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type7);
297 else if (dm->rfe_type == 8)
298 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type8);
299 else if (dm->rfe_type == 9)
300 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type9);
301 else if (dm->rfe_type == 10)
302 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type10);
303 else if (dm->rfe_type == 11)
304 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type11);
305 else if (dm->rfe_type == 12)
306 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type12);
307 else if (dm->rfe_type == 13)
308 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type13);
309 else if (dm->rfe_type == 14)
310 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type14);
311 else if (dm->rfe_type == 15)
312 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type15);
313 else if (dm->rfe_type == 16)
314 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type16);
315 else if (dm->rfe_type == 17)
316 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type17);
317 else if (dm->rfe_type == 18)
318 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type18);
319 else if (dm->rfe_type == 19)
320 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type19);
321 else if (dm->rfe_type == 20)
322 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type20);
323 else if (dm->rfe_type == 21)
324 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type21);
325 else if (dm->rfe_type == 22)
326 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type22);
327 else if (dm->rfe_type == 23)
328 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type23);
329 else if (dm->rfe_type == 24)
330 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type24);
331 else if (dm->rfe_type == 25)
332 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type25);
333 else if (dm->rfe_type == 26)
334 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type26);
335 else if (dm->rfe_type == 27)
336 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type27);
337 else if (dm->rfe_type == 28)
338 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type28);
339 else if (dm->rfe_type == 29)
340 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type29);
341 else if (dm->rfe_type == 30)
342 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type30);
343 else if (dm->rfe_type == 31)
344 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type31);
345 else
346 READ_AND_CONFIG_MP(8192f, _txpwr_lmt);
347 }
348 }
349 #endif
350 #if (RTL8721D_SUPPORT == 1)
351 if (dm->support_ic_type == ODM_RTL8721D) {
352 if (config_type == CONFIG_RF_RADIO) {
353 if (e_rf_path == RF_PATH_A)
354 READ_AND_CONFIG_MP(8721d, _radioa);
355 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
356 if (dm->power_voltage == ODM_POWER_18V)
357 READ_AND_CONFIG_MP(8721d, _txpwr_lmt_type0);
358 else
359 READ_AND_CONFIG_MP(8721d, _txpwr_lmt_type1);
360 }
361 }
362 #endif
363
364 #if (RTL8710C_SUPPORT == 1)
365 if (dm->support_ic_type == ODM_RTL8710C) {
366 if (config_type == CONFIG_RF_RADIO) {
367 if (e_rf_path == RF_PATH_A)
368 READ_AND_CONFIG_MP(8710c, _radioa);
369 } else if (config_type == CONFIG_RF_TXPWR_LMT)
370 READ_AND_CONFIG_MP(8710c, _txpwr_lmt);
371 }
372 #endif
373
374 #if (RTL8821C_SUPPORT == 1)
375 if (dm->support_ic_type == ODM_RTL8821C) {
376 if (config_type == CONFIG_RF_RADIO) {
377 if (e_rf_path == RF_PATH_A)
378 READ_AND_CONFIG(8821c, _radioa);
379 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
380 READ_AND_CONFIG(8821c, _txpwr_lmt);
381 }
382 }
383 #endif
384 #if (RTL8195B_SUPPORT == 1)
385 if (dm->support_ic_type == ODM_RTL8195B) {
386 if (config_type == CONFIG_RF_RADIO) {
387 if (e_rf_path == RF_PATH_A)
388 READ_AND_CONFIG(8195b, _radioa);
389 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
390 READ_AND_CONFIG(8195b, _txpwr_lmt);
391 }
392 }
393 #endif
394 #if (RTL8198F_SUPPORT == 1)
395 if (dm->support_ic_type == ODM_RTL8198F) {
396 if (config_type == CONFIG_RF_RADIO) {
397 if (e_rf_path == RF_PATH_A)
398 READ_AND_CONFIG_MP(8198f, _radioa);
399 else if (e_rf_path == RF_PATH_B)
400 READ_AND_CONFIG_MP(8198f, _radiob);
401 else if (e_rf_path == RF_PATH_C)
402 READ_AND_CONFIG_MP(8198f, _radioc);
403 else if (e_rf_path == RF_PATH_D)
404 READ_AND_CONFIG_MP(8198f, _radiod);
405 }
406 }
407 #endif
408 /*#if (RTL8814B_SUPPORT == 1)
409 if (dm->support_ic_type == ODM_RTL8814B) {
410 if (config_type == CONFIG_RF_RADIO) {
411 if (e_rf_path == RF_PATH_A)
412 READ_AND_CONFIG_MP(8814b, _radioa);
413 else if (e_rf_path == RF_PATH_B)
414 READ_AND_CONFIG_MP(8814b, _radiob);
415 else if (e_rf_path == RF_PATH_C)
416 READ_AND_CONFIG_MP(8814b, _radioc);
417 else if (e_rf_path == RF_PATH_D)
418 READ_AND_CONFIG_MP(8814b, _radiod);
419 }
420 }
421 #endif
422 */
423 #if (RTL8822C_SUPPORT)
424 if (dm->support_ic_type == ODM_RTL8822C) {
425 if (config_type == CONFIG_RF_RADIO) {
426 if (e_rf_path == RF_PATH_A)
427 READ_AND_CONFIG_MP(8822c, _radioa);
428 else if (e_rf_path == RF_PATH_B)
429 READ_AND_CONFIG_MP(8822c, _radiob);
430 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
431 if (dm->rfe_type == 5)
432 READ_AND_CONFIG_MP(8822c, _txpwr_lmt_type5);
433 else
434 READ_AND_CONFIG_MP(8822c, _txpwr_lmt);
435 }
436 }
437 #endif
438 #if (RTL8723F_SUPPORT)
439 if (dm->support_ic_type == ODM_RTL8723F) {
440 if (config_type == CONFIG_RF_RADIO) {
441 if (e_rf_path == RF_PATH_A)
442 READ_AND_CONFIG_MP(8723f, _radioa);
443 else if (e_rf_path == RF_PATH_B)
444 READ_AND_CONFIG_MP(8723f, _radiob);
445 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
446 READ_AND_CONFIG_MP(8723f, _txpwr_lmt);
447 }
448 }
449 #endif
450 #if (RTL8812F_SUPPORT)
451 if (dm->support_ic_type == ODM_RTL8812F) {
452 if (config_type == CONFIG_RF_RADIO) {
453 if (e_rf_path == RF_PATH_A)
454 READ_AND_CONFIG_MP(8812f, _radioa);
455 else if (e_rf_path == RF_PATH_B)
456 READ_AND_CONFIG_MP(8812f, _radiob);
457 }
458 }
459 #endif
460 #if (RTL8197G_SUPPORT)
461 if (dm->support_ic_type == ODM_RTL8197G) {
462 if (config_type == CONFIG_RF_RADIO) {
463 if (e_rf_path == RF_PATH_A)
464 READ_AND_CONFIG_MP(8197g, _radioa);
465 else if (e_rf_path == RF_PATH_B)
466 READ_AND_CONFIG_MP(8197g, _radiob);
467 }
468 }
469 #endif
470
471 /*8814B need review, when phydm has related files*/
472 #if (RTL8814B_SUPPORT)
473 if (dm->support_ic_type == ODM_RTL8814B) {
474 if (config_type == CONFIG_RF_RADIO) {
475 if (e_rf_path == RF_PATH_A)
476 READ_AND_CONFIG_MP(8814b, _radioa);
477 else if (e_rf_path == RF_PATH_B)
478 READ_AND_CONFIG_MP(8814b, _radiob);
479 else if (e_rf_path == RF_PATH_C)
480 READ_AND_CONFIG_MP(8814b, _radioc);
481 else if (e_rf_path == RF_PATH_D)
482 READ_AND_CONFIG_MP(8814b, _radiod);
483 }
484 if (config_type == CONFIG_RF_SYN_RADIO) {
485 if (e_rf_path == RF_SYN0)
486 READ_AND_CONFIG_MP(8814b, _radiosyn0);
487 else if (e_rf_path == RF_SYN1)
488 READ_AND_CONFIG_MP(8814b, _radiosyn1);
489 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
490 READ_AND_CONFIG_MP(8814b, _txpwr_lmt);
491 }
492 }
493 #endif
494
495 if (config_type == CONFIG_RF_RADIO) {
496 if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
497 result = phydm_set_reg_by_fw(dm,
498 PHYDM_HALMAC_CMD_END,
499 0,
500 0,
501 0,
502 (enum rf_path)0,
503 0);
504 PHYDM_DBG(dm, ODM_COMP_INIT,
505 "rf param offload end!result = %d", result);
506 }
507 }
508
509 return result;
510 }
511
512 enum hal_status
odm_config_rf_with_tx_pwr_track_header_file(struct dm_struct * dm)513 odm_config_rf_with_tx_pwr_track_header_file(struct dm_struct *dm)
514 {
515 PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__,
516 (dm->is_mp_chip) ? "MPChip" : "TestChip");
517 PHYDM_DBG(dm, ODM_COMP_INIT,
518 "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
519 dm->support_platform, dm->support_interface, dm->board_type);
520
521 /* @1 AP doesn't use PHYDM power tracking table in these ICs */
522 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
523 #if RTL8821A_SUPPORT
524 if (dm->support_ic_type == ODM_RTL8821) {
525 if (dm->support_interface == ODM_ITRF_PCIE)
526 READ_AND_CONFIG_MP(8821a, _txpowertrack_pcie);
527 else if (dm->support_interface == ODM_ITRF_USB)
528 READ_AND_CONFIG_MP(8821a, _txpowertrack_usb);
529 else if (dm->support_interface == ODM_ITRF_SDIO)
530 READ_AND_CONFIG_MP(8821a, _txpowertrack_sdio);
531 }
532 #endif
533 #if RTL8812A_SUPPORT
534 if (dm->support_ic_type == ODM_RTL8812) {
535 if (dm->support_interface == ODM_ITRF_PCIE)
536 READ_AND_CONFIG_MP(8812a, _txpowertrack_pcie);
537 else if (dm->support_interface == ODM_ITRF_USB) {
538 if (dm->rfe_type == 3 && dm->is_mp_chip)
539 READ_AND_CONFIG_MP(8812a, _txpowertrack_rfe3);
540 else
541 READ_AND_CONFIG_MP(8812a, _txpowertrack_usb);
542 }
543 }
544 #endif
545 #if RTL8192E_SUPPORT
546 if (dm->support_ic_type == ODM_RTL8192E) {
547 if (dm->support_interface == ODM_ITRF_PCIE)
548 READ_AND_CONFIG_MP(8192e, _txpowertrack_pcie);
549 else if (dm->support_interface == ODM_ITRF_USB)
550 READ_AND_CONFIG_MP(8192e, _txpowertrack_usb);
551 else if (dm->support_interface == ODM_ITRF_SDIO)
552 READ_AND_CONFIG_MP(8192e, _txpowertrack_sdio);
553 }
554 #endif
555 #if RTL8723D_SUPPORT
556 if (dm->support_ic_type == ODM_RTL8723D) {
557 if (dm->support_interface == ODM_ITRF_PCIE)
558 READ_AND_CONFIG_MP(8723d, _txpowertrack_pcie);
559 else if (dm->support_interface == ODM_ITRF_USB)
560 READ_AND_CONFIG_MP(8723d, _txpowertrack_usb);
561 else if (dm->support_interface == ODM_ITRF_SDIO)
562 READ_AND_CONFIG_MP(8723d, _txpowertrack_sdio);
563
564 READ_AND_CONFIG_MP(8723d, _txxtaltrack);
565 }
566 #endif
567 /* @JJ ADD 20161014 */
568 #if RTL8710B_SUPPORT
569 if (dm->support_ic_type == ODM_RTL8710B) {
570 if (dm->package_type == 1)
571 READ_AND_CONFIG_MP(8710b, _txpowertrack_qfn48m_smic);
572 else if (dm->package_type == 5)
573 READ_AND_CONFIG_MP(8710b, _txpowertrack_qfn48m_umc);
574
575 READ_AND_CONFIG_MP(8710b, _txxtaltrack);
576 }
577 #endif
578 #if RTL8188E_SUPPORT
579 if (dm->support_ic_type == ODM_RTL8188E) {
580 if (odm_get_mac_reg(dm, R_0xf0, 0xF000) >= 8) { /*@if 0xF0[15:12] >= 8, SMIC*/
581 if (dm->support_interface == ODM_ITRF_PCIE)
582 READ_AND_CONFIG_MP(8188e, _txpowertrack_pcie_icut);
583 else if (dm->support_interface == ODM_ITRF_USB)
584 READ_AND_CONFIG_MP(8188e, _txpowertrack_usb_icut);
585 else if (dm->support_interface == ODM_ITRF_SDIO)
586 READ_AND_CONFIG_MP(8188e, _txpowertrack_sdio_icut);
587 } else { /*@else 0xF0[15:12] < 8, TSMC*/
588 if (dm->support_interface == ODM_ITRF_PCIE)
589 READ_AND_CONFIG_MP(8188e, _txpowertrack_pcie);
590 else if (dm->support_interface == ODM_ITRF_USB)
591 READ_AND_CONFIG_MP(8188e, _txpowertrack_usb);
592 else if (dm->support_interface == ODM_ITRF_SDIO)
593 READ_AND_CONFIG_MP(8188e, _txpowertrack_sdio);
594 }
595 }
596 #endif
597 #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
598 /* @1 All platforms support */
599 #if RTL8723B_SUPPORT
600 if (dm->support_ic_type == ODM_RTL8723B) {
601 if (dm->support_interface == ODM_ITRF_PCIE)
602 READ_AND_CONFIG_MP(8723b, _txpowertrack_pcie);
603 else if (dm->support_interface == ODM_ITRF_USB)
604 READ_AND_CONFIG_MP(8723b, _txpowertrack_usb);
605 else if (dm->support_interface == ODM_ITRF_SDIO)
606 READ_AND_CONFIG_MP(8723b, _txpowertrack_sdio);
607 }
608 #endif
609 #if RTL8814A_SUPPORT
610 if (dm->support_ic_type == ODM_RTL8814A) {
611 if (dm->rfe_type == 0)
612 READ_AND_CONFIG_MP(8814a, _txpowertrack_type0);
613 else if (dm->rfe_type == 2)
614 READ_AND_CONFIG_MP(8814a, _txpowertrack_type2);
615 else if (dm->rfe_type == 5)
616 READ_AND_CONFIG_MP(8814a, _txpowertrack_type5);
617 else if (dm->rfe_type == 7)
618 READ_AND_CONFIG_MP(8814a, _txpowertrack_type7);
619 else if (dm->rfe_type == 8)
620 READ_AND_CONFIG_MP(8814a, _txpowertrack_type8);
621 else
622 READ_AND_CONFIG_MP(8814a, _txpowertrack);
623
624 READ_AND_CONFIG_MP(8814a, _txpowertssi);
625 }
626 #endif
627 #if RTL8703B_SUPPORT
628 if (dm->support_ic_type == ODM_RTL8703B) {
629 if (dm->support_interface == ODM_ITRF_USB)
630 READ_AND_CONFIG_MP(8703b, _txpowertrack_usb);
631 else if (dm->support_interface == ODM_ITRF_SDIO)
632 READ_AND_CONFIG_MP(8703b, _txpowertrack_sdio);
633
634 READ_AND_CONFIG_MP(8703b, _txxtaltrack);
635 }
636 #endif
637 #if RTL8188F_SUPPORT
638 if (dm->support_ic_type == ODM_RTL8188F) {
639 if (dm->support_interface == ODM_ITRF_USB)
640 READ_AND_CONFIG_MP(8188f, _txpowertrack_usb);
641 else if (dm->support_interface == ODM_ITRF_SDIO)
642 READ_AND_CONFIG_MP(8188f, _txpowertrack_sdio);
643 }
644 #endif
645 #if RTL8822B_SUPPORT
646 if (dm->support_ic_type == ODM_RTL8822B) {
647 if (dm->rfe_type == 0)
648 READ_AND_CONFIG_MP(8822b, _txpowertrack_type0);
649 else if (dm->rfe_type == 1)
650 READ_AND_CONFIG_MP(8822b, _txpowertrack_type1);
651 else if (dm->rfe_type == 2)
652 READ_AND_CONFIG_MP(8822b, _txpowertrack_type2);
653 else if ((dm->rfe_type == 3) || (dm->rfe_type == 5))
654 READ_AND_CONFIG_MP(8822b, _txpowertrack_type3_type5);
655 else if (dm->rfe_type == 4)
656 READ_AND_CONFIG_MP(8822b, _txpowertrack_type4);
657 else if (dm->rfe_type == 6)
658 READ_AND_CONFIG_MP(8822b, _txpowertrack_type6);
659 else if (dm->rfe_type == 7)
660 READ_AND_CONFIG_MP(8822b, _txpowertrack_type7);
661 else if (dm->rfe_type == 8)
662 READ_AND_CONFIG_MP(8822b, _txpowertrack_type8);
663 else if (dm->rfe_type == 9)
664 READ_AND_CONFIG_MP(8822b, _txpowertrack_type9);
665 else if (dm->rfe_type == 10)
666 READ_AND_CONFIG_MP(8822b, _txpowertrack_type10);
667 else if (dm->rfe_type == 11)
668 READ_AND_CONFIG_MP(8822b, _txpowertrack_type11);
669 else if (dm->rfe_type == 12)
670 READ_AND_CONFIG_MP(8822b, _txpowertrack_type12);
671 else if (dm->rfe_type == 13)
672 READ_AND_CONFIG_MP(8822b, _txpowertrack_type13);
673 else if (dm->rfe_type == 14)
674 READ_AND_CONFIG_MP(8822b, _txpowertrack_type14);
675 else if (dm->rfe_type == 15)
676 READ_AND_CONFIG_MP(8822b, _txpowertrack_type15);
677 else if (dm->rfe_type == 16)
678 READ_AND_CONFIG_MP(8822b, _txpowertrack_type16);
679 else if (dm->rfe_type == 17)
680 READ_AND_CONFIG_MP(8822b, _txpowertrack_type17);
681 else if (dm->rfe_type == 18)
682 READ_AND_CONFIG_MP(8822b, _txpowertrack_type18);
683 //else if (dm->rfe_type == 19)
684 //READ_AND_CONFIG_MP(8822b, _txpowertrack_type19);
685 else
686 READ_AND_CONFIG_MP(8822b, _txpowertrack);
687 }
688 #endif
689 #if RTL8197F_SUPPORT
690 if (dm->support_ic_type == ODM_RTL8197F) {
691 if (dm->rfe_type == 0)
692 READ_AND_CONFIG_MP(8197f, _txpowertrack_type0);
693 else if (dm->rfe_type == 1)
694 READ_AND_CONFIG_MP(8197f, _txpowertrack_type1);
695 else
696 READ_AND_CONFIG_MP(8197f, _txpowertrack);
697 }
698 #endif
699 /*@jj add 20170822*/
700 #if RTL8192F_SUPPORT
701 if (dm->support_ic_type == ODM_RTL8192F) {
702 if (dm->rfe_type == 0)
703 READ_AND_CONFIG_MP(8192f, _txpowertrack_type0);
704 else if (dm->rfe_type == 1)
705 READ_AND_CONFIG_MP(8192f, _txpowertrack_type1);
706 else if (dm->rfe_type == 2)
707 READ_AND_CONFIG_MP(8192f, _txpowertrack_type2);
708 else if (dm->rfe_type == 3)
709 READ_AND_CONFIG_MP(8192f, _txpowertrack_type3);
710 else if (dm->rfe_type == 4)
711 READ_AND_CONFIG_MP(8192f, _txpowertrack_type4);
712 else if (dm->rfe_type == 5)
713 READ_AND_CONFIG_MP(8192f, _txpowertrack_type5);
714 else if (dm->rfe_type == 6)
715 READ_AND_CONFIG_MP(8192f, _txpowertrack_type6);
716 else if (dm->rfe_type == 7)
717 READ_AND_CONFIG_MP(8192f, _txpowertrack_type7);
718 else if (dm->rfe_type == 8)
719 READ_AND_CONFIG_MP(8192f, _txpowertrack_type8);
720 else if (dm->rfe_type == 9)
721 READ_AND_CONFIG_MP(8192f, _txpowertrack_type9);
722 else if (dm->rfe_type == 10)
723 READ_AND_CONFIG_MP(8192f, _txpowertrack_type10);
724 else if (dm->rfe_type == 11)
725 READ_AND_CONFIG_MP(8192f, _txpowertrack_type11);
726 else if (dm->rfe_type == 12)
727 READ_AND_CONFIG_MP(8192f, _txpowertrack_type12);
728 else if (dm->rfe_type == 13)
729 READ_AND_CONFIG_MP(8192f, _txpowertrack_type13);
730 else if (dm->rfe_type == 14)
731 READ_AND_CONFIG_MP(8192f, _txpowertrack_type14);
732 else if (dm->rfe_type == 15)
733 READ_AND_CONFIG_MP(8192f, _txpowertrack_type15);
734 else if (dm->rfe_type == 16)
735 READ_AND_CONFIG_MP(8192f, _txpowertrack_type16);
736 else if (dm->rfe_type == 17)
737 READ_AND_CONFIG_MP(8192f, _txpowertrack_type17);
738 else if (dm->rfe_type == 18)
739 READ_AND_CONFIG_MP(8192f, _txpowertrack_type18);
740 else if (dm->rfe_type == 19)
741 READ_AND_CONFIG_MP(8192f, _txpowertrack_type19);
742 else if (dm->rfe_type == 20)
743 READ_AND_CONFIG_MP(8192f, _txpowertrack_type20);
744 else if (dm->rfe_type == 21)
745 READ_AND_CONFIG_MP(8192f, _txpowertrack_type21);
746 else if (dm->rfe_type == 22)
747 READ_AND_CONFIG_MP(8192f, _txpowertrack_type22);
748 else if (dm->rfe_type == 23)
749 READ_AND_CONFIG_MP(8192f, _txpowertrack_type23);
750 else if (dm->rfe_type == 24)
751 READ_AND_CONFIG_MP(8192f, _txpowertrack_type24);
752 else if (dm->rfe_type == 25)
753 READ_AND_CONFIG_MP(8192f, _txpowertrack_type25);
754 else if (dm->rfe_type == 26)
755 READ_AND_CONFIG_MP(8192f, _txpowertrack_type26);
756 else if (dm->rfe_type == 27)
757 READ_AND_CONFIG_MP(8192f, _txpowertrack_type27);
758 else if (dm->rfe_type == 28)
759 READ_AND_CONFIG_MP(8192f, _txpowertrack_type28);
760 else if (dm->rfe_type == 29)
761 READ_AND_CONFIG_MP(8192f, _txpowertrack_type29);
762 else if (dm->rfe_type == 30)
763 READ_AND_CONFIG_MP(8192f, _txpowertrack_type30);
764 else if (dm->rfe_type == 31)
765 READ_AND_CONFIG_MP(8192f, _txpowertrack_type31);
766 else
767 READ_AND_CONFIG_MP(8192f, _txpowertrack);
768
769 READ_AND_CONFIG_MP(8192f, _txxtaltrack);
770 }
771 #endif
772
773 #if RTL8721D_SUPPORT
774 if (dm->support_ic_type == ODM_RTL8721D) {
775 #if 0
776 if (dm->package_type == 1)
777 READ_AND_CONFIG_MP(8721d, _txpowertrack_qfn48m_smic);
778 else if (dm->package_type == 5)
779 READ_AND_CONFIG_MP(8721d, _txpowertrack_qfn48m_umc);
780 #endif
781 READ_AND_CONFIG_MP(8721d, _txpowertrack);
782 READ_AND_CONFIG_MP(8721d, _txxtaltrack);
783 }
784 #endif
785
786 #if RTL8710C_SUPPORT
787 if (dm->support_ic_type == ODM_RTL8710C) {
788 #if 0
789 if (dm->package_type == 1)
790 READ_AND_CONFIG_MP(8710c, _txpowertrack_qfn48m_smic);
791 else if (dm->package_type == 5)
792 READ_AND_CONFIG_MP(8710c, _txpowertrack_qfn48m_umc);
793 #endif
794 READ_AND_CONFIG_MP(8710c, _txpowertrack);
795 READ_AND_CONFIG_MP(8710c, _txxtaltrack);
796 }
797 #endif
798
799 #if RTL8821C_SUPPORT
800 if (dm->support_ic_type == ODM_RTL8821C) {
801 if (dm->rfe_type == 0x5)
802 READ_AND_CONFIG(8821c, _txpowertrack_type0x28);
803 else if (dm->rfe_type == 0x4)
804 READ_AND_CONFIG(8821c, _txpowertrack_type0x20);
805 else
806 READ_AND_CONFIG(8821c, _txpowertrack);
807 }
808 #endif
809
810 #if RTL8198F_SUPPORT
811 if (dm->support_ic_type == ODM_RTL8198F) {
812 if (dm->rfe_type == 0)
813 READ_AND_CONFIG_MP(8198f, _txpowertrack_type0);
814 else if (dm->rfe_type == 1)
815 READ_AND_CONFIG_MP(8198f, _txpowertrack_type1);
816 else if (dm->rfe_type == 3)
817 READ_AND_CONFIG_MP(8198f, _txpowertrack_type3);
818 else
819 READ_AND_CONFIG_MP(8198f, _txpowertrack);
820 }
821 #endif
822
823 #if RTL8195B_SUPPORT
824 if (dm->support_ic_type == ODM_RTL8195B) {
825 if (dm->package_type == 1) {
826 READ_AND_CONFIG_MP(8195b, _txpowertrack_pkg1);
827 READ_AND_CONFIG_MP(8195b, _txxtaltrack_pkg1);
828 } else {
829 READ_AND_CONFIG_MP(8195b, _txpowertrack);
830 READ_AND_CONFIG_MP(8195b, _txxtaltrack);
831 }
832 }
833 #endif
834
835 #if (RTL8822C_SUPPORT)
836 if (dm->support_ic_type == ODM_RTL8822C) {
837 if (dm->en_tssi_mode)
838 READ_AND_CONFIG_MP(8822c, _txpowertracktssi);
839 else
840 READ_AND_CONFIG_MP(8822c, _txpowertrack);
841 }
842 #endif
843
844 #if (RTL8723F_SUPPORT)
845 if (dm->support_ic_type == ODM_RTL8723F) {
846 if (dm->en_tssi_mode)
847 READ_AND_CONFIG_MP(8723f, _txpowertracktssi);
848 else
849 READ_AND_CONFIG_MP(8723f, _txpowertrack);
850 READ_AND_CONFIG_MP(8723f, _txxtaltrack);
851 }
852 #endif
853 #if (RTL8812F_SUPPORT)
854 if (dm->support_ic_type == ODM_RTL8812F) {
855 if (dm->rfe_type == 0)
856 READ_AND_CONFIG_MP(8812f, _txpowertrack_type0);
857 else if (dm->rfe_type == 1)
858 READ_AND_CONFIG_MP(8812f, _txpowertrack_type1);
859 else if (dm->rfe_type == 2)
860 READ_AND_CONFIG_MP(8812f, _txpowertrack_type2);
861 else if (dm->rfe_type == 3)
862 READ_AND_CONFIG_MP(8812f, _txpowertrack_type3);
863 else if (dm->rfe_type == 4)
864 READ_AND_CONFIG_MP(8812f, _txpowertrack_type4);
865 else if (dm->rfe_type == 5)
866 READ_AND_CONFIG_MP(8812f, _txpowertrack_type5);
867 else
868 READ_AND_CONFIG_MP(8812f, _txpowertrack);
869 }
870 #endif
871
872 #if (RTL8197G_SUPPORT)
873 if (dm->support_ic_type == ODM_RTL8197G)
874 READ_AND_CONFIG_MP(8197g, _txpowertrack);
875 #endif
876
877 #if RTL8814B_SUPPORT
878 if (dm->support_ic_type == ODM_RTL8814B) {
879 if (dm->rfe_type == 0)
880 READ_AND_CONFIG_MP(8814b, _txpowertrack_type0);
881 else if (dm->rfe_type == 1)
882 READ_AND_CONFIG_MP(8814b, _txpowertrack_type1);
883 else if (dm->rfe_type == 2)
884 READ_AND_CONFIG_MP(8814b, _txpowertrack_type2);
885 #if 0
886 else if (dm->rfe_type == 3)
887 READ_AND_CONFIG_MP(8814b, _txpowertrack_type3);
888 else if (dm->rfe_type == 6)
889 READ_AND_CONFIG_MP(8814b, _txpowertrack_type6);
890 #endif
891 else
892 READ_AND_CONFIG_MP(8814b, _txpowertrack);
893 }
894 #endif
895
896 return HAL_STATUS_SUCCESS;
897 }
898
899 enum hal_status
odm_config_bb_with_header_file(struct dm_struct * dm,enum odm_bb_config_type config_type)900 odm_config_bb_with_header_file(struct dm_struct *dm,
901 enum odm_bb_config_type config_type)
902 {
903 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
904 void *adapter = dm->adapter;
905 PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo;
906 #endif
907 enum hal_status result = HAL_STATUS_SUCCESS;
908
909 /* @1 AP doesn't use PHYDM initialization in these ICs */
910 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
911 #if (RTL8812A_SUPPORT == 1)
912 if (dm->support_ic_type == ODM_RTL8812) {
913 if (config_type == CONFIG_BB_PHY_REG)
914 READ_AND_CONFIG_MP(8812a, _phy_reg);
915 else if (config_type == CONFIG_BB_AGC_TAB)
916 READ_AND_CONFIG_MP(8812a, _agc_tab);
917 else if (config_type == CONFIG_BB_PHY_REG_PG) {
918 if (dm->rfe_type == 3 && dm->is_mp_chip)
919 READ_AND_CONFIG_MP(8812a, _phy_reg_pg_asus);
920 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
921 else if (mgnt_info->CustomerID == RT_CID_WNC_NEC && dm->is_mp_chip)
922 READ_AND_CONFIG_MP(8812a, _phy_reg_pg_nec);
923 #if RT_PLATFORM == PLATFORM_MACOSX
924 /*@{1827}{1024} for BUFFALO power by rate table. Isaiah 2013-11-29*/
925 else if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO)
926 READ_AND_CONFIG_MP(8812a, _phy_reg_pg_dni);
927 /* TP-Link T4UH, Isaiah 2015-03-16*/
928 else if (mgnt_info->CustomerID == RT_CID_TPLINK_HPWR) {
929 pr_debug("RT_CID_TPLINK_HPWR:: _PHY_REG_PG_TPLINK\n");
930 READ_AND_CONFIG_MP(8812a, _phy_reg_pg_tplink);
931 }
932 #endif
933 #endif
934 else
935 READ_AND_CONFIG_MP(8812a, _phy_reg_pg);
936 } else if (config_type == CONFIG_BB_PHY_REG_MP)
937 READ_AND_CONFIG_MP(8812a, _phy_reg_mp);
938 else if (config_type == CONFIG_BB_AGC_TAB_DIFF) {
939 dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD;
940 /*@AGC_TAB DIFF dont support FW offload*/
941 if ((*dm->channel >= 36) && (*dm->channel <= 64))
942 AGC_DIFF_CONFIG_MP(8812a, lb);
943 else if (*dm->channel >= 100)
944 AGC_DIFF_CONFIG_MP(8812a, hb);
945 }
946 }
947 #endif
948 #if (RTL8821A_SUPPORT == 1)
949 if (dm->support_ic_type == ODM_RTL8821) {
950 if (config_type == CONFIG_BB_PHY_REG)
951 READ_AND_CONFIG_MP(8821a, _phy_reg);
952 else if (config_type == CONFIG_BB_AGC_TAB)
953 READ_AND_CONFIG_MP(8821a, _agc_tab);
954 else if (config_type == CONFIG_BB_PHY_REG_PG) {
955 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
956 #if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
957 HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter));
958
959 if ((hal_data->EEPROMSVID == 0x1043 && hal_data->EEPROMSMID == 0x207F))
960 READ_AND_CONFIG_MP(8821a, _phy_reg_pg_e202_sa);
961 else
962 #endif
963 #if (RT_PLATFORM == PLATFORM_MACOSX)
964 /*@ for BUFFALO pwr by rate table */
965 if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO) {
966 /*@ for BUFFALO pwr by rate table (JP/US)*/
967 if (mgnt_info->ChannelPlan == RT_CHANNEL_DOMAIN_US_2G_CANADA_5G)
968 READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_us);
969 else
970 READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_jp);
971 } else
972 #endif
973 #endif
974 READ_AND_CONFIG_MP(8821a, _phy_reg_pg);
975 }
976 }
977 #endif
978 #if (RTL8192E_SUPPORT == 1)
979 if (dm->support_ic_type == ODM_RTL8192E) {
980 if (config_type == CONFIG_BB_PHY_REG)
981 READ_AND_CONFIG_MP(8192e, _phy_reg);
982 else if (config_type == CONFIG_BB_AGC_TAB)
983 READ_AND_CONFIG_MP(8192e, _agc_tab);
984 else if (config_type == CONFIG_BB_PHY_REG_PG)
985 READ_AND_CONFIG_MP(8192e, _phy_reg_pg);
986 }
987 #endif
988 #if (RTL8723D_SUPPORT == 1)
989 if (dm->support_ic_type == ODM_RTL8723D) {
990 if (config_type == CONFIG_BB_PHY_REG)
991 READ_AND_CONFIG_MP(8723d, _phy_reg);
992 else if (config_type == CONFIG_BB_AGC_TAB)
993 READ_AND_CONFIG_MP(8723d, _agc_tab);
994 else if (config_type == CONFIG_BB_PHY_REG_PG)
995 READ_AND_CONFIG_MP(8723d, _phy_reg_pg);
996 }
997 #endif
998 /* @JJ ADD 20161014 */
999 #if (RTL8710B_SUPPORT == 1)
1000 if (dm->support_ic_type == ODM_RTL8710B) {
1001 if (config_type == CONFIG_BB_PHY_REG)
1002 READ_AND_CONFIG_MP(8710b, _phy_reg);
1003 else if (config_type == CONFIG_BB_AGC_TAB)
1004 READ_AND_CONFIG_MP(8710b, _agc_tab);
1005 else if (config_type == CONFIG_BB_PHY_REG_PG)
1006 READ_AND_CONFIG_MP(8710b, _phy_reg_pg);
1007 }
1008 #endif
1009
1010 #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
1011 /* @1 All platforms support */
1012 #if (RTL8188E_SUPPORT == 1)
1013 if (dm->support_ic_type == ODM_RTL8188E) {
1014 if (config_type == CONFIG_BB_PHY_REG)
1015 READ_AND_CONFIG_MP(8188e, _phy_reg);
1016 else if (config_type == CONFIG_BB_AGC_TAB)
1017 READ_AND_CONFIG_MP(8188e, _agc_tab);
1018 else if (config_type == CONFIG_BB_PHY_REG_PG)
1019 READ_AND_CONFIG_MP(8188e, _phy_reg_pg);
1020 }
1021 #endif
1022 #if (RTL8723B_SUPPORT == 1)
1023 if (dm->support_ic_type == ODM_RTL8723B) {
1024 if (config_type == CONFIG_BB_PHY_REG)
1025 READ_AND_CONFIG_MP(8723b, _phy_reg);
1026 else if (config_type == CONFIG_BB_AGC_TAB)
1027 READ_AND_CONFIG_MP(8723b, _agc_tab);
1028 else if (config_type == CONFIG_BB_PHY_REG_PG)
1029 READ_AND_CONFIG_MP(8723b, _phy_reg_pg);
1030 }
1031 #endif
1032 #if (RTL8814A_SUPPORT == 1)
1033 if (dm->support_ic_type == ODM_RTL8814A) {
1034 if (config_type == CONFIG_BB_PHY_REG)
1035 READ_AND_CONFIG_MP(8814a, _phy_reg);
1036 else if (config_type == CONFIG_BB_AGC_TAB)
1037 READ_AND_CONFIG_MP(8814a, _agc_tab);
1038 else if (config_type == CONFIG_BB_PHY_REG_PG) {
1039 if (dm->rfe_type == 0)
1040 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type0);
1041 else if (dm->rfe_type == 2)
1042 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type2);
1043 else if (dm->rfe_type == 3)
1044 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type3);
1045 else if (dm->rfe_type == 4)
1046 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type4);
1047 else if (dm->rfe_type == 5)
1048 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type5);
1049 else if (dm->rfe_type == 7)
1050 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type7);
1051 else if (dm->rfe_type == 8)
1052 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type8);
1053 else
1054 READ_AND_CONFIG_MP(8814a, _phy_reg_pg);
1055 } else if (config_type == CONFIG_BB_PHY_REG_MP)
1056 READ_AND_CONFIG_MP(8814a, _phy_reg_mp);
1057 }
1058 #endif
1059 #if (RTL8703B_SUPPORT == 1)
1060 if (dm->support_ic_type == ODM_RTL8703B) {
1061 if (config_type == CONFIG_BB_PHY_REG)
1062 READ_AND_CONFIG_MP(8703b, _phy_reg);
1063 else if (config_type == CONFIG_BB_AGC_TAB)
1064 READ_AND_CONFIG_MP(8703b, _agc_tab);
1065 else if (config_type == CONFIG_BB_PHY_REG_PG)
1066 READ_AND_CONFIG_MP(8703b, _phy_reg_pg);
1067 }
1068 #endif
1069 #if (RTL8188F_SUPPORT == 1)
1070 if (dm->support_ic_type == ODM_RTL8188F) {
1071 if (config_type == CONFIG_BB_PHY_REG)
1072 READ_AND_CONFIG_MP(8188f, _phy_reg);
1073 else if (config_type == CONFIG_BB_AGC_TAB)
1074 READ_AND_CONFIG_MP(8188f, _agc_tab);
1075 else if (config_type == CONFIG_BB_PHY_REG_PG)
1076 READ_AND_CONFIG_MP(8188f, _phy_reg_pg);
1077 }
1078 #endif
1079 #if (RTL8822B_SUPPORT == 1)
1080 if (dm->support_ic_type == ODM_RTL8822B) {
1081 if (config_type == CONFIG_BB_PHY_REG) {
1082 READ_AND_CONFIG_MP(8822b, _phy_reg);
1083 } else if (config_type == CONFIG_BB_AGC_TAB) {
1084 READ_AND_CONFIG_MP(8822b, _agc_tab);
1085 } else if (config_type == CONFIG_BB_PHY_REG_PG) {
1086 if (dm->rfe_type == 2)
1087 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type2);
1088 else if (dm->rfe_type == 3)
1089 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type3);
1090 else if (dm->rfe_type == 4)
1091 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type4);
1092 else if (dm->rfe_type == 5)
1093 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type5);
1094 else if (dm->rfe_type == 12)
1095 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type12);
1096 else if (dm->rfe_type == 15)
1097 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type15);
1098 else if (dm->rfe_type == 16)
1099 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type16);
1100 else if (dm->rfe_type == 17)
1101 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type17);
1102 else if (dm->rfe_type == 18)
1103 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type18);
1104 //else if (dm->rfe_type == 19)
1105 //READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type19);
1106 else
1107 READ_AND_CONFIG_MP(8822b, _phy_reg_pg);
1108 }
1109 }
1110 #endif
1111
1112 #if (RTL8197F_SUPPORT == 1)
1113 if (dm->support_ic_type == ODM_RTL8197F) {
1114 if (config_type == CONFIG_BB_PHY_REG) {
1115 READ_AND_CONFIG_MP(8197f, _phy_reg);
1116 if (dm->cut_version == ODM_CUT_A)
1117 phydm_phypara_a_cut(dm);
1118 } else if (config_type == CONFIG_BB_AGC_TAB)
1119 READ_AND_CONFIG_MP(8197f, _agc_tab);
1120 }
1121 #endif
1122 /*@jj add 20170822*/
1123 #if (RTL8192F_SUPPORT == 1)
1124 if (dm->support_ic_type == ODM_RTL8192F) {
1125 if (config_type == CONFIG_BB_PHY_REG) {
1126 READ_AND_CONFIG_MP(8192f, _phy_reg);
1127 } else if (config_type == CONFIG_BB_AGC_TAB) {
1128 READ_AND_CONFIG_MP(8192f, _agc_tab);
1129 } else if (config_type == CONFIG_BB_PHY_REG_PG) {
1130 if (dm->rfe_type == 0)
1131 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type0);
1132 else if (dm->rfe_type == 1)
1133 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type1);
1134 else if (dm->rfe_type == 2)
1135 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type2);
1136 else if (dm->rfe_type == 3)
1137 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type3);
1138 else if (dm->rfe_type == 4)
1139 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type4);
1140 else if (dm->rfe_type == 5)
1141 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type5);
1142 else if (dm->rfe_type == 6)
1143 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type6);
1144 else if (dm->rfe_type == 7)
1145 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type7);
1146 else if (dm->rfe_type == 8)
1147 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type8);
1148 else if (dm->rfe_type == 9)
1149 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type9);
1150 else if (dm->rfe_type == 10)
1151 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type10);
1152 else if (dm->rfe_type == 11)
1153 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type11);
1154 else if (dm->rfe_type == 12)
1155 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type12);
1156 else if (dm->rfe_type == 13)
1157 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type13);
1158 else if (dm->rfe_type == 14)
1159 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type14);
1160 else if (dm->rfe_type == 15)
1161 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type15);
1162 else if (dm->rfe_type == 16)
1163 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type16);
1164 else if (dm->rfe_type == 17)
1165 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type17);
1166 else if (dm->rfe_type == 18)
1167 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type18);
1168 else if (dm->rfe_type == 19)
1169 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type19);
1170 else if (dm->rfe_type == 20)
1171 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type20);
1172 else if (dm->rfe_type == 21)
1173 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type21);
1174 else if (dm->rfe_type == 22)
1175 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type22);
1176 else if (dm->rfe_type == 23)
1177 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type23);
1178 else if (dm->rfe_type == 24)
1179 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type24);
1180 else if (dm->rfe_type == 25)
1181 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type25);
1182 else if (dm->rfe_type == 26)
1183 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type26);
1184 else if (dm->rfe_type == 27)
1185 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type27);
1186 else if (dm->rfe_type == 28)
1187 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type28);
1188 else if (dm->rfe_type == 29)
1189 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type29);
1190 else if (dm->rfe_type == 30)
1191 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type30);
1192 else if (dm->rfe_type == 31)
1193 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type31);
1194 else
1195 READ_AND_CONFIG_MP(8192f, _phy_reg_pg);
1196 }
1197 }
1198 #endif
1199 #if (RTL8721D_SUPPORT == 1)
1200 if (dm->support_ic_type == ODM_RTL8721D) {
1201 if (config_type == CONFIG_BB_PHY_REG)
1202 READ_AND_CONFIG_MP(8721d, _phy_reg);
1203 else if (config_type == CONFIG_BB_AGC_TAB)
1204 READ_AND_CONFIG_MP(8721d, _agc_tab);
1205 else if (config_type == CONFIG_BB_PHY_REG_PG) {
1206 if (dm->power_voltage == ODM_POWER_18V)
1207 READ_AND_CONFIG_MP(8721d, _phy_reg_pg_type0);
1208 else
1209 READ_AND_CONFIG_MP(8721d, _phy_reg_pg_type1);
1210 }
1211 }
1212 #endif
1213
1214 #if (RTL8710C_SUPPORT == 1)
1215 if (dm->support_ic_type == ODM_RTL8710C) {
1216 if (config_type == CONFIG_BB_PHY_REG)
1217 READ_AND_CONFIG_MP(8710c, _phy_reg);
1218 else if (config_type == CONFIG_BB_AGC_TAB)
1219 READ_AND_CONFIG_MP(8710c, _agc_tab);
1220 else if (config_type == CONFIG_BB_PHY_REG_PG)
1221 READ_AND_CONFIG_MP(8710c, _phy_reg_pg);
1222 }
1223 #endif
1224
1225 #if (RTL8821C_SUPPORT == 1)
1226 if (dm->support_ic_type == ODM_RTL8821C) {
1227 if (config_type == CONFIG_BB_PHY_REG) {
1228 READ_AND_CONFIG(8821c, _phy_reg);
1229 } else if (config_type == CONFIG_BB_AGC_TAB) {
1230 READ_AND_CONFIG(8821c, _agc_tab);
1231 /* @According to RFEtype, choosing correct AGC table*/
1232 if (dm->default_rf_set_8821c == SWITCH_TO_BTG)
1233 AGC_DIFF_CONFIG_MP(8821c, btg);
1234 } else if (config_type == CONFIG_BB_PHY_REG_PG) {
1235 if (dm->rfe_type == 0x5)
1236 READ_AND_CONFIG(8821c, _phy_reg_pg_type0x28);
1237 else
1238 READ_AND_CONFIG(8821c, _phy_reg_pg);
1239 } else if (config_type == CONFIG_BB_AGC_TAB_DIFF) {
1240 dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD;
1241 /*@AGC_TAB DIFF dont support FW offload*/
1242 if (dm->current_rf_set_8821c == SWITCH_TO_BTG)
1243 AGC_DIFF_CONFIG_MP(8821c, btg);
1244 else if (dm->current_rf_set_8821c == SWITCH_TO_WLG)
1245 AGC_DIFF_CONFIG_MP(8821c, wlg);
1246 } else if (config_type == CONFIG_BB_PHY_REG_MP) {
1247 READ_AND_CONFIG(8821c, _phy_reg_mp);
1248 }
1249 }
1250 #endif
1251
1252 #if (RTL8195A_SUPPORT == 1)
1253 if (dm->support_ic_type == ODM_RTL8195A) {
1254 if (config_type == CONFIG_BB_PHY_REG)
1255 READ_AND_CONFIG(8195a, _phy_reg);
1256 else if (config_type == CONFIG_BB_AGC_TAB)
1257 READ_AND_CONFIG(8195a, _agc_tab);
1258 else if (config_type == CONFIG_BB_PHY_REG_PG)
1259 READ_AND_CONFIG(8195a, _phy_reg_pg);
1260 }
1261 #endif
1262 #if (RTL8195B_SUPPORT == 1)
1263 if (dm->support_ic_type == ODM_RTL8195B) {
1264 if (config_type == CONFIG_BB_PHY_REG) {
1265 READ_AND_CONFIG(8195b, _phy_reg);
1266 } else if (config_type == CONFIG_BB_AGC_TAB) {
1267 READ_AND_CONFIG(8195b, _agc_tab);
1268 } else if (config_type == CONFIG_BB_PHY_REG_PG) {
1269 READ_AND_CONFIG(8195b, _phy_reg_pg);
1270 } else if (config_type == CONFIG_BB_PHY_REG_MP) {
1271 if (dm->package_type == 1)
1272 odm_set_bb_reg(dm, R_0xaa8, 0x1f0000, 0x10);
1273 else
1274 odm_set_bb_reg(dm, R_0xaa8, 0x1f0000, 0x12);
1275 }
1276 }
1277 #endif
1278 #if (RTL8198F_SUPPORT == 1)
1279 if (dm->support_ic_type == ODM_RTL8198F) {
1280 if (config_type == CONFIG_BB_PHY_REG)
1281 READ_AND_CONFIG_MP(8198f, _phy_reg);
1282 else if (config_type == CONFIG_BB_AGC_TAB)
1283 READ_AND_CONFIG_MP(8198f, _agc_tab);
1284 }
1285 #endif
1286 #if (RTL8814B_SUPPORT == 1)
1287 if (dm->support_ic_type == ODM_RTL8814B) {
1288 if (config_type == CONFIG_BB_PHY_REG)
1289 READ_AND_CONFIG_MP(8814b, _phy_reg);
1290 else if (config_type == CONFIG_BB_AGC_TAB)
1291 READ_AND_CONFIG_MP(8814b, _agc_tab);
1292 else if (config_type == CONFIG_BB_PHY_REG_PG) {
1293 if (dm->rfe_type == 1)
1294 READ_AND_CONFIG(8814b, _phy_reg_pg_type1);
1295 else
1296 READ_AND_CONFIG(8814b, _phy_reg_pg);
1297 }
1298 }
1299 #endif
1300 #if (RTL8822C_SUPPORT)
1301 if (dm->support_ic_type == ODM_RTL8822C) {
1302 if (config_type == CONFIG_BB_PHY_REG)
1303 READ_AND_CONFIG_MP(8822c, _phy_reg);
1304 else if (config_type == CONFIG_BB_AGC_TAB)
1305 READ_AND_CONFIG_MP(8822c, _agc_tab);
1306 else if (config_type == CONFIG_BB_PHY_REG_PG)
1307 READ_AND_CONFIG(8822c, _phy_reg_pg);
1308 }
1309 #endif
1310 #if (RTL8723F_SUPPORT)
1311 if (dm->support_ic_type == ODM_RTL8723F) {
1312 if (config_type == CONFIG_BB_PHY_REG)
1313 READ_AND_CONFIG_MP(8723f, _phy_reg);
1314 else if (config_type == CONFIG_BB_AGC_TAB)
1315 READ_AND_CONFIG_MP(8723f, _agc_tab);
1316 else if (config_type == CONFIG_BB_PHY_REG_PG)
1317 READ_AND_CONFIG(8723f, _phy_reg_pg);
1318 }
1319 #endif
1320 #if (RTL8812F_SUPPORT)
1321 if (dm->support_ic_type == ODM_RTL8812F) {
1322 if (config_type == CONFIG_BB_PHY_REG)
1323 READ_AND_CONFIG_MP(8812f, _phy_reg);
1324 else if (config_type == CONFIG_BB_AGC_TAB)
1325 READ_AND_CONFIG_MP(8812f, _agc_tab);
1326 else if (config_type == CONFIG_BB_PHY_REG_PG)
1327 READ_AND_CONFIG(8812f, _phy_reg_pg);
1328 }
1329 #endif
1330 #if (RTL8197G_SUPPORT)
1331 if (dm->support_ic_type == ODM_RTL8197G) {
1332 if (config_type == CONFIG_BB_PHY_REG)
1333 READ_AND_CONFIG_MP(8197g, _phy_reg);
1334 else if (config_type == CONFIG_BB_AGC_TAB)
1335 READ_AND_CONFIG_MP(8197g, _agc_tab);
1336 else if (config_type == CONFIG_BB_PHY_REG_PG)
1337 READ_AND_CONFIG(8197g, _phy_reg_pg);
1338 }
1339 #endif
1340
1341 if (config_type == CONFIG_BB_PHY_REG ||
1342 config_type == CONFIG_BB_AGC_TAB)
1343 if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
1344 result = phydm_set_reg_by_fw(dm,
1345 PHYDM_HALMAC_CMD_END,
1346 0,
1347 0,
1348 0,
1349 (enum rf_path)0,
1350 0);
1351 PHYDM_DBG(dm, ODM_COMP_INIT,
1352 "phy param offload end!result = %d", result);
1353 }
1354
1355 return result;
1356 }
1357
1358 enum hal_status
odm_config_mac_with_header_file(struct dm_struct * dm)1359 odm_config_mac_with_header_file(struct dm_struct *dm)
1360 {
1361 enum hal_status result = HAL_STATUS_SUCCESS;
1362
1363 PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__,
1364 (dm->is_mp_chip) ? "MPChip" : "TestChip");
1365 PHYDM_DBG(dm, ODM_COMP_INIT,
1366 "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
1367 dm->support_platform, dm->support_interface, dm->board_type);
1368
1369 #ifdef PHYDM_IC_HALMAC_PARAM_SUPPORT
1370 if (dm->support_ic_type & PHYDM_IC_SUPPORT_HALMAC_PARAM_OFFLOAD) {
1371 PHYDM_DBG(dm, ODM_COMP_INIT, "MAC para-package in HALMAC\n");
1372 return result;
1373 }
1374 #endif
1375
1376 /* @1 AP doesn't use PHYDM initialization in these ICs */
1377 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
1378 #if (RTL8812A_SUPPORT == 1)
1379 if (dm->support_ic_type == ODM_RTL8812)
1380 READ_AND_CONFIG_MP(8812a, _mac_reg);
1381 #endif
1382 #if (RTL8821A_SUPPORT == 1)
1383 if (dm->support_ic_type == ODM_RTL8821)
1384 READ_AND_CONFIG_MP(8821a, _mac_reg);
1385 #endif
1386 #if (RTL8192E_SUPPORT == 1)
1387 if (dm->support_ic_type == ODM_RTL8192E)
1388 READ_AND_CONFIG_MP(8192e, _mac_reg);
1389 #endif
1390 #if (RTL8723D_SUPPORT == 1)
1391 if (dm->support_ic_type == ODM_RTL8723D)
1392 READ_AND_CONFIG_MP(8723d, _mac_reg);
1393 #endif
1394 #if (RTL8710B_SUPPORT == 1)
1395 if (dm->support_ic_type == ODM_RTL8710B)
1396 READ_AND_CONFIG_MP(8710b, _mac_reg);
1397 #endif
1398 #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
1399
1400 /* @1 All platforms support */
1401 #if (RTL8188E_SUPPORT == 1)
1402 if (dm->support_ic_type == ODM_RTL8188E)
1403 READ_AND_CONFIG_MP(8188e, _mac_reg);
1404 #endif
1405 #if (RTL8723B_SUPPORT == 1)
1406 if (dm->support_ic_type == ODM_RTL8723B)
1407 READ_AND_CONFIG_MP(8723b, _mac_reg);
1408 #endif
1409 #if (RTL8814A_SUPPORT == 1)
1410 if (dm->support_ic_type == ODM_RTL8814A)
1411 READ_AND_CONFIG_MP(8814a, _mac_reg);
1412 #endif
1413 #if (RTL8703B_SUPPORT == 1)
1414 if (dm->support_ic_type == ODM_RTL8703B)
1415 READ_AND_CONFIG_MP(8703b, _mac_reg);
1416 #endif
1417 #if (RTL8188F_SUPPORT == 1)
1418 if (dm->support_ic_type == ODM_RTL8188F)
1419 READ_AND_CONFIG_MP(8188f, _mac_reg);
1420 #endif
1421 #if (RTL8822B_SUPPORT == 1)
1422 if (dm->support_ic_type == ODM_RTL8822B)
1423 READ_AND_CONFIG_MP(8822b, _mac_reg);
1424 #endif
1425 #if (RTL8197F_SUPPORT == 1)
1426 if (dm->support_ic_type == ODM_RTL8197F)
1427 READ_AND_CONFIG_MP(8197f, _mac_reg);
1428 #endif
1429 #if (RTL8192F_SUPPORT == 1)
1430 if (dm->support_ic_type == ODM_RTL8192F)
1431 READ_AND_CONFIG_MP(8192f, _mac_reg);
1432 #endif
1433 #if (RTL8721D_SUPPORT == 1)
1434 if (dm->support_ic_type == ODM_RTL8721D)
1435 READ_AND_CONFIG_MP(8721d, _mac_reg);
1436 #endif
1437
1438 #if (RTL8710C_SUPPORT == 1)
1439 if (dm->support_ic_type == ODM_RTL8710C)
1440 READ_AND_CONFIG_MP(8710c, _mac_reg);
1441 #endif
1442
1443 #if (RTL8821C_SUPPORT == 1)
1444 if (dm->support_ic_type == ODM_RTL8821C)
1445 READ_AND_CONFIG(8821c, _mac_reg);
1446 #endif
1447 #if (RTL8195A_SUPPORT == 1)
1448 if (dm->support_ic_type == ODM_RTL8195A)
1449 READ_AND_CONFIG_MP(8195a, _mac_reg);
1450 #endif
1451 #if (RTL8195B_SUPPORT == 1)
1452 if (dm->support_ic_type == ODM_RTL8195B)
1453 READ_AND_CONFIG_MP(8195b, _mac_reg);
1454 #endif
1455 #if (RTL8198F_SUPPORT == 1)
1456 if (dm->support_ic_type == ODM_RTL8198F)
1457 READ_AND_CONFIG_MP(8198f, _mac_reg);
1458 #endif
1459 #if (RTL8197G_SUPPORT == 1)
1460 if (dm->support_ic_type == ODM_RTL8197G)
1461 READ_AND_CONFIG_MP(8197g, _mac_reg);
1462 #endif
1463
1464 if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
1465 result = phydm_set_reg_by_fw(dm,
1466 PHYDM_HALMAC_CMD_END,
1467 0,
1468 0,
1469 0,
1470 (enum rf_path)0,
1471 0);
1472 PHYDM_DBG(dm, ODM_COMP_INIT,
1473 "mac param offload end!result = %d", result);
1474 }
1475
1476 return result;
1477 }
1478
odm_get_hw_img_version(struct dm_struct * dm)1479 u32 odm_get_hw_img_version(struct dm_struct *dm)
1480 {
1481 u32 version = 0;
1482
1483 switch (dm->support_ic_type) {
1484 /* @1 AP doesn't use PHYDM initialization in these ICs */
1485 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
1486 #if (RTL8821A_SUPPORT)
1487 case ODM_RTL8821:
1488 version = odm_get_version_mp_8821a_phy_reg();
1489 break;
1490 #endif
1491 #if (RTL8192E_SUPPORT)
1492 case ODM_RTL8192E:
1493 version = odm_get_version_mp_8192e_phy_reg();
1494 break;
1495 #endif
1496 #if (RTL8812A_SUPPORT)
1497 case ODM_RTL8812:
1498 version = odm_get_version_mp_8812a_phy_reg();
1499 break;
1500 #endif
1501 #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
1502 #if (RTL8723D_SUPPORT)
1503 case ODM_RTL8723D:
1504 version = odm_get_version_mp_8723d_phy_reg();
1505 break;
1506 #endif
1507 #if (RTL8710B_SUPPORT)
1508 case ODM_RTL8710B:
1509 version = odm_get_version_mp_8710b_phy_reg();
1510 break;
1511 #endif
1512 #if (RTL8188E_SUPPORT)
1513 case ODM_RTL8188E:
1514 version = odm_get_version_mp_8188e_phy_reg();
1515 break;
1516 #endif
1517 #if (RTL8723B_SUPPORT)
1518 case ODM_RTL8723B:
1519 version = odm_get_version_mp_8723b_phy_reg();
1520 break;
1521 #endif
1522 #if (RTL8814A_SUPPORT)
1523 case ODM_RTL8814A:
1524 version = odm_get_version_mp_8814a_phy_reg();
1525 break;
1526 #endif
1527 #if (RTL8703B_SUPPORT)
1528 case ODM_RTL8703B:
1529 version = odm_get_version_mp_8703b_phy_reg();
1530 break;
1531 #endif
1532 #if (RTL8188F_SUPPORT)
1533 case ODM_RTL8188F:
1534 version = odm_get_version_mp_8188f_phy_reg();
1535 break;
1536 #endif
1537 #if (RTL8822B_SUPPORT)
1538 case ODM_RTL8822B:
1539 version = odm_get_version_mp_8822b_phy_reg();
1540 break;
1541 #endif
1542 #if (RTL8197F_SUPPORT)
1543 case ODM_RTL8197F:
1544 version = odm_get_version_mp_8197f_phy_reg();
1545 break;
1546 #endif
1547
1548 #if (RTL8192F_SUPPORT)
1549 case ODM_RTL8192F:
1550 version = odm_get_version_mp_8192f_phy_reg();
1551 break;
1552 #endif
1553 #if (RTL8721D_SUPPORT)
1554 case ODM_RTL8721D:
1555 version = odm_get_version_mp_8721d_phy_reg();
1556 break;
1557 #endif
1558 #if (RTL8710C_SUPPORT)
1559 case ODM_RTL8710C:
1560 version = GET_VERSION_MP(8710c, _mac_reg);
1561 #endif
1562 #if (RTL8821C_SUPPORT)
1563 case ODM_RTL8821C:
1564 version = odm_get_version_mp_8821c_phy_reg();
1565 break;
1566 #endif
1567 #if (RTL8195B_SUPPORT)
1568 case ODM_RTL8195B:
1569 version = odm_get_version_mp_8195b_phy_reg();
1570 break;
1571 #endif
1572 #if (RTL8198F_SUPPORT)
1573 case ODM_RTL8198F:
1574 version = odm_get_version_mp_8198f_phy_reg();
1575 break;
1576 #endif
1577 #if (RTL8822C_SUPPORT)
1578 case ODM_RTL8822C:
1579 version = odm_get_version_mp_8822c_phy_reg();
1580 break;
1581 #endif
1582 #if (RTL8812F_SUPPORT)
1583 case ODM_RTL8812F:
1584 version = odm_get_version_mp_8812f_phy_reg();
1585 break;
1586 #endif
1587 #if (RTL8197G_SUPPORT)
1588 case ODM_RTL8197G:
1589 version = odm_get_version_mp_8197g_phy_reg();
1590 break;
1591 #endif
1592 #if (RTL8723F_SUPPORT)
1593 case ODM_RTL8723F:
1594 version = odm_get_version_mp_8723f_phy_reg();
1595 break;
1596 #endif
1597 #if (RTL8814B_SUPPORT)
1598 case ODM_RTL8814B:
1599 version = odm_get_version_mp_8814b_phy_reg();
1600 break;
1601 #endif
1602 }
1603
1604 return version;
1605 }
1606
query_phydm_trx_capability(struct dm_struct * dm)1607 u32 query_phydm_trx_capability(struct dm_struct *dm)
1608 {
1609 u32 value32 = 0xFFFFFFFF;
1610
1611 #if (RTL8821C_SUPPORT == 1)
1612 if (dm->support_ic_type == ODM_RTL8821C)
1613 value32 = query_phydm_trx_capability_8821c(dm);
1614 #endif
1615 #if (RTL8195B_SUPPORT == 1)
1616 if (dm->support_ic_type == ODM_RTL8195B)
1617 value32 = query_phydm_trx_capability_8195b(dm);
1618 #endif
1619 return value32;
1620 }
1621
query_phydm_stbc_capability(struct dm_struct * dm)1622 u32 query_phydm_stbc_capability(struct dm_struct *dm)
1623 {
1624 u32 value32 = 0xFFFFFFFF;
1625
1626 #if (RTL8821C_SUPPORT == 1)
1627 if (dm->support_ic_type == ODM_RTL8821C)
1628 value32 = query_phydm_stbc_capability_8821c(dm);
1629 #endif
1630 #if (RTL8195B_SUPPORT == 1)
1631 if (dm->support_ic_type == ODM_RTL8195B)
1632 value32 = query_phydm_stbc_capability_8195b(dm);
1633 #endif
1634
1635 return value32;
1636 }
1637
query_phydm_ldpc_capability(struct dm_struct * dm)1638 u32 query_phydm_ldpc_capability(struct dm_struct *dm)
1639 {
1640 u32 value32 = 0xFFFFFFFF;
1641
1642 #if (RTL8821C_SUPPORT == 1)
1643 if (dm->support_ic_type == ODM_RTL8821C)
1644 value32 = query_phydm_ldpc_capability_8821c(dm);
1645 #endif
1646 #if (RTL8195B_SUPPORT == 1)
1647 if (dm->support_ic_type == ODM_RTL8195B)
1648 value32 = query_phydm_ldpc_capability_8195b(dm);
1649 #endif
1650 return value32;
1651 }
1652
query_phydm_txbf_parameters(struct dm_struct * dm)1653 u32 query_phydm_txbf_parameters(struct dm_struct *dm)
1654 {
1655 u32 value32 = 0xFFFFFFFF;
1656
1657 #if (RTL8821C_SUPPORT == 1)
1658 if (dm->support_ic_type == ODM_RTL8821C)
1659 value32 = query_phydm_txbf_parameters_8821c(dm);
1660 #endif
1661 #if (RTL8195B_SUPPORT == 1)
1662 if (dm->support_ic_type == ODM_RTL8195B)
1663 value32 = query_phydm_txbf_parameters_8195b(dm);
1664 #endif
1665 return value32;
1666 }
1667
query_phydm_txbf_capability(struct dm_struct * dm)1668 u32 query_phydm_txbf_capability(struct dm_struct *dm)
1669 {
1670 u32 value32 = 0xFFFFFFFF;
1671
1672 #if (RTL8821C_SUPPORT == 1)
1673 if (dm->support_ic_type == ODM_RTL8821C)
1674 value32 = query_phydm_txbf_capability_8821c(dm);
1675 #endif
1676 #if (RTL8195B_SUPPORT == 1)
1677 if (dm->support_ic_type == ODM_RTL8195B)
1678 value32 = query_phydm_txbf_capability_8195b(dm);
1679 #endif
1680 return value32;
1681 }
1682