1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26 /*@************************************************************
27 * include files
28 ************************************************************/
29
30 #include "mp_precomp.h"
31 #include "phydm_precomp.h"
32
phydm_init_debug_setting(struct dm_struct * dm)33 void phydm_init_debug_setting(struct dm_struct *dm)
34 {
35 dm->fw_debug_components = 0;
36 dm->debug_components =
37
38 #if DBG
39 /*@BB Functions*/
40 /*@DBG_DIG |*/
41 /*@DBG_RA_MASK |*/
42 /*@DBG_DYN_TXPWR |*/
43 /*@DBG_FA_CNT |*/
44 /*@DBG_RSSI_MNTR |*/
45 /*@DBG_CCKPD |*/
46 /*@DBG_ANT_DIV |*/
47 /*@DBG_SMT_ANT |*/
48 /*@DBG_PWR_TRAIN |*/
49 /*@DBG_RA |*/
50 /*@DBG_PATH_DIV |*/
51 /*@DBG_DFS |*/
52 /*@DBG_DYN_ARFR |*/
53 /*@DBG_ADPTVTY |*/
54 /*@DBG_CFO_TRK |*/
55 /*@DBG_ENV_MNTR |*/
56 /*@DBG_PRI_CCA |*/
57 /*@DBG_ADPTV_SOML |*/
58 /*@DBG_LNA_SAT_CHK |*/
59 /*@DBG_PHY_STATUS |*/
60 /*@DBG_TMP |*/
61 /*@DBG_FW_TRACE |*/
62 /*@DBG_TXBF |*/
63 /*@DBG_COMMON_FLOW |*/
64 /*@ODM_PHY_CONFIG |*/
65 /*@ODM_COMP_INIT |*/
66 /*@DBG_CMN |*/
67 /*@ODM_COMP_API |*/
68 #endif
69 0;
70
71 dm->fw_buff_is_enpty = true;
72 dm->pre_c2h_seq = 0;
73 dm->c2h_cmd_start = 0;
74 dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD;
75 dm->cmn_dbg_msg_period = PHYDM_WATCH_DOG_PERIOD;
76 phydm_reset_rx_rate_distribution(dm);
77 }
78
phydm_bb_dbg_port_header_sel(void * dm_void,u32 header_idx)79 void phydm_bb_dbg_port_header_sel(void *dm_void, u32 header_idx)
80 {
81 struct dm_struct *dm = (struct dm_struct *)dm_void;
82
83 if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
84 odm_set_bb_reg(dm, R_0x8f8, 0x3c00000, header_idx);
85
86 /*@
87 * header_idx:
88 * (0:) '{ofdm_dbg[31:0]}'
89 * (1:) '{cca,crc32_fail,dbg_ofdm[29:0]}'
90 * (2:) '{vbon,crc32_fail,dbg_ofdm[29:0]}'
91 * (3:) '{cca,crc32_ok,dbg_ofdm[29:0]}'
92 * (4:) '{vbon,crc32_ok,dbg_ofdm[29:0]}'
93 * (5:) '{dbg_iqk_anta}'
94 * (6:) '{cca,ofdm_crc_ok,dbg_dp_anta[29:0]}'
95 * (7:) '{dbg_iqk_antb}'
96 * (8:) '{DBGOUT_RFC_b[31:0]}'
97 * (9:) '{DBGOUT_RFC_a[31:0]}'
98 * (a:) '{dbg_ofdm}'
99 * (b:) '{dbg_cck}'
100 */
101 }
102 }
103
phydm_bb_dbg_port_clock_en(void * dm_void,u8 enable)104 void phydm_bb_dbg_port_clock_en(void *dm_void, u8 enable)
105 {
106 struct dm_struct *dm = (struct dm_struct *)dm_void;
107 u32 reg_value = 0;
108
109 if (dm->support_ic_type & ODM_IC_11AC_2_SERIES) {
110 /*@enable/disable debug port clock, for power saving*/
111 reg_value = enable ? 0x7 : 0;
112 odm_set_bb_reg(dm, R_0x198c, 0x7, reg_value);
113 }
114 }
115
phydm_get_bb_dbg_port_idx(void * dm_void)116 u32 phydm_get_bb_dbg_port_idx(void *dm_void)
117 {
118 struct dm_struct *dm = (struct dm_struct *)dm_void;
119 u32 val = 0;
120
121 if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
122 phydm_bb_dbg_port_clock_en(dm, true);
123 val = odm_get_bb_reg(dm, R_0x8fc, MASKDWORD);
124 } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
125 val = odm_get_bb_reg(dm, R_0x1c3c, 0xfff00);
126 } else { /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/
127 val = odm_get_bb_reg(dm, R_0x908, MASKDWORD);
128 }
129 return val;
130 }
131
phydm_set_bb_dbg_port(void * dm_void,u8 curr_dbg_priority,u32 debug_port)132 u8 phydm_set_bb_dbg_port(void *dm_void, u8 curr_dbg_priority, u32 debug_port)
133 {
134 struct dm_struct *dm = (struct dm_struct *)dm_void;
135 u8 dbg_port_result = false;
136
137 if (curr_dbg_priority > dm->pre_dbg_priority) {
138 if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
139 phydm_bb_dbg_port_clock_en(dm, true);
140
141 odm_set_bb_reg(dm, R_0x8fc, MASKDWORD, debug_port);
142 } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
143 odm_set_bb_reg(dm, R_0x1c3c, 0xfff00, debug_port);
144 } else { /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/
145 odm_set_bb_reg(dm, R_0x908, MASKDWORD, debug_port);
146 }
147 PHYDM_DBG(dm, ODM_COMP_API,
148 "DbgPort ((0x%x)) set success, Cur_priority=((%d)), Pre_priority=((%d))\n",
149 debug_port, curr_dbg_priority, dm->pre_dbg_priority);
150 dm->pre_dbg_priority = curr_dbg_priority;
151 dbg_port_result = true;
152 }
153
154 return dbg_port_result;
155 }
156
phydm_release_bb_dbg_port(void * dm_void)157 void phydm_release_bb_dbg_port(void *dm_void)
158 {
159 struct dm_struct *dm = (struct dm_struct *)dm_void;
160
161 phydm_bb_dbg_port_clock_en(dm, false);
162 phydm_bb_dbg_port_header_sel(dm, 0);
163
164 dm->pre_dbg_priority = DBGPORT_RELEASE;
165 PHYDM_DBG(dm, ODM_COMP_API, "Release BB dbg_port\n");
166 }
167
phydm_get_bb_dbg_port_val(void * dm_void)168 u32 phydm_get_bb_dbg_port_val(void *dm_void)
169 {
170 struct dm_struct *dm = (struct dm_struct *)dm_void;
171 u32 dbg_port_value = 0;
172
173 if (dm->support_ic_type & ODM_IC_11AC_SERIES)
174 dbg_port_value = odm_get_bb_reg(dm, R_0xfa0, MASKDWORD);
175 else if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
176 dbg_port_value = odm_get_bb_reg(dm, R_0x2dbc, MASKDWORD);
177 else /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/
178 dbg_port_value = odm_get_bb_reg(dm, R_0xdf4, MASKDWORD);
179
180 PHYDM_DBG(dm, ODM_COMP_API, "dbg_port_value = 0x%x\n", dbg_port_value);
181 return dbg_port_value;
182 }
183
184 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
185 #if (ODM_IC_11N_SERIES_SUPPORT)
phydm_bb_hw_dbg_info_n(void * dm_void,u32 * _used,char * output,u32 * _out_len)186 void phydm_bb_hw_dbg_info_n(void *dm_void, u32 *_used, char *output,
187 u32 *_out_len)
188 {
189 struct dm_struct *dm = (struct dm_struct *)dm_void;
190 u32 used = *_used;
191 u32 out_len = *_out_len;
192 u32 value32 = 0, value32_1 = 0;
193 u8 rf_gain_a = 0, rf_gain_b = 0, rf_gain_c = 0, rf_gain_d = 0;
194 u8 rx_snr_a = 0, rx_snr_b = 0, rx_snr_c = 0, rx_snr_d = 0;
195 s8 rxevm_0 = 0, rxevm_1 = 0;
196 #if 1
197 struct phydm_cfo_rpt cfo;
198 u8 i = 0;
199 #else
200 s32 short_cfo_a = 0, short_cfo_b = 0, long_cfo_a = 0, long_cfo_b = 0;
201 s32 scfo_a = 0, scfo_b = 0, avg_cfo_a = 0, avg_cfo_b = 0;
202 s32 cfo_end_a = 0, cfo_end_b = 0, acq_cfo_a = 0, acq_cfo_b = 0;
203 #endif
204
205 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
206 "BB Report Info");
207
208 /*@AGC result*/
209 value32 = odm_get_bb_reg(dm, R_0xdd0, MASKDWORD);
210 rf_gain_a = (u8)(value32 & 0x3f);
211 rf_gain_a = rf_gain_a << 1;
212
213 rf_gain_b = (u8)((value32 >> 8) & 0x3f);
214 rf_gain_b = rf_gain_b << 1;
215
216 rf_gain_c = (u8)((value32 >> 16) & 0x3f);
217 rf_gain_c = rf_gain_c << 1;
218
219 rf_gain_d = (u8)((value32 >> 24) & 0x3f);
220 rf_gain_d = rf_gain_d << 1;
221
222 PDM_SNPF(out_len, used, output + used, out_len - used,
223 "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)",
224 rf_gain_a, rf_gain_b, rf_gain_c, rf_gain_d);
225
226 /*SNR report*/
227 value32 = odm_get_bb_reg(dm, R_0xdd4, MASKDWORD);
228 rx_snr_a = (u8)(value32 & 0xff);
229 rx_snr_a = rx_snr_a >> 1;
230
231 rx_snr_b = (u8)((value32 >> 8) & 0xff);
232 rx_snr_b = rx_snr_b >> 1;
233
234 rx_snr_c = (u8)((value32 >> 16) & 0xff);
235 rx_snr_c = rx_snr_c >> 1;
236
237 rx_snr_d = (u8)((value32 >> 24) & 0xff);
238 rx_snr_d = rx_snr_d >> 1;
239
240 PDM_SNPF(out_len, used, output + used, out_len - used,
241 "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)",
242 rx_snr_a, rx_snr_b, rx_snr_c, rx_snr_d);
243
244 /* PostFFT related info*/
245 value32 = odm_get_bb_reg(dm, R_0xdd8, MASKDWORD);
246
247 rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16);
248 rxevm_0 /= 2;
249 if (rxevm_0 < -63)
250 rxevm_0 = 0;
251
252 rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24);
253 rxevm_1 /= 2;
254 if (rxevm_1 < -63)
255 rxevm_1 = 0;
256
257 PDM_SNPF(out_len, used, output + used, out_len - used,
258 "\r\n %-35s = %d / %d", "RXEVM (1ss/2ss)", rxevm_0, rxevm_1);
259
260 #if 1
261 phydm_get_cfo_info(dm, &cfo);
262 for (i = 0; i < dm->num_rf_path; i++) {
263 PDM_SNPF(out_len, used, output + used, out_len - used,
264 "\r\n %s[%d] %-28s = {%d, %d, %d, %d, %d}",
265 "CFO", i, "{S, L, Sec, Acq, End}",
266 cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], cfo.cfo_rpt_sec[i],
267 cfo.cfo_rpt_acq[i], cfo.cfo_rpt_end[i]);
268 }
269 #else
270 /*@CFO Report Info*/
271 odm_set_bb_reg(dm, R_0xd00, BIT(26), 1);
272
273 /*Short CFO*/
274 value32 = odm_get_bb_reg(dm, R_0xdac, MASKDWORD);
275 value32_1 = odm_get_bb_reg(dm, R_0xdb0, MASKDWORD);
276
277 short_cfo_b = (s32)(value32 & 0xfff); /*S(12,11)*/
278 short_cfo_a = (s32)((value32 & 0x0fff0000) >> 16);
279
280 long_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
281 long_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
282
283 /*SFO 2's to dec*/
284 if (short_cfo_a > 2047)
285 short_cfo_a = short_cfo_a - 4096;
286 if (short_cfo_b > 2047)
287 short_cfo_b = short_cfo_b - 4096;
288
289 short_cfo_a = (short_cfo_a * 312500) / 2048;
290 short_cfo_b = (short_cfo_b * 312500) / 2048;
291
292 /*@LFO 2's to dec*/
293
294 if (long_cfo_a > 4095)
295 long_cfo_a = long_cfo_a - 8192;
296
297 if (long_cfo_b > 4095)
298 long_cfo_b = long_cfo_b - 8192;
299
300 long_cfo_a = long_cfo_a * 312500 / 4096;
301 long_cfo_b = long_cfo_b * 312500 / 4096;
302
303 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
304 "CFO Report Info");
305 PDM_SNPF(out_len, used, output + used, out_len - used,
306 "\r\n %-35s = %d / %d", "Short CFO(Hz) <A/B>", short_cfo_a,
307 short_cfo_b);
308 PDM_SNPF(out_len, used, output + used, out_len - used,
309 "\r\n %-35s = %d / %d", "Long CFO(Hz) <A/B>", long_cfo_a,
310 long_cfo_b);
311
312 /*SCFO*/
313 value32 = odm_get_bb_reg(dm, R_0xdb8, MASKDWORD);
314 value32_1 = odm_get_bb_reg(dm, R_0xdb4, MASKDWORD);
315
316 scfo_b = (s32)(value32 & 0x7ff); /*S(11,10)*/
317 scfo_a = (s32)((value32 & 0x07ff0000) >> 16);
318
319 if (scfo_a > 1023)
320 scfo_a = scfo_a - 2048;
321
322 if (scfo_b > 1023)
323 scfo_b = scfo_b - 2048;
324
325 scfo_a = scfo_a * 312500 / 1024;
326 scfo_b = scfo_b * 312500 / 1024;
327
328 avg_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
329 avg_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
330
331 if (avg_cfo_a > 4095)
332 avg_cfo_a = avg_cfo_a - 8192;
333
334 if (avg_cfo_b > 4095)
335 avg_cfo_b = avg_cfo_b - 8192;
336
337 avg_cfo_a = avg_cfo_a * 312500 / 4096;
338 avg_cfo_b = avg_cfo_b * 312500 / 4096;
339
340 PDM_SNPF(out_len, used, output + used, out_len - used,
341 "\r\n %-35s = %d / %d", "value SCFO(Hz) <A/B>", scfo_a,
342 scfo_b);
343 PDM_SNPF(out_len, used, output + used, out_len - used,
344 "\r\n %-35s = %d / %d", "Avg CFO(Hz) <A/B>", avg_cfo_a,
345 avg_cfo_b);
346
347 value32 = odm_get_bb_reg(dm, R_0xdbc, MASKDWORD);
348 value32_1 = odm_get_bb_reg(dm, R_0xde0, MASKDWORD);
349
350 cfo_end_b = (s32)(value32 & 0x1fff); /*S(13,12)*/
351 cfo_end_a = (s32)((value32 & 0x1fff0000) >> 16);
352
353 if (cfo_end_a > 4095)
354 cfo_end_a = cfo_end_a - 8192;
355
356 if (cfo_end_b > 4095)
357 cfo_end_b = cfo_end_b - 8192;
358
359 cfo_end_a = cfo_end_a * 312500 / 4096;
360 cfo_end_b = cfo_end_b * 312500 / 4096;
361
362 acq_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
363 acq_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
364
365 if (acq_cfo_a > 4095)
366 acq_cfo_a = acq_cfo_a - 8192;
367
368 if (acq_cfo_b > 4095)
369 acq_cfo_b = acq_cfo_b - 8192;
370
371 acq_cfo_a = acq_cfo_a * 312500 / 4096;
372 acq_cfo_b = acq_cfo_b * 312500 / 4096;
373
374 PDM_SNPF(out_len, used, output + used, out_len - used,
375 "\r\n %-35s = %d / %d", "End CFO(Hz) <A/B>", cfo_end_a,
376 cfo_end_b);
377 PDM_SNPF(out_len, used, output + used, out_len - used,
378 "\r\n %-35s = %d / %d", "ACQ CFO(Hz) <A/B>", acq_cfo_a,
379 acq_cfo_b);
380 #endif
381 }
382 #endif
383
384 #if (ODM_IC_11AC_SERIES_SUPPORT)
385 #if (RTL8822B_SUPPORT)
phydm_bb_hw_dbg_info_8822b(void * dm_void,u32 * _used,char * output,u32 * _out_len)386 void phydm_bb_hw_dbg_info_8822b(void *dm_void, u32 *_used, char *output,
387 u32 *_out_len)
388 {
389 struct dm_struct *dm = (struct dm_struct *)dm_void;
390 u32 used = *_used;
391 u32 out_len = *_out_len;
392 u32 condi_num = 0;
393 u8 i = 0;
394
395 if (!(dm->support_ic_type == ODM_RTL8822B))
396 return;
397
398 condi_num = phydm_get_condi_num_8822b(dm);
399 phydm_get_condi_num_acc_8822b(dm);
400
401 PDM_SNPF(out_len, used, output + used, out_len - used,
402 "\r\n %-35s = %d.%.4d", "condi_num",
403 condi_num >> 4, phydm_show_fraction_num(condi_num & 0xf, 4));
404
405 for (i = 0; i < CN_CNT_MAX; i++) {
406 PDM_SNPF(out_len, used, output + used, out_len - used,
407 "\r\n Tone_num[CN>%d]%-21s = %d",
408 i, " ", dm->phy_dbg_info.condi_num_cdf[i]);
409 }
410
411 *_used = used;
412 *_out_len = out_len;
413 }
414 #endif
415
phydm_bb_hw_dbg_info_ac(void * dm_void,u32 * _used,char * output,u32 * _out_len)416 void phydm_bb_hw_dbg_info_ac(void *dm_void, u32 *_used, char *output,
417 u32 *_out_len)
418 {
419 struct dm_struct *dm = (struct dm_struct *)dm_void;
420 u32 used = *_used;
421 u32 out_len = *_out_len;
422 char *tmp_string = NULL;
423 u8 rx_ht_bw, rx_vht_bw, rxsc, rx_ht, bw_idx = 0;
424 static u8 v_rx_bw;
425 u32 value32, value32_1, value32_2, value32_3;
426 struct phydm_cfo_rpt cfo;
427 u8 i = 0;
428 static u8 tail, parity, rsv, vrsv, smooth, htsound, agg;
429 static u8 stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts;
430 static u8 vtxops, vrsv2, vbrsv, bf, vbcrc;
431 static u16 h_length, htcrc8, length;
432 static u16 vpaid;
433 static u16 v_length, vhtcrc8, v_mcss, v_tail, vb_tail;
434 static u8 hmcss, hrx_bw;
435 u8 pwdb;
436 s8 rxevm_0, rxevm_1, rxevm_2;
437 u8 rf_gain[4];
438 u8 rx_snr[4];
439 s32 sig_power;
440
441 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
442 "BB Report Info");
443
444 /*@ [BW & Mode] =====================================================*/
445
446 value32 = odm_get_bb_reg(dm, R_0xf80, MASKDWORD);
447 rx_ht = (u8)((value32 & 0x180) >> 7);
448
449 if (rx_ht == AD_VHT_MODE) {
450 tmp_string = "VHT";
451 bw_idx = (u8)((value32 >> 1) & 0x3);
452 } else if (rx_ht == AD_HT_MODE) {
453 tmp_string = "HT";
454 bw_idx = (u8)(value32 & 0x1);
455 } else {
456 tmp_string = "Legacy";
457 bw_idx = 0;
458 }
459 PDM_SNPF(out_len, used, output + used, out_len - used,
460 "\r\n %-35s %s %dM", "mode", tmp_string, (20 << bw_idx));
461
462 if (rx_ht != AD_LEGACY_MODE) {
463 rxsc = (u8)(value32 & 0x78);
464
465 if (rxsc == 0)
466 tmp_string = "duplicate/full bw";
467 else if (rxsc == 1)
468 tmp_string = "usc20-1";
469 else if (rxsc == 2)
470 tmp_string = "lsc20-1";
471 else if (rxsc == 3)
472 tmp_string = "usc20-2";
473 else if (rxsc == 4)
474 tmp_string = "lsc20-2";
475 else if (rxsc == 9)
476 tmp_string = "usc40";
477 else if (rxsc == 10)
478 tmp_string = "lsc40";
479
480 PDM_SNPF(out_len, used, output + used, out_len - used,
481 " %-35s", tmp_string);
482 }
483
484 /*@ [RX signal power and AGC related info] ==========================*/
485
486 pwdb = (u8)odm_get_bb_reg(dm, R_0xf90, MASKBYTE1);
487 sig_power = -110 + (pwdb >> 1);
488 PDM_SNPF(out_len, used, output + used, out_len - used,
489 "\r\n %-35s = %d", "OFDM RX Signal Power(dB)", sig_power);
490
491 value32 = odm_get_bb_reg(dm, R_0xd14, MASKDWORD);
492 rx_snr[RF_PATH_A] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
493 rf_gain[RF_PATH_A] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
494
495 value32 = odm_get_bb_reg(dm, R_0xd54, MASKDWORD);
496 rx_snr[RF_PATH_B] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
497 rf_gain[RF_PATH_B] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
498
499 value32 = odm_get_bb_reg(dm, R_0xd94, MASKDWORD);
500 rx_snr[RF_PATH_C] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
501 rf_gain[RF_PATH_C] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
502
503 value32 = odm_get_bb_reg(dm, R_0xdd4, MASKDWORD);
504 rx_snr[RF_PATH_D] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
505 rf_gain[RF_PATH_D] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
506
507 PDM_SNPF(out_len, used, output + used, out_len - used,
508 "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)",
509 rf_gain[RF_PATH_A], rf_gain[RF_PATH_B],
510 rf_gain[RF_PATH_C], rf_gain[RF_PATH_D]);
511
512 /*@ [RX counter Info] ===============================================*/
513
514 PDM_SNPF(out_len, used, output + used, out_len - used,
515 "\r\n %-35s = %d", "OFDM CCA cnt",
516 odm_get_bb_reg(dm, R_0xf08, 0xFFFF0000));
517
518 PDM_SNPF(out_len, used, output + used, out_len - used,
519 "\r\n %-35s = %d", "OFDM SBD Fail cnt",
520 odm_get_bb_reg(dm, R_0xfd0, 0xFFFF));
521
522 value32 = odm_get_bb_reg(dm, R_0xfc4, MASKDWORD);
523 PDM_SNPF(out_len, used, output + used, out_len - used,
524 "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail cnt",
525 value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
526
527 PDM_SNPF(out_len, used, output + used, out_len - used,
528 "\r\n %-35s = %d", "CCK CCA cnt",
529 odm_get_bb_reg(dm, R_0xfcc, 0xFFFF));
530
531 value32 = odm_get_bb_reg(dm, R_0xfbc, MASKDWORD);
532 PDM_SNPF(out_len, used, output + used, out_len - used,
533 "\r\n %-35s = %d / %d",
534 "LSIG (parity Fail/rate Illegal) cnt", value32 & 0xFFFF,
535 ((value32 & 0xFFFF0000) >> 16));
536
537 PDM_SNPF(out_len, used, output + used, out_len - used,
538 "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT cnt",
539 odm_get_bb_reg(dm, R_0xfc0, (0xFFFF0000 >> 16)),
540 odm_get_bb_reg(dm, R_0xfc8, 0xFFFF));
541
542 /*@ [PostFFT Info] =================================================*/
543 value32 = odm_get_bb_reg(dm, R_0xf8c, MASKDWORD);
544 rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16);
545 rxevm_0 /= 2;
546 if (rxevm_0 < -63)
547 rxevm_0 = 0;
548
549 rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24);
550 rxevm_1 /= 2;
551 value32 = odm_get_bb_reg(dm, R_0xf88, MASKDWORD);
552 rxevm_2 = (s8)((value32 & MASKBYTE2) >> 16);
553 rxevm_2 /= 2;
554
555 if (rxevm_1 < -63)
556 rxevm_1 = 0;
557 if (rxevm_2 < -63)
558 rxevm_2 = 0;
559
560 PDM_SNPF(out_len, used, output + used, out_len - used,
561 "\r\n %-35s = %d / %d / %d", "RXEVM (1ss/2ss/3ss)", rxevm_0,
562 rxevm_1, rxevm_2);
563 PDM_SNPF(out_len, used, output + used, out_len - used,
564 "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D dB)",
565 rx_snr[RF_PATH_A], rx_snr[RF_PATH_B],
566 rx_snr[RF_PATH_C], rx_snr[RF_PATH_D]);
567
568 value32 = odm_get_bb_reg(dm, R_0xf8c, MASKDWORD);
569 PDM_SNPF(out_len, used, output + used, out_len - used,
570 "\r\n %-35s = %d / %d", "CSI_1st /CSI_2nd", value32 & 0xFFFF,
571 ((value32 & 0xFFFF0000) >> 16));
572
573 /*@ [CFO Report Info] ===============================================*/
574 phydm_get_cfo_info(dm, &cfo);
575 for (i = 0; i < dm->num_rf_path; i++) {
576 PDM_SNPF(out_len, used, output + used, out_len - used,
577 "\r\n %s[%d] %-28s = {%d, %d, %d, %d, %d}",
578 "CFO", i, "{S, L, Sec, Acq, End}",
579 cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], cfo.cfo_rpt_sec[i],
580 cfo.cfo_rpt_acq[i], cfo.cfo_rpt_end[i]);
581 }
582
583 /*@ [L-SIG Content] =================================================*/
584 value32 = odm_get_bb_reg(dm, R_0xf20, MASKDWORD);
585
586 tail = (u8)((value32 & 0xfc0000) >> 18);/*@[23:18]*/
587 parity = (u8)((value32 & 0x20000) >> 17);/*@[17]*/
588 length = (u16)((value32 & 0x1ffe0) >> 5);/*@[16:5]*/
589 rsv = (u8)((value32 & 0x10) >> 4);/*@[4]*/
590
591 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
592 "L-SIG");
593 PDM_SNPF(out_len, used, output + used, out_len - used,
594 "\r\n %-35s = %d M", "rate",
595 phydm_get_l_sig_rate(dm, (u8)(value32 & 0x0f)));
596
597 PDM_SNPF(out_len, used, output + used, out_len - used,
598 "\r\n %-35s = %x / %d / %d", "Rsv/length/parity", rsv, length,
599 parity);
600
601 if (rx_ht == AD_HT_MODE) {
602 /*@ [HT SIG 1] ======================================================*/
603 value32 = odm_get_bb_reg(dm, R_0xf2c, MASKDWORD);
604
605 hmcss = (u8)(value32 & 0x7F);
606 hrx_bw = (u8)((value32 & 0x80) >> 7);
607 h_length = (u16)((value32 & 0x0fff00) >> 8);
608
609 PDM_SNPF(out_len, used, output + used, out_len - used,
610 "\r\n %-35s", "HT-SIG1");
611 PDM_SNPF(out_len, used, output + used, out_len - used,
612 "\r\n %-35s = %d / %d / %d", "MCS/BW/length",
613 hmcss, hrx_bw, h_length);
614 /*@ [HT SIG 2] ======================================================*/
615 value32 = odm_get_bb_reg(dm, R_0xf30, MASKDWORD);
616 smooth = (u8)(value32 & 0x01);
617 htsound = (u8)((value32 & 0x02) >> 1);
618 rsv = (u8)((value32 & 0x04) >> 2);
619 agg = (u8)((value32 & 0x08) >> 3);
620 stbc = (u8)((value32 & 0x30) >> 4);
621 fec = (u8)((value32 & 0x40) >> 6);
622 sgi = (u8)((value32 & 0x80) >> 7);
623 htltf = (u8)((value32 & 0x300) >> 8);
624 htcrc8 = (u16)((value32 & 0x3fc00) >> 10);
625 tail = (u8)((value32 & 0xfc0000) >> 18);
626
627 PDM_SNPF(out_len, used, output + used, out_len - used,
628 "\r\n %-35s",
629 "HT-SIG2");
630 PDM_SNPF(out_len, used, output + used, out_len - used,
631 "\r\n %-35s = %x / %x / %x / %x / %x / %x",
632 "Smooth/NoSound/Rsv/Aggregate/STBC/LDPC",
633 smooth, htsound, rsv, agg, stbc, fec);
634 PDM_SNPF(out_len, used, output + used, out_len - used,
635 "\r\n %-35s = %x / %x / %x / %x",
636 "SGI/E-HT-LTFs/CRC/tail",
637 sgi, htltf, htcrc8, tail);
638 } else if (rx_ht == AD_VHT_MODE) {
639 /*@ [VHT SIG A1] ====================================================*/
640 value32 = odm_get_bb_reg(dm, R_0xf2c, MASKDWORD);
641
642 v_rx_bw = (u8)(value32 & 0x03);
643 vrsv = (u8)((value32 & 0x04) >> 2);
644 vstbc = (u8)((value32 & 0x08) >> 3);
645 vgid = (u8)((value32 & 0x3f0) >> 4);
646 v_nsts = (u8)(((value32 & 0x1c00) >> 10) + 1);
647 vpaid = (u16)((value32 & 0x3fe000) >> 13);
648 vtxops = (u8)((value32 & 0x400000) >> 22);
649 vrsv2 = (u8)((value32 & 0x800000) >> 23);
650
651 PDM_SNPF(out_len, used, output + used, out_len - used,
652 "\r\n %-35s",
653 "VHT-SIG-A1");
654 PDM_SNPF(out_len, used, output + used, out_len - used,
655 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x",
656 "BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw,
657 vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2);
658
659 /*@ [VHT SIG A2] ====================================================*/
660 value32 = odm_get_bb_reg(dm, R_0xf30, MASKDWORD);
661
662 /* @sgi=(u8)(value32&0x01); */
663 sgiext = (u8)(value32 & 0x03);
664 /* @fec = (u8)(value32&0x04); */
665 fecext = (u8)((value32 & 0x0C) >> 2);
666
667 v_mcss = (u8)((value32 & 0xf0) >> 4);
668 bf = (u8)((value32 & 0x100) >> 8);
669 vrsv = (u8)((value32 & 0x200) >> 9);
670 vhtcrc8 = (u16)((value32 & 0x3fc00) >> 10);
671 v_tail = (u8)((value32 & 0xfc0000) >> 18);
672
673 PDM_SNPF(out_len, used, output + used, out_len - used,
674 "\r\n %-35s", "VHT-SIG-A2");
675 PDM_SNPF(out_len, used, output + used, out_len - used,
676 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x",
677 "SGI/FEC/MCS/BF/Rsv/CRC/tail",
678 sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail);
679
680 /*@ [VHT SIG B] ====================================================*/
681 value32 = odm_get_bb_reg(dm, R_0xf34, MASKDWORD);
682
683 #if 0
684 v_length = (u16)(value32 & 0x1fffff);
685 vbrsv = (u8)((value32 & 0x600000) >> 21);
686 vb_tail = (u16)((value32 & 0x1f800000) >> 23);
687 vbcrc = (u8)((value32 & 0x80000000) >> 31);
688 #endif
689
690 PDM_SNPF(out_len, used, output + used, out_len - used,
691 "\r\n %-35s", "VHT-SIG-B");
692 PDM_SNPF(out_len, used, output + used, out_len - used,
693 "\r\n %-35s = %x",
694 "Codeword", value32);
695
696 #if 0
697 PDM_SNPF(out_len, used, output + used, out_len - used,
698 "\r\n %-35s = %x / %x / %x / %x",
699 "length/Rsv/tail/CRC",
700 v_length, vbrsv, vb_tail, vbcrc);
701 #endif
702 }
703
704 *_used = used;
705 *_out_len = out_len;
706 }
707 #endif
708
709 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
phydm_bb_hw_dbg_info_jgr3(void * dm_void,u32 * _used,char * output,u32 * _out_len)710 void phydm_bb_hw_dbg_info_jgr3(void *dm_void, u32 *_used, char *output,
711 u32 *_out_len)
712 {
713 struct dm_struct *dm = (struct dm_struct *)dm_void;
714 u32 used = *_used;
715 u32 out_len = *_out_len;
716 char *tmp_string = NULL;
717 u8 rx_ht_bw = 0, rx_vht_bw = 0, rx_ht = 0;
718 static u8 v_rx_bw;
719 u32 value32 = 0;
720 u8 i = 0;
721 static u8 tail, parity, rsv, vrsv, smooth, htsound, agg;
722 static u8 stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts;
723 static u8 vtxops, vrsv2, vbrsv, bf, vbcrc;
724 static u16 h_length, htcrc8, length;
725 static u16 vpaid;
726 static u16 v_length, vhtcrc8, v_mcss, v_tail, vb_tail;
727 static u8 hmcss, hrx_bw;
728
729 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
730 "BB Report Info");
731
732 /*@ [Mode] =====================================================*/
733
734 value32 = odm_get_bb_reg(dm, R_0x2c20, MASKDWORD);
735 rx_ht = (u8)((value32 & 0xC0000) >> 18);
736 if (rx_ht == AD_VHT_MODE)
737 tmp_string = "VHT";
738 else if (rx_ht == AD_HT_MODE)
739 tmp_string = "HT";
740 else
741 tmp_string = "Legacy";
742
743 PDM_SNPF(out_len, used, output + used, out_len - used,
744 "\r\n %-35s %s", "mode", tmp_string);
745 /*@ [RX counter Info] ===============================================*/
746
747 if (dm->support_ic_type & ODM_RTL8723F) {
748 PDM_SNPF(out_len, used, output + used, out_len - used,
749 "\r\n %-35s = %d", "CCK CCA cnt",
750 odm_get_bb_reg(dm, R_0x2aa0, 0xFFFF));
751 } else {
752 PDM_SNPF(out_len, used, output + used, out_len - used,
753 "\r\n %-35s = %d", "CCK CCA cnt",
754 odm_get_bb_reg(dm, R_0x2c08, 0xFFFF));
755 }
756 PDM_SNPF(out_len, used, output + used, out_len - used,
757 "\r\n %-35s = %d", "OFDM CCA cnt",
758 odm_get_bb_reg(dm, R_0x2c08, 0xFFFF0000));
759
760 PDM_SNPF(out_len, used, output + used, out_len - used,
761 "\r\n %-35s = %d", "OFDM SBD Fail cnt",
762 odm_get_bb_reg(dm, R_0x2d20, 0xFFFF0000));
763
764 PDM_SNPF(out_len, used, output + used, out_len - used,
765 "\r\n %-35s = %d / %d",
766 "LSIG (parity Fail/rate Illegal) cnt",
767 odm_get_bb_reg(dm, R_0x2d04, 0xFFFF0000),
768 odm_get_bb_reg(dm, R_0x2d08, 0xFFFF));
769
770 value32 = odm_get_bb_reg(dm, R_0x2d10, MASKDWORD);
771 PDM_SNPF(out_len, used, output + used, out_len - used,
772 "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT cnt",
773 value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
774
775 value32 = odm_get_bb_reg(dm, R_0x2d0c, MASKDWORD);
776 PDM_SNPF(out_len, used, output + used, out_len - used,
777 "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail cnt",
778 value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
779 /*@ [L-SIG Content] =================================================*/
780 value32 = odm_get_bb_reg(dm, R_0x2c20, MASKDWORD);
781
782 parity = (u8)((value32 & 0x20000) >> 17);/*@[17]*/
783 length = (u16)((value32 & 0x1ffe0) >> 5);/*@[16:5]*/
784 rsv = (u8)((value32 & 0x10) >> 4);/*@[4]*/
785
786 PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
787 "L-SIG");
788 PDM_SNPF(out_len, used, output + used, out_len - used,
789 "\r\n %-35s = %d M", "rate",
790 phydm_get_l_sig_rate(dm, (u8)(value32 & 0x0f)));
791
792 PDM_SNPF(out_len, used, output + used, out_len - used,
793 "\r\n %-35s = %x / %d / %d", "Rsv/length/parity", rsv, length,
794 parity);
795
796 if (rx_ht == AD_HT_MODE) {
797 /*@ [HT SIG 1] ======================================================*/
798 value32 = odm_get_bb_reg(dm, R_0x2c2c, MASKDWORD);
799
800 hmcss = (u8)(value32 & 0x7F);
801 hrx_bw = (u8)((value32 & 0x80) >> 7);
802 h_length = (u16)((value32 & 0x0fff00) >> 8);
803
804 PDM_SNPF(out_len, used, output + used, out_len - used,
805 "\r\n %-35s", "HT-SIG1");
806 PDM_SNPF(out_len, used, output + used, out_len - used,
807 "\r\n %-35s = %d / %d / %d", "MCS/BW/length",
808 hmcss, hrx_bw, h_length);
809 /*@ [HT SIG 2] ======================================================*/
810 value32 = odm_get_bb_reg(dm, R_0x2c30, MASKDWORD);
811 smooth = (u8)(value32 & 0x01);
812 htsound = (u8)((value32 & 0x02) >> 1);
813 rsv = (u8)((value32 & 0x04) >> 2);
814 agg = (u8)((value32 & 0x08) >> 3);
815 stbc = (u8)((value32 & 0x30) >> 4);
816 fec = (u8)((value32 & 0x40) >> 6);
817 sgi = (u8)((value32 & 0x80) >> 7);
818 htltf = (u8)((value32 & 0x300) >> 8);
819 htcrc8 = (u16)((value32 & 0x3fc00) >> 10);
820 tail = (u8)((value32 & 0xfc0000) >> 18);
821
822 PDM_SNPF(out_len, used, output + used, out_len - used,
823 "\r\n %-35s",
824 "HT-SIG2");
825 PDM_SNPF(out_len, used, output + used, out_len - used,
826 "\r\n %-35s = %x / %x / %x / %x / %x / %x",
827 "Smooth/NoSound/Rsv/Aggregate/STBC/LDPC",
828 smooth, htsound, rsv, agg, stbc, fec);
829 PDM_SNPF(out_len, used, output + used, out_len - used,
830 "\r\n %-35s = %x / %x / %x / %x",
831 "SGI/E-HT-LTFs/CRC/tail",
832 sgi, htltf, htcrc8, tail);
833 } else if (rx_ht == AD_VHT_MODE) {
834 /*@ [VHT SIG A1] ====================================================*/
835 value32 = odm_get_bb_reg(dm, R_0x2c2c, MASKDWORD);
836
837 v_rx_bw = (u8)(value32 & 0x03);
838 vrsv = (u8)((value32 & 0x04) >> 2);
839 vstbc = (u8)((value32 & 0x08) >> 3);
840 vgid = (u8)((value32 & 0x3f0) >> 4);
841 v_nsts = (u8)(((value32 & 0x1c00) >> 10) + 1);
842 vpaid = (u16)((value32 & 0x3fe000) >> 13);
843 vtxops = (u8)((value32 & 0x400000) >> 22);
844 vrsv2 = (u8)((value32 & 0x800000) >> 23);
845
846 PDM_SNPF(out_len, used, output + used, out_len - used,
847 "\r\n %-35s",
848 "VHT-SIG-A1");
849 PDM_SNPF(out_len, used, output + used, out_len - used,
850 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x",
851 "BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw,
852 vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2);
853
854 /*@ [VHT SIG A2] ====================================================*/
855 value32 = odm_get_bb_reg(dm, R_0x2c30, MASKDWORD);
856
857 /* @sgi=(u8)(value32&0x01); */
858 sgiext = (u8)(value32 & 0x03);
859 /* @fec = (u8)(value32&0x04); */
860 fecext = (u8)((value32 & 0x0C) >> 2);
861
862 v_mcss = (u8)((value32 & 0xf0) >> 4);
863 bf = (u8)((value32 & 0x100) >> 8);
864 vrsv = (u8)((value32 & 0x200) >> 9);
865 vhtcrc8 = (u16)((value32 & 0x3fc00) >> 10);
866 v_tail = (u8)((value32 & 0xfc0000) >> 18);
867
868 PDM_SNPF(out_len, used, output + used, out_len - used,
869 "\r\n %-35s", "VHT-SIG-A2");
870 PDM_SNPF(out_len, used, output + used, out_len - used,
871 "\r\n %-35s = %x / %x / %x / %x / %x / %x / %x",
872 "SGI/FEC/MCS/BF/Rsv/CRC/tail",
873 sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail);
874
875 /*@ [VHT SIG B] ====================================================*/
876 value32 = odm_get_bb_reg(dm, R_0x2c34, MASKDWORD);
877
878 PDM_SNPF(out_len, used, output + used, out_len - used,
879 "\r\n %-35s", "VHT-SIG-B");
880 PDM_SNPF(out_len, used, output + used, out_len - used,
881 "\r\n %-35s = %x",
882 "Codeword", value32);
883
884 if (v_rx_bw == 0) {
885 v_length = (u16)(value32 & 0x1ffff);
886 vbrsv = (u8)((value32 & 0xE0000) >> 17);
887 vb_tail = (u16)((value32 & 0x03F00000) >> 20);
888 } else if (v_rx_bw == 1) {
889 v_length = (u16)(value32 & 0x7FFFF);
890 vbrsv = (u8)((value32 & 0x180000) >> 19);
891 vb_tail = (u16)((value32 & 0x07E00000) >> 21);
892 } else if (v_rx_bw == 2) {
893 v_length = (u16)(value32 & 0x1fffff);
894 vbrsv = (u8)((value32 & 0x600000) >> 21);
895 vb_tail = (u16)((value32 & 0x1f800000) >> 23);
896 }
897 vbcrc = (u8)((value32 & 0x80000000) >> 31);
898
899 PDM_SNPF(out_len, used, output + used, out_len - used,
900 "\r\n %-35s = %x / %x / %x / %x",
901 "length/Rsv/tail/CRC",
902 v_length, vbrsv, vb_tail, vbcrc);
903 }
904
905 *_used = used;
906 *_out_len = out_len;
907 }
908 #endif
909
phydm_get_l_sig_rate(void * dm_void,u8 rate_idx_l_sig)910 u8 phydm_get_l_sig_rate(void *dm_void, u8 rate_idx_l_sig)
911 {
912 u8 rate_idx = 0xff;
913
914 switch (rate_idx_l_sig) {
915 case 0x0b:
916 rate_idx = 6;
917 break;
918 case 0x0f:
919 rate_idx = 9;
920 break;
921 case 0x0a:
922 rate_idx = 12;
923 break;
924 case 0x0e:
925 rate_idx = 18;
926 break;
927 case 0x09:
928 rate_idx = 24;
929 break;
930 case 0x0d:
931 rate_idx = 36;
932 break;
933 case 0x08:
934 rate_idx = 48;
935 break;
936 case 0x0c:
937 rate_idx = 54;
938 break;
939 default:
940 rate_idx = 0xff;
941 break;
942 }
943
944 return rate_idx;
945 }
946
phydm_bb_hw_dbg_info(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)947 void phydm_bb_hw_dbg_info(void *dm_void, char input[][16], u32 *_used,
948 char *output, u32 *_out_len)
949 {
950 struct dm_struct *dm = (struct dm_struct *)dm_void;
951 u32 used = *_used;
952 u32 out_len = *_out_len;
953
954 switch (dm->ic_ip_series) {
955 #if (ODM_IC_11N_SERIES_SUPPORT)
956 case PHYDM_IC_N:
957 phydm_bb_hw_dbg_info_n(dm, &used, output, &out_len);
958 break;
959 #endif
960
961 #if (ODM_IC_11AC_SERIES_SUPPORT)
962 case PHYDM_IC_AC:
963 phydm_bb_hw_dbg_info_ac(dm, &used, output, &out_len);
964 phydm_reset_bb_hw_cnt(dm);
965 #if (RTL8822B_SUPPORT)
966 phydm_bb_hw_dbg_info_8822b(dm, &used, output, &out_len);
967 #endif
968 break;
969 #endif
970
971 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
972 case PHYDM_IC_JGR3:
973 phydm_bb_hw_dbg_info_jgr3(dm, &used, output, &out_len);
974 phydm_reset_bb_hw_cnt(dm);
975 break;
976 #endif
977 default:
978 break;
979 }
980
981 *_used = used;
982 *_out_len = out_len;
983 }
984
985 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
986
987 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
988
phydm_dm_summary_cli_win(void * dm_void,char * buf,u8 macid)989 void phydm_dm_summary_cli_win(void *dm_void, char *buf, u8 macid)
990 {
991 struct dm_struct *dm = (struct dm_struct *)dm_void;
992 struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
993 struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
994 struct cmn_sta_info *sta = NULL;
995 struct ra_sta_info *ra = NULL;
996 struct dtp_info *dtp = NULL;
997 u64 comp = dm->support_ability;
998 u64 pause_comp = dm->pause_ability;
999
1000 if (!dm->is_linked) {
1001 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "[%s]No Link !!!\n", __func__);
1002 RT_PRINT(buf);
1003 return;
1004 }
1005
1006 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "00.(%s) %-12s: IGI=0x%x, Dyn_Rng=0x%x~0x%x, fa_src=%d, FA_th={%d,%d,%d}\n",
1007 ((comp & ODM_BB_DIG) ?
1008 ((pause_comp & ODM_BB_DIG) ? "P" : "V") : "."),
1009 "DIG",
1010 dig_t->cur_ig_value,
1011 dig_t->rx_gain_range_min, dig_t->rx_gain_range_max,
1012 dig_t->fa_source,
1013 dig_t->fa_th[0], dig_t->fa_th[1], dig_t->fa_th[2]);
1014 RT_PRINT(buf);
1015
1016 sta = dm->phydm_sta_info[macid];
1017 if (is_sta_active(sta)) {
1018 ra = &sta->ra_info;
1019 dtp = &sta->dtp_stat;
1020
1021 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "01.(%s) %-12s: rssi_lv=%d, mask=0x%llx\n",
1022 ((comp & ODM_BB_RA_MASK) ?
1023 ((pause_comp & ODM_BB_RA_MASK) ? "P" : "V") : "."),
1024 "RaMask",
1025 ra->rssi_level, ra->ramask);
1026 RT_PRINT(buf);
1027
1028 #ifdef CONFIG_DYNAMIC_TX_TWR
1029 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "02.(%s) %-12s: pwr_lv=%d\n",
1030 ((comp & ODM_BB_DYNAMIC_TXPWR) ?
1031 ((pause_comp & ODM_BB_DYNAMIC_TXPWR) ? "P" : "V") : "."),
1032 "DynTxPwr",
1033 dtp->sta_tx_high_power_lvl);
1034 RT_PRINT(buf);
1035 #endif
1036 }
1037
1038 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "05.(%s) %-12s: cck_pd_lv=%d\n",
1039 ((comp & ODM_BB_CCK_PD) ?
1040 ((pause_comp & ODM_BB_CCK_PD) ? "P" : "V") : "."),
1041 "CCK_PD", dm->dm_cckpd_table.cck_pd_lv);
1042 RT_PRINT(buf);
1043
1044 #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
1045 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "06.(%s) %-12s: div_type=%d, curr_ant=%s\n",
1046 ((comp & ODM_BB_ANT_DIV) ?
1047 ((pause_comp & ODM_BB_ANT_DIV) ? "P" : "V") : "."),
1048 "ANT_DIV",
1049 dm->ant_div_type,
1050 (dm->dm_fat_table.rx_idle_ant == MAIN_ANT) ? "MAIN" : "AUX");
1051 RT_PRINT(buf);
1052 #endif
1053
1054 #ifdef PHYDM_POWER_TRAINING_SUPPORT
1055 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "08.(%s) %-12s: PT_score=%d, disable_PT=%d\n",
1056 ((comp & ODM_BB_PWR_TRAIN) ?
1057 ((pause_comp & ODM_BB_PWR_TRAIN) ? "P" : "V") : "."),
1058 "PwrTrain",
1059 dm->pow_train_table.pow_train_score,
1060 dm->is_disable_power_training);
1061 RT_PRINT(buf);
1062 #endif
1063
1064 #ifdef CONFIG_PHYDM_DFS_MASTER
1065 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "11.(%s) %-12s: dbg_mode=%d, region_domain=%d\n",
1066 ((comp & ODM_BB_DFS) ?
1067 ((pause_comp & ODM_BB_DFS) ? "P" : "V") : "."),
1068 "DFS",
1069 dm->dfs.dbg_mode, dm->dfs_region_domain);
1070 RT_PRINT(buf);
1071 #endif
1072 #ifdef PHYDM_SUPPORT_ADAPTIVITY
1073 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "13.(%s) %-12s: th{l2h, h2l}={%d, %d}, edcca_flag=%d\n",
1074 ((comp & ODM_BB_ADAPTIVITY) ?
1075 ((pause_comp & ODM_BB_ADAPTIVITY) ? "P" : "V") : "."),
1076 "Adaptivity",
1077 dm->adaptivity.th_l2h, dm->adaptivity.th_h2l,
1078 dm->false_alm_cnt.edcca_flag);
1079 RT_PRINT(buf);
1080 #endif
1081 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "14.(%s) %-12s: CFO_avg=%d kHz, CFO_traking=%s%d\n",
1082 ((comp & ODM_BB_CFO_TRACKING) ?
1083 ((pause_comp & ODM_BB_CFO_TRACKING) ? "P" : "V") : "."),
1084 "CfoTrack",
1085 cfo_t->CFO_ave_pre,
1086 ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
1087 DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
1088 RT_PRINT(buf);
1089
1090 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1091 "15.(%s) %-12s: ratio{nhm, clm}={%d, %d}, level{valid, RSSI}={%d, %d}\n",
1092 ((comp & ODM_BB_ENV_MONITOR) ?
1093 ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."),
1094 "EnvMntr",
1095 dm->dm_ccx_info.nhm_ratio, dm->dm_ccx_info.clm_ratio,
1096 dm->dm_ccx_info.nhm_level_valid, dm->dm_ccx_info.nhm_level);
1097 RT_PRINT(buf);
1098 #ifdef PHYDM_PRIMARY_CCA
1099 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "16.(%s) %-12s: CCA @ (%s SB)\n",
1100 ((comp & ODM_BB_PRIMARY_CCA) ?
1101 ((pause_comp & ODM_BB_PRIMARY_CCA) ? "P" : "V") : "."),
1102 "PriCCA",
1103 ((dm->dm_pri_cca.mf_state == MF_USC_LSC) ? "D" :
1104 ((dm->dm_pri_cca.mf_state == MF_LSC) ? "L" : "U")));
1105 RT_PRINT(buf);
1106 #endif
1107 #ifdef CONFIG_ADAPTIVE_SOML
1108 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "17.(%s) %-12s: soml_en = %s\n",
1109 ((comp & ODM_BB_ADAPTIVE_SOML) ?
1110 ((pause_comp & ODM_BB_ADAPTIVE_SOML) ? "P" : "V") : "."),
1111 "A-SOML",
1112 (dm->dm_soml_table.soml_last_state == SOML_ON) ?
1113 "ON" : "OFF");
1114 RT_PRINT(buf);
1115 #endif
1116 #ifdef PHYDM_LNA_SAT_CHK_SUPPORT
1117 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "18.(%s) %-12s:\n",
1118 ((comp & ODM_BB_LNA_SAT_CHK) ?
1119 ((pause_comp & ODM_BB_LNA_SAT_CHK) ? "P" : "V") : "."),
1120 "LNA_SAT_CHK");
1121 RT_PRINT(buf);
1122 #endif
1123 }
1124
phydm_basic_dbg_msg_cli_win(void * dm_void,char * buf)1125 void phydm_basic_dbg_msg_cli_win(void *dm_void, char *buf)
1126 {
1127 struct dm_struct *dm = (struct dm_struct *)dm_void;
1128 struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
1129 struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
1130 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info_win_bkp;
1131 struct phydm_phystatus_statistic *dbg_s = &dbg->physts_statistic_info;
1132 struct phydm_phystatus_avg *dbg_avg = &dbg->phystatus_statistic_avg;
1133
1134 char *rate_type = NULL;
1135 u8 tmp_rssi_avg[4];
1136 u8 tmp_snr_avg[4];
1137 u8 tmp_evm_avg[4];
1138 u32 tmp_cnt = 0;
1139 u8 macid, target_macid = 0;
1140 u8 i = 0;
1141 u8 rate_num = dm->num_rf_path;
1142 u8 ss_ofst = 0;
1143 struct cmn_sta_info *entry = NULL;
1144 char dbg_buf[PHYDM_SNPRINT_SIZE] = {0};
1145
1146
1147 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n PHYDM Common Dbg Msg --------->");
1148 RT_PRINT(buf);
1149 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n System up time=%d", dm->phydm_sys_up_time);
1150 RT_PRINT(buf);
1151
1152 if (dm->is_linked) {
1153 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n ID=((%d)), BW=((%d)), fc=((CH-%d))",
1154 dm->curr_station_id, 20 << *dm->band_width, *dm->channel);
1155 RT_PRINT(buf);
1156
1157 if (((*dm->channel <= 14) && (*dm->band_width == CHANNEL_WIDTH_40)) &&
1158 (dm->support_ic_type & ODM_IC_11N_SERIES)) {
1159 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Primary CCA at ((%s SB))",
1160 (*dm->sec_ch_offset == SECOND_CH_AT_LSB) ? "U" : "L");
1161 RT_PRINT(buf);
1162 }
1163
1164 if (dm->cck_new_agc || dm->rx_rate > ODM_RATE11M) {
1165 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}",
1166 dm->ofdm_agc_idx[0], dm->ofdm_agc_idx[1],
1167 dm->ofdm_agc_idx[2], dm->ofdm_agc_idx[3]);
1168 RT_PRINT(buf);
1169 } else {
1170 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [CCK AGC Idx] {LNA,VGA}={0x%x, 0x%x}",
1171 dm->cck_lna_idx, dm->cck_vga_idx);
1172 RT_PRINT(buf);
1173 }
1174
1175 phydm_print_rate_2_buff(dm, dm->rx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
1176 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n RSSI:{%d, %d, %d, %d}, RxRate:%s (0x%x)",
1177 (dm->rssi_a == 0xff) ? 0 : dm->rssi_a,
1178 (dm->rssi_b == 0xff) ? 0 : dm->rssi_b,
1179 (dm->rssi_c == 0xff) ? 0 : dm->rssi_c,
1180 (dm->rssi_d == 0xff) ? 0 : dm->rssi_d,
1181 dbg_buf, dm->rx_rate);
1182 RT_PRINT(buf);
1183
1184 phydm_print_rate_2_buff(dm, dm->phy_dbg_info.beacon_phy_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
1185 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Beacon_cnt=%d, rate_idx:%s (0x%x)",
1186 dm->phy_dbg_info.beacon_cnt_in_period,
1187 dbg_buf,
1188 dm->phy_dbg_info.beacon_phy_rate);
1189 RT_PRINT(buf);
1190
1191 /*Show phydm_rx_rate_distribution;*/
1192 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [RxRate Cnt] =============>");
1193 RT_PRINT(buf);
1194
1195 /*@======CCK=================================================*/
1196 if (*dm->channel <= 14) {
1197 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * CCK = {%d, %d, %d, %d}",
1198 dbg->num_qry_legacy_pkt[0], dbg->num_qry_legacy_pkt[1],
1199 dbg->num_qry_legacy_pkt[2], dbg->num_qry_legacy_pkt[3]);
1200 RT_PRINT(buf);
1201 }
1202 /*@======OFDM================================================*/
1203 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}",
1204 dbg->num_qry_legacy_pkt[4], dbg->num_qry_legacy_pkt[5],
1205 dbg->num_qry_legacy_pkt[6], dbg->num_qry_legacy_pkt[7],
1206 dbg->num_qry_legacy_pkt[8], dbg->num_qry_legacy_pkt[9],
1207 dbg->num_qry_legacy_pkt[10], dbg->num_qry_legacy_pkt[11]);
1208 RT_PRINT(buf);
1209
1210 /*@======HT==================================================*/
1211 if (dbg->ht_pkt_not_zero) {
1212 for (i = 0; i < rate_num; i++) {
1213 ss_ofst = (i << 3);
1214
1215 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}",
1216 (ss_ofst), (ss_ofst + 7),
1217 dbg->num_qry_ht_pkt[ss_ofst + 0], dbg->num_qry_ht_pkt[ss_ofst + 1],
1218 dbg->num_qry_ht_pkt[ss_ofst + 2], dbg->num_qry_ht_pkt[ss_ofst + 3],
1219 dbg->num_qry_ht_pkt[ss_ofst + 4], dbg->num_qry_ht_pkt[ss_ofst + 5],
1220 dbg->num_qry_ht_pkt[ss_ofst + 6], dbg->num_qry_ht_pkt[ss_ofst + 7]);
1221 RT_PRINT(buf);
1222 }
1223
1224 if (dbg->low_bw_20_occur) {
1225 for (i = 0; i < rate_num; i++) {
1226 ss_ofst = (i << 3);
1227
1228 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * [Low BW 20M] HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}",
1229 (ss_ofst), (ss_ofst + 7),
1230 dbg->num_qry_pkt_sc_20m[ss_ofst + 0], dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1231 dbg->num_qry_pkt_sc_20m[ss_ofst + 2], dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1232 dbg->num_qry_pkt_sc_20m[ss_ofst + 4], dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1233 dbg->num_qry_pkt_sc_20m[ss_ofst + 6], dbg->num_qry_pkt_sc_20m[ss_ofst + 7]);
1234 RT_PRINT(buf);
1235 }
1236 }
1237 }
1238
1239 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1240 /*@======VHT=================================================*/
1241 if (dbg->vht_pkt_not_zero) {
1242 for (i = 0; i < rate_num; i++) {
1243 ss_ofst = 10 * i;
1244
1245 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
1246 (i + 1),
1247 dbg->num_qry_vht_pkt[ss_ofst + 0], dbg->num_qry_vht_pkt[ss_ofst + 1],
1248 dbg->num_qry_vht_pkt[ss_ofst + 2], dbg->num_qry_vht_pkt[ss_ofst + 3],
1249 dbg->num_qry_vht_pkt[ss_ofst + 4], dbg->num_qry_vht_pkt[ss_ofst + 5],
1250 dbg->num_qry_vht_pkt[ss_ofst + 6], dbg->num_qry_vht_pkt[ss_ofst + 7],
1251 dbg->num_qry_vht_pkt[ss_ofst + 8], dbg->num_qry_vht_pkt[ss_ofst + 9]);
1252 RT_PRINT(buf);
1253 }
1254
1255 if (dbg->low_bw_20_occur) {
1256 for (i = 0; i < rate_num; i++) {
1257 ss_ofst = 10 * i;
1258
1259 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n *[Low BW 20M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
1260 (i + 1),
1261 dbg->num_qry_pkt_sc_20m[ss_ofst + 0], dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1262 dbg->num_qry_pkt_sc_20m[ss_ofst + 2], dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1263 dbg->num_qry_pkt_sc_20m[ss_ofst + 4], dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1264 dbg->num_qry_pkt_sc_20m[ss_ofst + 6], dbg->num_qry_pkt_sc_20m[ss_ofst + 7],
1265 dbg->num_qry_pkt_sc_20m[ss_ofst + 8], dbg->num_qry_pkt_sc_20m[ss_ofst + 9]);
1266 RT_PRINT(buf);
1267 }
1268 }
1269
1270 if (dbg->low_bw_40_occur) {
1271 for (i = 0; i < rate_num; i++) {
1272 ss_ofst = 10 * i;
1273
1274 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n *[Low BW 40M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
1275 (i + 1),
1276 dbg->num_qry_pkt_sc_40m[ss_ofst + 0], dbg->num_qry_pkt_sc_40m[ss_ofst + 1],
1277 dbg->num_qry_pkt_sc_40m[ss_ofst + 2], dbg->num_qry_pkt_sc_40m[ss_ofst + 3],
1278 dbg->num_qry_pkt_sc_40m[ss_ofst + 4], dbg->num_qry_pkt_sc_40m[ss_ofst + 5],
1279 dbg->num_qry_pkt_sc_40m[ss_ofst + 6], dbg->num_qry_pkt_sc_40m[ss_ofst + 7],
1280 dbg->num_qry_pkt_sc_40m[ss_ofst + 8], dbg->num_qry_pkt_sc_40m[ss_ofst + 9]);
1281 RT_PRINT(buf);
1282 }
1283 }
1284 }
1285 #endif
1286
1287 //1 Show phydm_avg_phystatus_val
1288 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1289 "\r\n [Avg PHY Statistic] ==============>\n");
1290 RT_PRINT(buf);
1291
1292 /*===[Beacon]===*/
1293 switch (dm->num_rf_path) {
1294 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
1295 case 4:
1296 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1297 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
1298 "[Beacon]", dbg_s->rssi_beacon_cnt,
1299 dbg_avg->rssi_beacon_avg[0],
1300 dbg_avg->rssi_beacon_avg[1],
1301 dbg_avg->rssi_beacon_avg[2],
1302 dbg_avg->rssi_beacon_avg[3]);
1303 break;
1304 #endif
1305 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
1306 case 3:
1307 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1308 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
1309 "[Beacon]", dbg_s->rssi_beacon_cnt,
1310 dbg_avg->rssi_beacon_avg[0],
1311 dbg_avg->rssi_beacon_avg[1],
1312 dbg_avg->rssi_beacon_avg[2]);
1313 break;
1314 #endif
1315 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
1316 case 2:
1317 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1318 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
1319 "[Beacon]", dbg_s->rssi_beacon_cnt,
1320 dbg_avg->rssi_beacon_avg[0],
1321 dbg_avg->rssi_beacon_avg[1]);
1322 break;
1323 #endif
1324 default:
1325 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1326 "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
1327 "[Beacon]", dbg_s->rssi_beacon_cnt,
1328 dbg_avg->rssi_beacon_avg[0]);
1329 break;
1330 }
1331 RT_PRINT(buf);
1332
1333 /*===[CCK]===*/
1334 switch (dm->num_rf_path) {
1335 #ifdef PHYSTS_3RD_TYPE_SUPPORT
1336 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
1337 case 4:
1338 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1339 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
1340 "[CCK]", dbg_s->rssi_cck_cnt,
1341 dbg_avg->rssi_cck_avg,
1342 dbg_avg->rssi_cck_avg_abv_2ss[0],
1343 dbg_avg->rssi_cck_avg_abv_2ss[1],
1344 dbg_avg->rssi_cck_avg_abv_2ss[2]);
1345 break;
1346 #endif
1347 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
1348 case 3:
1349 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1350 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
1351 "[CCK]", dbg_s->rssi_cck_cnt,
1352 dbg_avg->rssi_cck_avg,
1353 dbg_avg->rssi_cck_avg_abv_2ss[0],
1354 dbg_avg->rssi_cck_avg_abv_2ss[1]);
1355 break;
1356 #endif
1357 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
1358 case 2:
1359 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1360 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
1361 "[CCK]", dbg_s->rssi_cck_cnt,
1362 dbg_avg->rssi_cck_avg,
1363 dbg_avg->rssi_cck_avg_abv_2ss[0]);
1364 break;
1365 #endif
1366 #endif
1367 default:
1368 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1369 "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
1370 "[CCK]", dbg_s->rssi_cck_cnt,
1371 dbg_avg->rssi_cck_avg);
1372 break;
1373 }
1374 RT_PRINT(buf);
1375
1376 for (i = 0; i <= 4; i++) {
1377 if (i > dm->num_rf_path)
1378 break;
1379
1380 odm_memory_set(dm, tmp_rssi_avg, 0, 4);
1381 odm_memory_set(dm, tmp_snr_avg, 0, 4);
1382 odm_memory_set(dm, tmp_evm_avg, 0, 4);
1383
1384 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
1385 if (i == 4) {
1386 rate_type = "[4-SS]";
1387 tmp_cnt = dbg_s->rssi_4ss_cnt;
1388 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_4ss_avg, dm->num_rf_path);
1389 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_4ss_avg, dm->num_rf_path);
1390 odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_4ss_avg, 4);
1391 } else
1392 #endif
1393 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
1394 if (i == 3) {
1395 rate_type = "[3-SS]";
1396 tmp_cnt = dbg_s->rssi_3ss_cnt;
1397 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_3ss_avg, dm->num_rf_path);
1398 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_3ss_avg, dm->num_rf_path);
1399 odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_3ss_avg, 3);
1400 } else
1401 #endif
1402 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
1403 if (i == 2) {
1404 rate_type = "[2-SS]";
1405 tmp_cnt = dbg_s->rssi_2ss_cnt;
1406 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_2ss_avg, dm->num_rf_path);
1407 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_2ss_avg, dm->num_rf_path);
1408 odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_2ss_avg, 2);
1409 } else
1410 #endif
1411 if (i == 1) {
1412 rate_type = "[1-SS]";
1413 tmp_cnt = dbg_s->rssi_1ss_cnt;
1414 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_1ss_avg, dm->num_rf_path);
1415 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_1ss_avg, dm->num_rf_path);
1416 odm_move_memory(dm, tmp_evm_avg, &dbg_avg->evm_1ss_avg, 1);
1417 } else {
1418 rate_type = "[L-OFDM]";
1419 tmp_cnt = dbg_s->rssi_ofdm_cnt;
1420 odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_ofdm_avg, dm->num_rf_path);
1421 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_ofdm_avg, dm->num_rf_path);
1422 odm_move_memory(dm, tmp_evm_avg, &dbg_avg->evm_ofdm_avg, 1);
1423 }
1424
1425 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1426 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n",
1427 rate_type, tmp_cnt,
1428 tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2], tmp_rssi_avg[3],
1429 tmp_snr_avg[0], tmp_snr_avg[1], tmp_snr_avg[2], tmp_snr_avg[3],
1430 tmp_evm_avg[0], tmp_evm_avg[1], tmp_evm_avg[2], tmp_evm_avg[3]);
1431 RT_PRINT(buf);
1432 }
1433 /*@----------------------------------------------------------*/
1434
1435 /*Print TX rate*/
1436 for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
1437 entry = dm->phydm_sta_info[macid];
1438
1439 if (is_sta_active(entry)) {
1440 phydm_print_rate_2_buff(dm, entry->ra_info.curr_tx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
1441 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n TxRate[%d]=%s (0x%x)", macid, dbg_buf, entry->ra_info.curr_tx_rate);
1442 RT_PRINT(buf);
1443 target_macid = macid;
1444 break;
1445 }
1446 }
1447
1448 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1449 "\r\n TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))",
1450 dm->tx_tp, dm->rx_tp, dm->total_tp, dm->traffic_load);
1451 RT_PRINT(buf);
1452
1453 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n CFO_avg=((%d kHz)), CFO_traking = ((%s%d))",
1454 cfo_t->CFO_ave_pre,
1455 ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
1456 DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
1457 RT_PRINT(buf);
1458
1459 /* @Condition number */
1460 #if (RTL8822B_SUPPORT)
1461 if (dm->support_ic_type == ODM_RTL8822B) {
1462 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Condi_Num=((%d.%.4d))",
1463 dm->phy_dbg_info.condi_num >> 4,
1464 phydm_show_fraction_num(dm->phy_dbg_info.condi_num & 0xf, 4));
1465 RT_PRINT(buf);
1466 }
1467 #endif
1468
1469 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT))
1470 /*STBC or LDPC pkt*/
1471 if (dm->support_ic_type & (PHYSTS_2ND_TYPE_IC |
1472 PHYSTS_3RD_TYPE_IC))
1473 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Coding: LDPC=((%s)), STBC=((%s))",
1474 (dm->phy_dbg_info.is_ldpc_pkt) ? "Y" : "N",
1475 (dm->phy_dbg_info.is_stbc_pkt) ? "Y" : "N");
1476 RT_PRINT(buf);
1477 #endif
1478
1479 } else {
1480 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n No Link !!!");
1481 RT_PRINT(buf);
1482 }
1483
1484 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1485 "\r\n [Tx cnt] {CCK_TxEN, CCK_TxON, OFDM_TxEN, OFDM_TxON} = {%d, %d, %d, %d}",
1486 fa_t->cnt_cck_txen, fa_t->cnt_cck_txon, fa_t->cnt_ofdm_txen,
1487 fa_t->cnt_ofdm_txon);
1488 RT_PRINT(buf);
1489
1490 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}",
1491 fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all);
1492 RT_PRINT(buf);
1493
1494 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}",
1495 fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all);
1496 RT_PRINT(buf);
1497
1498 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1499 "\r\n [FA duration(us)] {exp, ifs_clm, fahm} = {%d, %d, %d}",
1500 fa_t->time_fa_exp, fa_t->time_fa_ifs_clm,
1501 fa_t->time_fa_fahm);
1502 RT_PRINT(buf);
1503
1504 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1505 "\r\n [OFDM FA] Parity=%d, Rate=%d, Fast_Fsync=%d, SBD=%d",
1506 fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal,
1507 fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail);
1508 RT_PRINT(buf);
1509
1510 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [HT FA] CRC8=%d, MCS=%d",
1511 fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail);
1512 RT_PRINT(buf);
1513
1514 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1515 if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) {
1516 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1517 "\r\n [VHT FA] SIGA_CRC8=%d, SIGB_CRC8=%d, MCS=%d",
1518 fa_t->cnt_crc8_fail_vhta, fa_t->cnt_crc8_fail_vhtb,
1519 fa_t->cnt_mcs_fail_vht);
1520 RT_PRINT(buf);
1521 }
1522 #endif
1523
1524 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1525 "\r\n [CRC32 OK Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}",
1526 fa_t->cnt_cck_crc32_ok, fa_t->cnt_ofdm_crc32_ok,
1527 fa_t->cnt_ht_crc32_ok, fa_t->cnt_vht_crc32_ok,
1528 fa_t->cnt_crc32_ok_all);
1529 RT_PRINT(buf);
1530
1531 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1532 "\r\n [CRC32 Err Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}",
1533 fa_t->cnt_cck_crc32_error, fa_t->cnt_ofdm_crc32_error,
1534 fa_t->cnt_ht_crc32_error, fa_t->cnt_vht_crc32_error,
1535 fa_t->cnt_crc32_error_all);
1536 RT_PRINT(buf);
1537
1538 if (fa_t->ofdm2_rate_idx) {
1539 phydm_print_rate_2_buff(dm, fa_t->ofdm2_rate_idx,
1540 dbg_buf, PHYDM_SNPRINT_SIZE);
1541 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1542 "\r\n [OFDM:%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)",
1543 dbg_buf, fa_t->cnt_ofdm2_crc32_error,
1544 fa_t->cnt_ofdm2_crc32_ok, fa_t->ofdm2_pcr);
1545 RT_PRINT(buf);
1546 }
1547
1548 if (fa_t->ht2_rate_idx) {
1549 phydm_print_rate_2_buff(dm, fa_t->ht2_rate_idx, dbg_buf,
1550 PHYDM_SNPRINT_SIZE);
1551 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1552 "\r\n [HT :%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)",
1553 dbg_buf, fa_t->cnt_ht2_crc32_error,
1554 fa_t->cnt_ht2_crc32_ok, fa_t->ht2_pcr);
1555 RT_PRINT(buf);
1556 }
1557
1558 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1559 if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) {
1560 if (fa_t->vht2_rate_idx) {
1561 phydm_print_rate_2_buff(dm, fa_t->vht2_rate_idx,
1562 dbg_buf, PHYDM_SNPRINT_SIZE);
1563 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1564 "\r\n [VHT :%s CRC32 Cnt] {error, ok}= {%d, %d} (%d percent)",
1565 dbg_buf, fa_t->cnt_vht2_crc32_error,
1566 fa_t->cnt_vht2_crc32_ok, fa_t->vht2_pcr);
1567 RT_PRINT(buf);
1568 }
1569 }
1570 #endif
1571
1572 if (dm->support_ic_type & (ODM_IC_11N_SERIES | ODM_IC_11AC_SERIES))
1573 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1574 "\r\n is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n",
1575 dm->is_linked, dm->number_linked_client, dm->rssi_min,
1576 dm->dm_dig_table.cur_ig_value, dm->noisy_decision);
1577 else
1578 RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1579 "\r\n is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x\n",
1580 dm->is_linked, dm->number_linked_client, dm->rssi_min,
1581 dm->dm_dig_table.cur_ig_value);
1582
1583 RT_PRINT(buf);
1584
1585 phydm_dm_summary_cli_win(dm, buf, target_macid);
1586 }
1587
1588 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
phydm_sbd_check(struct dm_struct * dm)1589 void phydm_sbd_check(
1590 struct dm_struct *dm)
1591 {
1592 static u32 pkt_cnt;
1593 static boolean sbd_state;
1594 u32 sym_count, count, value32;
1595
1596 if (sbd_state == 0) {
1597 pkt_cnt++;
1598 /*read SBD conter once every 5 packets*/
1599 if (pkt_cnt % 5 == 0) {
1600 odm_set_timer(dm, &dm->sbdcnt_timer, 0); /*@ms*/
1601 sbd_state = 1;
1602 }
1603 } else { /*read counter*/
1604 value32 = odm_get_bb_reg(dm, R_0xf98, MASKDWORD);
1605 sym_count = (value32 & 0x7C000000) >> 26;
1606 count = (value32 & 0x3F00000) >> 20;
1607 pr_debug("#SBD# sym_count %d count %d\n", sym_count, count);
1608 sbd_state = 0;
1609 }
1610 }
1611 #endif
1612
phydm_sbd_callback(struct phydm_timer_list * timer)1613 void phydm_sbd_callback(
1614 struct phydm_timer_list *timer)
1615 {
1616 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
1617 void *adapter = timer->Adapter;
1618 HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter);
1619 struct dm_struct *dm = &hal_data->DM_OutSrc;
1620
1621 #if USE_WORKITEM
1622 odm_schedule_work_item(&dm->sbdcnt_workitem);
1623 #else
1624 phydm_sbd_check(dm);
1625 #endif
1626 #endif
1627 }
1628
phydm_sbd_workitem_callback(void * context)1629 void phydm_sbd_workitem_callback(
1630 void *context)
1631 {
1632 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
1633 void *adapter = (void *)context;
1634 HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter);
1635 struct dm_struct *dm = &hal_data->DM_OutSrc;
1636
1637 phydm_sbd_check(dm);
1638 #endif
1639 }
1640 #endif
1641
phydm_reset_rx_rate_distribution(struct dm_struct * dm)1642 void phydm_reset_rx_rate_distribution(struct dm_struct *dm)
1643 {
1644 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1645
1646 odm_memory_set(dm, &dbg->num_qry_legacy_pkt[0], 0,
1647 (LEGACY_RATE_NUM * 2));
1648 odm_memory_set(dm, &dbg->num_qry_ht_pkt[0], 0,
1649 (HT_RATE_NUM * 2));
1650 odm_memory_set(dm, &dbg->num_qry_pkt_sc_20m[0], 0,
1651 (LOW_BW_RATE_NUM * 2));
1652
1653 dbg->ht_pkt_not_zero = false;
1654 dbg->low_bw_20_occur = false;
1655
1656 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1657 odm_memory_set(dm, &dbg->num_qry_vht_pkt[0], 0, VHT_RATE_NUM * 2);
1658 odm_memory_set(dm, &dbg->num_qry_pkt_sc_40m[0], 0, LOW_BW_RATE_NUM * 2);
1659 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) || (defined(PHYSTS_3RD_TYPE_SUPPORT))
1660 odm_memory_set(dm, &dbg->num_mu_vht_pkt[0], 0, VHT_RATE_NUM * 2);
1661 #endif
1662 dbg->vht_pkt_not_zero = false;
1663 dbg->low_bw_40_occur = false;
1664 #endif
1665 }
1666
phydm_rx_rate_distribution(void * dm_void)1667 void phydm_rx_rate_distribution(void *dm_void)
1668 {
1669 struct dm_struct *dm = (struct dm_struct *)dm_void;
1670 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1671 u8 i = 0;
1672 u8 rate_num = dm->num_rf_path, ss_ofst = 0;
1673
1674 PHYDM_DBG(dm, DBG_CMN, "[RxRate Cnt] =============>\n");
1675
1676 /*@======CCK=========================================================*/
1677 if (*dm->channel <= 14) {
1678 PHYDM_DBG(dm, DBG_CMN, "* CCK = {%d, %d, %d, %d}\n",
1679 dbg->num_qry_legacy_pkt[0],
1680 dbg->num_qry_legacy_pkt[1],
1681 dbg->num_qry_legacy_pkt[2],
1682 dbg->num_qry_legacy_pkt[3]);
1683 }
1684 /*@======OFDM========================================================*/
1685 PHYDM_DBG(dm, DBG_CMN, "* OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
1686 dbg->num_qry_legacy_pkt[4], dbg->num_qry_legacy_pkt[5],
1687 dbg->num_qry_legacy_pkt[6], dbg->num_qry_legacy_pkt[7],
1688 dbg->num_qry_legacy_pkt[8], dbg->num_qry_legacy_pkt[9],
1689 dbg->num_qry_legacy_pkt[10], dbg->num_qry_legacy_pkt[11]);
1690
1691 /*@======HT==========================================================*/
1692 if (dbg->ht_pkt_not_zero) {
1693 for (i = 0; i < rate_num; i++) {
1694 ss_ofst = (i << 3);
1695
1696 PHYDM_DBG(dm, DBG_CMN,
1697 "* HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
1698 (ss_ofst), (ss_ofst + 7),
1699 dbg->num_qry_ht_pkt[ss_ofst + 0],
1700 dbg->num_qry_ht_pkt[ss_ofst + 1],
1701 dbg->num_qry_ht_pkt[ss_ofst + 2],
1702 dbg->num_qry_ht_pkt[ss_ofst + 3],
1703 dbg->num_qry_ht_pkt[ss_ofst + 4],
1704 dbg->num_qry_ht_pkt[ss_ofst + 5],
1705 dbg->num_qry_ht_pkt[ss_ofst + 6],
1706 dbg->num_qry_ht_pkt[ss_ofst + 7]);
1707 }
1708
1709 if (dbg->low_bw_20_occur) {
1710 for (i = 0; i < rate_num; i++) {
1711 ss_ofst = (i << 3);
1712
1713 PHYDM_DBG(dm, DBG_CMN,
1714 "* [Low BW 20M] HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
1715 (ss_ofst), (ss_ofst + 7),
1716 dbg->num_qry_pkt_sc_20m[ss_ofst + 0],
1717 dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1718 dbg->num_qry_pkt_sc_20m[ss_ofst + 2],
1719 dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1720 dbg->num_qry_pkt_sc_20m[ss_ofst + 4],
1721 dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1722 dbg->num_qry_pkt_sc_20m[ss_ofst + 6],
1723 dbg->num_qry_pkt_sc_20m[ss_ofst + 7]);
1724 }
1725 }
1726 }
1727
1728 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1729 /*@======VHT==========================================================*/
1730 if (dbg->vht_pkt_not_zero) {
1731 for (i = 0; i < rate_num; i++) {
1732 ss_ofst = 10 * i;
1733
1734 PHYDM_DBG(dm, DBG_CMN,
1735 "* VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
1736 (i + 1),
1737 dbg->num_qry_vht_pkt[ss_ofst + 0],
1738 dbg->num_qry_vht_pkt[ss_ofst + 1],
1739 dbg->num_qry_vht_pkt[ss_ofst + 2],
1740 dbg->num_qry_vht_pkt[ss_ofst + 3],
1741 dbg->num_qry_vht_pkt[ss_ofst + 4],
1742 dbg->num_qry_vht_pkt[ss_ofst + 5],
1743 dbg->num_qry_vht_pkt[ss_ofst + 6],
1744 dbg->num_qry_vht_pkt[ss_ofst + 7],
1745 dbg->num_qry_vht_pkt[ss_ofst + 8],
1746 dbg->num_qry_vht_pkt[ss_ofst + 9]);
1747 }
1748
1749 if (dbg->low_bw_20_occur) {
1750 for (i = 0; i < rate_num; i++) {
1751 ss_ofst = 10 * i;
1752
1753 PHYDM_DBG(dm, DBG_CMN,
1754 "*[Low BW 20M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
1755 (i + 1),
1756 dbg->num_qry_pkt_sc_20m[ss_ofst + 0],
1757 dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1758 dbg->num_qry_pkt_sc_20m[ss_ofst + 2],
1759 dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1760 dbg->num_qry_pkt_sc_20m[ss_ofst + 4],
1761 dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1762 dbg->num_qry_pkt_sc_20m[ss_ofst + 6],
1763 dbg->num_qry_pkt_sc_20m[ss_ofst + 7],
1764 dbg->num_qry_pkt_sc_20m[ss_ofst + 8],
1765 dbg->num_qry_pkt_sc_20m[ss_ofst + 9]);
1766 }
1767 }
1768
1769 if (dbg->low_bw_40_occur) {
1770 for (i = 0; i < rate_num; i++) {
1771 ss_ofst = 10 * i;
1772
1773 PHYDM_DBG(dm, DBG_CMN,
1774 "*[Low BW 40M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
1775 (i + 1),
1776 dbg->num_qry_pkt_sc_40m[ss_ofst + 0],
1777 dbg->num_qry_pkt_sc_40m[ss_ofst + 1],
1778 dbg->num_qry_pkt_sc_40m[ss_ofst + 2],
1779 dbg->num_qry_pkt_sc_40m[ss_ofst + 3],
1780 dbg->num_qry_pkt_sc_40m[ss_ofst + 4],
1781 dbg->num_qry_pkt_sc_40m[ss_ofst + 5],
1782 dbg->num_qry_pkt_sc_40m[ss_ofst + 6],
1783 dbg->num_qry_pkt_sc_40m[ss_ofst + 7],
1784 dbg->num_qry_pkt_sc_40m[ss_ofst + 8],
1785 dbg->num_qry_pkt_sc_40m[ss_ofst + 9]);
1786 }
1787 }
1788 }
1789 #endif
1790 }
1791
phydm_rx_utility(void * dm_void,u16 avg_phy_rate,u8 rx_max_ss,enum channel_width bw)1792 u16 phydm_rx_utility(void *dm_void, u16 avg_phy_rate, u8 rx_max_ss,
1793 enum channel_width bw)
1794 {
1795 struct dm_struct *dm = (struct dm_struct *)dm_void;
1796 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1797 u16 utility_primitive = 0, utility = 0;
1798
1799 if (dbg->ht_pkt_not_zero) {
1800 /*@ MCS7 20M: tp = 65, 1000/65 = 15.38, 65*15.5 = 1007*/
1801 utility_primitive = avg_phy_rate * 15 + (avg_phy_rate >> 1);
1802 }
1803 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1804 else if (dbg->vht_pkt_not_zero) {
1805 /*@ VHT 1SS MCS9(fake) 20M: tp = 90, 1000/90 = 11.11, 65*11.125 = 1001*/
1806 utility_primitive = avg_phy_rate * 11 + (avg_phy_rate >> 3);
1807 }
1808 #endif
1809 else {
1810 /*@ 54M, 1000/54 = 18.5, 54*18.5 = 999*/
1811 utility_primitive = avg_phy_rate * 18 + (avg_phy_rate >> 1);
1812 }
1813
1814 utility = (utility_primitive / rx_max_ss) >> bw;
1815
1816 if (utility > 1000)
1817 utility = 1000;
1818
1819 return utility;
1820 }
1821
phydm_rx_avg_phy_rate(void * dm_void)1822 u16 phydm_rx_avg_phy_rate(void *dm_void)
1823 {
1824 struct dm_struct *dm = (struct dm_struct *)dm_void;
1825 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1826 u8 i = 0, rate_num = 0, rate_base = 0;
1827 u16 rate = 0, avg_phy_rate = 0;
1828 u32 pkt_cnt = 0, phy_rate_sum = 0;
1829
1830 if (dbg->ht_pkt_not_zero) {
1831 rate_num = HT_RATE_NUM;
1832 rate_base = ODM_RATEMCS0;
1833 for (i = 0; i < rate_num; i++) {
1834 rate = phy_rate_table[i + rate_base] << *dm->band_width;
1835 phy_rate_sum += dbg->num_qry_ht_pkt[i] * rate;
1836 pkt_cnt += dbg->num_qry_ht_pkt[i];
1837 }
1838 }
1839 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1840 else if (dbg->vht_pkt_not_zero) {
1841 rate_num = VHT_RATE_NUM;
1842 rate_base = ODM_RATEVHTSS1MCS0;
1843 for (i = 0; i < rate_num; i++) {
1844 rate = phy_rate_table[i + rate_base] << *dm->band_width;
1845 phy_rate_sum += dbg->num_qry_vht_pkt[i] * rate;
1846 pkt_cnt += dbg->num_qry_vht_pkt[i];
1847 }
1848 }
1849 #endif
1850 else {
1851 for (i = ODM_RATE1M; i <= ODM_RATE54M; i++) {
1852 /*SKIP 1M & 6M for beacon case*/
1853 if (*dm->channel < 36 && i == ODM_RATE1M)
1854 continue;
1855
1856 if (*dm->channel >= 36 && i == ODM_RATE6M)
1857 continue;
1858
1859 rate = phy_rate_table[i];
1860 phy_rate_sum += dbg->num_qry_legacy_pkt[i] * rate;
1861 pkt_cnt += dbg->num_qry_legacy_pkt[i];
1862 }
1863 }
1864
1865 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1866 if (dbg->low_bw_40_occur) {
1867 for (i = 0; i < LOW_BW_RATE_NUM; i++) {
1868 rate = phy_rate_table[i + rate_base]
1869 << CHANNEL_WIDTH_40;
1870 phy_rate_sum += dbg->num_qry_pkt_sc_40m[i] * rate;
1871 pkt_cnt += dbg->num_qry_pkt_sc_40m[i];
1872 }
1873 }
1874 #endif
1875
1876 if (dbg->low_bw_20_occur) {
1877 for (i = 0; i < LOW_BW_RATE_NUM; i++) {
1878 rate = phy_rate_table[i + rate_base];
1879 phy_rate_sum += dbg->num_qry_pkt_sc_20m[i] * rate;
1880 pkt_cnt += dbg->num_qry_pkt_sc_20m[i];
1881 }
1882 }
1883
1884 avg_phy_rate = (pkt_cnt == 0) ? 0 : (u16)(phy_rate_sum / pkt_cnt);
1885
1886 return avg_phy_rate;
1887 }
1888
phydm_print_hist_2_buf(void * dm_void,u16 * val,u16 len,char * buf,u16 buf_size)1889 void phydm_print_hist_2_buf(void *dm_void, u16 *val, u16 len, char *buf,
1890 u16 buf_size)
1891 {
1892 struct dm_struct *dm = (struct dm_struct *)dm_void;
1893
1894 if (len == PHY_HIST_SIZE) {
1895 PHYDM_SNPRINTF(buf, buf_size,
1896 "[%.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d]",
1897 val[0], val[1], val[2], val[3], val[4],
1898 val[5], val[6], val[7], val[8], val[9],
1899 val[10], val[11]);
1900 } else if (len == (PHY_HIST_SIZE - 1)) {
1901 PHYDM_SNPRINTF(buf, buf_size,
1902 "[%.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d]",
1903 val[0], val[1], val[2], val[3], val[4],
1904 val[5], val[6], val[7], val[8], val[9],
1905 val[10]);
1906 }
1907 }
1908
phydm_nss_hitogram(void * dm_void,enum PDM_RATE_TYPE rate_type)1909 void phydm_nss_hitogram(void *dm_void, enum PDM_RATE_TYPE rate_type)
1910 {
1911 struct dm_struct *dm = (struct dm_struct *)dm_void;
1912 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
1913 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
1914 char buf[PHYDM_SNPRINT_SIZE] = {0};
1915 u16 buf_size = PHYDM_SNPRINT_SIZE;
1916 u16 h_size = PHY_HIST_SIZE;
1917 u16 *evm_hist = &dbg_s->evm_1ss_hist[0];
1918 u16 *snr_hist = &dbg_s->snr_1ss_hist[0];
1919 u8 i = 0;
1920 u8 ss = phydm_rate_type_2_num_ss(dm, rate_type);
1921
1922 for (i = 0; i < ss; i++) {
1923 if (rate_type == PDM_1SS) {
1924 evm_hist = &dbg_s->evm_1ss_hist[0];
1925 snr_hist = &dbg_s->snr_1ss_hist[0];
1926 } else if (rate_type == PDM_2SS) {
1927 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
1928 evm_hist = &dbg_s->evm_2ss_hist[i][0];
1929 snr_hist = &dbg_s->snr_2ss_hist[i][0];
1930 #endif
1931 } else if (rate_type == PDM_3SS) {
1932 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
1933 evm_hist = &dbg_s->evm_3ss_hist[i][0];
1934 snr_hist = &dbg_s->snr_3ss_hist[i][0];
1935 #endif
1936 } else if (rate_type == PDM_4SS) {
1937 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
1938 evm_hist = &dbg_s->evm_4ss_hist[i][0];
1939 snr_hist = &dbg_s->snr_4ss_hist[i][0];
1940 #endif
1941 }
1942
1943 phydm_print_hist_2_buf(dm, evm_hist, h_size, buf, buf_size);
1944 PHYDM_DBG(dm, DBG_CMN, "[%d-SS][EVM][%d]=%s\n", ss, i, buf);
1945 phydm_print_hist_2_buf(dm, snr_hist, h_size, buf, buf_size);
1946 PHYDM_DBG(dm, DBG_CMN, "[%d-SS][SNR][%d]=%s\n", ss, i, buf);
1947 }
1948 }
1949
1950 #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH
phydm_show_cn_hitogram(void * dm_void)1951 void phydm_show_cn_hitogram(void *dm_void)
1952 {
1953 struct dm_struct *dm = (struct dm_struct *)dm_void;
1954 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
1955 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
1956 u16 th_tmp[PHY_HIST_TH_SIZE];
1957 char buf[PHYDM_SNPRINT_SIZE] = {0};
1958 u8 i = 0;
1959 u16 *cn_hist = NULL;
1960 u32 cn_avg = 0;
1961
1962 if (!dm->pkt_proc_struct.physts_auto_swch_en)
1963 return;
1964
1965 if (dm->num_rf_path == 1)
1966 return;
1967
1968 PHYDM_DBG(dm, DBG_CMN, "[Condition number Histogram] ========>\n");
1969 /*@===[Threshold]=============================================================*/
1970 for (i = 0; i < PHY_HIST_TH_SIZE; i++)
1971 th_tmp[i] = dbg_i->cn_hist_th[i] >> 1;
1972
1973 phydm_print_hist_2_buf(dm, th_tmp,
1974 PHY_HIST_TH_SIZE, buf, PHYDM_SNPRINT_SIZE);
1975 PHYDM_DBG(dm, DBG_CMN, "%-24s=%s\n", "[CN_TH]", buf);
1976
1977 /*@===[Histogram]=============================================================*/
1978
1979 for (i = 1; i <= dm->num_rf_path; i++) {
1980 if (dbg_s->p4_cnt[i] == 0)
1981 continue;
1982
1983 cn_avg = PHYDM_DIV((dbg_s->cn_sum[i] +
1984 (dbg_s->p4_cnt[i] >> 1)) << 2,
1985 dbg_s->p4_cnt[i]); /*u(8,1)<<2 -> u(10,3)*/
1986
1987 cn_hist = &dbg_s->cn_hist[i][0];
1988 phydm_print_hist_2_buf(dm, cn_hist,
1989 PHY_HIST_SIZE, buf, PHYDM_SNPRINT_SIZE);
1990 PHYDM_DBG(dm, DBG_CMN, "[%d-SS]%s=(avg:%d.%4d)%s\n",
1991 i + 1, "[CN]", cn_avg >> 3,
1992 phydm_show_fraction_num(cn_avg & 0x7, 3), buf);
1993 }
1994 }
1995 #endif
1996
phydm_show_phy_hitogram(void * dm_void)1997 void phydm_show_phy_hitogram(void *dm_void)
1998 {
1999 struct dm_struct *dm = (struct dm_struct *)dm_void;
2000 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
2001 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
2002 char buf[PHYDM_SNPRINT_SIZE] = {0};
2003 u16 buf_size = PHYDM_SNPRINT_SIZE;
2004 u16 th_size = PHY_HIST_SIZE - 1;
2005 u8 i = 0;
2006
2007 PHYDM_DBG(dm, DBG_CMN, "[PHY Histogram] ==============>\n");
2008 /*@===[Threshold]=============================================================*/
2009 phydm_print_hist_2_buf(dm, dbg_i->evm_hist_th, th_size, buf, buf_size);
2010 PHYDM_DBG(dm, DBG_CMN, "%-16s=%s\n", "[EVM_TH]", buf);
2011
2012 phydm_print_hist_2_buf(dm, dbg_i->snr_hist_th, th_size, buf, buf_size);
2013 PHYDM_DBG(dm, DBG_CMN, "%-16s=%s\n", "[SNR_TH]", buf);
2014 /*@===[OFDM]==================================================================*/
2015 if (dbg_s->rssi_ofdm_cnt) {
2016 phydm_print_hist_2_buf(dm, dbg_s->evm_ofdm_hist, PHY_HIST_SIZE,
2017 buf, buf_size);
2018 PHYDM_DBG(dm, DBG_CMN, "%-14s=%s\n", "[OFDM][EVM]", buf);
2019
2020 phydm_print_hist_2_buf(dm, dbg_s->snr_ofdm_hist, PHY_HIST_SIZE,
2021 buf, buf_size);
2022 PHYDM_DBG(dm, DBG_CMN, "%-14s=%s\n", "[OFDM][SNR]", buf);
2023 }
2024 /*@===[1-SS]==================================================================*/
2025 if (dbg_s->rssi_1ss_cnt)
2026 phydm_nss_hitogram(dm, PDM_1SS);
2027 /*@===[2-SS]==================================================================*/
2028 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
2029 if ((dm->support_ic_type & PHYDM_IC_ABOVE_2SS) && dbg_s->rssi_2ss_cnt)
2030 phydm_nss_hitogram(dm, PDM_2SS);
2031 #endif
2032 /*@===[3-SS]==================================================================*/
2033 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
2034 if ((dm->support_ic_type & PHYDM_IC_ABOVE_3SS) && dbg_s->rssi_3ss_cnt)
2035 phydm_nss_hitogram(dm, PDM_3SS);
2036 #endif
2037 /*@===[4-SS]==================================================================*/
2038 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2039 if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS && dbg_s->rssi_4ss_cnt)
2040 phydm_nss_hitogram(dm, PDM_4SS);
2041 #endif
2042 }
2043
phydm_avg_phy_val_nss(void * dm_void,u8 nss)2044 void phydm_avg_phy_val_nss(void *dm_void, u8 nss)
2045 {
2046 struct dm_struct *dm = (struct dm_struct *)dm_void;
2047 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
2048 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
2049 struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg;
2050 char *rate_type = NULL;
2051 u32 *tmp_cnt = NULL;
2052 u8 *tmp_rssi_avg = NULL;
2053 u32 *tmp_rssi_sum = NULL;
2054 u8 *tmp_snr_avg = NULL;
2055 u32 *tmp_snr_sum = NULL;
2056 u8 *tmp_evm_avg = NULL;
2057 u32 *tmp_evm_sum = NULL;
2058 u8 evm_rpt_show[RF_PATH_MEM_SIZE];
2059 u8 i = 0;
2060
2061 odm_memory_set(dm, &evm_rpt_show[0], 0, RF_PATH_MEM_SIZE);
2062
2063 switch (nss) {
2064 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2065 case 4:
2066 rate_type = "[4-SS]";
2067 tmp_cnt = &dbg_s->rssi_4ss_cnt;
2068 tmp_rssi_avg = &dbg_avg->rssi_4ss_avg[0];
2069 tmp_snr_avg = &dbg_avg->snr_4ss_avg[0];
2070 tmp_rssi_sum = &dbg_s->rssi_4ss_sum[0];
2071 tmp_snr_sum = &dbg_s->snr_4ss_sum[0];
2072 tmp_evm_avg = &dbg_avg->evm_4ss_avg[0];
2073 tmp_evm_sum = &dbg_s->evm_4ss_sum[0];
2074 break;
2075 #endif
2076 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
2077 case 3:
2078 rate_type = "[3-SS]";
2079 tmp_cnt = &dbg_s->rssi_3ss_cnt;
2080 tmp_rssi_avg = &dbg_avg->rssi_3ss_avg[0];
2081 tmp_snr_avg = &dbg_avg->snr_3ss_avg[0];
2082 tmp_rssi_sum = &dbg_s->rssi_3ss_sum[0];
2083 tmp_snr_sum = &dbg_s->snr_3ss_sum[0];
2084 tmp_evm_avg = &dbg_avg->evm_3ss_avg[0];
2085 tmp_evm_sum = &dbg_s->evm_3ss_sum[0];
2086 break;
2087 #endif
2088 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
2089 case 2:
2090 rate_type = "[2-SS]";
2091 tmp_cnt = &dbg_s->rssi_2ss_cnt;
2092 tmp_rssi_avg = &dbg_avg->rssi_2ss_avg[0];
2093 tmp_snr_avg = &dbg_avg->snr_2ss_avg[0];
2094 tmp_rssi_sum = &dbg_s->rssi_2ss_sum[0];
2095 tmp_snr_sum = &dbg_s->snr_2ss_sum[0];
2096 tmp_evm_avg = &dbg_avg->evm_2ss_avg[0];
2097 tmp_evm_sum = &dbg_s->evm_2ss_sum[0];
2098 break;
2099 #endif
2100 case 1:
2101 rate_type = "[1-SS]";
2102 tmp_cnt = &dbg_s->rssi_1ss_cnt;
2103 tmp_rssi_avg = &dbg_avg->rssi_1ss_avg[0];
2104 tmp_snr_avg = &dbg_avg->snr_1ss_avg[0];
2105 tmp_rssi_sum = &dbg_s->rssi_1ss_sum[0];
2106 tmp_snr_sum = &dbg_s->snr_1ss_sum[0];
2107 tmp_evm_avg = &dbg_avg->evm_1ss_avg;
2108 tmp_evm_sum = &dbg_s->evm_1ss_sum;
2109 break;
2110 case 0:
2111 rate_type = "[L-OFDM]";
2112 tmp_cnt = &dbg_s->rssi_ofdm_cnt;
2113 tmp_rssi_avg = &dbg_avg->rssi_ofdm_avg[0];
2114 tmp_snr_avg = &dbg_avg->snr_ofdm_avg[0];
2115 tmp_rssi_sum = &dbg_s->rssi_ofdm_sum[0];
2116 tmp_snr_sum = &dbg_s->snr_ofdm_sum[0];
2117 tmp_evm_avg = &dbg_avg->evm_ofdm_avg;
2118 tmp_evm_sum = &dbg_s->evm_ofdm_sum;
2119 break;
2120 default:
2121 PHYDM_DBG(dm, DBG_CMN, "[warning] %s\n", __func__);
2122 return;
2123 }
2124
2125 if (*tmp_cnt != 0) {
2126 for (i = 0; i < dm->num_rf_path; i++) {
2127 tmp_rssi_avg[i] = (u8)(tmp_rssi_sum[i] / *tmp_cnt);
2128 tmp_snr_avg[i] = (u8)(tmp_snr_sum[i] / *tmp_cnt);
2129 }
2130
2131 if (nss == 0 || nss == 1) {
2132 *tmp_evm_avg = (u8)(*tmp_evm_sum / *tmp_cnt);
2133 evm_rpt_show[0] = *tmp_evm_avg;
2134 } else {
2135 for (i = 0; i < nss; i++) {
2136 tmp_evm_avg[i] = (u8)(tmp_evm_sum[i] /
2137 *tmp_cnt);
2138 evm_rpt_show[i] = tmp_evm_avg[i];
2139 }
2140 }
2141 }
2142
2143 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2144 PHYDM_DBG(dm, DBG_CMN,
2145 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n",
2146 rate_type, *tmp_cnt,
2147 tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2],
2148 tmp_rssi_avg[3], tmp_snr_avg[0], tmp_snr_avg[1],
2149 tmp_snr_avg[2], tmp_snr_avg[3], evm_rpt_show[0],
2150 evm_rpt_show[1], evm_rpt_show[2], evm_rpt_show[3]);
2151 #elif (defined(PHYDM_COMPILE_ABOVE_3SS))
2152 PHYDM_DBG(dm, DBG_CMN,
2153 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d}\n",
2154 rate_type, *tmp_cnt,
2155 tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2],
2156 tmp_snr_avg[0], tmp_snr_avg[1], tmp_snr_avg[2],
2157 evm_rpt_show[0], evm_rpt_show[1], evm_rpt_show[2]);
2158 #elif (defined(PHYDM_COMPILE_ABOVE_2SS))
2159 PHYDM_DBG(dm, DBG_CMN,
2160 "* %-8s Cnt= ((%.3d)) RSSI:{%.2d, %.2d} SNR:{%.2d, %.2d} EVM:{-%.2d, -%.2d}\n",
2161 rate_type, *tmp_cnt,
2162 tmp_rssi_avg[0], tmp_rssi_avg[1],
2163 tmp_snr_avg[0], tmp_snr_avg[1],
2164 evm_rpt_show[0], evm_rpt_show[1]);
2165 #else
2166 PHYDM_DBG(dm, DBG_CMN,
2167 "* %-8s Cnt= ((%.3d)) RSSI:{%.2d} SNR:{%.2d} EVM:{-%.2d}\n",
2168 rate_type, *tmp_cnt,
2169 tmp_rssi_avg[0], tmp_snr_avg[0], evm_rpt_show[0]);
2170 #endif
2171 }
2172
phydm_get_avg_phystatus_val(void * dm_void)2173 void phydm_get_avg_phystatus_val(void *dm_void)
2174 {
2175 struct dm_struct *dm = (struct dm_struct *)dm_void;
2176 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
2177 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
2178 struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg;
2179 u32 avg_tmp = 0;
2180 u8 i = 0;
2181
2182 PHYDM_DBG(dm, DBG_CMN, "[PHY Avg] ==============>\n");
2183 phydm_reset_phystatus_avg(dm);
2184
2185 /*@===[Beacon]===*/
2186 if (dbg_s->rssi_beacon_cnt) {
2187 for (i = 0; i < dm->num_rf_path; i++) {
2188 avg_tmp = dbg_s->rssi_beacon_sum[i] /
2189 dbg_s->rssi_beacon_cnt;
2190 dbg_avg->rssi_beacon_avg[i] = (u8)avg_tmp;
2191 }
2192 }
2193
2194 switch (dm->num_rf_path) {
2195 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2196 case 4:
2197 PHYDM_DBG(dm, DBG_CMN,
2198 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
2199 "[Beacon]", dbg_s->rssi_beacon_cnt,
2200 dbg_avg->rssi_beacon_avg[0],
2201 dbg_avg->rssi_beacon_avg[1],
2202 dbg_avg->rssi_beacon_avg[2],
2203 dbg_avg->rssi_beacon_avg[3]);
2204 break;
2205 #endif
2206 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
2207 case 3:
2208 PHYDM_DBG(dm, DBG_CMN,
2209 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
2210 "[Beacon]", dbg_s->rssi_beacon_cnt,
2211 dbg_avg->rssi_beacon_avg[0],
2212 dbg_avg->rssi_beacon_avg[1],
2213 dbg_avg->rssi_beacon_avg[2]);
2214 break;
2215 #endif
2216 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
2217 case 2:
2218 PHYDM_DBG(dm, DBG_CMN,
2219 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
2220 "[Beacon]", dbg_s->rssi_beacon_cnt,
2221 dbg_avg->rssi_beacon_avg[0],
2222 dbg_avg->rssi_beacon_avg[1]);
2223 break;
2224 #endif
2225 default:
2226 PHYDM_DBG(dm, DBG_CMN, "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
2227 "[Beacon]", dbg_s->rssi_beacon_cnt,
2228 dbg_avg->rssi_beacon_avg[0]);
2229 break;
2230 }
2231
2232 /*@===[CCK]===*/
2233 if (dbg_s->rssi_cck_cnt) {
2234 dbg_avg->rssi_cck_avg = (u8)(dbg_s->rssi_cck_sum /
2235 dbg_s->rssi_cck_cnt);
2236 #if (defined(PHYSTS_3RD_TYPE_SUPPORT) && defined(PHYDM_COMPILE_ABOVE_2SS))
2237 if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) {
2238 for (i = 0; i < dm->num_rf_path - 1; i++) {
2239 avg_tmp = dbg_s->rssi_cck_sum_abv_2ss[i] /
2240 dbg_s->rssi_cck_cnt;
2241 dbg_avg->rssi_cck_avg_abv_2ss[i] = (u8)avg_tmp;
2242 }
2243 }
2244 #endif
2245 }
2246
2247 switch (dm->num_rf_path) {
2248 #ifdef PHYSTS_3RD_TYPE_SUPPORT
2249 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
2250 case 4:
2251 PHYDM_DBG(dm, DBG_CMN,
2252 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
2253 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg,
2254 dbg_avg->rssi_cck_avg_abv_2ss[0],
2255 dbg_avg->rssi_cck_avg_abv_2ss[1],
2256 dbg_avg->rssi_cck_avg_abv_2ss[2]);
2257 break;
2258 #endif
2259 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
2260 case 3:
2261 PHYDM_DBG(dm, DBG_CMN,
2262 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
2263 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg,
2264 dbg_avg->rssi_cck_avg_abv_2ss[0],
2265 dbg_avg->rssi_cck_avg_abv_2ss[1]);
2266 break;
2267 #endif
2268 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
2269 case 2:
2270 PHYDM_DBG(dm, DBG_CMN,
2271 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
2272 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg,
2273 dbg_avg->rssi_cck_avg_abv_2ss[0]);
2274 break;
2275 #endif
2276 #endif
2277 default:
2278 PHYDM_DBG(dm, DBG_CMN, "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
2279 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg);
2280 break;
2281 }
2282
2283 for (i = 0; i <= dm->num_rf_path; i++)
2284 phydm_avg_phy_val_nss(dm, i);
2285 }
2286
phydm_get_phy_statistic(void * dm_void)2287 void phydm_get_phy_statistic(void *dm_void)
2288 {
2289 struct dm_struct *dm = (struct dm_struct *)dm_void;
2290 struct cmn_sta_info *sta = dm->phydm_sta_info[dm->one_entry_macid];
2291 enum channel_width bw;
2292 u16 avg_phy_rate = 0;
2293 u16 utility = 0;
2294 u8 rx_ss = 1;
2295
2296 avg_phy_rate = phydm_rx_avg_phy_rate(dm);
2297
2298 if (dm->is_one_entry_only && is_sta_active(sta)) {
2299 rx_ss = phydm_get_rx_stream_num(dm, sta->mimo_type);
2300 bw = sta->bw_mode;
2301 utility = phydm_rx_utility(dm, avg_phy_rate, rx_ss, bw);
2302 }
2303 PHYDM_DBG(dm, DBG_CMN, "Avg_rx_rate = %d, rx_utility=( %d / 1000 )\n",
2304 avg_phy_rate, utility);
2305
2306 phydm_rx_rate_distribution(dm);
2307 phydm_reset_rx_rate_distribution(dm);
2308
2309 phydm_show_phy_hitogram(dm);
2310 #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH
2311 phydm_show_cn_hitogram(dm);
2312 #endif
2313 phydm_get_avg_phystatus_val(dm);
2314 phydm_reset_phystatus_statistic(dm);
2315 };
2316
phydm_basic_dbg_msg_linked(void * dm_void)2317 void phydm_basic_dbg_msg_linked(void *dm_void)
2318 {
2319 struct dm_struct *dm = (struct dm_struct *)dm_void;
2320 struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
2321 struct odm_phy_dbg_info *dbg_t = &dm->phy_dbg_info;
2322 u16 macid, client_cnt = 0;
2323 u8 rate = 0;
2324 struct cmn_sta_info *entry = NULL;
2325 char dbg_buf[PHYDM_SNPRINT_SIZE] = {0};
2326 struct phydm_cfo_rpt cfo;
2327 u8 i = 0;
2328
2329 PHYDM_DBG(dm, DBG_CMN, "ID=((%d)), BW=((%d)), fc=((CH-%d))\n",
2330 dm->curr_station_id, 20 << *dm->band_width, *dm->channel);
2331
2332 #ifdef ODM_IC_11N_SERIES_SUPPORT
2333 #ifdef PHYDM_PRIMARY_CCA
2334 if (((*dm->channel <= 14) && (*dm->band_width == CHANNEL_WIDTH_40)) &&
2335 (dm->support_ic_type & ODM_IC_11N_SERIES) &&
2336 (dm->support_ability & ODM_BB_PRIMARY_CCA)) {
2337 PHYDM_DBG(dm, DBG_CMN, "Primary CCA at ((%s SB))\n",
2338 ((*dm->sec_ch_offset == SECOND_CH_AT_LSB) ? "U" :
2339 "L"));
2340 }
2341 #endif
2342 #endif
2343
2344 if (dm->cck_new_agc || dm->rx_rate > ODM_RATE11M) {
2345 PHYDM_DBG(dm, DBG_CMN, "[AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}\n",
2346 dm->ofdm_agc_idx[0], dm->ofdm_agc_idx[1],
2347 dm->ofdm_agc_idx[2], dm->ofdm_agc_idx[3]);
2348 } else {
2349 PHYDM_DBG(dm, DBG_CMN, "[CCK AGC Idx] {LNA,VGA}={0x%x, 0x%x}\n",
2350 dm->cck_lna_idx, dm->cck_vga_idx);
2351 }
2352
2353 phydm_print_rate_2_buff(dm, dm->rx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
2354 PHYDM_DBG(dm, DBG_CMN, "RSSI:{%d, %d, %d, %d}, RxRate:%s (0x%x)\n",
2355 (dm->rssi_a == 0xff) ? 0 : dm->rssi_a,
2356 (dm->rssi_b == 0xff) ? 0 : dm->rssi_b,
2357 (dm->rssi_c == 0xff) ? 0 : dm->rssi_c,
2358 (dm->rssi_d == 0xff) ? 0 : dm->rssi_d,
2359 dbg_buf, dm->rx_rate);
2360
2361 rate = dbg_t->beacon_phy_rate;
2362 phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE);
2363
2364 PHYDM_DBG(dm, DBG_CMN, "Beacon_cnt=%d, rate_idx=%s (0x%x)\n",
2365 dbg_t->num_qry_beacon_pkt, dbg_buf, dbg_t->beacon_phy_rate);
2366
2367 phydm_get_phy_statistic(dm);
2368
2369 PHYDM_DBG(dm, DBG_CMN,
2370 "rxsc_idx {Legacy, 20, 40, 80} = {%d, %d, %d, %d}\n",
2371 dm->rxsc_l, dm->rxsc_20, dm->rxsc_40, dm->rxsc_80);
2372
2373 /*Print TX rate*/
2374 for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
2375 entry = dm->phydm_sta_info[macid];
2376
2377 if (!is_sta_active(entry))
2378 continue;
2379
2380 rate = entry->ra_info.curr_tx_rate;
2381 phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE);
2382 PHYDM_DBG(dm, DBG_CMN, "TxRate[%d]=%s (0x%x)\n",
2383 macid, dbg_buf, entry->ra_info.curr_tx_rate);
2384
2385 client_cnt++;
2386
2387 if (client_cnt >= dm->number_linked_client)
2388 break;
2389 }
2390
2391 PHYDM_DBG(dm, DBG_CMN,
2392 "TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))\n",
2393 dm->tx_tp, dm->rx_tp, dm->total_tp, dm->traffic_load);
2394
2395 PHYDM_DBG(dm, DBG_CMN, "CFO_avg=((%d kHz)), CFO_traking = ((%s%d))\n",
2396 cfo_t->CFO_ave_pre,
2397 ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
2398 DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
2399
2400 /* @CFO report */
2401 switch (dm->ic_ip_series) {
2402 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
2403 case PHYDM_IC_JGR3:
2404 PHYDM_DBG(dm, DBG_CMN, "cfo_tail = {%d, %d, %d, %d}\n",
2405 dbg_t->cfo_tail[0], dbg_t->cfo_tail[1],
2406 dbg_t->cfo_tail[2], dbg_t->cfo_tail[3]);
2407 break;
2408 #endif
2409 default:
2410 phydm_get_cfo_info(dm, &cfo);
2411 for (i = 0; i < dm->num_rf_path; i++) {
2412 PHYDM_DBG(dm, DBG_CMN,
2413 "CFO[%d] {S, L, Sec, Acq, End} = {%d, %d, %d, %d, %d}\n",
2414 i, cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i],
2415 cfo.cfo_rpt_sec[i], cfo.cfo_rpt_acq[i],
2416 cfo.cfo_rpt_end[i]);
2417 }
2418 break;
2419 }
2420
2421 /* @Condition number */
2422 #if (RTL8822B_SUPPORT)
2423 if (dm->support_ic_type == ODM_RTL8822B) {
2424 PHYDM_DBG(dm, DBG_CMN, "Condi_Num=((%d.%.4d)), %d\n",
2425 dbg_t->condi_num >> 4,
2426 phydm_show_fraction_num(dbg_t->condi_num & 0xf, 4),
2427 dbg_t->condi_num);
2428 }
2429 #endif
2430 #ifdef PHYSTS_3RD_TYPE_SUPPORT
2431 if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) {
2432 PHYDM_DBG(dm, DBG_CMN, "Condi_Num=((%d.%4d dB))\n",
2433 dbg_t->condi_num >> 1,
2434 phydm_show_fraction_num(dbg_t->condi_num & 0x1, 1));
2435 }
2436 #endif
2437
2438 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT))
2439 /*STBC or LDPC pkt*/
2440 if (dm->support_ic_type & (PHYSTS_2ND_TYPE_IC | PHYSTS_3RD_TYPE_IC))
2441 PHYDM_DBG(dm, DBG_CMN, "Coding: LDPC=((%s)), STBC=((%s))\n",
2442 (dbg_t->is_ldpc_pkt) ? "Y" : "N",
2443 (dbg_t->is_stbc_pkt) ? "Y" : "N");
2444 #endif
2445
2446 #if (RTL8822C_SUPPORT || RTL8723F_SUPPORT)
2447 /*Beamformed pkt*/
2448 if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8723F))
2449 PHYDM_DBG(dm, DBG_CMN, "Beamformed=((%s))\n",
2450 (dm->is_beamformed) ? "Y" : "N");
2451 #endif
2452 }
2453
phydm_dm_summary(void * dm_void,u8 macid)2454 void phydm_dm_summary(void *dm_void, u8 macid)
2455 {
2456 struct dm_struct *dm = (struct dm_struct *)dm_void;
2457 struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
2458 struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
2459 struct cmn_sta_info *sta = NULL;
2460 struct ra_sta_info *ra = NULL;
2461 struct dtp_info *dtp = NULL;
2462 u64 comp = dm->support_ability;
2463 u64 pause_comp = dm->pause_ability;
2464
2465 if (!(dm->debug_components & DBG_DM_SUMMARY))
2466 return;
2467
2468 if (!dm->is_linked) {
2469 pr_debug("[%s]No Link !!!\n", __func__);
2470 return;
2471 }
2472
2473 sta = dm->phydm_sta_info[macid];
2474
2475 if (!is_sta_active(sta)) {
2476 pr_debug("[Warning] %s invalid STA, macid=%d\n",
2477 __func__, macid);
2478 return;
2479 }
2480
2481 ra = &sta->ra_info;
2482 dtp = &sta->dtp_stat;
2483 pr_debug("[%s]===========>\n", __func__);
2484
2485 pr_debug("00.(%s) %-12s: IGI=0x%x, Dyn_Rng=0x%x~0x%x, FA_th={%d,%d,%d}\n",
2486 ((comp & ODM_BB_DIG) ?
2487 ((pause_comp & ODM_BB_DIG) ? "P" : "V") : "."),
2488 "DIG",
2489 dig_t->cur_ig_value,
2490 dig_t->rx_gain_range_min, dig_t->rx_gain_range_max,
2491 dig_t->fa_th[0], dig_t->fa_th[1], dig_t->fa_th[2]);
2492
2493 pr_debug("01.(%s) %-12s: rssi_lv=%d, mask=0x%llx\n",
2494 ((comp & ODM_BB_RA_MASK) ?
2495 ((pause_comp & ODM_BB_RA_MASK) ? "P" : "V") : "."),
2496 "RaMask",
2497 ra->rssi_level, ra->ramask);
2498
2499 #ifdef CONFIG_DYNAMIC_TX_TWR
2500 pr_debug("02.(%s) %-12s: pwr_lv=%d\n",
2501 ((comp & ODM_BB_DYNAMIC_TXPWR) ?
2502 ((pause_comp & ODM_BB_DYNAMIC_TXPWR) ? "P" : "V") : "."),
2503 "DynTxPwr",
2504 dtp->sta_tx_high_power_lvl);
2505 #endif
2506
2507 pr_debug("05.(%s) %-12s: cck_pd_lv=%d\n",
2508 ((comp & ODM_BB_CCK_PD) ?
2509 ((pause_comp & ODM_BB_CCK_PD) ? "P" : "V") : "."),
2510 "CCK_PD", dm->dm_cckpd_table.cck_pd_lv);
2511
2512 #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
2513 pr_debug("06.(%s) %-12s: div_type=%d, curr_ant=%s\n",
2514 ((comp & ODM_BB_ANT_DIV) ?
2515 ((pause_comp & ODM_BB_ANT_DIV) ? "P" : "V") : "."),
2516 "ANT_DIV",
2517 dm->ant_div_type,
2518 (dm->dm_fat_table.rx_idle_ant == MAIN_ANT) ? "MAIN" : "AUX");
2519 #endif
2520
2521 #ifdef PHYDM_POWER_TRAINING_SUPPORT
2522 pr_debug("08.(%s) %-12s: PT_score=%d, disable_PT=%d\n",
2523 ((comp & ODM_BB_PWR_TRAIN) ?
2524 ((pause_comp & ODM_BB_PWR_TRAIN) ? "P" : "V") : "."),
2525 "PwrTrain",
2526 dm->pow_train_table.pow_train_score,
2527 dm->is_disable_power_training);
2528 #endif
2529
2530 #ifdef CONFIG_PHYDM_DFS_MASTER
2531 pr_debug("11.(%s) %-12s: dbg_mode=%d, region_domain=%d\n",
2532 ((comp & ODM_BB_DFS) ?
2533 ((pause_comp & ODM_BB_DFS) ? "P" : "V") : "."),
2534 "DFS",
2535 dm->dfs.dbg_mode, dm->dfs_region_domain);
2536 #endif
2537 #ifdef PHYDM_SUPPORT_ADAPTIVITY
2538 pr_debug("13.(%s) %-12s: th{l2h, h2l}={%d, %d}, edcca_flag=%d\n",
2539 ((comp & ODM_BB_ADAPTIVITY) ?
2540 ((pause_comp & ODM_BB_ADAPTIVITY) ? "P" : "V") : "."),
2541 "Adaptivity",
2542 dm->adaptivity.th_l2h, dm->adaptivity.th_h2l,
2543 dm->false_alm_cnt.edcca_flag);
2544 #endif
2545 pr_debug("14.(%s) %-12s: CFO_avg=%d kHz, CFO_traking=%s%d\n",
2546 ((comp & ODM_BB_CFO_TRACKING) ?
2547 ((pause_comp & ODM_BB_CFO_TRACKING) ? "P" : "V") : "."),
2548 "CfoTrack",
2549 cfo_t->CFO_ave_pre,
2550 ((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
2551 DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
2552
2553 pr_debug("15.(%s) %-12s: ratio{nhm, clm}={%d, %d}\n",
2554 ((comp & ODM_BB_ENV_MONITOR) ?
2555 ((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."),
2556 "EnvMntr",
2557 dm->dm_ccx_info.nhm_ratio, dm->dm_ccx_info.clm_ratio);
2558
2559 #ifdef PHYDM_PRIMARY_CCA
2560 pr_debug("16.(%s) %-12s: CCA @ (%s SB)\n",
2561 ((comp & ODM_BB_PRIMARY_CCA) ?
2562 ((pause_comp & ODM_BB_PRIMARY_CCA) ? "P" : "V") : "."),
2563 "PriCCA",
2564 ((dm->dm_pri_cca.mf_state == MF_USC_LSC) ? "D" :
2565 ((dm->dm_pri_cca.mf_state == MF_LSC) ? "L" : "U")));
2566 #endif
2567 #ifdef CONFIG_ADAPTIVE_SOML
2568 pr_debug("17.(%s) %-12s: soml_en = %s\n",
2569 ((comp & ODM_BB_ADAPTIVE_SOML) ?
2570 ((pause_comp & ODM_BB_ADAPTIVE_SOML) ? "P" : "V") : "."),
2571 "A-SOML",
2572 (dm->dm_soml_table.soml_last_state == SOML_ON) ?
2573 "ON" : "OFF");
2574 #endif
2575 #ifdef PHYDM_LNA_SAT_CHK_SUPPORT
2576 pr_debug("18.(%s) %-12s:\n",
2577 ((comp & ODM_BB_LNA_SAT_CHK) ?
2578 ((pause_comp & ODM_BB_LNA_SAT_CHK) ? "P" : "V") : "."),
2579 "LNA_SAT_CHK");
2580 #endif
2581 }
2582
phydm_basic_dbg_message(void * dm_void)2583 void phydm_basic_dbg_message(void *dm_void)
2584 {
2585 struct dm_struct *dm = (struct dm_struct *)dm_void;
2586 struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
2587 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
2588 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2589 struct odm_phy_dbg_info *dbg_b = &dm->phy_dbg_info_win_bkp;
2590 #endif
2591 #ifdef NHM_SUPPORT
2592 struct ccx_info *ccx = &dm->dm_ccx_info;
2593 #endif
2594
2595 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2596 /* backup memory*/
2597 odm_move_memory(dm, dbg_b, dbg, sizeof(struct odm_phy_dbg_info));
2598 #endif
2599
2600 if (!(dm->debug_components & DBG_CMN)) {
2601 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2602 /* reset rx rate distribution*/
2603 phydm_reset_rx_rate_distribution(dm);
2604 /* cal & reset avg of rssi/snr/evm*/
2605 phydm_get_avg_phystatus_val(dm);
2606 /* reset sum of rssi/snr/evm*/
2607 phydm_reset_phystatus_statistic(dm);
2608 #endif
2609 return;
2610 }
2611
2612 if (dm->cmn_dbg_msg_cnt >= dm->cmn_dbg_msg_period) {
2613 dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD;
2614 } else {
2615 dm->cmn_dbg_msg_cnt += PHYDM_WATCH_DOG_PERIOD;
2616 return;
2617 }
2618
2619 PHYDM_DBG(dm, DBG_CMN, "[%s] System up time: ((%d sec))---->\n",
2620 __func__, dm->phydm_sys_up_time);
2621
2622 if (dm->is_linked)
2623 phydm_basic_dbg_msg_linked(dm);
2624 else
2625 PHYDM_DBG(dm, DBG_CMN, "No Link !!!\n");
2626
2627 PHYDM_DBG(dm, DBG_CMN,
2628 "[Tx cnt] {CCK_TxEN, CCK_TxON, OFDM_TxEN, OFDM_TxON} = {%d, %d, %d, %d}\n",
2629 fa_t->cnt_cck_txen, fa_t->cnt_cck_txon, fa_t->cnt_ofdm_txen,
2630 fa_t->cnt_ofdm_txon);
2631 PHYDM_DBG(dm, DBG_CMN, "[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
2632 fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all);
2633 PHYDM_DBG(dm, DBG_CMN, "[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
2634 fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all);
2635 PHYDM_DBG(dm, DBG_CMN,
2636 "[FA duration(us)] {exp, ifs_clm, fahm} = {%d, %d, %d}\n",
2637 fa_t->time_fa_exp, fa_t->time_fa_ifs_clm,
2638 fa_t->time_fa_fahm);
2639 PHYDM_DBG(dm, DBG_CMN,
2640 "[OFDM FA] Parity=%d, Rate=%d, Fast_Fsync=%d, SBD=%d\n",
2641 fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal,
2642 fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail);
2643 PHYDM_DBG(dm, DBG_CMN, "[HT FA] CRC8=%d, MCS=%d\n",
2644 fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail);
2645 #if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
2646 if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) {
2647 PHYDM_DBG(dm, DBG_CMN,
2648 "[VHT FA] SIGA_CRC8=%d, SIGB_CRC8=%d, MCS=%d\n",
2649 fa_t->cnt_crc8_fail_vhta, fa_t->cnt_crc8_fail_vhtb,
2650 fa_t->cnt_mcs_fail_vht);
2651 }
2652 #endif
2653 PHYDM_DBG(dm, DBG_CMN,
2654 "[CRC32 OK Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}\n",
2655 fa_t->cnt_cck_crc32_ok, fa_t->cnt_ofdm_crc32_ok,
2656 fa_t->cnt_ht_crc32_ok, fa_t->cnt_vht_crc32_ok,
2657 fa_t->cnt_crc32_ok_all);
2658 PHYDM_DBG(dm, DBG_CMN,
2659 "[CRC32 Err Cnt] {CCK, OFDM, HT, VHT, Total} = {%d, %d, %d, %d, %d}\n",
2660 fa_t->cnt_cck_crc32_error, fa_t->cnt_ofdm_crc32_error,
2661 fa_t->cnt_ht_crc32_error, fa_t->cnt_vht_crc32_error,
2662 fa_t->cnt_crc32_error_all);
2663
2664 if (dm->support_ic_type & (ODM_IC_11N_SERIES | ODM_IC_11AC_SERIES))
2665 PHYDM_DBG(dm, DBG_CMN,
2666 "is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n",
2667 dm->is_linked, dm->number_linked_client, dm->rssi_min,
2668 dm->dm_dig_table.cur_ig_value, dm->noisy_decision);
2669 else
2670 PHYDM_DBG(dm, DBG_CMN,
2671 "is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x\n",
2672 dm->is_linked, dm->number_linked_client, dm->rssi_min,
2673 dm->dm_dig_table.cur_ig_value);
2674
2675 #ifdef NHM_SUPPORT
2676 if (dm->support_ability & ODM_BB_ENV_MONITOR) {
2677 PHYDM_DBG(dm, DBG_CMN,
2678 "[NHM] valid: %d percent, noise(RSSI) = %d\n",
2679 ccx->nhm_level_valid, ccx->nhm_level);
2680 }
2681 #endif
2682 }
2683
phydm_basic_profile(void * dm_void,u32 * _used,char * output,u32 * _out_len)2684 void phydm_basic_profile(void *dm_void, u32 *_used, char *output, u32 *_out_len)
2685 {
2686 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
2687 struct dm_struct *dm = (struct dm_struct *)dm_void;
2688 char *cut = NULL;
2689 char *ic_type = NULL;
2690 u32 used = *_used;
2691 u32 out_len = *_out_len;
2692 u32 date = 0;
2693 char *commit_by = NULL;
2694 u32 release_ver = 0;
2695
2696 PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n",
2697 "% Basic Profile %");
2698
2699 if (dm->support_ic_type == ODM_RTL8188E) {
2700 #if (RTL8188E_SUPPORT)
2701 ic_type = "RTL8188E";
2702 date = RELEASE_DATE_8188E;
2703 commit_by = COMMIT_BY_8188E;
2704 release_ver = RELEASE_VERSION_8188E;
2705 #endif
2706 #if (RTL8812A_SUPPORT)
2707 } else if (dm->support_ic_type == ODM_RTL8812) {
2708 ic_type = "RTL8812A";
2709 date = RELEASE_DATE_8812A;
2710 commit_by = COMMIT_BY_8812A;
2711 release_ver = RELEASE_VERSION_8812A;
2712 #endif
2713 #if (RTL8821A_SUPPORT)
2714 } else if (dm->support_ic_type == ODM_RTL8821) {
2715 ic_type = "RTL8821A";
2716 date = RELEASE_DATE_8821A;
2717 commit_by = COMMIT_BY_8821A;
2718 release_ver = RELEASE_VERSION_8821A;
2719 #endif
2720 #if (RTL8192E_SUPPORT)
2721 } else if (dm->support_ic_type == ODM_RTL8192E) {
2722 ic_type = "RTL8192E";
2723 date = RELEASE_DATE_8192E;
2724 commit_by = COMMIT_BY_8192E;
2725 release_ver = RELEASE_VERSION_8192E;
2726 #endif
2727 #if (RTL8723B_SUPPORT)
2728 } else if (dm->support_ic_type == ODM_RTL8723B) {
2729 ic_type = "RTL8723B";
2730 date = RELEASE_DATE_8723B;
2731 commit_by = COMMIT_BY_8723B;
2732 release_ver = RELEASE_VERSION_8723B;
2733 #endif
2734 #if (RTL8814A_SUPPORT)
2735 } else if (dm->support_ic_type == ODM_RTL8814A) {
2736 ic_type = "RTL8814A";
2737 date = RELEASE_DATE_8814A;
2738 commit_by = COMMIT_BY_8814A;
2739 release_ver = RELEASE_VERSION_8814A;
2740 #endif
2741 #if (RTL8881A_SUPPORT)
2742 } else if (dm->support_ic_type == ODM_RTL8881A) {
2743 ic_type = "RTL8881A";
2744 #endif
2745 #if (RTL8822B_SUPPORT)
2746 } else if (dm->support_ic_type == ODM_RTL8822B) {
2747 ic_type = "RTL8822B";
2748 date = RELEASE_DATE_8822B;
2749 commit_by = COMMIT_BY_8822B;
2750 release_ver = RELEASE_VERSION_8822B;
2751 #endif
2752 #if (RTL8197F_SUPPORT)
2753 } else if (dm->support_ic_type == ODM_RTL8197F) {
2754 ic_type = "RTL8197F";
2755 date = RELEASE_DATE_8197F;
2756 commit_by = COMMIT_BY_8197F;
2757 release_ver = RELEASE_VERSION_8197F;
2758 #endif
2759 #if (RTL8703B_SUPPORT)
2760 } else if (dm->support_ic_type == ODM_RTL8703B) {
2761 ic_type = "RTL8703B";
2762 date = RELEASE_DATE_8703B;
2763 commit_by = COMMIT_BY_8703B;
2764 release_ver = RELEASE_VERSION_8703B;
2765 #endif
2766 #if (RTL8195A_SUPPORT)
2767 } else if (dm->support_ic_type == ODM_RTL8195A) {
2768 ic_type = "RTL8195A";
2769 #endif
2770 #if (RTL8188F_SUPPORT)
2771 } else if (dm->support_ic_type == ODM_RTL8188F) {
2772 ic_type = "RTL8188F";
2773 date = RELEASE_DATE_8188F;
2774 commit_by = COMMIT_BY_8188F;
2775 release_ver = RELEASE_VERSION_8188F;
2776 #endif
2777 #if (RTL8723D_SUPPORT)
2778 } else if (dm->support_ic_type == ODM_RTL8723D) {
2779 ic_type = "RTL8723D";
2780 date = RELEASE_DATE_8723D;
2781 commit_by = COMMIT_BY_8723D;
2782 release_ver = RELEASE_VERSION_8723D;
2783 #endif
2784 }
2785
2786 /* @JJ ADD 20161014 */
2787 #if (RTL8710B_SUPPORT)
2788 else if (dm->support_ic_type == ODM_RTL8710B) {
2789 ic_type = "RTL8710B";
2790 date = RELEASE_DATE_8710B;
2791 commit_by = COMMIT_BY_8710B;
2792 release_ver = RELEASE_VERSION_8710B;
2793 }
2794 #endif
2795
2796 #if (RTL8721D_SUPPORT)
2797 else if (dm->support_ic_type == ODM_RTL8721D) {
2798 ic_type = "RTL8721D";
2799 date = RELEASE_DATE_8721D;
2800 commit_by = COMMIT_BY_8721D;
2801 release_ver = RELEASE_VERSION_8721D;
2802 }
2803 #endif
2804
2805 #if (RTL8710C_SUPPORT)
2806 else if (dm->support_ic_type == ODM_RTL8710C) {
2807 ic_type = "RTL8710C";
2808 date = RELEASE_DATE_8710C;
2809 commit_by = COMMIT_BY_8710C;
2810 release_ver = RELEASE_VERSION_8710C;
2811 }
2812 #endif
2813
2814 #if (RTL8821C_SUPPORT)
2815 else if (dm->support_ic_type == ODM_RTL8821C) {
2816 ic_type = "RTL8821C";
2817 date = RELEASE_DATE_8821C;
2818 commit_by = COMMIT_BY_8821C;
2819 release_ver = RELEASE_VERSION_8821C;
2820 }
2821 #endif
2822
2823 /*@jj add 20170822*/
2824 #if (RTL8192F_SUPPORT)
2825 else if (dm->support_ic_type == ODM_RTL8192F) {
2826 ic_type = "RTL8192F";
2827 date = RELEASE_DATE_8192F;
2828 commit_by = COMMIT_BY_8192F;
2829 release_ver = RELEASE_VERSION_8192F;
2830 }
2831 #endif
2832
2833 #if (RTL8198F_SUPPORT)
2834 else if (dm->support_ic_type == ODM_RTL8198F) {
2835 ic_type = "RTL8198F";
2836 date = RELEASE_DATE_8198F;
2837 commit_by = COMMIT_BY_8198F;
2838 release_ver = RELEASE_VERSION_8198F;
2839 }
2840 #endif
2841
2842 #if (RTL8822C_SUPPORT)
2843 else if (dm->support_ic_type == ODM_RTL8822C) {
2844 ic_type = "RTL8822C";
2845 date = RELEASE_DATE_8822C;
2846 commit_by = COMMIT_BY_8822C;
2847 release_ver = RELEASE_VERSION_8822C;
2848 }
2849 #endif
2850
2851 #if (RTL8723F_SUPPORT)
2852 else if (dm->support_ic_type == ODM_RTL8723F) {
2853 ic_type = "RTL8723F";
2854 date = RELEASE_DATE_8723F;
2855 commit_by = COMMIT_BY_8723F;
2856 release_ver = RELEASE_VERSION_8723F;
2857 }
2858 #endif
2859 #if (RTL8812F_SUPPORT)
2860 else if (dm->support_ic_type == ODM_RTL8812F) {
2861 ic_type = "RTL8812F";
2862 date = RELEASE_DATE_8812F;
2863 commit_by = COMMIT_BY_8812F;
2864 release_ver = RELEASE_VERSION_8812F;
2865 }
2866 #endif
2867
2868 #if (RTL8197G_SUPPORT)
2869 else if (dm->support_ic_type == ODM_RTL8197G) {
2870 ic_type = "RTL8197G";
2871 date = RELEASE_DATE_8197G;
2872 commit_by = COMMIT_BY_8197G;
2873 release_ver = RELEASE_VERSION_8197G;
2874 }
2875 #endif
2876
2877 #if (RTL8814B_SUPPORT)
2878 else if (dm->support_ic_type == ODM_RTL8814B) {
2879 ic_type = "RTL8814B";
2880 date = RELEASE_DATE_8814B;
2881 commit_by = COMMIT_BY_8814B;
2882 release_ver = RELEASE_VERSION_8814B;
2883 }
2884 #endif
2885
2886 PDM_SNPF(out_len, used, output + used, out_len - used,
2887 " %-35s: %s (MP Chip: %s)\n", "IC type", ic_type,
2888 dm->is_mp_chip ? "Yes" : "No");
2889
2890 if (dm->cut_version == ODM_CUT_A)
2891 cut = "A";
2892 else if (dm->cut_version == ODM_CUT_B)
2893 cut = "B";
2894 else if (dm->cut_version == ODM_CUT_C)
2895 cut = "C";
2896 else if (dm->cut_version == ODM_CUT_D)
2897 cut = "D";
2898 else if (dm->cut_version == ODM_CUT_E)
2899 cut = "E";
2900 else if (dm->cut_version == ODM_CUT_F)
2901 cut = "F";
2902 else if (dm->cut_version == ODM_CUT_G)
2903 cut = "G";
2904 else if (dm->cut_version == ODM_CUT_H)
2905 cut = "H";
2906 else if (dm->cut_version == ODM_CUT_I)
2907 cut = "I";
2908 else if (dm->cut_version == ODM_CUT_J)
2909 cut = "J";
2910 else if (dm->cut_version == ODM_CUT_K)
2911 cut = "K";
2912 else if (dm->cut_version == ODM_CUT_L)
2913 cut = "L";
2914 else if (dm->cut_version == ODM_CUT_M)
2915 cut = "M";
2916 else if (dm->cut_version == ODM_CUT_N)
2917 cut = "N";
2918 else if (dm->cut_version == ODM_CUT_O)
2919 cut = "O";
2920 else if (dm->cut_version == ODM_CUT_TEST)
2921 cut = "TEST";
2922 else
2923 cut = "UNKNOWN";
2924
2925 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2926 "RFE type", dm->rfe_type);
2927 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2928 "CART_Ver", cut);
2929 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2930 "PHY Para Ver", odm_get_hw_img_version(dm));
2931 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2932 "PHY Para Commit date", date);
2933 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2934 "PHY Para Commit by", commit_by);
2935 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2936 "PHY Para Release Ver", release_ver);
2937
2938 PDM_SNPF(out_len, used, output + used, out_len - used,
2939 " %-35s: %d (Subversion: %d)\n", "FW Ver", dm->fw_version,
2940 dm->fw_sub_version);
2941
2942 /* @1 PHY DM version List */
2943 PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n",
2944 "% PHYDM version %");
2945 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2946 "Code base", PHYDM_CODE_BASE);
2947 #ifdef PHYDM_SVN_REV
2948 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2949 "PHYDM SVN Ver", PHYDM_SVN_REV);
2950 #endif
2951 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2952 "Release Date", PHYDM_RELEASE_DATE);
2953 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2954 "Adaptivity", ADAPTIVITY_VERSION);
2955 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2956 "DIG", DIG_VERSION);
2957 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2958 "CFO Tracking", CFO_TRACKING_VERSION);
2959 #ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
2960 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2961 "AntDiv", ANTDIV_VERSION);
2962 #endif
2963 #ifdef CONFIG_DYNAMIC_TX_TWR
2964 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2965 "Dynamic TxPower", DYNAMIC_TXPWR_VERSION);
2966 #endif
2967 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2968 "RA Info", RAINFO_VERSION);
2969 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
2970 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2971 "AntDetect", ANTDECT_VERSION);
2972 #endif
2973 #ifdef CONFIG_PATH_DIVERSITY
2974 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2975 "PathDiv", PATHDIV_VERSION);
2976 #endif
2977 #ifdef CONFIG_ADAPTIVE_SOML
2978 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2979 "Adaptive SOML", ADAPTIVE_SOML_VERSION);
2980 #endif
2981 #if (PHYDM_LA_MODE_SUPPORT)
2982 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2983 "LA mode", DYNAMIC_LA_MODE);
2984 #endif
2985 #ifdef PHYDM_PRIMARY_CCA
2986 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2987 "Primary CCA", PRIMARYCCA_VERSION);
2988 #endif
2989 PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2990 "DFS", DFS_VERSION);
2991
2992 #if (RTL8822B_SUPPORT)
2993 if (dm->support_ic_type & ODM_RTL8822B)
2994 PDM_SNPF(out_len, used, output + used, out_len - used,
2995 " %-35s: %s\n", "PHY config 8822B",
2996 PHY_CONFIG_VERSION_8822B);
2997
2998 #endif
2999 #if (RTL8197F_SUPPORT)
3000 if (dm->support_ic_type & ODM_RTL8197F)
3001 PDM_SNPF(out_len, used, output + used, out_len - used,
3002 " %-35s: %s\n", "PHY config 8197F",
3003 PHY_CONFIG_VERSION_8197F);
3004 #endif
3005
3006 /*@jj add 20170822*/
3007 #if (RTL8192F_SUPPORT)
3008 if (dm->support_ic_type & ODM_RTL8192F)
3009 PDM_SNPF(out_len, used, output + used, out_len - used,
3010 " %-35s: %s\n", "PHY config 8192F",
3011 PHY_CONFIG_VERSION_8192F);
3012 #endif
3013 #if (RTL8721D_SUPPORT)
3014 if (dm->support_ic_type & ODM_RTL8721D)
3015 PDM_SNPF(out_len, used, output + used, out_len - used,
3016 " %-35s: %s\n", "PHY config 8721D",
3017 PHY_CONFIG_VERSION_8721D);
3018 #endif
3019
3020 #if (RTL8710C_SUPPORT)
3021 if (dm->support_ic_type & ODM_RTL8710C)
3022 PDM_SNPF(out_len, used, output + used, out_len - used,
3023 " %-35s: %s\n", "PHY config 8710C",
3024 PHY_CONFIG_VERSION_8710C);
3025 #endif
3026
3027 *_used = used;
3028 *_out_len = out_len;
3029
3030 #endif /*@#if CONFIG_PHYDM_DEBUG_FUNCTION*/
3031 }
3032
3033 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
phydm_fw_trace_en_h2c(void * dm_void,boolean enable,u32 fw_dbg_comp,u32 monitor_mode,u32 macid)3034 void phydm_fw_trace_en_h2c(void *dm_void, boolean enable,
3035 u32 fw_dbg_comp, u32 monitor_mode, u32 macid)
3036 {
3037 struct dm_struct *dm = (struct dm_struct *)dm_void;
3038 u8 h2c_parameter[7] = {0};
3039 u8 cmd_length;
3040
3041 if (dm->support_ic_type & PHYDM_IC_3081_SERIES) {
3042 h2c_parameter[0] = enable;
3043 h2c_parameter[1] = (u8)(fw_dbg_comp & MASKBYTE0);
3044 h2c_parameter[2] = (u8)((fw_dbg_comp & MASKBYTE1) >> 8);
3045 h2c_parameter[3] = (u8)((fw_dbg_comp & MASKBYTE2) >> 16);
3046 h2c_parameter[4] = (u8)((fw_dbg_comp & MASKBYTE3) >> 24);
3047 h2c_parameter[5] = (u8)monitor_mode;
3048 h2c_parameter[6] = (u8)macid;
3049 cmd_length = 7;
3050
3051 } else {
3052 h2c_parameter[0] = enable;
3053 h2c_parameter[1] = (u8)monitor_mode;
3054 h2c_parameter[2] = (u8)macid;
3055 cmd_length = 3;
3056 }
3057
3058 PHYDM_DBG(dm, DBG_FW_TRACE,
3059 "[H2C] FW_debug_en: (( %d )), mode: (( %d )), macid: (( %d ))\n",
3060 enable, monitor_mode, macid);
3061
3062 odm_fill_h2c_cmd(dm, PHYDM_H2C_FW_TRACE_EN, cmd_length, h2c_parameter);
3063 }
3064
phydm_get_per_path_txagc(void * dm_void,u8 path,u32 * _used,char * output,u32 * _out_len)3065 void phydm_get_per_path_txagc(void *dm_void, u8 path, u32 *_used, char *output,
3066 u32 *_out_len)
3067 {
3068 struct dm_struct *dm = (struct dm_struct *)dm_void;
3069 u8 rate_idx = 0;
3070 u8 txagc = 0;
3071 u32 used = *_used;
3072 u32 out_len = *_out_len;
3073
3074 #ifdef PHYDM_COMMON_API_SUPPORT
3075 if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
3076 return;
3077
3078 if (dm->num_rf_path == 1 && path > RF_PATH_A)
3079 return;
3080 else if (dm->num_rf_path == 2 && path > RF_PATH_B)
3081 return;
3082 else if (dm->num_rf_path == 3 && path > RF_PATH_C)
3083 return;
3084 else if (dm->num_rf_path == 4 && path > RF_PATH_D)
3085 return;
3086
3087 for (rate_idx = 0; rate_idx <= 0x53; rate_idx++) {
3088 if (!(dm->support_ic_type & PHYDM_IC_ABOVE_3SS) &&
3089 ((rate_idx >= ODM_RATEMCS16 &&
3090 rate_idx < ODM_RATEVHTSS1MCS0) ||
3091 rate_idx >= ODM_RATEVHTSS3MCS0))
3092 continue;
3093
3094 if (rate_idx == ODM_RATE1M)
3095 PDM_SNPF(out_len, used, output + used, out_len - used,
3096 " %-35s\n", "CCK====>");
3097 else if (rate_idx == ODM_RATE6M)
3098 PDM_SNPF(out_len, used, output + used, out_len - used,
3099 "\n %-35s\n", "OFDM====>");
3100 else if (rate_idx == ODM_RATEMCS0)
3101 PDM_SNPF(out_len, used, output + used, out_len - used,
3102 "\n %-35s\n", "HT 1ss====>");
3103 else if (rate_idx == ODM_RATEMCS8)
3104 PDM_SNPF(out_len, used, output + used, out_len - used,
3105 "\n %-35s\n", "HT 2ss====>");
3106 else if (rate_idx == ODM_RATEMCS16)
3107 PDM_SNPF(out_len, used, output + used, out_len - used,
3108 "\n %-35s\n", "HT 3ss====>");
3109 else if (rate_idx == ODM_RATEMCS24)
3110 PDM_SNPF(out_len, used, output + used, out_len - used,
3111 "\n %-35s\n", "HT 4ss====>");
3112 else if (rate_idx == ODM_RATEVHTSS1MCS0)
3113 PDM_SNPF(out_len, used, output + used, out_len - used,
3114 "\n %-35s\n", "VHT 1ss====>");
3115 else if (rate_idx == ODM_RATEVHTSS2MCS0)
3116 PDM_SNPF(out_len, used, output + used, out_len - used,
3117 "\n %-35s\n", "VHT 2ss====>");
3118 else if (rate_idx == ODM_RATEVHTSS3MCS0)
3119 PDM_SNPF(out_len, used, output + used, out_len - used,
3120 "\n %-35s\n", "VHT 3ss====>");
3121 else if (rate_idx == ODM_RATEVHTSS4MCS0)
3122 PDM_SNPF(out_len, used, output + used, out_len - used,
3123 "\n %-35s\n", "VHT 4ss====>");
3124
3125 txagc = phydm_api_get_txagc(dm, (enum rf_path)path, rate_idx);
3126 if (config_phydm_read_txagc_check(txagc))
3127 PDM_SNPF(out_len, used, output + used,
3128 out_len - used, " 0x%02x ", txagc);
3129 else
3130 PDM_SNPF(out_len, used, output + used,
3131 out_len - used, " 0x%s ", "xx");
3132 }
3133 #endif
3134
3135 *_used = used;
3136 *_out_len = out_len;
3137 }
3138
phydm_get_txagc(void * dm_void,u32 * _used,char * output,u32 * _out_len)3139 void phydm_get_txagc(void *dm_void, u32 *_used, char *output, u32 *_out_len)
3140 {
3141 struct dm_struct *dm = (struct dm_struct *)dm_void;
3142 u32 used = *_used;
3143 u32 out_len = *_out_len;
3144 u8 i = 0;
3145
3146 #if (RTL8822C_SUPPORT)
3147 PDM_SNPF(out_len, used, output + used,
3148 out_len - used, "Disabled DPD rate mask: 0x%x\n",
3149 dm->dis_dpd_rate);
3150 #endif
3151
3152 for (i = RF_PATH_A; i < dm->num_rf_path; i++) {
3153 if (i == RF_PATH_A)
3154 PDM_SNPF(out_len, used, output + used, out_len - used,
3155 "%-35s\n", "path-A====================");
3156 else if (i == RF_PATH_B)
3157 PDM_SNPF(out_len, used, output + used, out_len - used,
3158 "\n%-35s\n", "path-B====================");
3159 else if (i == RF_PATH_C)
3160 PDM_SNPF(out_len, used, output + used, out_len - used,
3161 "\n%-35s\n", "path-C====================");
3162 else if (i == RF_PATH_D)
3163 PDM_SNPF(out_len, used, output + used, out_len - used,
3164 "\n%-35s\n", "path-D====================");
3165
3166 phydm_get_per_path_txagc(dm, i, &used, output, &out_len);
3167 }
3168 *_used = used;
3169 *_out_len = out_len;
3170 }
3171
phydm_set_txagc(void * dm_void,u32 * const val,u32 * _used,char * output,u32 * _out_len)3172 void phydm_set_txagc(void *dm_void, u32 *const val, u32 *_used,
3173 char *output, u32 *_out_len)
3174 {
3175 struct dm_struct *dm = (struct dm_struct *)dm_void;
3176 u32 used = *_used;
3177 u32 out_len = *_out_len;
3178 u8 i = 0;
3179 u32 pow = 0; /*power index*/
3180 u8 vht_start_rate = ODM_RATEVHTSS1MCS0;
3181 boolean rpt = true;
3182 enum rf_path path = RF_PATH_A;
3183
3184 /*@val[1] = path*/
3185 /*@val[2] = hw_rate*/
3186 /*@val[3] = power_index*/
3187
3188 #ifdef PHYDM_COMMON_API_SUPPORT
3189 if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
3190 return;
3191
3192 path = (enum rf_path)val[1];
3193
3194 if (val[1] >= dm->num_rf_path) {
3195 PDM_SNPF(out_len, used, output + used, out_len - used,
3196 "Write path-%d rate_idx-0x%x fail\n", val[1], val[2]);
3197 } else if ((u8)val[2] != 0xff) {
3198 if (phydm_api_set_txagc(dm, val[3], path, (u8)val[2], true))
3199 PDM_SNPF(out_len, used, output + used, out_len - used,
3200 "Write path-%d rate_idx-0x%x = 0x%x\n",
3201 val[1], val[2], val[3]);
3202 else
3203 PDM_SNPF(out_len, used, output + used, out_len - used,
3204 "Write path-%d rate index-0x%x fail\n",
3205 val[1], val[2]);
3206 } else {
3207
3208 if (dm->support_ic_type &
3209 (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8195B)) {
3210 pow = (val[3] & 0x3f);
3211 pow = BYTE_DUPLICATE_2_DWORD(pow);
3212
3213 for (i = 0; i < ODM_RATEVHTSS2MCS9; i += 4)
3214 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3215 } else if (dm->support_ic_type &
3216 (ODM_RTL8197F | ODM_RTL8192F)) {
3217 pow = (val[3] & 0x3f);
3218 for (i = 0; i <= ODM_RATEMCS15; i++)
3219 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3220 } else if (dm->support_ic_type & ODM_RTL8198F) {
3221 pow = (val[3] & 0x7f);
3222 for (i = 0; i <= ODM_RATEVHTSS4MCS9; i++)
3223 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3224 } else if (dm->support_ic_type &
3225 (ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G)) {
3226 pow = (val[3] & 0x7f);
3227 for (i = 0; i <= ODM_RATEMCS15; i++)
3228 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3229 for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++)
3230 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3231 } else if (dm->support_ic_type &
3232 (ODM_RTL8721D | ODM_RTL8710C)) {
3233 pow = (val[3] & 0x3f);
3234 for (i = 0; i <= ODM_RATEMCS7; i++)
3235 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3236 } else if (dm->support_ic_type &(ODM_RTL8723F)) {
3237 pow = (val[3] & 0x7f);
3238 for (i = 0; i <= ODM_RATEMCS7; i++)
3239 rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3240 }
3241
3242 if (rpt)
3243 PDM_SNPF(out_len, used, output + used, out_len - used,
3244 "Write all TXAGC of path-%d = 0x%x\n",
3245 val[1], val[3]);
3246 else
3247 PDM_SNPF(out_len, used, output + used, out_len - used,
3248 "Write all TXAGC of path-%d fail\n", val[1]);
3249 }
3250
3251 #endif
3252 *_used = used;
3253 *_out_len = out_len;
3254 }
3255
phydm_shift_txagc(void * dm_void,u32 * const val,u32 * _used,char * output,u32 * _out_len)3256 void phydm_shift_txagc(void *dm_void, u32 *const val, u32 *_used, char *output,
3257 u32 *_out_len)
3258 {
3259 struct dm_struct *dm = (struct dm_struct *)dm_void;
3260 u32 used = *_used;
3261 u32 out_len = *_out_len;
3262 u8 i = 0;
3263 u32 pow = 0; /*Power index*/
3264 boolean rpt = true;
3265 u8 vht_start_rate = ODM_RATEVHTSS1MCS0;
3266 enum rf_path path = RF_PATH_A;
3267
3268 #ifdef PHYDM_COMMON_API_SUPPORT
3269 if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
3270 return;
3271
3272 if (val[1] >= dm->num_rf_path) {
3273 PDM_SNPF(out_len, used, output + used, out_len - used,
3274 "Write path-%d fail\n", val[1]);
3275 return;
3276 }
3277
3278 path = (enum rf_path)val[1];
3279
3280 if ((u8)val[2] == 0) {
3281 /*@{0:-, 1:+} {Pwr Offset}*/
3282 if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C)) {
3283 for (i = 0; i <= ODM_RATEMCS7; i++) {
3284 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3285 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3286 }
3287 for (i = vht_start_rate; i <= ODM_RATEVHTSS1MCS9; i++) {
3288 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3289 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3290 }
3291 } else if (dm->support_ic_type & (ODM_RTL8822B)) {
3292 for (i = 0; i <= ODM_RATEMCS15; i++) {
3293 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3294 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3295 }
3296 for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) {
3297 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3298 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3299 }
3300 } else if (dm->support_ic_type &
3301 (ODM_RTL8197F | ODM_RTL8192F)) {
3302 for (i = 0; i <= ODM_RATEMCS15; i++) {
3303 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3304 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3305 }
3306 } else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
3307 rpt &= phydm_api_shift_txagc(dm, val[3], path, 0);
3308 } else if (dm->support_ic_type &
3309 (ODM_RTL8721D | ODM_RTL8710C)) {
3310 for (i = 0; i <= ODM_RATEMCS7; i++) {
3311 pow = phydm_api_get_txagc(dm, path, i) - val[3];
3312 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3313 }
3314 }
3315 } else if ((u8)val[2] == 1) {
3316 /*@{0:-, 1:+} {Pwr Offset}*/
3317 if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C)) {
3318 for (i = 0; i <= ODM_RATEMCS7; i++) {
3319 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3320 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3321 }
3322 for (i = vht_start_rate; i <= ODM_RATEVHTSS1MCS9; i++) {
3323 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3324 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3325 }
3326 } else if (dm->support_ic_type & (ODM_RTL8822B)) {
3327 for (i = 0; i <= ODM_RATEMCS15; i++) {
3328 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3329 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3330 }
3331 for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) {
3332 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3333 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3334 }
3335 } else if (dm->support_ic_type &
3336 (ODM_RTL8197F | ODM_RTL8192F)) {
3337 for (i = 0; i <= ODM_RATEMCS15; i++) {
3338 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3339 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3340 }
3341 } else if (dm->support_ic_type & (ODM_RTL8721D |
3342 ODM_RTL8710C)) {
3343 for (i = 0; i <= ODM_RATEMCS7; i++) {
3344 pow = phydm_api_get_txagc(dm, path, i) + val[3];
3345 rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3346 }
3347 } else if (dm->support_ic_type &
3348 (ODM_RTL8822C | ODM_RTL8814B |
3349 ODM_RTL8812F | ODM_RTL8197G | ODM_RTL8723F)) {
3350 rpt &= phydm_api_shift_txagc(dm, val[3], path, 1);
3351 }
3352 }
3353 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3354 if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
3355 PDM_SNPF(out_len, used, output + used, out_len - used,
3356 "[All rate] Set Path-%d Pow_idx: %s %d\n",
3357 val[1], (val[2] ? "+" : "-"), val[3]);
3358 else
3359 #endif
3360 PDM_SNPF(out_len, used, output + used, out_len - used,
3361 "[All rate] Set Path-%d Pow_idx: %s %d(%d.%s dB)\n",
3362 val[1], (val[2] ? "+" : "-"), val[3], val[3] >> 1,
3363 ((val[3] & 1) ? "5" : "0"));
3364
3365 #endif
3366 *_used = used;
3367 *_out_len = out_len;
3368 }
3369
phydm_set_txagc_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)3370 void phydm_set_txagc_dbg(void *dm_void, char input[][16], u32 *_used,
3371 char *output, u32 *_out_len)
3372 {
3373 struct dm_struct *dm = (struct dm_struct *)dm_void;
3374 u32 used = *_used;
3375 u32 out_len = *_out_len;
3376 u32 var1[10] = {0};
3377 char help[] = "-h";
3378 u8 i = 0, input_idx = 0;
3379
3380 for (i = 0; i < 5; i++) {
3381 PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
3382 input_idx++;
3383 }
3384
3385 if ((strcmp(input[1], help) == 0)) {
3386 PDM_SNPF(out_len, used, output + used, out_len - used,
3387 "{Dis:0, En:1} {pathA~D(0~3)} {rate_idx(Hex), All_rate:0xff} {txagc_idx (Hex)}\n");
3388 PDM_SNPF(out_len, used, output + used, out_len - used,
3389 "{Pwr Shift(All rate):2} {pathA~D(0~3)} {0:-, 1:+} {Pwr Offset(Hex)}\n");
3390 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3391 PDM_SNPF(out_len, used, output + used, out_len - used,
3392 "{reset all rate ref/diff to 0x0:0xff}\n");
3393 #endif
3394 } else if (var1[0] == 0) {
3395 dm->is_disable_phy_api = false;
3396 PDM_SNPF(out_len, used, output + used, out_len - used,
3397 "Disable API debug mode\n");
3398 } else if (var1[0] == 1) {
3399 dm->is_disable_phy_api = false;
3400 #ifdef CONFIG_TXAGC_DEBUG_8822C
3401 config_phydm_write_txagc_8822c(dm, var1[3],
3402 (enum rf_path)var1[1],
3403 (u8)var1[2]);
3404 #elif (defined(CONFIG_TXAGC_DEBUG_8814B))
3405 config_phydm_write_txagc_8814b(dm, var1[3],
3406 (enum rf_path)var1[1],
3407 (u8)var1[2]);
3408 #else
3409 phydm_set_txagc(dm, (u32 *)var1, &used, output, &out_len);
3410 #endif
3411 dm->is_disable_phy_api = true;
3412 } else if (var1[0] == 2) {
3413 PHYDM_SSCANF(input[4], DCMD_HEX, &var1[3]);
3414 dm->is_disable_phy_api = false;
3415 phydm_shift_txagc(dm, (u32 *)var1, &used, output, &out_len);
3416 dm->is_disable_phy_api = true;
3417 }
3418 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3419 else if (var1[0] == 0xff) {
3420 dm->is_disable_phy_api = false;
3421 phydm_reset_txagc(dm);
3422 dm->is_disable_phy_api = true;
3423 }
3424 #endif
3425 #ifdef CONFIG_TXAGC_DEBUG_8822C
3426 else if (var1[0] == 3) {
3427 dm->is_disable_phy_api = false;
3428 phydm_txagc_tab_buff_show_8822c(dm);
3429 dm->is_disable_phy_api = true;
3430 } else if (var1[0] == 4) {
3431 dm->is_disable_phy_api = false;
3432 config_phydm_set_txagc_to_hw_8822c(dm);
3433 dm->is_disable_phy_api = true;
3434 }
3435 #elif (defined(CONFIG_TXAGC_DEBUG_8814B))
3436 else if (var1[0] == 3) {
3437 dm->is_disable_phy_api = false;
3438 phydm_txagc_tab_buff_show_8814b(dm);
3439 dm->is_disable_phy_api = true;
3440 } else if (var1[0] == 4) {
3441 dm->is_disable_phy_api = false;
3442 config_phydm_set_txagc_to_hw_8814b(dm);
3443 dm->is_disable_phy_api = true;
3444 }
3445 #endif
3446
3447 *_used = used;
3448 *_out_len = out_len;
3449 }
3450
phydm_cmn_msg_setting(void * dm_void,u32 * val,u32 * _used,char * output,u32 * _out_len)3451 void phydm_cmn_msg_setting(void *dm_void, u32 *val, u32 *_used,
3452 char *output, u32 *_out_len)
3453 {
3454 struct dm_struct *dm = (struct dm_struct *)dm_void;
3455 u32 used = *_used;
3456 u32 out_len = *_out_len;
3457
3458 if (val[1] == 1) {
3459 dm->cmn_dbg_msg_period = (u8)val[2];
3460
3461 if (dm->cmn_dbg_msg_period < PHYDM_WATCH_DOG_PERIOD)
3462 dm->cmn_dbg_msg_period = PHYDM_WATCH_DOG_PERIOD;
3463
3464 PDM_SNPF(out_len, used, output + used, out_len - used,
3465 "cmn_dbg_msg_period=%d\n", dm->cmn_dbg_msg_period);
3466 }
3467
3468 #ifdef PHYDM_PHYSTAUS_AUTO_SWITCH
3469 if (val[1] == 1)
3470 phydm_physts_auto_switch_jgr3_set(dm, true, BIT(4) | BIT(1));
3471 else
3472 phydm_physts_auto_switch_jgr3_set(dm, false, BIT(1));
3473 #endif
3474 *_used = used;
3475 *_out_len = out_len;
3476 }
3477
phydm_debug_trace(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)3478 void phydm_debug_trace(void *dm_void, char input[][16], u32 *_used,
3479 char *output, u32 *_out_len)
3480 {
3481 struct dm_struct *dm = (struct dm_struct *)dm_void;
3482 u64 pre_debug_components, one = 1;
3483 u64 comp = 0;
3484 u32 used = *_used;
3485 u32 out_len = *_out_len;
3486 u32 val[10] = {0};
3487 u8 i = 0;
3488
3489 for (i = 0; i < 5; i++) {
3490 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
3491 }
3492 comp = dm->debug_components;
3493 pre_debug_components = dm->debug_components;
3494
3495 PDM_SNPF(out_len, used, output + used, out_len - used,
3496 "\n================================\n");
3497 if (val[0] == 100) {
3498 PDM_SNPF(out_len, used, output + used, out_len - used,
3499 "[DBG MSG] Component Selection\n");
3500 PDM_SNPF(out_len, used, output + used, out_len - used,
3501 "================================\n");
3502 PDM_SNPF(out_len, used, output + used, out_len - used,
3503 "00. (( %s ))DIG\n",
3504 ((comp & DBG_DIG) ? ("V") : (".")));
3505 PDM_SNPF(out_len, used, output + used, out_len - used,
3506 "01. (( %s ))RA_MASK\n",
3507 ((comp & DBG_RA_MASK) ? ("V") : (".")));
3508 PDM_SNPF(out_len, used, output + used, out_len - used,
3509 "02. (( %s ))DYN_TXPWR\n",
3510 ((comp & DBG_DYN_TXPWR) ? ("V") : (".")));
3511 PDM_SNPF(out_len, used, output + used, out_len - used,
3512 "03. (( %s ))FA_CNT\n",
3513 ((comp & DBG_FA_CNT) ? ("V") : (".")));
3514 PDM_SNPF(out_len, used, output + used, out_len - used,
3515 "04. (( %s ))RSSI_MNTR\n",
3516 ((comp & DBG_RSSI_MNTR) ? ("V") : (".")));
3517 PDM_SNPF(out_len, used, output + used, out_len - used,
3518 "05. (( %s ))CCKPD\n",
3519 ((comp & DBG_CCKPD) ? ("V") : (".")));
3520 PDM_SNPF(out_len, used, output + used, out_len - used,
3521 "06. (( %s ))ANT_DIV\n",
3522 ((comp & DBG_ANT_DIV) ? ("V") : (".")));
3523 PDM_SNPF(out_len, used, output + used, out_len - used,
3524 "07. (( %s ))SMT_ANT\n",
3525 ((comp & DBG_SMT_ANT) ? ("V") : (".")));
3526 PDM_SNPF(out_len, used, output + used, out_len - used,
3527 "08. (( %s ))PWR_TRAIN\n",
3528 ((comp & DBG_PWR_TRAIN) ? ("V") : (".")));
3529 PDM_SNPF(out_len, used, output + used, out_len - used,
3530 "09. (( %s ))RA\n",
3531 ((comp & DBG_RA) ? ("V") : (".")));
3532 PDM_SNPF(out_len, used, output + used, out_len - used,
3533 "10. (( %s ))PATH_DIV\n",
3534 ((comp & DBG_PATH_DIV) ? ("V") : (".")));
3535 PDM_SNPF(out_len, used, output + used, out_len - used,
3536 "11. (( %s ))DFS\n",
3537 ((comp & DBG_DFS) ? ("V") : (".")));
3538 PDM_SNPF(out_len, used, output + used, out_len - used,
3539 "12. (( %s ))DYN_ARFR\n",
3540 ((comp & DBG_DYN_ARFR) ? ("V") : (".")));
3541 PDM_SNPF(out_len, used, output + used, out_len - used,
3542 "13. (( %s ))ADAPTIVITY\n",
3543 ((comp & DBG_ADPTVTY) ? ("V") : (".")));
3544 PDM_SNPF(out_len, used, output + used, out_len - used,
3545 "14. (( %s ))CFO_TRK\n",
3546 ((comp & DBG_CFO_TRK) ? ("V") : (".")));
3547 PDM_SNPF(out_len, used, output + used, out_len - used,
3548 "15. (( %s ))ENV_MNTR\n",
3549 ((comp & DBG_ENV_MNTR) ? ("V") : (".")));
3550 PDM_SNPF(out_len, used, output + used, out_len - used,
3551 "16. (( %s ))PRI_CCA\n",
3552 ((comp & DBG_PRI_CCA) ? ("V") : (".")));
3553 PDM_SNPF(out_len, used, output + used, out_len - used,
3554 "17. (( %s ))ADPTV_SOML\n",
3555 ((comp & DBG_ADPTV_SOML) ? ("V") : (".")));
3556 PDM_SNPF(out_len, used, output + used, out_len - used,
3557 "18. (( %s ))LNA_SAT_CHK\n",
3558 ((comp & DBG_LNA_SAT_CHK) ? ("V") : (".")));
3559 PDM_SNPF(out_len, used, output + used, out_len - used,
3560 "20. (( %s ))PHY_STATUS\n",
3561 ((comp & DBG_PHY_STATUS) ? ("V") : (".")));
3562 PDM_SNPF(out_len, used, output + used, out_len - used,
3563 "21. (( %s ))TMP\n",
3564 ((comp & DBG_TMP) ? ("V") : (".")));
3565 PDM_SNPF(out_len, used, output + used, out_len - used,
3566 "22. (( %s ))FW_DBG_TRACE\n",
3567 ((comp & DBG_FW_TRACE) ? ("V") : (".")));
3568 PDM_SNPF(out_len, used, output + used, out_len - used,
3569 "23. (( %s ))TXBF\n",
3570 ((comp & DBG_TXBF) ? ("V") : (".")));
3571 PDM_SNPF(out_len, used, output + used, out_len - used,
3572 "24. (( %s ))COMMON_FLOW\n",
3573 ((comp & DBG_COMMON_FLOW) ? ("V") : (".")));
3574 PDM_SNPF(out_len, used, output + used, out_len - used,
3575 "28. (( %s ))PHY_CONFIG\n",
3576 ((comp & ODM_PHY_CONFIG) ? ("V") : (".")));
3577 PDM_SNPF(out_len, used, output + used, out_len - used,
3578 "29. (( %s ))INIT\n",
3579 ((comp & ODM_COMP_INIT) ? ("V") : (".")));
3580 PDM_SNPF(out_len, used, output + used, out_len - used,
3581 "30. (( %s ))COMMON\n",
3582 ((comp & DBG_CMN) ? ("V") : (".")));
3583 PDM_SNPF(out_len, used, output + used, out_len - used,
3584 "31. (( %s ))API\n",
3585 ((comp & ODM_COMP_API) ? ("V") : (".")));
3586 PDM_SNPF(out_len, used, output + used, out_len - used,
3587 "================================\n");
3588
3589 } else if (val[0] == 101) {
3590 dm->debug_components = 0;
3591 PDM_SNPF(out_len, used, output + used, out_len - used,
3592 "Disable all debug components\n");
3593 } else {
3594 if (val[1] == 1) /*@enable*/
3595 dm->debug_components |= (one << val[0]);
3596 else if (val[1] == 2) /*@disable*/
3597 dm->debug_components &= ~(one << val[0]);
3598 else
3599 PDM_SNPF(out_len, used, output + used, out_len - used,
3600 "[Warning] 1:on, 2:off\n");
3601
3602 if ((BIT(val[0]) == DBG_PHY_STATUS) && val[1] == 1) {
3603 dm->phy_dbg_info.show_phy_sts_all_pkt = (u8)val[2];
3604 dm->phy_dbg_info.show_phy_sts_max_cnt = (u16)val[3];
3605
3606 PDM_SNPF(out_len, used, output + used, out_len - used,
3607 "show_all_pkt=%d, show_max_num=%d\n\n",
3608 dm->phy_dbg_info.show_phy_sts_all_pkt,
3609 dm->phy_dbg_info.show_phy_sts_max_cnt);
3610
3611 } else if (BIT(val[0]) == DBG_CMN) {
3612 phydm_cmn_msg_setting(dm, val, &used, output, &out_len);
3613 }
3614 }
3615 PDM_SNPF(out_len, used, output + used, out_len - used,
3616 "pre-DbgComponents = 0x%llx\n", pre_debug_components);
3617 PDM_SNPF(out_len, used, output + used, out_len - used,
3618 "Curr-DbgComponents = 0x%llx\n", dm->debug_components);
3619 PDM_SNPF(out_len, used, output + used, out_len - used,
3620 "================================\n");
3621
3622 *_used = used;
3623 *_out_len = out_len;
3624 }
3625
phydm_fw_debug_trace(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)3626 void phydm_fw_debug_trace(void *dm_void, char input[][16], u32 *_used,
3627 char *output, u32 *_out_len)
3628 {
3629 struct dm_struct *dm = (struct dm_struct *)dm_void;
3630 u32 used = *_used;
3631 u32 out_len = *_out_len;
3632 u32 val[10] = {0};
3633 u8 i, input_idx = 0;
3634 char help[] = "-h";
3635 u32 pre_fw_debug_components = 0, one = 1;
3636 u32 comp = 0;
3637
3638 for (i = 0; i < 5; i++) {
3639 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
3640 input_idx++;
3641 }
3642
3643 if (input_idx == 0)
3644 return;
3645
3646 pre_fw_debug_components = dm->fw_debug_components;
3647 comp = dm->fw_debug_components;
3648
3649 if ((strcmp(input[1], help) == 0)) {
3650 PDM_SNPF(out_len, used, output + used, out_len - used,
3651 "{dbg_comp} {1:en, 2:dis} {mode} {macid}\n");
3652 } else {
3653 if (val[0] == 101) {
3654 dm->fw_debug_components = 0;
3655 PDM_SNPF(out_len, used, output + used, out_len - used,
3656 "%s\n", "Clear all fw debug components");
3657 } else {
3658 if (val[1] == 1) /*@enable*/
3659 dm->fw_debug_components |= (one << val[0]);
3660 else if (val[1] == 2) /*@disable*/
3661 dm->fw_debug_components &= ~(one << val[0]);
3662 else
3663 PDM_SNPF(out_len, used, output + used,
3664 out_len - used, "%s\n",
3665 "[Warning!!!] 1:enable, 2:disable");
3666 }
3667
3668 comp = dm->fw_debug_components;
3669
3670 if (comp == 0) {
3671 dm->debug_components &= ~DBG_FW_TRACE;
3672 /*@H2C to enable C2H Msg*/
3673 phydm_fw_trace_en_h2c(dm, false, comp, val[2], val[3]);
3674 } else {
3675 dm->debug_components |= DBG_FW_TRACE;
3676 /*@H2C to enable C2H Msg*/
3677 phydm_fw_trace_en_h2c(dm, true, comp, val[2], val[3]);
3678 }
3679 }
3680 }
3681
3682 #if (ODM_IC_11N_SERIES_SUPPORT)
phydm_dump_bb_reg_n(void * dm_void,u32 * _used,char * output,u32 * _out_len)3683 void phydm_dump_bb_reg_n(void *dm_void, u32 *_used, char *output, u32 *_out_len)
3684 {
3685 struct dm_struct *dm = (struct dm_struct *)dm_void;
3686 u32 addr = 0;
3687 u32 used = *_used;
3688 u32 out_len = *_out_len;
3689
3690 /*@For Nseries IC we only need to dump page8 to pageF using 3 digits*/
3691 for (addr = 0x800; addr < 0xfff; addr += 4) {
3692 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3693 "0x%03x 0x%08x\n",
3694 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3695 }
3696
3697 *_used = used;
3698 *_out_len = out_len;
3699 }
3700 #endif
3701
3702 #if (ODM_IC_11AC_SERIES_SUPPORT)
phydm_dump_bb_reg_ac(void * dm_void,u32 * _used,char * output,u32 * _out_len)3703 void phydm_dump_bb_reg_ac(void *dm_void, u32 *_used, char *output,
3704 u32 *_out_len)
3705 {
3706 struct dm_struct *dm = (struct dm_struct *)dm_void;
3707 u32 addr = 0;
3708 u32 used = *_used;
3709 u32 out_len = *_out_len;
3710
3711 for (addr = 0x800; addr < 0xfff; addr += 4) {
3712 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3713 "0x%04x 0x%08x\n",
3714 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3715 }
3716
3717 if (!(dm->support_ic_type &
3718 (ODM_RTL8822B | ODM_RTL8814A | ODM_RTL8821C | ODM_RTL8195B)))
3719 goto rpt_reg;
3720
3721 if (dm->rf_type > RF_2T2R) {
3722 for (addr = 0x1800; addr < 0x18ff; addr += 4)
3723 PDM_VAST_SNPF(out_len, used, output + used,
3724 out_len - used, "0x%04x 0x%08x\n",
3725 addr,
3726 odm_get_bb_reg(dm, addr, MASKDWORD));
3727 }
3728
3729 if (dm->rf_type > RF_3T3R) {
3730 for (addr = 0x1a00; addr < 0x1aff; addr += 4)
3731 PDM_VAST_SNPF(out_len, used, output + used,
3732 out_len - used, "0x%04x 0x%08x\n",
3733 addr,
3734 odm_get_bb_reg(dm, addr, MASKDWORD));
3735 }
3736
3737 for (addr = 0x1900; addr < 0x19ff; addr += 4)
3738 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3739 "0x%04x 0x%08x\n",
3740 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3741
3742 for (addr = 0x1c00; addr < 0x1cff; addr += 4)
3743 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3744 "0x%04x 0x%08x\n",
3745 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3746
3747 for (addr = 0x1f00; addr < 0x1fff; addr += 4)
3748 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3749 "0x%04x 0x%08x\n",
3750 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3751
3752 rpt_reg:
3753
3754 *_used = used;
3755 *_out_len = out_len;
3756 }
3757
3758 #endif
3759
3760 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
phydm_dump_bb_reg_jgr3(void * dm_void,u32 * _used,char * output,u32 * _out_len)3761 void phydm_dump_bb_reg_jgr3(void *dm_void, u32 *_used, char *output,
3762 u32 *_out_len)
3763 {
3764 struct dm_struct *dm = (struct dm_struct *)dm_void;
3765 u32 addr = 0;
3766 u32 used = *_used;
3767 u32 out_len = *_out_len;
3768
3769 if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
3770 for (addr = 0x800; addr < 0xdff; addr += 4)
3771 PDM_VAST_SNPF(out_len, used, output + used,
3772 out_len - used, "0x%04x 0x%08x\n", addr,
3773 odm_get_bb_reg(dm, addr, MASKDWORD));
3774
3775 for (addr = 0x1800; addr < 0x1aff; addr += 4)
3776 PDM_VAST_SNPF(out_len, used, output + used,
3777 out_len - used, "0x%04x 0x%08x\n", addr,
3778 odm_get_bb_reg(dm, addr, MASKDWORD));
3779
3780 for (addr = 0x1c00; addr < 0x1eff; addr += 4)
3781 PDM_VAST_SNPF(out_len, used, output + used,
3782 out_len - used, "0x%04x 0x%08x\n", addr,
3783 odm_get_bb_reg(dm, addr, MASKDWORD));
3784
3785 #if (defined(RTL8723F_SUPPORT))
3786 if (dm->support_ic_type & ODM_RTL8723F) {
3787 for (addr = 0x2a00; addr < 0x2a5c; addr += 4) {
3788 PDM_VAST_SNPF(out_len, used, output + used,
3789 out_len - used, "0x%04x 0x%08x\n",
3790 addr,
3791 odm_get_bb_reg(dm, addr,
3792 MASKDWORD));
3793 }
3794 }
3795 #endif
3796
3797 for (addr = 0x4000; addr < 0x41ff; addr += 4)
3798 PDM_VAST_SNPF(out_len, used, output + used,
3799 out_len - used, "0x%04x 0x%08x\n", addr,
3800 odm_get_bb_reg(dm, addr, MASKDWORD));
3801
3802 #if (defined(RTL8723F_SUPPORT))
3803 if (dm->support_ic_type & ODM_RTL8723F) {
3804 for (addr = 0x4300; addr < 0x43bf; addr += 4) {
3805 PDM_VAST_SNPF(out_len, used, output + used,
3806 out_len - used, "0x%04x 0x%08x\n",
3807 addr,
3808 odm_get_bb_reg(dm, addr,
3809 MASKDWORD));
3810 }
3811 }
3812 #endif
3813 }
3814 *_used = used;
3815 *_out_len = out_len;
3816 }
3817
phydm_dump_bb_reg2_jgr3(void * dm_void,u32 * _used,char * output,u32 * _out_len)3818 void phydm_dump_bb_reg2_jgr3(void *dm_void, u32 *_used, char *output,
3819 u32 *_out_len)
3820 {
3821 struct dm_struct *dm = (struct dm_struct *)dm_void;
3822 u32 addr = 0;
3823 u32 used = *_used;
3824 u32 out_len = *_out_len;
3825
3826 if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
3827 return;
3828
3829 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
3830 if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
3831 for (addr = 0x5000; addr < 0x53ff; addr += 4) {
3832 PDM_VAST_SNPF(out_len, used, output + used,
3833 out_len - used, "0x%04x 0x%08x\n",
3834 addr,
3835 odm_get_bb_reg(dm, addr, MASKDWORD));
3836 }
3837 }
3838 #endif
3839
3840 /* @Do not change the order of page-2C/2D*/
3841 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3842 "------ BB report-register start ------\n");
3843
3844 #if (defined(RTL8723F_SUPPORT))
3845 if (dm->support_ic_type & ODM_RTL8723F) {
3846 for (addr = 0x2aa0; addr < 0x2aff; addr += 4) {
3847 PDM_VAST_SNPF(out_len, used, output + used,
3848 out_len - used, "0x%04x 0x%08x\n",
3849 addr,
3850 odm_get_bb_reg(dm, addr, MASKDWORD));
3851 }
3852 }
3853 #endif
3854
3855 for (addr = 0x2c00; addr < 0x2dff; addr += 4) {
3856 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3857 "0x%04x 0x%08x\n",
3858 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3859 }
3860
3861 *_used = used;
3862 *_out_len = out_len;
3863 }
3864
phydm_get_per_path_anapar_jgr3(void * dm_void,u8 path,u32 * _used,char * output,u32 * _out_len)3865 void phydm_get_per_path_anapar_jgr3(void *dm_void, u8 path, u32 *_used,
3866 char *output, u32 *_out_len)
3867 {
3868 struct dm_struct *dm = (struct dm_struct *)dm_void;
3869 u8 state = 0;
3870 u8 state_bp = 0;
3871 u32 control_bb = 0;
3872 u32 control_pow = 0;
3873 u32 used = *_used;
3874 u32 out_len = *_out_len;
3875 u32 reg_idx = 0;
3876 u32 dbgport_idx = 0;
3877 u32 dbgport_val = 0;
3878
3879 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3880 "path-%d:\n", path);
3881
3882 if (path == RF_PATH_A) {
3883 reg_idx = R_0x1830;
3884 dbgport_idx = 0x9F0;
3885 } else if (path == RF_PATH_B) {
3886 reg_idx = R_0x4130;
3887 dbgport_idx = 0xBF0;
3888 } else if (path == RF_PATH_C) {
3889 reg_idx = R_0x5230;
3890 dbgport_idx = 0xDF0;
3891 } else if (path == RF_PATH_D) {
3892 reg_idx = R_0x5330;
3893 dbgport_idx = 0xFF0;
3894 }
3895
3896 state_bp = (u8)odm_get_bb_reg(dm, reg_idx, 0xf00000);
3897 odm_set_bb_reg(dm, reg_idx, 0x38000000, 0x5); /* @read en*/
3898
3899 for (state = 0; state <= 0xf; state++) {
3900 odm_set_bb_reg(dm, reg_idx, 0xF00000, state);
3901 if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbgport_idx)) {
3902 dbgport_val = phydm_get_bb_dbg_port_val(dm);
3903 phydm_release_bb_dbg_port(dm);
3904 } else {
3905 PDM_VAST_SNPF(out_len, used, output + used,
3906 out_len - used,
3907 "state:0x%x = read dbg_port error!\n",
3908 state);
3909 }
3910 control_bb = (dbgport_val & 0xFFFF0) >> 4;
3911 control_pow = dbgport_val & 0xF;
3912 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3913 "state:0x%x = control_bb:0x%x pow_bb:0x%x\n",
3914 state, control_bb, control_pow);
3915 }
3916 odm_set_bb_reg(dm, reg_idx, 0xf00000, state_bp);
3917 odm_set_bb_reg(dm, reg_idx, 0x38000000, 0x6); /* @write en*/
3918
3919 *_used = used;
3920 *_out_len = out_len;
3921 }
3922
phydm_get_csi_table_jgr3(void * dm_void,u32 * _used,char * output,u32 * _out_len)3923 void phydm_get_csi_table_jgr3(void *dm_void, u32 *_used, char *output,
3924 u32 *_out_len)
3925 {
3926 struct dm_struct *dm = (struct dm_struct *)dm_void;
3927 u8 table_idx = 0;
3928 u8 table_val = 0;
3929 u32 used = *_used;
3930 u32 out_len = *_out_len;
3931 u32 dbgport_idx = 0x39e;
3932 u32 dbgport_val = 0;
3933
3934 /*enable clk*/
3935 odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x3);
3936 /*enable read table*/
3937 odm_set_bb_reg(dm, R_0x1d94, BIT(31) | BIT(30), 0x2);
3938
3939 for (table_idx = 0; table_idx < 128; table_idx++) {
3940 odm_set_bb_reg(dm, R_0x1d94, MASKBYTE2, table_idx);
3941 if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbgport_idx)) {
3942 dbgport_val = phydm_get_bb_dbg_port_val(dm);
3943 phydm_release_bb_dbg_port(dm);
3944 } else {
3945 PDM_VAST_SNPF(out_len, used, output + used,
3946 out_len - used,
3947 "table_idx:0x%x = read dbg_port error!\n",
3948 table_idx);
3949 }
3950 table_val = dbgport_val >> 24;
3951 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3952 "table_idx: 0x%x = 0x%x\n",
3953 table_idx, table_val);
3954 }
3955 /*enable write table*/
3956 odm_set_bb_reg(dm, R_0x1d94, BIT(31) | BIT(30), 0x1);
3957 /*disable clk*/
3958 odm_set_bb_reg(dm, R_0x1ee8, 0x3, 0x0);
3959
3960 *_used = used;
3961 *_out_len = out_len;
3962 }
3963
3964 #endif
3965
phydm_dump_bb_reg(void * dm_void,u32 * _used,char * output,u32 * _out_len)3966 void phydm_dump_bb_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
3967 {
3968 struct dm_struct *dm = (struct dm_struct *)dm_void;
3969 u32 used = *_used;
3970 u32 out_len = *_out_len;
3971
3972 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3973 "BB==========\n");
3974 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3975 "------ BB control register start ------\n");
3976
3977 switch (dm->ic_ip_series) {
3978 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3979 case PHYDM_IC_JGR3:
3980 phydm_dump_bb_reg_jgr3(dm, &used, output, &out_len);
3981 break;
3982 #endif
3983
3984 #if (ODM_IC_11AC_SERIES_SUPPORT)
3985 case PHYDM_IC_AC:
3986 phydm_dump_bb_reg_ac(dm, &used, output, &out_len);
3987 break;
3988 #endif
3989
3990 #if (ODM_IC_11N_SERIES_SUPPORT)
3991 case PHYDM_IC_N:
3992 phydm_dump_bb_reg_n(dm, &used, output, &out_len);
3993 break;
3994 #endif
3995
3996 default:
3997 break;
3998 }
3999
4000 *_used = used;
4001 *_out_len = out_len;
4002 }
4003
phydm_dump_rf_reg(void * dm_void,u32 * _used,char * output,u32 * _out_len)4004 void phydm_dump_rf_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
4005 {
4006 struct dm_struct *dm = (struct dm_struct *)dm_void;
4007 u32 addr = 0;
4008 u32 used = *_used;
4009 u32 out_len = *_out_len;
4010 u32 reg = 0;
4011
4012 /* @dump RF register */
4013 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4014 "RF-A==========\n");
4015
4016 for (addr = 0; addr <= 0xFF; addr++) {
4017 reg = odm_get_rf_reg(dm, RF_PATH_A, addr, RFREG_MASK);
4018 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4019 "0x%02x 0x%05x\n", addr, reg);
4020 }
4021
4022 #ifdef PHYDM_COMPILE_ABOVE_2SS
4023 if (dm->rf_type > RF_1T1R) {
4024 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4025 "RF-B==========\n");
4026
4027 for (addr = 0; addr <= 0xFF; addr++) {
4028 reg = odm_get_rf_reg(dm, RF_PATH_B, addr, RFREG_MASK);
4029 PDM_VAST_SNPF(out_len, used, output + used,
4030 out_len - used, "0x%02x 0x%05x\n",
4031 addr, reg);
4032 }
4033 }
4034 #endif
4035
4036 #ifdef PHYDM_COMPILE_ABOVE_3SS
4037 if (dm->rf_type > RF_2T2R) {
4038 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4039 "RF-C==========\n");
4040
4041 for (addr = 0; addr <= 0xFF; addr++) {
4042 reg = odm_get_rf_reg(dm, RF_PATH_C, addr, RFREG_MASK);
4043 PDM_VAST_SNPF(out_len, used, output + used,
4044 out_len - used, "0x%02x 0x%05x\n",
4045 addr, reg);
4046 }
4047 }
4048 #endif
4049
4050 #ifdef PHYDM_COMPILE_ABOVE_4SS
4051 if (dm->rf_type > RF_3T3R) {
4052 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4053 "RF-D==========\n");
4054
4055 for (addr = 0; addr <= 0xFF; addr++) {
4056 reg = odm_get_rf_reg(dm, RF_PATH_D, addr, RFREG_MASK);
4057 PDM_VAST_SNPF(out_len, used, output + used,
4058 out_len - used, "0x%02x 0x%05x\n",
4059 addr, reg);
4060 }
4061 }
4062 #endif
4063
4064 *_used = used;
4065 *_out_len = out_len;
4066 }
4067
phydm_dump_mac_reg(void * dm_void,u32 * _used,char * output,u32 * _out_len)4068 void phydm_dump_mac_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
4069 {
4070 struct dm_struct *dm = (struct dm_struct *)dm_void;
4071 u32 addr = 0;
4072 u32 used = *_used;
4073 u32 out_len = *_out_len;
4074
4075 /* @dump MAC register */
4076 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4077 "MAC==========\n");
4078
4079 for (addr = 0; addr < 0x7ff; addr += 4)
4080 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4081 "0x%04x 0x%08x\n",
4082 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
4083
4084 for (addr = 0x1000; addr < 0x17ff; addr += 4)
4085 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4086 "0x%04x 0x%08x\n",
4087 addr, odm_get_bb_reg(dm, addr, MASKDWORD));
4088
4089 *_used = used;
4090 *_out_len = out_len;
4091 }
4092
phydm_dump_reg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4093 void phydm_dump_reg(void *dm_void, char input[][16], u32 *_used, char *output,
4094 u32 *_out_len)
4095 {
4096 struct dm_struct *dm = (struct dm_struct *)dm_void;
4097 char help[] = "-h";
4098 u32 var1[10] = {0};
4099 u32 used = *_used;
4100 u32 out_len = *_out_len;
4101 u32 addr = 0;
4102
4103 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
4104
4105 if ((strcmp(input[1], help) == 0)) {
4106 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4107 if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
4108 PDM_SNPF(out_len, used, output + used, out_len - used,
4109 "dumpreg {0:all, 1:BB, 2:RF, 3:MAC 4:BB2 for jgr3}\n");
4110 else
4111 #endif
4112 PDM_SNPF(out_len, used, output + used, out_len - used,
4113 "dumpreg {0:all, 1:BB, 2:RF, 3:MAC}\n");
4114 } else if (var1[0] == 0) {
4115 phydm_dump_mac_reg(dm, &used, output, &out_len);
4116 phydm_dump_bb_reg(dm, &used, output, &out_len);
4117 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4118 if (dm->ic_ip_series == PHYDM_IC_JGR3)
4119 phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len);
4120 #endif
4121
4122 phydm_dump_rf_reg(dm, &used, output, &out_len);
4123 } else if (var1[0] == 1) {
4124 phydm_dump_bb_reg(dm, &used, output, &out_len);
4125 } else if (var1[0] == 2) {
4126 phydm_dump_rf_reg(dm, &used, output, &out_len);
4127 } else if (var1[0] == 3) {
4128 phydm_dump_mac_reg(dm, &used, output, &out_len);
4129 } else if (var1[0] == 4) {
4130 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4131 if (dm->ic_ip_series == PHYDM_IC_JGR3)
4132 phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len);
4133 #endif
4134 }
4135
4136 *_used = used;
4137 *_out_len = out_len;
4138 }
4139
phydm_enable_big_jump(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4140 void phydm_enable_big_jump(void *dm_void, char input[][16], u32 *_used,
4141 char *output, u32 *_out_len)
4142 {
4143 #if (RTL8822B_SUPPORT)
4144 struct dm_struct *dm = (struct dm_struct *)dm_void;
4145 struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
4146 u32 dm_value[10] = {0};
4147 u8 i, input_idx = 0;
4148 u32 val;
4149
4150 if (!(dm->support_ic_type & ODM_RTL8822B))
4151 return;
4152
4153 for (i = 0; i < 5; i++) {
4154 if (input[i + 1]) {
4155 PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]);
4156 input_idx++;
4157 }
4158 }
4159
4160 if (input_idx == 0)
4161 return;
4162
4163 if (dm_value[0] == 0) {
4164 dm->dm_dig_table.enable_adjust_big_jump = false;
4165
4166 val = (dig_t->big_jump_step3 << 5) |
4167 (dig_t->big_jump_step2 << 3) |
4168 dig_t->big_jump_step1;
4169
4170 odm_set_bb_reg(dm, R_0x8c8, 0xfe, val);
4171 } else {
4172 dm->dm_dig_table.enable_adjust_big_jump = true;
4173 }
4174 #endif
4175 }
4176
phydm_show_rx_rate(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4177 void phydm_show_rx_rate(void *dm_void, char input[][16], u32 *_used,
4178 char *output, u32 *_out_len)
4179 {
4180 #if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8814B_SUPPORT ||\
4181 RTL8195B_SUPPORT || RTL8822C_SUPPORT || RTL8723F_SUPPORT)
4182 struct dm_struct *dm = (struct dm_struct *)dm_void;
4183 struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
4184 u32 used = *_used;
4185 u32 out_len = *_out_len;
4186 u32 var1[10] = {0};
4187 char help[] = "-h";
4188 u8 i, input_idx = 0;
4189
4190 for (i = 0; i < 5; i++) {
4191 PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
4192 input_idx++;
4193 }
4194
4195 if (input_idx == 0)
4196 return;
4197
4198 if ((strcmp(input[1], help) == 0)) {
4199 PDM_SNPF(out_len, used, output + used, out_len - used,
4200 "{1: show Rx rate, 0:reset counter}\n");
4201 *_used = used;
4202 *_out_len = out_len;
4203 return;
4204
4205 } else if (var1[0] == 0) {
4206 phydm_reset_rx_rate_distribution(dm);
4207 *_used = used;
4208 *_out_len = out_len;
4209 return;
4210 }
4211
4212 /* @==Show SU Rate====================================================*/
4213 PDM_SNPF(out_len, used, output + used, out_len - used,
4214 "=====Rx SU rate Statistics=====\n");
4215 PDM_SNPF(out_len, used, output + used, out_len - used,
4216 "[SU][1SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4217 dbg->num_qry_vht_pkt[0], dbg->num_qry_vht_pkt[1],
4218 dbg->num_qry_vht_pkt[2], dbg->num_qry_vht_pkt[3],
4219 dbg->num_qry_vht_pkt[4], dbg->num_qry_vht_pkt[5],
4220 dbg->num_qry_vht_pkt[6], dbg->num_qry_vht_pkt[7],
4221 dbg->num_qry_vht_pkt[8], dbg->num_qry_vht_pkt[9]);
4222
4223 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4224 if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) {
4225 PDM_SNPF(out_len, used, output + used, out_len - used,
4226 "[SU][2SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4227 dbg->num_qry_vht_pkt[10], dbg->num_qry_vht_pkt[11],
4228 dbg->num_qry_vht_pkt[12], dbg->num_qry_vht_pkt[13],
4229 dbg->num_qry_vht_pkt[14], dbg->num_qry_vht_pkt[15],
4230 dbg->num_qry_vht_pkt[16], dbg->num_qry_vht_pkt[17],
4231 dbg->num_qry_vht_pkt[18], dbg->num_qry_vht_pkt[19]);
4232 }
4233 #endif
4234 /* @==Show MU Rate====================================================*/
4235 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) || (defined(PHYSTS_3RD_TYPE_SUPPORT))
4236 PDM_SNPF(out_len, used, output + used, out_len - used,
4237 "=====Rx MU rate Statistics=====\n");
4238 PDM_SNPF(out_len, used, output + used, out_len - used,
4239 "[MU][1SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4240 dbg->num_mu_vht_pkt[0], dbg->num_mu_vht_pkt[1],
4241 dbg->num_mu_vht_pkt[2], dbg->num_mu_vht_pkt[3],
4242 dbg->num_mu_vht_pkt[4], dbg->num_mu_vht_pkt[5],
4243 dbg->num_mu_vht_pkt[6], dbg->num_mu_vht_pkt[7],
4244 dbg->num_mu_vht_pkt[8], dbg->num_mu_vht_pkt[9]);
4245
4246 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4247 if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) {
4248 PDM_SNPF(out_len, used, output + used, out_len - used,
4249 "[MU][2SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4250 dbg->num_mu_vht_pkt[10], dbg->num_mu_vht_pkt[11],
4251 dbg->num_mu_vht_pkt[12], dbg->num_mu_vht_pkt[13],
4252 dbg->num_mu_vht_pkt[14], dbg->num_mu_vht_pkt[15],
4253 dbg->num_mu_vht_pkt[16], dbg->num_mu_vht_pkt[17],
4254 dbg->num_mu_vht_pkt[18], dbg->num_mu_vht_pkt[19]);
4255 }
4256 #endif
4257 #endif
4258 *_used = used;
4259 *_out_len = out_len;
4260 #endif
4261 }
4262
phydm_per_tone_evm(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4263 void phydm_per_tone_evm(void *dm_void, char input[][16], u32 *_used,
4264 char *output, u32 *_out_len)
4265 {
4266 struct dm_struct *dm = (struct dm_struct *)dm_void;
4267 u8 i, j;
4268 u32 used = *_used;
4269 u32 out_len = *_out_len;
4270 u32 var1[4] = {0};
4271 u32 val, tone_num, round;
4272 s8 rxevm_0, rxevm_1;
4273 s32 avg_num, evm_tone_0[256] = {0}, evm_tone_1[256] = {0};
4274 s32 rxevm_sum_0, rxevm_sum_1;
4275
4276 if (dm->support_ic_type & ODM_IC_11N_SERIES) {
4277 pr_debug("n series not support yet !\n");
4278 return;
4279 }
4280
4281 for (i = 0; i < 4; i++) {
4282 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
4283 }
4284
4285 avg_num = var1[0];
4286 round = var1[1];
4287
4288 if (!dm->is_linked) {
4289 PDM_SNPF(out_len, used, output + used, out_len - used,
4290 "No Link !!\n");
4291
4292 *_used = used;
4293 *_out_len = out_len;
4294
4295 return;
4296 }
4297
4298 pr_debug("ID=((%d)), BW=((%d)), fc=((CH-%d))\n", dm->curr_station_id,
4299 20 << *dm->band_width, *dm->channel);
4300 pr_debug("avg_num =((%d)), round =((%d))\n", avg_num, round);
4301 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
4302 watchdog_stop(dm->priv);
4303 #endif
4304 for (j = 0; j < round; j++) {
4305 pr_debug("\nround((%d))\n", (j + 1));
4306 if (*dm->band_width == CHANNEL_WIDTH_20) {
4307 for (tone_num = 228; tone_num <= 255; tone_num++) {
4308 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4309 rxevm_sum_0 = 0;
4310 rxevm_sum_1 = 0;
4311 for (i = 0; i < avg_num; i++) {
4312 val = odm_read_4byte(dm, R_0xf8c);
4313
4314 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4315 rxevm_0 = (rxevm_0 / 2);
4316 if (rxevm_0 < -63)
4317 rxevm_0 = 0;
4318
4319 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4320 rxevm_1 = (rxevm_1 / 2);
4321 if (rxevm_1 < -63)
4322 rxevm_1 = 0;
4323 rxevm_sum_0 += rxevm_0;
4324 rxevm_sum_1 += rxevm_1;
4325 ODM_delay_ms(1);
4326 }
4327 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4328 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4329 pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4330 (256 - tone_num), evm_tone_0[tone_num],
4331 evm_tone_1[tone_num]);
4332 }
4333
4334 for (tone_num = 1; tone_num <= 28; tone_num++) {
4335 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4336 rxevm_sum_0 = 0;
4337 rxevm_sum_1 = 0;
4338 for (i = 0; i < avg_num; i++) {
4339 val = odm_read_4byte(dm, R_0xf8c);
4340
4341 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4342 rxevm_0 = (rxevm_0 / 2);
4343 if (rxevm_0 < -63)
4344 rxevm_0 = 0;
4345
4346 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4347 rxevm_1 = (rxevm_1 / 2);
4348 if (rxevm_1 < -63)
4349 rxevm_1 = 0;
4350 rxevm_sum_0 += rxevm_0;
4351 rxevm_sum_1 += rxevm_1;
4352 ODM_delay_ms(1);
4353 }
4354 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4355 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4356 pr_debug("Tone(%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4357 tone_num, evm_tone_0[tone_num],
4358 evm_tone_1[tone_num]);
4359 }
4360 } else if (*dm->band_width == CHANNEL_WIDTH_40) {
4361 for (tone_num = 198; tone_num <= 254; tone_num++) {
4362 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4363 rxevm_sum_0 = 0;
4364 rxevm_sum_1 = 0;
4365 for (i = 0; i < avg_num; i++) {
4366 val = odm_read_4byte(dm, R_0xf8c);
4367
4368 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4369 rxevm_0 = (rxevm_0 / 2);
4370 if (rxevm_0 < -63)
4371 rxevm_0 = 0;
4372
4373 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4374 rxevm_1 = (rxevm_1 / 2);
4375 if (rxevm_1 < -63)
4376 rxevm_1 = 0;
4377
4378 rxevm_sum_0 += rxevm_0;
4379 rxevm_sum_1 += rxevm_1;
4380 ODM_delay_ms(1);
4381 }
4382 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4383 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4384 pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4385 (256 - tone_num), evm_tone_0[tone_num],
4386 evm_tone_1[tone_num]);
4387 }
4388
4389 for (tone_num = 2; tone_num <= 58; tone_num++) {
4390 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4391 rxevm_sum_0 = 0;
4392 rxevm_sum_1 = 0;
4393 for (i = 0; i < avg_num; i++) {
4394 val = odm_read_4byte(dm, R_0xf8c);
4395
4396 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4397 rxevm_0 = (rxevm_0 / 2);
4398 if (rxevm_0 < -63)
4399 rxevm_0 = 0;
4400
4401 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4402 rxevm_1 = (rxevm_1 / 2);
4403 if (rxevm_1 < -63)
4404 rxevm_1 = 0;
4405 rxevm_sum_0 += rxevm_0;
4406 rxevm_sum_1 += rxevm_1;
4407 ODM_delay_ms(1);
4408 }
4409 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4410 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4411 pr_debug("Tone(%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4412 tone_num, evm_tone_0[tone_num],
4413 evm_tone_1[tone_num]);
4414 }
4415 } else if (*dm->band_width == CHANNEL_WIDTH_80) {
4416 for (tone_num = 134; tone_num <= 254; tone_num++) {
4417 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4418 rxevm_sum_0 = 0;
4419 rxevm_sum_1 = 0;
4420 for (i = 0; i < avg_num; i++) {
4421 val = odm_read_4byte(dm, R_0xf8c);
4422
4423 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4424 rxevm_0 = (rxevm_0 / 2);
4425 if (rxevm_0 < -63)
4426 rxevm_0 = 0;
4427
4428 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4429 rxevm_1 = (rxevm_1 / 2);
4430 if (rxevm_1 < -63)
4431 rxevm_1 = 0;
4432 rxevm_sum_0 += rxevm_0;
4433 rxevm_sum_1 += rxevm_1;
4434 ODM_delay_ms(1);
4435 }
4436 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4437 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4438 pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4439 (256 - tone_num), evm_tone_0[tone_num],
4440 evm_tone_1[tone_num]);
4441 }
4442
4443 for (tone_num = 2; tone_num <= 122; tone_num++) {
4444 odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4445 rxevm_sum_0 = 0;
4446 rxevm_sum_1 = 0;
4447 for (i = 0; i < avg_num; i++) {
4448 val = odm_read_4byte(dm, R_0xf8c);
4449
4450 rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4451 rxevm_0 = (rxevm_0 / 2);
4452 if (rxevm_0 < -63)
4453 rxevm_0 = 0;
4454
4455 rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4456 rxevm_1 = (rxevm_1 / 2);
4457 if (rxevm_1 < -63)
4458 rxevm_1 = 0;
4459 rxevm_sum_0 += rxevm_0;
4460 rxevm_sum_1 += rxevm_1;
4461 ODM_delay_ms(1);
4462 }
4463 evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4464 evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4465 pr_debug("Tone(%-3d) RXEVM (1ss/2ss)=%d, %d\n",
4466 tone_num, evm_tone_0[tone_num],
4467 evm_tone_1[tone_num]);
4468 }
4469 }
4470 }
4471 *_used = used;
4472 *_out_len = out_len;
4473 }
4474
phydm_bw_ch_adjust(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4475 void phydm_bw_ch_adjust(void *dm_void, char input[][16],
4476 u32 *_used, char *output, u32 *_out_len)
4477 {
4478 struct dm_struct *dm = (struct dm_struct *)dm_void;
4479 char help[] = "-h";
4480 u32 var1[10] = {0};
4481 u32 used = *_used;
4482 u32 out_len = *_out_len;
4483 u8 i;
4484 boolean is_enable_dbg_mode;
4485 u8 central_ch, primary_ch_idx;
4486 enum channel_width bw;
4487
4488 #ifdef PHYDM_COMMON_API_SUPPORT
4489
4490 if ((strcmp(input[1], help) == 0)) {
4491 PDM_SNPF(out_len, used, output + used, out_len - used,
4492 "{en} {CH} {pr_ch_idx 1/2/3/4/9/10} {0:20M,1:40M,2:80M}\n");
4493 goto out;
4494 }
4495
4496 if (!(dm->support_ic_type & CMN_API_SUPPORT_IC)) {
4497 PDM_SNPF(out_len, used, output + used, out_len - used,
4498 "Not support this API\n");
4499 goto out;
4500 }
4501
4502 for (i = 0; i < 4; i++) {
4503 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
4504 }
4505
4506 is_enable_dbg_mode = (boolean)var1[0];
4507 central_ch = (u8)var1[1];
4508 primary_ch_idx = (u8)var1[2];
4509 bw = (enum channel_width)var1[3];
4510
4511 if (is_enable_dbg_mode) {
4512 dm->is_disable_phy_api = false;
4513 phydm_api_switch_bw_channel(dm, central_ch, primary_ch_idx, bw);
4514 dm->is_disable_phy_api = true;
4515 PDM_SNPF(out_len, used, output + used, out_len - used,
4516 "central_ch = %d, primary_ch_idx = %d, bw = %d\n",
4517 central_ch, primary_ch_idx, bw);
4518 }
4519 out:
4520 #endif
4521
4522 *_used = used;
4523 *_out_len = out_len;
4524 }
4525
phydm_ext_rf_element_ctrl(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4526 void phydm_ext_rf_element_ctrl(void *dm_void, char input[][16], u32 *_used,
4527 char *output, u32 *_out_len)
4528 {
4529 struct dm_struct *dm = (struct dm_struct *)dm_void;
4530 u32 val[10] = {0};
4531 u8 i = 0, input_idx = 0;
4532
4533 for (i = 0; i < 5; i++) {
4534 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
4535 input_idx++;
4536 }
4537
4538 if (input_idx == 0)
4539 return;
4540
4541 if (val[0] == 1) /*@ext switch*/ {
4542 phydm_set_ext_switch(dm, val[1]);
4543 }
4544 }
4545
phydm_print_dbgport(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4546 void phydm_print_dbgport(void *dm_void, char input[][16], u32 *_used,
4547 char *output, u32 *_out_len)
4548 {
4549 struct dm_struct *dm = (struct dm_struct *)dm_void;
4550 char help[] = "-h";
4551 u32 var1[10] = {0};
4552 u32 used = *_used;
4553 u32 out_len = *_out_len;
4554 u32 dbg_port_value = 0;
4555 u8 val[32];
4556 u8 tmp = 0;
4557 u8 i;
4558
4559 if (strcmp(input[1], help) == 0) {
4560 PDM_SNPF(out_len, used, output + used, out_len - used,
4561 "{dbg_port_idx}\n");
4562 goto out;
4563 }
4564
4565 PHYDM_SSCANF(input[1], DCMD_HEX, &var1[0]);
4566
4567 dm->debug_components |= ODM_COMP_API;
4568 if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, var1[0])) {
4569 dbg_port_value = phydm_get_bb_dbg_port_val(dm);
4570 phydm_release_bb_dbg_port(dm);
4571
4572 for (i = 0; i < 32; i++)
4573 val[i] = (u8)((dbg_port_value & BIT(i)) >> i);
4574
4575 PDM_SNPF(out_len, used, output + used, out_len - used,
4576 "Dbg Port[0x%x] = ((0x%x))\n", var1[0],
4577 dbg_port_value);
4578
4579 for (i = 4; i != 0; i--) {
4580 tmp = 8 * (i - 1);
4581 PDM_SNPF(out_len, used, output + used, out_len - used,
4582 "val[%d:%d] = 8b'%d %d %d %d %d %d %d %d\n",
4583 tmp + 7, tmp, val[tmp + 7], val[tmp + 6],
4584 val[tmp + 5], val[tmp + 4], val[tmp + 3],
4585 val[tmp + 2], val[tmp + 1], val[tmp + 0]);
4586 }
4587 }
4588 dm->debug_components &= (~ODM_COMP_API);
4589 out:
4590 *_used = used;
4591 *_out_len = out_len;
4592 }
4593
phydm_get_anapar_table(void * dm_void,u32 * _used,char * output,u32 * _out_len)4594 void phydm_get_anapar_table(void *dm_void, u32 *_used, char *output,
4595 u32 *_out_len)
4596 {
4597 struct dm_struct *dm = (struct dm_struct *)dm_void;
4598 u32 used = *_used;
4599 u32 out_len = *_out_len;
4600 enum rf_path i = RF_PATH_A;
4601
4602 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4603 if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
4604 return;
4605
4606 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4607 "------ Analog parameters start ------\n");
4608
4609 for (i = RF_PATH_A; i < (enum rf_path)dm->num_rf_path; i++)
4610 phydm_get_per_path_anapar_jgr3(dm, i, &used, output, &out_len);
4611 #endif
4612
4613 *_used = used;
4614 *_out_len = out_len;
4615 }
4616
phydm_get_csi_table(void * dm_void,u32 * _used,char * output,u32 * _out_len)4617 void phydm_get_csi_table(void *dm_void, u32 *_used, char *output,
4618 u32 *_out_len)
4619 {
4620 struct dm_struct *dm = (struct dm_struct *)dm_void;
4621 u32 used = *_used;
4622 u32 out_len = *_out_len;
4623
4624 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4625 if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
4626 return;
4627
4628 PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4629 "------ CSI Table Parsing start ------\n");
4630
4631 phydm_get_csi_table_jgr3(dm, &used, output, &out_len);
4632 #endif
4633
4634 *_used = used;
4635 *_out_len = out_len;
4636 }
4637
phydm_dd_dbg_dump(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4638 void phydm_dd_dbg_dump(void *dm_void, char input[][16], u32 *_used,
4639 char *output, u32 *_out_len)
4640 {
4641 struct dm_struct *dm = (struct dm_struct *)dm_void;
4642 char help[] = "-h";
4643 u32 var1[10] = {0};
4644 u32 used = *_used;
4645 u32 out_len = *_out_len;
4646
4647 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
4648
4649 if ((strcmp(input[1], help) == 0)) {
4650 PDM_SNPF(out_len, used, output + used, out_len - used,
4651 "dump: {1}\n");
4652 return;
4653 } else if (var1[0] == 1) {
4654 /*[Reg]*/
4655 phydm_dump_mac_reg(dm, &used, output, &out_len);
4656 phydm_dump_bb_reg(dm, &used, output, &out_len);
4657 #ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4658 if (dm->ic_ip_series == PHYDM_IC_JGR3)
4659 phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len);
4660 #endif
4661
4662 phydm_dump_rf_reg(dm, &used, output, &out_len);
4663 /*[Dbg Port]*/
4664 #ifdef PHYDM_AUTO_DEGBUG
4665 phydm_dbg_port_dump(dm, &used, output, &out_len);
4666 #endif
4667 /*[Analog Parameters]*/
4668 phydm_get_anapar_table(dm, &used, output, &out_len);
4669 }
4670 }
4671
phydm_nss_hitogram_mp(void * dm_void,enum PDM_RATE_TYPE rate_type,u32 * _used,char * output,u32 * _out_len)4672 void phydm_nss_hitogram_mp(void *dm_void, enum PDM_RATE_TYPE rate_type,
4673 u32 *_used, char *output, u32 *_out_len)
4674 {
4675 struct dm_struct *dm = (struct dm_struct *)dm_void;
4676 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
4677 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
4678 u32 used = *_used;
4679 u32 out_len = *_out_len;
4680 char buf[PHYDM_SNPRINT_SIZE] = {0};
4681 u16 buf_size = PHYDM_SNPRINT_SIZE;
4682 u16 h_size = PHY_HIST_SIZE;
4683 u16 *evm_hist = &dbg_s->evm_1ss_hist[0];
4684 u16 *snr_hist = &dbg_s->snr_1ss_hist[0];
4685 u8 i = 0;
4686 u8 ss = phydm_rate_type_2_num_ss(dm, rate_type);
4687
4688 if (rate_type == PDM_OFDM) {
4689 phydm_print_hist_2_buf(dm, dbg_s->evm_ofdm_hist, PHY_HIST_SIZE,
4690 buf, buf_size);
4691 PDM_SNPF(out_len, used, output + used, out_len - used,
4692 "%-14s=%s\n", "[OFDM][EVM]", buf);
4693
4694 phydm_print_hist_2_buf(dm, dbg_s->snr_ofdm_hist, PHY_HIST_SIZE,
4695 buf, buf_size);
4696 PDM_SNPF(out_len, used, output + used, out_len - used,
4697 "%-14s=%s\n", "[OFDM][SNR]", buf);
4698
4699 *_used = used;
4700 *_out_len = out_len;
4701 return;
4702 }
4703
4704 for (i = 0; i < ss; i++) {
4705 if (rate_type == PDM_1SS) {
4706 evm_hist = &dbg_s->evm_1ss_hist[0];
4707 snr_hist = &dbg_s->snr_1ss_hist[0];
4708 } else if (rate_type == PDM_2SS) {
4709 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4710 evm_hist = &dbg_s->evm_2ss_hist[i][0];
4711 snr_hist = &dbg_s->snr_2ss_hist[i][0];
4712 #endif
4713 } else if (rate_type == PDM_3SS) {
4714 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4715 evm_hist = &dbg_s->evm_3ss_hist[i][0];
4716 snr_hist = &dbg_s->snr_3ss_hist[i][0];
4717 #endif
4718 } else if (rate_type == PDM_4SS) {
4719 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4720 evm_hist = &dbg_s->evm_4ss_hist[i][0];
4721 snr_hist = &dbg_s->snr_4ss_hist[i][0];
4722 #endif
4723 }
4724
4725 phydm_print_hist_2_buf(dm, evm_hist, h_size, buf, buf_size);
4726 PDM_SNPF(out_len, used, output + used, out_len - used,
4727 "[%d-SS][EVM][%d]=%s\n", ss, i, buf);
4728 phydm_print_hist_2_buf(dm, snr_hist, h_size, buf, buf_size);
4729 PDM_SNPF(out_len, used, output + used, out_len - used,
4730 "[%d-SS][SNR][%d]=%s\n", ss, i, buf);
4731 }
4732 *_used = used;
4733 *_out_len = out_len;
4734 }
4735
phydm_mp_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4736 void phydm_mp_dbg(void *dm_void, char input[][16], u32 *_used, char *output,
4737 u32 *_out_len)
4738 {
4739 struct dm_struct *dm = (struct dm_struct *)dm_void;
4740 struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
4741 struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
4742 struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg;
4743 char *rate_type = NULL;
4744 u8 tmp_rssi_avg[4];
4745 u8 tmp_snr_avg[4];
4746 u8 tmp_evm_avg[4];
4747 u32 tmp_cnt = 0;
4748 char buf[PHYDM_SNPRINT_SIZE] = {0};
4749 u32 used = *_used;
4750 u32 out_len = *_out_len;
4751 u32 var1[10] = {0};
4752 u16 buf_size = PHYDM_SNPRINT_SIZE;
4753 u16 th_size = PHY_HIST_SIZE - 1;
4754 u8 i = 0;
4755
4756 if (!(*dm->mp_mode))
4757 return;
4758
4759 PDM_SNPF(out_len, used, output + used, out_len - used,
4760 "BW=((%d)), fc=((CH-%d))\n",
4761 20 << *dm->band_width, *dm->channel);
4762
4763 /*@===[PHY Histogram]================================================*/
4764 PDM_SNPF(out_len, used, output + used, out_len - used,
4765 "[PHY Histogram] ==============>\n");
4766 /*@===[Threshold]===*/
4767 phydm_print_hist_2_buf(dm, dbg_i->evm_hist_th, th_size, buf, buf_size);
4768 PDM_SNPF(out_len, used, output + used, out_len - used,
4769 "%-16s=%s\n", "[EVM_TH]", buf);
4770 phydm_print_hist_2_buf(dm, dbg_i->snr_hist_th, th_size, buf, buf_size);
4771 PDM_SNPF(out_len, used, output + used, out_len - used,
4772 "%-16s=%s\n", "[SNR_TH]", buf);
4773 /*@===[OFDM]===*/
4774 phydm_nss_hitogram_mp(dm, PDM_OFDM, &used, output, &out_len);
4775 /*@===[1-SS]===*/
4776 phydm_nss_hitogram_mp(dm, PDM_1SS, &used, output, &out_len);
4777 /*@===[2-SS]===*/
4778 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4779 if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS)
4780 phydm_nss_hitogram_mp(dm, PDM_2SS, &used, output, &out_len);
4781 #endif
4782 /*@===[3-SS]===*/
4783 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4784 if (dm->support_ic_type & PHYDM_IC_ABOVE_3SS)
4785 phydm_nss_hitogram_mp(dm, PDM_3SS, &used, output, &out_len);
4786 #endif
4787 /*@===[4-SS]===*/
4788 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4789 if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS)
4790 phydm_nss_hitogram_mp(dm, PDM_4SS, &used, output, &out_len);
4791 #endif
4792 /*@===[PHY Avg]======================================================*/
4793 phydm_get_avg_phystatus_val(dm);
4794 PDM_SNPF(out_len, used, output + used, out_len - used,
4795 "[PHY Avg] ==============>\n");
4796
4797 phydm_get_avg_phystatus_val(dm);
4798
4799 switch (dm->num_rf_path) {
4800 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4801 case 4:
4802 PDM_SNPF(out_len, used, output + used, out_len - used,
4803 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
4804 "[Beacon]", dbg_s->rssi_beacon_cnt,
4805 dbg_avg->rssi_beacon_avg[0],
4806 dbg_avg->rssi_beacon_avg[1],
4807 dbg_avg->rssi_beacon_avg[2],
4808 dbg_avg->rssi_beacon_avg[3]);
4809 break;
4810 #endif
4811 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4812 case 3:
4813 PDM_SNPF(out_len, used, output + used, out_len - used,
4814 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
4815 "[Beacon]", dbg_s->rssi_beacon_cnt,
4816 dbg_avg->rssi_beacon_avg[0],
4817 dbg_avg->rssi_beacon_avg[1],
4818 dbg_avg->rssi_beacon_avg[2]);
4819 break;
4820 #endif
4821 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4822 case 2:
4823 PDM_SNPF(out_len, used, output + used, out_len - used,
4824 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
4825 "[Beacon]", dbg_s->rssi_beacon_cnt,
4826 dbg_avg->rssi_beacon_avg[0],
4827 dbg_avg->rssi_beacon_avg[1]);
4828 break;
4829 #endif
4830 default:
4831 PDM_SNPF(out_len, used, output + used, out_len - used,
4832 "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
4833 "[Beacon]", dbg_s->rssi_beacon_cnt,
4834 dbg_avg->rssi_beacon_avg[0]);
4835 break;
4836 }
4837
4838 switch (dm->num_rf_path) {
4839 #ifdef PHYSTS_3RD_TYPE_SUPPORT
4840 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4841 case 4:
4842 PDM_SNPF(out_len, used, output + used, out_len - used,
4843 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
4844 "[CCK]", dbg_s->rssi_cck_cnt,
4845 dbg_avg->rssi_cck_avg,
4846 dbg_avg->rssi_cck_avg_abv_2ss[0],
4847 dbg_avg->rssi_cck_avg_abv_2ss[1],
4848 dbg_avg->rssi_cck_avg_abv_2ss[2]);
4849 break;
4850 #endif
4851 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4852 case 3:
4853 PDM_SNPF(out_len, used, output + used, out_len - used,
4854 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
4855 "[CCK]", dbg_s->rssi_cck_cnt,
4856 dbg_avg->rssi_cck_avg,
4857 dbg_avg->rssi_cck_avg_abv_2ss[0],
4858 dbg_avg->rssi_cck_avg_abv_2ss[1]);
4859 break;
4860 #endif
4861 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4862 case 2:
4863 PDM_SNPF(out_len, used, output + used, out_len - used,
4864 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
4865 "[CCK]", dbg_s->rssi_cck_cnt,
4866 dbg_avg->rssi_cck_avg,
4867 dbg_avg->rssi_cck_avg_abv_2ss[0]);
4868 break;
4869 #endif
4870 #endif
4871 default:
4872 PDM_SNPF(out_len, used, output + used, out_len - used,
4873 "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
4874 "[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg);
4875 break;
4876 }
4877
4878 for (i = 0; i <= 4; i++) {
4879 if (i > dm->num_rf_path)
4880 break;
4881
4882 odm_memory_set(dm, tmp_rssi_avg, 0, 4);
4883 odm_memory_set(dm, tmp_snr_avg, 0, 4);
4884 odm_memory_set(dm, tmp_evm_avg, 0, 4);
4885
4886 switch (i) {
4887 #if (defined(PHYDM_COMPILE_ABOVE_4SS))
4888 case 4:
4889 rate_type = "[4-SS]";
4890 tmp_cnt = dbg_s->rssi_4ss_cnt;
4891 odm_move_memory(dm, tmp_rssi_avg,
4892 dbg_avg->rssi_4ss_avg, dm->num_rf_path);
4893 odm_move_memory(dm, tmp_snr_avg,
4894 dbg_avg->snr_4ss_avg, dm->num_rf_path);
4895 odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_4ss_avg,
4896 4);
4897 break;
4898 #endif
4899 #if (defined(PHYDM_COMPILE_ABOVE_3SS))
4900 case 3:
4901 rate_type = "[3-SS]";
4902 tmp_cnt = dbg_s->rssi_3ss_cnt;
4903 odm_move_memory(dm, tmp_rssi_avg,
4904 dbg_avg->rssi_3ss_avg, dm->num_rf_path);
4905 odm_move_memory(dm, tmp_snr_avg,
4906 dbg_avg->snr_3ss_avg, dm->num_rf_path);
4907 odm_move_memory(dm, tmp_evm_avg,
4908 dbg_avg->evm_3ss_avg, 3);
4909 break;
4910 #endif
4911 #if (defined(PHYDM_COMPILE_ABOVE_2SS))
4912 case 2:
4913 rate_type = "[2-SS]";
4914 tmp_cnt = dbg_s->rssi_2ss_cnt;
4915 odm_move_memory(dm, tmp_rssi_avg,
4916 dbg_avg->rssi_2ss_avg, dm->num_rf_path);
4917 odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_2ss_avg,
4918 dm->num_rf_path);
4919 odm_move_memory(dm, tmp_evm_avg,
4920 dbg_avg->evm_2ss_avg, 2);
4921 break;
4922 #endif
4923 case 1:
4924 rate_type = "[1-SS]";
4925 tmp_cnt = dbg_s->rssi_1ss_cnt;
4926 odm_move_memory(dm, tmp_rssi_avg,
4927 dbg_avg->rssi_1ss_avg, dm->num_rf_path);
4928 odm_move_memory(dm, tmp_snr_avg,
4929 dbg_avg->snr_1ss_avg, dm->num_rf_path);
4930 odm_move_memory(dm, tmp_evm_avg,
4931 &dbg_avg->evm_1ss_avg, 1);
4932 break;
4933 default:
4934 rate_type = "[L-OFDM]";
4935 tmp_cnt = dbg_s->rssi_ofdm_cnt;
4936 odm_move_memory(dm, tmp_rssi_avg,
4937 dbg_avg->rssi_ofdm_avg,
4938 dm->num_rf_path);
4939 odm_move_memory(dm, tmp_snr_avg,
4940 dbg_avg->snr_ofdm_avg, dm->num_rf_path);
4941 odm_move_memory(dm, tmp_evm_avg,
4942 &dbg_avg->evm_ofdm_avg, 1);
4943 break;
4944 }
4945
4946 PDM_SNPF(out_len, used, output + used, out_len - used,
4947 "* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n",
4948 rate_type, tmp_cnt,
4949 tmp_rssi_avg[0], tmp_rssi_avg[1],
4950 tmp_rssi_avg[2], tmp_rssi_avg[3],
4951 tmp_snr_avg[0], tmp_snr_avg[1],
4952 tmp_snr_avg[2], tmp_snr_avg[3],
4953 tmp_evm_avg[0], tmp_evm_avg[1],
4954 tmp_evm_avg[2], tmp_evm_avg[3]);
4955 }
4956
4957 phydm_reset_phystatus_statistic(dm);
4958
4959 PDM_SNPF(out_len, used, output + used, out_len - used,
4960 "rxsc_idx {Legacy, 20, 40, 80} = {%d, %d, %d, %d}\n",
4961 dm->rxsc_l, dm->rxsc_20, dm->rxsc_40, dm->rxsc_80);
4962
4963 *_used = used;
4964 *_out_len = out_len;
4965 }
4966
phydm_reg_monitor(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)4967 void phydm_reg_monitor(void *dm_void, char input[][16], u32 *_used,
4968 char *output, u32 *_out_len)
4969 {
4970 struct dm_struct *dm = (struct dm_struct *)dm_void;
4971 char help[] = "-h";
4972 u32 var1[10] = {0};
4973 u32 used = *_used;
4974 u32 out_len = *_out_len;
4975 boolean en_mntr = false;
4976 u8 i = 0;
4977
4978 for (i = 0; i < 7; i++) {
4979 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
4980 }
4981
4982 if ((strcmp(input[1], help) == 0)) {
4983 PDM_SNPF(out_len, used, output + used, out_len - used,
4984 "reg_mntr {en} {0:all, 1:BB, 2:RF, 3:MAC 4:1/2/4 byte}\n");
4985 } else {
4986 if (var1[0] == 1)
4987 en_mntr = true;
4988 else
4989 en_mntr = false;
4990
4991 if (var1[1] == 0) {
4992 dm->en_reg_mntr_bb = en_mntr;
4993 dm->en_reg_mntr_rf = en_mntr;
4994 dm->en_reg_mntr_mac = en_mntr;
4995 dm->en_reg_mntr_byte = en_mntr;
4996 } else if (var1[1] == 1) {
4997 dm->en_reg_mntr_bb = en_mntr;
4998 } else if (var1[1] == 2) {
4999 dm->en_reg_mntr_rf = en_mntr;
5000 } else if (var1[1] == 3) {
5001 dm->en_reg_mntr_mac = en_mntr;
5002 } else if (var1[1] == 4) {
5003 dm->en_reg_mntr_byte = en_mntr;
5004 }
5005 }
5006
5007 PDM_SNPF(out_len, used, output + used, out_len - used,
5008 "en: BB:%d, RF:%d, MAC:%d, byte:%d\n", dm->en_reg_mntr_bb,
5009 dm->en_reg_mntr_rf, dm->en_reg_mntr_mac, dm->en_reg_mntr_byte);
5010
5011 *_used = used;
5012 *_out_len = out_len;
5013 }
5014
5015 #if (RTL8822C_SUPPORT)
phydm_get_agc_rf_gain(void * dm_void,boolean is_mod,u8 tab,u8 mp_gain_i)5016 u16 phydm_get_agc_rf_gain(void *dm_void, boolean is_mod, u8 tab, u8 mp_gain_i)
5017 {
5018 struct dm_struct *dm = (struct dm_struct *)dm_void;
5019 u16 rf_gain = 0x0;
5020
5021 if (is_mod)
5022 rf_gain = dm->agc_rf_gain[tab][mp_gain_i];
5023 else
5024 rf_gain = dm->agc_rf_gain_ori[tab][mp_gain_i];
5025
5026 return rf_gain;
5027 }
5028 #endif
5029
phydm_get_rxagc_table_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)5030 void phydm_get_rxagc_table_dbg(void *dm_void, char input[][16], u32 *_used,
5031 char *output, u32 *_out_len)
5032 {
5033 struct dm_struct *dm = (struct dm_struct *)dm_void;
5034 char help[] = "-h";
5035 u32 var1[10] = {0};
5036 u32 used = *_used;
5037 u32 out_len = *_out_len;
5038 u8 tab = 0;
5039 boolean is_modified = false;
5040 u8 mp_gain = 0;
5041 u16 rf_gain = 0;
5042 u8 i = 0;
5043
5044 #if (RTL8822C_SUPPORT)
5045 if (!(dm->support_ic_type & ODM_RTL8822C))
5046 return;
5047
5048 if ((strcmp(input[1], help) == 0)) {
5049 PDM_SNPF(out_len, used, output + used, out_len - used,
5050 "get rxagc table : {0:ori, 1:modified} {table:0~15} {mp_gain_idx:0~63, all:0xff}\n");
5051 } else {
5052 for (i = 0; i < 3; i++) {
5053 PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
5054 }
5055
5056 is_modified = (boolean)var1[0];
5057 tab = (u8)var1[1];
5058 mp_gain = (u8)var1[2];
5059
5060 PDM_SNPF(out_len, used, output + used, out_len - used,
5061 "agc_table_cnt:%d, is_agc_tab_pos_shift:%d, agc_table_shift:%d\n",
5062 dm->agc_table_cnt, dm->is_agc_tab_pos_shift,
5063 dm->agc_table_shift);
5064
5065 if (mp_gain == 0xff) {
5066 for (i = 0; i < 64; i++) {
5067 rf_gain = phydm_get_agc_rf_gain(dm, is_modified,
5068 tab, i);
5069
5070 PDM_SNPF(out_len, used, output + used,
5071 out_len - used,
5072 "agc_table:%d, mp_gain_idx:0x%x, rf_gain_idx:0x%x\n",
5073 tab, i, rf_gain);
5074 }
5075 } else {
5076 rf_gain = phydm_get_agc_rf_gain(dm, is_modified, tab,
5077 mp_gain);
5078
5079 PDM_SNPF(out_len, used, output + used, out_len - used,
5080 "agc_table:%d, mp_gain_idx:0x%x, rf_gain_idx:0x%x\n",
5081 tab, mp_gain, rf_gain);
5082 }
5083 }
5084 #endif
5085 *_used = used;
5086 *_out_len = out_len;
5087 }
5088
phydm_shift_rxagc_table_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)5089 void phydm_shift_rxagc_table_dbg(void *dm_void, char input[][16], u32 *_used,
5090 char *output, u32 *_out_len)
5091 {
5092 struct dm_struct *dm = (struct dm_struct *)dm_void;
5093 char help[] = "-h";
5094 u32 var1[10] = {0};
5095 u32 used = *_used;
5096 u32 out_len = *_out_len;
5097 u8 i = 0;
5098 u16 value_db = 0;
5099
5100 #if (RTL8822C_SUPPORT)
5101 if (!(dm->support_ic_type & ODM_RTL8822C))
5102 return;
5103
5104 if ((strcmp(input[1], help) == 0)) {
5105 PDM_SNPF(out_len, used, output + used, out_len - used,
5106 "shift rxagc table : {0:-, 1:+} {value(0~63, unit:2dB)}\n");
5107 } else {
5108 for (i = 0; i < 3; i++) {
5109 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL,
5110 &var1[i]);
5111 }
5112
5113 if ((u8)var1[1] > 63) {
5114 PDM_SNPF(out_len, used, output + used, out_len - used,
5115 "Do not enter the value larger than 63!\n");
5116 } else {
5117 phydm_shift_rxagc_table(dm, (boolean)var1[0],
5118 (u8)var1[1]);
5119
5120 value_db = (u8)var1[1] << 1;
5121 PDM_SNPF(out_len, used, output + used, out_len - used,
5122 "shift %s%d dB gain\n",
5123 (((boolean)var1[0]) ? "+" : "-"), value_db);
5124 }
5125 }
5126 #endif
5127 }
5128
5129 #if (RTL8814B_SUPPORT || RTL8198F_SUPPORT)
phydm_spur_detect_dbg(void * dm_void,char input[][16],u32 * _used,char * output,u32 * _out_len)5130 void phydm_spur_detect_dbg(void *dm_void, char input[][16], u32 *_used,
5131 char *output, u32 *_out_len)
5132 {
5133 struct dm_struct *dm = (struct dm_struct *)dm_void;
5134 char help[] = "-h";
5135 u32 var1[10] = {0};
5136 u32 used = *_used;
5137 u32 out_len = *_out_len;
5138 u32 i;
5139
5140 if ((strcmp(input[1], help) == 0)) {
5141 PDM_SNPF(out_len, used, output + used, out_len - used,
5142 "{0: Auto spur detect(NBI+CSI), 1:NBI always ON/ CSI Auto,");
5143 PDM_SNPF(out_len, used, output + used, out_len - used,
5144 "2: CSI always On/ NBI Auto, 3: Disable, 4: CSI & NBI ON}\n");
5145 PDM_SNPF(out_len, used, output + used, out_len - used,
5146 "{If CSI always ON (Mode 2 or 4) -> CSI wgt manual(0~7)}\n");
5147 PDM_SNPF(out_len, used, output + used, out_len - used,
5148 "{5: Adjust CSI weight threshold} {0:-,1:+} {th offset}\n");
5149 } else {
5150 for (i = 0; i < 10; i++) {
5151 if (input[i + 1])
5152 PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL,
5153 &var1[i]);
5154 }
5155
5156 if (var1[0] == 1) {
5157 dm->dsde_sel = DET_NBI;
5158 } else if (var1[0] == 2) {
5159 dm->dsde_sel = DET_CSI;
5160 } else if (var1[0] == 3) {
5161 dm->dsde_sel = DET_DISABLE;
5162 } else if (var1[0] == 4) {
5163 dm->dsde_sel = DET_CSI_NBI_EN;
5164 } else if (var1[0] == 0) {
5165 dm->dsde_sel = DET_AUTO;
5166 } else if (var1[0] == 5) {
5167 if (var1[1] == 0)
5168 for (i = 0; i < 5; i++)
5169 dm->csi_wgt_th_db[i] -= (u8)var1[2];
5170 else if (var1[1] == 1)
5171 for (i = 0; i < 5; i++)
5172 dm->csi_wgt_th_db[i] += (u8)var1[2];
5173 PDM_SNPF(out_len, used, output + used, out_len - used, "current csi weight threshold:\n");
5174 for (i = 0; i < 5; i++)
5175 PDM_SNPF(out_len, used, output + used,
5176 out_len - used, "----%2d",
5177 dm->csi_wgt_th_db[i]);
5178 PDM_SNPF(out_len, used, output + used, out_len - used, "\n");
5179 for (i = 0; i < 5; i++)
5180 PDM_SNPF(out_len, used, output + used,
5181 out_len - used, "--%d--|", i);
5182 PDM_SNPF(out_len, used, output + used, out_len - used, "\n");
5183 } else {
5184 PDM_SNPF(out_len, used, output + used, out_len - used,
5185 "Spur detection mode invalid!\n");
5186 return;
5187 }
5188 if (var1[0] < 5)
5189 PDM_SNPF(out_len, used, output + used, out_len - used,
5190 "spur detect mode = %d\n", dm->dsde_sel);
5191
5192 if (dm->dsde_sel == DET_CSI_NBI_EN) {
5193 if (var1[1] < 8) {
5194 dm->csi_wgt = (u8)var1[1];
5195 PDM_SNPF(out_len, used, output + used,
5196 out_len - used, "CSI wgt %d\n",
5197 dm->csi_wgt);
5198 } else {
5199 PDM_SNPF(out_len, used, output + used,
5200 out_len - used,
5201 "CSI wgt setting invalid. Please set the correct wgt!\n");
5202 return;
5203 }
5204 }
5205 }
5206
5207 *_used = used;
5208 *_out_len = out_len;
5209 }
5210 #endif
5211
5212 struct phydm_command {
5213 char name[16];
5214 u8 id;
5215 };
5216
5217 enum PHYDM_CMD_ID {
5218 PHYDM_HELP,
5219 PHYDM_DEMO,
5220 PHYDM_RF_CMD,
5221 PHYDM_DIG,
5222 PHYDM_RA,
5223 PHYDM_PROFILE,
5224 PHYDM_ANTDIV,
5225 PHYDM_PATHDIV,
5226 PHYDM_DEBUG,
5227 PHYDM_MP_DEBUG,
5228 PHYDM_FW_DEBUG,
5229 PHYDM_SUPPORT_ABILITY,
5230 PHYDM_GET_TXAGC,
5231 PHYDM_SET_TXAGC,
5232 PHYDM_SMART_ANT,
5233 PHYDM_CH_BW,
5234 PHYDM_TRX_PATH,
5235 PHYDM_LA_MODE,
5236 PHYDM_DUMP_REG,
5237 PHYDM_AUTO_DBG,
5238 PHYDM_DD_DBG,
5239 PHYDM_BIG_JUMP,
5240 PHYDM_SHOW_RXRATE,
5241 PHYDM_NBI_EN,
5242 PHYDM_CSI_MASK_EN,
5243 PHYDM_DFS_DEBUG,
5244 PHYDM_DFS_HIST,
5245 PHYDM_NHM,
5246 PHYDM_CLM,
5247 PHYDM_FAHM,
5248 PHYDM_ENV_MNTR,
5249 PHYDM_BB_INFO,
5250 //PHYDM_TXBF,
5251 PHYDM_H2C,
5252 PHYDM_EXT_RF_E_CTRL,
5253 PHYDM_ADAPTIVE_SOML,
5254 PHYDM_PSD,
5255 PHYDM_DEBUG_PORT,
5256 PHYDM_DIS_HTSTF_CONTROL,
5257 PHYDM_CFO_TRK,
5258 PHYDM_ADAPTIVITY_DEBUG,
5259 PHYDM_DIS_DYM_ANT_WEIGHTING,
5260 PHYDM_FORECE_PT_STATE,
5261 PHYDM_STA_INFO,
5262 PHYDM_PAUSE_FUNC,
5263 PHYDM_PER_TONE_EVM,
5264 PHYDM_DYN_TXPWR,
5265 PHYDM_LNA_SAT,
5266 PHYDM_ANAPAR,
5267 PHYDM_CCK_RX_PATHDIV,
5268 PHYDM_BEAM_FORMING,
5269 PHYDM_REG_MONITOR,
5270 #if RTL8814B_SUPPORT
5271 PHYDM_SPUR_DETECT,
5272 #endif
5273 PHYDM_PHY_STATUS,
5274 PHYDM_CRC32_CNT,
5275 PHYDM_DCC,
5276 #ifdef PHYDM_HW_IGI
5277 PHYDM_HWIGI,
5278 #endif
5279 #ifdef PHYDM_HW_SWITCH_AGC_TAB
5280 PHYDM_HW_AGCTAB,
5281 #endif
5282 PHYDM_PMAC_TX,
5283 PHYDM_GET_RXAGC,
5284 PHYDM_SHIFT_RXAGC,
5285 PHYDM_IFS_CLM,
5286 PHYDM_ENHANCE_MNTR,
5287 PHYDM_CSI_DBG
5288 };
5289
5290 struct phydm_command phy_dm_ary[] = {
5291 {"-h", PHYDM_HELP}, /*@do not move this element to other position*/
5292 {"demo", PHYDM_DEMO}, /*@do not move this element to other position*/
5293 {"rf", PHYDM_RF_CMD},
5294 {"dig", PHYDM_DIG},
5295 {"ra", PHYDM_RA},
5296 {"profile", PHYDM_PROFILE},
5297 {"antdiv", PHYDM_ANTDIV},
5298 {"pathdiv", PHYDM_PATHDIV},
5299 {"dbg", PHYDM_DEBUG},
5300 {"mp_dbg", PHYDM_MP_DEBUG},
5301 {"fw_dbg", PHYDM_FW_DEBUG},
5302 {"ability", PHYDM_SUPPORT_ABILITY},
5303 {"get_txagc", PHYDM_GET_TXAGC},
5304 {"set_txagc", PHYDM_SET_TXAGC},
5305 {"smtant", PHYDM_SMART_ANT},
5306 {"ch_bw", PHYDM_CH_BW},
5307 {"trxpath", PHYDM_TRX_PATH},
5308 {"lamode", PHYDM_LA_MODE},
5309 {"dumpreg", PHYDM_DUMP_REG},
5310 {"auto_dbg", PHYDM_AUTO_DBG},
5311 {"dd_dbg", PHYDM_DD_DBG},
5312 {"bigjump", PHYDM_BIG_JUMP},
5313 {"rxrate", PHYDM_SHOW_RXRATE},
5314 {"nbi", PHYDM_NBI_EN},
5315 {"csi_mask", PHYDM_CSI_MASK_EN},
5316 {"dfs", PHYDM_DFS_DEBUG},
5317 {"dfs_hist", PHYDM_DFS_HIST},
5318 {"nhm", PHYDM_NHM},
5319 {"clm", PHYDM_CLM},
5320 {"fahm", PHYDM_FAHM},
5321 {"env_mntr", PHYDM_ENV_MNTR},
5322 {"bbinfo", PHYDM_BB_INFO},
5323 /*{"txbf", PHYDM_TXBF},*/
5324 {"h2c", PHYDM_H2C},
5325 {"ext_rfe", PHYDM_EXT_RF_E_CTRL},
5326 {"soml", PHYDM_ADAPTIVE_SOML},
5327 {"psd", PHYDM_PSD},
5328 {"dbgport", PHYDM_DEBUG_PORT},
5329 {"dis_htstf", PHYDM_DIS_HTSTF_CONTROL},
5330 {"cfo_trk", PHYDM_CFO_TRK},
5331 {"adapt_debug", PHYDM_ADAPTIVITY_DEBUG},
5332 {"dis_dym_ant_wgt", PHYDM_DIS_DYM_ANT_WEIGHTING},
5333 {"force_pt_state", PHYDM_FORECE_PT_STATE},
5334 {"sta_info", PHYDM_STA_INFO},
5335 {"pause", PHYDM_PAUSE_FUNC},
5336 {"evm", PHYDM_PER_TONE_EVM},
5337 {"dyn_txpwr", PHYDM_DYN_TXPWR},
5338 {"lna_sat", PHYDM_LNA_SAT},
5339 {"anapar", PHYDM_ANAPAR},
5340 {"cck_rx_pathdiv", PHYDM_CCK_RX_PATHDIV},
5341 {"bf", PHYDM_BEAM_FORMING},
5342 {"reg_mntr", PHYDM_REG_MONITOR},
5343 #if RTL8814B_SUPPORT
5344 {"spur_detect", PHYDM_SPUR_DETECT},
5345 #endif
5346 {"physts", PHYDM_PHY_STATUS},
5347 {"crc32_cnt", PHYDM_CRC32_CNT},
5348 #ifdef PHYDM_PMAC_TX_SETTING_SUPPORT
5349 {"pmac_tx", PHYDM_PMAC_TX},
5350 #endif
5351 #ifdef PHYDM_HW_IGI
5352 {"hwigi", PHYDM_HWIGI},
5353 #endif
5354 #ifdef PHYDM_HW_SWITCH_AGC_TAB
5355 {"hw_agctab", PHYDM_HW_AGCTAB},
5356 #endif
5357 {"dcc", PHYDM_DCC},
5358 {"get_rxagc", PHYDM_GET_RXAGC},
5359 {"shift_rxagc", PHYDM_SHIFT_RXAGC},
5360 {"ifs_clm", PHYDM_IFS_CLM},
5361 {"enh_mntr", PHYDM_ENHANCE_MNTR},
5362 {"csi_dbg", PHYDM_CSI_DBG}
5363 };
5364
5365 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5366
phydm_cmd_parser(struct dm_struct * dm,char input[][MAX_ARGV],u32 input_num,u8 flag,char * output,u32 out_len)5367 void phydm_cmd_parser(struct dm_struct *dm, char input[][MAX_ARGV],
5368 u32 input_num, u8 flag, char *output, u32 out_len)
5369 {
5370 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
5371 u32 used = 0;
5372 u8 id = 0;
5373 u32 var1[10] = {0};
5374 u32 i;
5375 u32 phydm_ary_size = sizeof(phy_dm_ary) / sizeof(struct phydm_command);
5376
5377 if (flag == 0) {
5378 PDM_SNPF(out_len, used, output + used, out_len - used,
5379 "GET, nothing to print\n");
5380 return;
5381 }
5382
5383 PDM_SNPF(out_len, used, output + used, out_len - used, "\n");
5384
5385 /* Parsing Cmd ID */
5386 if (input_num) {
5387 for (i = 0; i < phydm_ary_size; i++) {
5388 if (strcmp(phy_dm_ary[i].name, input[0]) == 0) {
5389 id = phy_dm_ary[i].id;
5390 break;
5391 }
5392 }
5393 if (i == phydm_ary_size) {
5394 PDM_SNPF(out_len, used, output + used, out_len - used,
5395 "PHYDM command not found!\n");
5396 return;
5397 }
5398 }
5399
5400 switch (id) {
5401 case PHYDM_HELP: {
5402 PDM_SNPF(out_len, used, output + used, out_len - used,
5403 "BB cmd ==>\n");
5404
5405 for (i = 0; i < phydm_ary_size - 2; i++)
5406 PDM_SNPF(out_len, used, output + used, out_len - used,
5407 " %-5d: %s\n", i, phy_dm_ary[i + 2].name);
5408 } break;
5409
5410 case PHYDM_DEMO: { /*@echo demo 10 0x3a z abcde >cmd*/
5411 u32 directory = 0;
5412
5413 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))
5414 char char_temp;
5415 #else
5416 u32 char_temp = ' ';
5417 #endif
5418
5419 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &directory);
5420 PDM_SNPF(out_len, used, output + used, out_len - used,
5421 "Decimal value = %d\n", directory);
5422 PHYDM_SSCANF(input[2], DCMD_HEX, &directory);
5423 PDM_SNPF(out_len, used, output + used, out_len - used,
5424 "Hex value = 0x%x\n", directory);
5425 PHYDM_SSCANF(input[3], DCMD_CHAR, &char_temp);
5426 PDM_SNPF(out_len, used, output + used, out_len - used,
5427 "Char = %c\n", char_temp);
5428 PDM_SNPF(out_len, used, output + used, out_len - used,
5429 "String = %s\n", input[4]);
5430 } break;
5431 case PHYDM_RF_CMD:
5432 halrf_cmd_parser(dm, input, &used, output, &out_len, input_num);
5433 break;
5434
5435 case PHYDM_DIG:
5436 phydm_dig_debug(dm, input, &used, output, &out_len);
5437 break;
5438
5439 case PHYDM_RA:
5440 phydm_ra_debug(dm, input, &used, output, &out_len);
5441 break;
5442
5443 case PHYDM_ANTDIV:
5444 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
5445 phydm_antdiv_debug(dm, input, &used, output, &out_len);
5446 #endif
5447 break;
5448
5449 case PHYDM_PATHDIV:
5450 #if (defined(CONFIG_PATH_DIVERSITY))
5451 phydm_pathdiv_debug(dm, input, &used, output, &out_len);
5452 #endif
5453 break;
5454
5455 case PHYDM_DEBUG:
5456 phydm_debug_trace(dm, input, &used, output, &out_len);
5457 break;
5458
5459 case PHYDM_MP_DEBUG:
5460 phydm_mp_dbg(dm, input, &used, output, &out_len);
5461 break;
5462
5463 case PHYDM_FW_DEBUG:
5464 phydm_fw_debug_trace(dm, input, &used, output, &out_len);
5465 break;
5466
5467 case PHYDM_SUPPORT_ABILITY:
5468 phydm_supportability_en(dm, input, &used, output, &out_len);
5469 break;
5470
5471 case PHYDM_SMART_ANT:
5472 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
5473
5474 #ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
5475 phydm_hl_smt_ant_dbg_type2(dm, input, &used, output, &out_len);
5476 #elif (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))
5477 phydm_hl_smart_ant_debug(dm, input, &used, output, &out_len);
5478 #endif
5479
5480 #elif (defined(CONFIG_CUMITEK_SMART_ANTENNA))
5481 phydm_cumitek_smt_ant_debug(dm, input, &used, output, &out_len);
5482 #endif
5483
5484 break;
5485
5486 case PHYDM_CH_BW:
5487 phydm_bw_ch_adjust(dm, input, &used, output, &out_len);
5488 break;
5489
5490 case PHYDM_PROFILE:
5491 phydm_basic_profile(dm, &used, output, &out_len);
5492 break;
5493
5494 case PHYDM_GET_TXAGC:
5495 phydm_get_txagc(dm, &used, output, &out_len);
5496 break;
5497
5498 case PHYDM_SET_TXAGC:
5499 phydm_set_txagc_dbg(dm, input, &used, output, &out_len);
5500 break;
5501
5502 case PHYDM_TRX_PATH:
5503 phydm_config_trx_path(dm, input, &used, output, &out_len);
5504 break;
5505
5506 case PHYDM_LA_MODE:
5507 #if (PHYDM_LA_MODE_SUPPORT)
5508 phydm_la_cmd(dm, input, &used, output, &out_len);
5509 #endif
5510 break;
5511
5512 case PHYDM_DUMP_REG:
5513 phydm_dump_reg(dm, input, &used, output, &out_len);
5514 break;
5515
5516 case PHYDM_BIG_JUMP:
5517 phydm_enable_big_jump(dm, input, &used, output, &out_len);
5518 break;
5519
5520 case PHYDM_AUTO_DBG:
5521 #ifdef PHYDM_AUTO_DEGBUG
5522 phydm_auto_dbg_console(dm, input, &used, output, &out_len);
5523 #endif
5524 break;
5525
5526 case PHYDM_DD_DBG:
5527 phydm_dd_dbg_dump(dm, input, &used, output, &out_len);
5528 break;
5529
5530 case PHYDM_SHOW_RXRATE:
5531 phydm_show_rx_rate(dm, input, &used, output, &out_len);
5532 break;
5533
5534 case PHYDM_NBI_EN:
5535 phydm_nbi_debug(dm, input, &used, output, &out_len);
5536 break;
5537
5538 case PHYDM_CSI_MASK_EN:
5539 phydm_csi_debug(dm, input, &used, output, &out_len);
5540 break;
5541
5542 #ifdef CONFIG_PHYDM_DFS_MASTER
5543 case PHYDM_DFS_DEBUG:
5544 phydm_dfs_debug(dm, input, &used, output, &out_len);
5545 break;
5546
5547 case PHYDM_DFS_HIST:
5548 phydm_dfs_hist_dbg(dm, input, &used, output, &out_len);
5549 break;
5550 #endif
5551
5552 case PHYDM_NHM:
5553 #ifdef NHM_SUPPORT
5554 phydm_nhm_dbg(dm, input, &used, output, &out_len);
5555 #endif
5556 break;
5557
5558 case PHYDM_CLM:
5559 #ifdef CLM_SUPPORT
5560 phydm_clm_dbg(dm, input, &used, output, &out_len);
5561 #endif
5562 break;
5563
5564 #ifdef FAHM_SUPPORT
5565 case PHYDM_FAHM:
5566 phydm_fahm_dbg(dm, input, &used, output, &out_len);
5567 break;
5568 #endif
5569
5570 case PHYDM_ENV_MNTR:
5571 phydm_env_mntr_dbg(dm, input, &used, output, &out_len);
5572 break;
5573
5574 case PHYDM_BB_INFO:
5575 phydm_bb_hw_dbg_info(dm, input, &used, output, &out_len);
5576 break;
5577 /*
5578 case PHYDM_TXBF: {
5579 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
5580 #ifdef PHYDM_BEAMFORMING_SUPPORT
5581 struct _RT_BEAMFORMING_INFO *beamforming_info = NULL;
5582
5583 beamforming_info = &dm->beamforming_info;
5584
5585 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
5586 if (var1[0] == 0) {
5587 beamforming_info->apply_v_matrix = false;
5588 beamforming_info->snding3ss = true;
5589 PDM_SNPF(out_len, used, output + used, out_len - used,
5590 "\r\n dont apply V matrix and 3SS 789 snding\n");
5591 } else if (var1[0] == 1) {
5592 beamforming_info->apply_v_matrix = true;
5593 beamforming_info->snding3ss = true;
5594 PDM_SNPF(out_len, used, output + used, out_len - used,
5595 "\r\n apply V matrix and 3SS 789 snding\n");
5596 } else if (var1[0] == 2) {
5597 beamforming_info->apply_v_matrix = true;
5598 beamforming_info->snding3ss = false;
5599 PDM_SNPF(out_len, used, output + used, out_len - used,
5600 "\r\n default txbf setting\n");
5601 } else
5602 PDM_SNPF(out_len, used, output + used, out_len - used,
5603 "\r\n unknown cmd!!\n");
5604 #endif
5605 #endif
5606 } break;
5607 */
5608 case PHYDM_H2C:
5609 phydm_h2C_debug(dm, input, &used, output, &out_len);
5610 break;
5611
5612 case PHYDM_EXT_RF_E_CTRL:
5613 phydm_ext_rf_element_ctrl(dm, input, &used, output, &out_len);
5614 break;
5615
5616 case PHYDM_ADAPTIVE_SOML:
5617 #ifdef CONFIG_ADAPTIVE_SOML
5618 phydm_soml_debug(dm, input, &used, output, &out_len);
5619 #endif
5620 break;
5621
5622 case PHYDM_PSD:
5623
5624 #ifdef CONFIG_PSD_TOOL
5625 phydm_psd_debug(dm, input, &used, output, &out_len);
5626 #endif
5627
5628 break;
5629
5630 case PHYDM_DEBUG_PORT:
5631 phydm_print_dbgport(dm, input, &used, output, &out_len);
5632 break;
5633
5634 case PHYDM_DIS_HTSTF_CONTROL: {
5635 PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
5636
5637 if (var1[0] == 1) {
5638 /* setting being false is for debug */
5639 dm->bhtstfdisabled = true;
5640 PDM_SNPF(out_len, used, output + used, out_len - used,
5641 "Dynamic HT-STF Gain Control is Disable\n");
5642 } else {
5643 /* @default setting should be true,
5644 * always be dynamic control
5645 */
5646 dm->bhtstfdisabled = false;
5647 PDM_SNPF(out_len, used, output + used, out_len - used,
5648 "Dynamic HT-STF Gain Control is Enable\n");
5649 }
5650 } break;
5651
5652 case PHYDM_CFO_TRK:
5653 phydm_cfo_tracking_debug(dm, input, &used, output, &out_len);
5654 break;
5655
5656 case PHYDM_ADAPTIVITY_DEBUG:
5657 #ifdef PHYDM_SUPPORT_ADAPTIVITY
5658 phydm_adaptivity_debug(dm, input, &used, output, &out_len);
5659 #endif
5660 break;
5661
5662 case PHYDM_DIS_DYM_ANT_WEIGHTING:
5663 #ifdef DYN_ANT_WEIGHTING_SUPPORT
5664 phydm_ant_weight_dbg(dm, input, &used, output, &out_len);
5665 #endif
5666 break;
5667
5668 case PHYDM_FORECE_PT_STATE:
5669 #ifdef PHYDM_POWER_TRAINING_SUPPORT
5670 phydm_pow_train_debug(dm, input, &used, output, &out_len);
5671 #endif
5672 break;
5673
5674 case PHYDM_STA_INFO:
5675 phydm_show_sta_info(dm, input, &used, output, &out_len);
5676 break;
5677
5678 case PHYDM_PAUSE_FUNC:
5679 phydm_pause_func_console(dm, input, &used, output, &out_len);
5680 break;
5681
5682 case PHYDM_PER_TONE_EVM:
5683 phydm_per_tone_evm(dm, input, &used, output, &out_len);
5684 break;
5685
5686 #ifdef CONFIG_DYNAMIC_TX_TWR
5687 case PHYDM_DYN_TXPWR:
5688 phydm_dtp_debug(dm, input, &used, output, &out_len);
5689 break;
5690 #endif
5691
5692 case PHYDM_LNA_SAT:
5693 #ifdef PHYDM_LNA_SAT_CHK_SUPPORT
5694 phydm_lna_sat_debug(dm, input, &used, output, &out_len);
5695 #endif
5696 break;
5697
5698 case PHYDM_ANAPAR:
5699 phydm_get_anapar_table(dm, &used, output, &out_len);
5700 break;
5701 case PHYDM_CCK_RX_PATHDIV:
5702 #ifdef PHYDM_CCK_RX_PATHDIV_SUPPORT
5703 phydm_cck_rx_pathdiv_dbg(dm, input, &used, output, &out_len);
5704 #endif
5705 break;
5706
5707 case PHYDM_BEAM_FORMING:
5708 #ifdef CONFIG_BB_TXBF_API
5709 phydm_bf_debug(dm, input, &used, output, &out_len);
5710 #endif
5711 break;
5712 case PHYDM_REG_MONITOR:
5713 phydm_reg_monitor(dm, input, &used, output, &out_len);
5714 break;
5715
5716 #if RTL8814B_SUPPORT
5717 case PHYDM_SPUR_DETECT:
5718 phydm_spur_detect_dbg(dm, input, &used, output, &out_len);
5719 break;
5720 #endif
5721 case PHYDM_CRC32_CNT:
5722 phydm_crc32_cnt_dbg(dm, input, &used, output, &out_len);
5723 break;
5724 case PHYDM_PHY_STATUS:
5725 phydm_physts_dbg(dm, input, &used, output, &out_len);
5726 break;
5727 #ifdef PHYDM_DCC_ENHANCE
5728 case PHYDM_DCC:
5729 phydm_dig_cckpd_coex_dbg(dm, input, &used, output, &out_len);
5730 break;
5731 #endif
5732 #ifdef PHYDM_PMAC_TX_SETTING_SUPPORT
5733 case PHYDM_PMAC_TX:
5734 phydm_pmac_tx_dbg(dm, input, &used, output, &out_len);
5735 break;
5736 #endif
5737 #ifdef PHYDM_HW_IGI
5738 case PHYDM_HWIGI:
5739 phydm_hwigi_dbg(dm, input, &used, output, &out_len);
5740 break;
5741 #endif
5742 #ifdef PHYDM_HW_SWITCH_AGC_TAB
5743 case PHYDM_HW_AGCTAB:
5744 phydm_auto_agc_tab_debug(dm, input, &used, output, &out_len);
5745 break;
5746 #endif
5747 case PHYDM_GET_RXAGC:
5748 phydm_get_rxagc_table_dbg(dm, input, &used, output, &out_len);
5749 break;
5750 case PHYDM_SHIFT_RXAGC:
5751 phydm_shift_rxagc_table_dbg(dm, input, &used, output, &out_len);
5752 break;
5753 case PHYDM_IFS_CLM:
5754 #ifdef IFS_CLM_SUPPORT
5755 phydm_ifs_clm_dbg(dm, input, &used, output, &out_len);
5756 #endif
5757 break;
5758 case PHYDM_ENHANCE_MNTR:
5759 phydm_enhance_mntr_dbg(dm, input, &used, output, &out_len);
5760 break;
5761 case PHYDM_CSI_DBG:
5762 phydm_get_csi_table(dm, &used, output, &out_len);
5763 break;
5764 default:
5765 PDM_SNPF(out_len, used, output + used, out_len - used,
5766 "Do not support this command\n");
5767 break;
5768 }
5769 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5770 }
5771
5772 #if defined __ECOS || defined __ICCARM__
5773 #ifndef strsep
strsep(char ** s,const char * ct)5774 char *strsep(char **s, const char *ct)
5775 {
5776 char *sbegin = *s;
5777 char *end;
5778
5779 if (!sbegin)
5780 return NULL;
5781
5782 end = strpbrk(sbegin, ct);
5783 if (end)
5784 *end++ = '\0';
5785 *s = end;
5786 return sbegin;
5787 }
5788 #endif
5789 #endif
5790
5791 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP | ODM_IOT))
phydm_cmd(struct dm_struct * dm,char * input,u32 in_len,u8 flag,char * output,u32 out_len)5792 s32 phydm_cmd(struct dm_struct *dm, char *input, u32 in_len, u8 flag,
5793 char *output, u32 out_len)
5794 {
5795 char *token;
5796 u32 argc = 0;
5797 char argv[MAX_ARGC][MAX_ARGV];
5798
5799 do {
5800 token = strsep(&input, ", ");
5801 if (token) {
5802 if (strlen(token) <= MAX_ARGV)
5803 strcpy(argv[argc], token);
5804
5805 argc++;
5806 } else {
5807 break;
5808 }
5809 } while (argc < MAX_ARGC);
5810
5811 if (argc == 1)
5812 argv[0][strlen(argv[0]) - 1] = '\0';
5813
5814 phydm_cmd_parser(dm, argv, argc, flag, output, out_len);
5815
5816 return 0;
5817 }
5818 #endif
5819
phydm_fw_trace_handler(void * dm_void,u8 * cmd_buf,u8 cmd_len)5820 void phydm_fw_trace_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len)
5821 {
5822 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
5823 struct dm_struct *dm = (struct dm_struct *)dm_void;
5824
5825 /*@u8 debug_trace_11byte[60];*/
5826 u8 freg_num, c2h_seq, buf_0 = 0;
5827
5828 if (!(dm->support_ic_type & PHYDM_IC_3081_SERIES))
5829 return;
5830
5831 if (cmd_len > 12 || cmd_len == 0) {
5832 pr_debug("[Warning] Error C2H cmd_len=%d\n", cmd_len);
5833 return;
5834 }
5835
5836 buf_0 = cmd_buf[0];
5837 freg_num = (buf_0 & 0xf);
5838 c2h_seq = (buf_0 & 0xf0) >> 4;
5839
5840 #if 0
5841 PHYDM_DBG(dm, DBG_FW_TRACE,
5842 "[FW debug message] freg_num = (( %d )), c2h_seq=(( %d ))\n",
5843 freg_num, c2h_seq);
5844
5845 strncpy(debug_trace_11byte, &cmd_buf[1], (cmd_len - 1));
5846 debug_trace_11byte[cmd_len - 1] = '\0';
5847 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] %s\n",
5848 debug_trace_11byte);
5849 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] cmd_len = (( %d ))\n",
5850 cmd_len);
5851 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] c2h_cmd_start=((%d))\n",
5852 dm->c2h_cmd_start);
5853
5854 PHYDM_DBG(dm, DBG_FW_TRACE, "pre_seq = (( %d )), current_seq=((%d))\n",
5855 dm->pre_c2h_seq, c2h_seq);
5856 PHYDM_DBG(dm, DBG_FW_TRACE, "fw_buff_is_enpty = (( %d ))\n",
5857 dm->fw_buff_is_enpty);
5858 #endif
5859
5860 if (c2h_seq != dm->pre_c2h_seq && dm->fw_buff_is_enpty == false) {
5861 dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
5862 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW Dbg Queue Overflow] %s\n",
5863 dm->fw_debug_trace);
5864 dm->c2h_cmd_start = 0;
5865 }
5866
5867 if ((cmd_len - 1) > (60 - dm->c2h_cmd_start)) {
5868 dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
5869 PHYDM_DBG(dm, DBG_FW_TRACE,
5870 "[FW Dbg Queue error: wrong C2H length] %s\n",
5871 dm->fw_debug_trace);
5872 dm->c2h_cmd_start = 0;
5873 return;
5874 }
5875
5876 strncpy((char *)&dm->fw_debug_trace[dm->c2h_cmd_start],
5877 (char *)&cmd_buf[1], (cmd_len - 1));
5878 dm->c2h_cmd_start += (cmd_len - 1);
5879 dm->fw_buff_is_enpty = false;
5880
5881 if (freg_num == 0 || dm->c2h_cmd_start >= 60) {
5882 if (dm->c2h_cmd_start < 60)
5883 dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
5884 else
5885 dm->fw_debug_trace[59] = '\0';
5886
5887 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s\n",
5888 dm->fw_debug_trace);
5889
5890 dm->c2h_cmd_start = 0;
5891 dm->fw_buff_is_enpty = true;
5892 }
5893
5894 dm->pre_c2h_seq = c2h_seq;
5895 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5896 }
5897
phydm_fw_trace_handler_code(void * dm_void,u8 * buffer,u8 cmd_len)5898 void phydm_fw_trace_handler_code(void *dm_void, u8 *buffer, u8 cmd_len)
5899 {
5900 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
5901 struct dm_struct *dm = (struct dm_struct *)dm_void;
5902 u8 function = buffer[0];
5903 u8 dbg_num = buffer[1];
5904 u16 content_0 = (((u16)buffer[3]) << 8) | ((u16)buffer[2]);
5905 u16 content_1 = (((u16)buffer[5]) << 8) | ((u16)buffer[4]);
5906 u16 content_2 = (((u16)buffer[7]) << 8) | ((u16)buffer[6]);
5907 u16 content_3 = (((u16)buffer[9]) << 8) | ((u16)buffer[8]);
5908 u16 content_4 = (((u16)buffer[11]) << 8) | ((u16)buffer[10]);
5909
5910 if (cmd_len > 12)
5911 PHYDM_DBG(dm, DBG_FW_TRACE,
5912 "[FW Msg] Invalid cmd length (( %d )) >12\n",
5913 cmd_len);
5914 /*@--------------------------------------------*/
5915 #ifdef CONFIG_RA_FW_DBG_CODE
5916 if (function == RATE_DECISION) {
5917 if (dbg_num == 0) {
5918 if (content_0 == 1)
5919 PHYDM_DBG(dm, DBG_FW_TRACE,
5920 "[FW] RA_CNT=((%d)) Max_device=((%d))--------------------------->\n",
5921 content_1, content_2);
5922 else if (content_0 == 2)
5923 PHYDM_DBG(dm, DBG_FW_TRACE,
5924 "[FW] Check RA macid= ((%d)), MediaStatus=((%d)), Dis_RA=((%d)), try_bit=((0x%x))\n",
5925 content_1, content_2, content_3,
5926 content_4);
5927 else if (content_0 == 3)
5928 PHYDM_DBG(dm, DBG_FW_TRACE,
5929 "[FW] Check RA total=((%d)), drop=((0x%x)), TXRPT_TRY_bit=((%x)), bNoisy=((%x))\n",
5930 content_1, content_2, content_3,
5931 content_4);
5932 } else if (dbg_num == 1) {
5933 if (content_0 == 1)
5934 PHYDM_DBG(dm, DBG_FW_TRACE,
5935 "[FW] RTY[0,1,2,3]=[ %d , %d , %d , %d ]\n",
5936 content_1, content_2, content_3,
5937 content_4);
5938 else if (content_0 == 2) {
5939 PHYDM_DBG(dm, DBG_FW_TRACE,
5940 "[FW] RTY[4]=[ %d ], drop=(( %d )), total=(( %d )), current_rate=((0x %x ))",
5941 content_1, content_2, content_3,
5942 content_4);
5943 phydm_print_rate(dm, (u8)content_4,
5944 DBG_FW_TRACE);
5945 } else if (content_0 == 3)
5946 PHYDM_DBG(dm, DBG_FW_TRACE,
5947 "[FW] penality_idx=(( %d ))\n",
5948 content_1);
5949 else if (content_0 == 4)
5950 PHYDM_DBG(dm, DBG_FW_TRACE,
5951 "[FW] RSSI=(( %d )), ra_stage = (( %d ))\n",
5952 content_1, content_2);
5953 } else if (dbg_num == 3) {
5954 if (content_0 == 1)
5955 PHYDM_DBG(dm, DBG_FW_TRACE,
5956 "[FW] Fast_RA (( DOWN )) total=((%d)), total>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n",
5957 content_1, content_2, content_3,
5958 content_4);
5959 else if (content_0 == 2)
5960 PHYDM_DBG(dm, DBG_FW_TRACE,
5961 "[FW] Fast_RA (( UP )) total_acc=((%d)), total_acc>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n",
5962 content_1, content_2, content_3,
5963 content_4);
5964 else if (content_0 == 3)
5965 PHYDM_DBG(dm, DBG_FW_TRACE,
5966 "[FW] Fast_RA (( UP )) ((rate Down Hold)) RA_CNT=((%d))\n",
5967 content_1);
5968 else if (content_0 == 4)
5969 PHYDM_DBG(dm, DBG_FW_TRACE,
5970 "[FW] Fast_RA (( UP )) ((tota_accl<5 skip)) RA_CNT=((%d))\n",
5971 content_1);
5972 else if (content_0 == 8)
5973 PHYDM_DBG(dm, DBG_FW_TRACE,
5974 "[FW] Fast_RA (( Reset Tx Rpt )) RA_CNT=((%d))\n",
5975 content_1);
5976 } else if (dbg_num == 4) {
5977 if (content_0 == 3)
5978 PHYDM_DBG(dm, DBG_FW_TRACE,
5979 "[FW] RER_CNT PCR_ori =(( %d )), ratio_ori =(( %d )), pcr_updown_bitmap =(( 0x%x )), pcr_var_diff =(( %d ))\n",
5980 content_1, content_2, content_3,
5981 content_4);
5982 else if (content_0 == 4)
5983 PHYDM_DBG(dm, DBG_FW_TRACE,
5984 "[FW] pcr_shift_value =(( %s%d )), rate_down_threshold =(( %d )), rate_up_threshold =(( %d ))\n",
5985 ((content_1) ? "+" : "-"), content_2,
5986 content_3, content_4);
5987 else if (content_0 == 5)
5988 PHYDM_DBG(dm, DBG_FW_TRACE,
5989 "[FW] pcr_mean =(( %d )), PCR_VAR =(( %d )), offset =(( %d )), decision_offset_p =(( %d ))\n",
5990 content_1, content_2, content_3,
5991 content_4);
5992 } else if (dbg_num == 5) {
5993 if (content_0 == 1)
5994 PHYDM_DBG(dm, DBG_FW_TRACE,
5995 "[FW] (( UP)) Nsc=(( %d )), N_High=(( %d )), RateUp_Waiting=(( %d )), RateUp_Fail=(( %d ))\n",
5996 content_1, content_2, content_3,
5997 content_4);
5998 else if (content_0 == 2)
5999 PHYDM_DBG(dm, DBG_FW_TRACE,
6000 "[FW] ((DOWN)) Nsc=(( %d )), N_Low=(( %d ))\n",
6001 content_1, content_2);
6002 else if (content_0 == 3)
6003 PHYDM_DBG(dm, DBG_FW_TRACE,
6004 "[FW] ((HOLD)) Nsc=((%d)), N_High=((%d)), N_Low=((%d)), Reset_CNT=((%d))\n",
6005 content_1, content_2, content_3,
6006 content_4);
6007 } else if (dbg_num == 0x60) {
6008 if (content_0 == 1)
6009 PHYDM_DBG(dm, DBG_FW_TRACE,
6010 "[FW] ((AP RPT)) macid=((%d)), BUPDATE[macid]=((%d))\n",
6011 content_1, content_2);
6012 else if (content_0 == 4)
6013 PHYDM_DBG(dm, DBG_FW_TRACE,
6014 "[FW] ((AP RPT)) pass=((%d)), rty_num=((%d)), drop=((%d)), total=((%d))\n",
6015 content_1, content_2, content_3,
6016 content_4);
6017 else if (content_0 == 5)
6018 PHYDM_DBG(dm, DBG_FW_TRACE,
6019 "[FW] ((AP RPT)) PASS=((%d)), RTY_NUM=((%d)), DROP=((%d)), TOTAL=((%d))\n",
6020 content_1, content_2, content_3,
6021 content_4);
6022 }
6023 } else if (function == INIT_RA_TABLE) {
6024 if (dbg_num == 3)
6025 PHYDM_DBG(dm, DBG_FW_TRACE,
6026 "[FW][INIT_RA_INFO] Ra_init, RA_SKIP_CNT = (( %d ))\n",
6027 content_0);
6028 } else if (function == RATE_UP) {
6029 if (dbg_num == 2) {
6030 if (content_0 == 1)
6031 PHYDM_DBG(dm, DBG_FW_TRACE,
6032 "[FW][RateUp] ((Highest rate->return)), macid=((%d)) Nsc=((%d))\n",
6033 content_1, content_2);
6034 } else if (dbg_num == 5) {
6035 if (content_0 == 0)
6036 PHYDM_DBG(dm, DBG_FW_TRACE,
6037 "[FW][RateUp] ((rate UP)), up_rate_tmp=((0x%x)), rate_idx=((0x%x)), SGI_en=((%d)), SGI=((%d))\n",
6038 content_1, content_2, content_3,
6039 content_4);
6040 else if (content_0 == 1)
6041 PHYDM_DBG(dm, DBG_FW_TRACE,
6042 "[FW][RateUp] ((rate UP)), rate_1=((0x%x)), rate_2=((0x%x)), BW=((%d)), Try_Bit=((%d))\n",
6043 content_1, content_2, content_3,
6044 content_4);
6045 }
6046 } else if (function == RATE_DOWN) {
6047 if (dbg_num == 5) {
6048 if (content_0 == 1)
6049 PHYDM_DBG(dm, DBG_FW_TRACE,
6050 "[FW][RateDownStep] ((rate Down)), macid=((%d)), rate1=((0x%x)), rate2=((0x%x)), BW=((%d))\n",
6051 content_1, content_2, content_3,
6052 content_4);
6053 }
6054 } else if (function == TRY_DONE) {
6055 if (dbg_num == 1) {
6056 if (content_0 == 1)
6057 PHYDM_DBG(dm, DBG_FW_TRACE,
6058 "[FW][Try Done] ((try succsess )) macid=((%d)), Try_Done_cnt=((%d))\n",
6059 content_1, content_2);
6060 } else if (dbg_num == 2) {
6061 if (content_0 == 1)
6062 PHYDM_DBG(dm, DBG_FW_TRACE,
6063 "[FW][Try Done] ((try)) macid=((%d)), Try_Done_cnt=((%d)), rate_2=((%d)), try_succes=((%d))\n",
6064 content_1, content_2, content_3,
6065 content_4);
6066 }
6067 } else if (function == RA_H2C) {
6068 if (dbg_num == 1) {
6069 if (content_0 == 0)
6070 PHYDM_DBG(dm, DBG_FW_TRACE,
6071 "[FW][H2C=0x49] fw_trace_en=((%d)), mode =((%d)), macid=((%d))\n",
6072 content_1, content_2, content_3);
6073 }
6074 } else if (function == F_RATE_AP_RPT) {
6075 if (dbg_num == 1) {
6076 if (content_0 == 1)
6077 PHYDM_DBG(dm, DBG_FW_TRACE,
6078 "[FW][AP RPT] ((1)), SPE_STATIS=((0x%x))---------->\n",
6079 content_3);
6080 } else if (dbg_num == 2) {
6081 if (content_0 == 1)
6082 PHYDM_DBG(dm, DBG_FW_TRACE,
6083 "[FW][AP RPT] RTY_all=((%d))\n",
6084 content_1);
6085 } else if (dbg_num == 3) {
6086 if (content_0 == 1)
6087 PHYDM_DBG(dm, DBG_FW_TRACE,
6088 "[FW][AP RPT] MACID1[%d], TOTAL=((%d)), RTY=((%d))\n",
6089 content_3, content_1, content_2);
6090 } else if (dbg_num == 4) {
6091 if (content_0 == 1)
6092 PHYDM_DBG(dm, DBG_FW_TRACE,
6093 "[FW][AP RPT] MACID2[%d], TOTAL=((%d)), RTY=((%d))\n",
6094 content_3, content_1, content_2);
6095 } else if (dbg_num == 5) {
6096 if (content_0 == 1)
6097 PHYDM_DBG(dm, DBG_FW_TRACE,
6098 "[FW][AP RPT] MACID1[%d], PASS=((%d)), DROP=((%d))\n",
6099 content_3, content_1, content_2);
6100 } else if (dbg_num == 6) {
6101 if (content_0 == 1)
6102 PHYDM_DBG(dm, DBG_FW_TRACE,
6103 "[FW][AP RPT] MACID2[%d],, PASS=((%d)), DROP=((%d))\n",
6104 content_3, content_1, content_2);
6105 }
6106 } else if (function == DBC_FW_CLM) {
6107 PHYDM_DBG(dm, DBG_FW_TRACE,
6108 "[FW][CLM][%d, %d] = {%d, %d, %d, %d}\n", dbg_num,
6109 content_0, content_1, content_2, content_3,
6110 content_4);
6111 } else {
6112 PHYDM_DBG(dm, DBG_FW_TRACE,
6113 "[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n",
6114 function, dbg_num, content_0, content_1, content_2,
6115 content_3, content_4);
6116 }
6117 #else
6118 PHYDM_DBG(dm, DBG_FW_TRACE,
6119 "[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n", function,
6120 dbg_num, content_0, content_1, content_2, content_3,
6121 content_4);
6122 #endif
6123 /*@--------------------------------------------*/
6124
6125 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
6126 }
6127
phydm_fw_trace_handler_8051(void * dm_void,u8 * buffer,u8 cmd_len)6128 void phydm_fw_trace_handler_8051(void *dm_void, u8 *buffer, u8 cmd_len)
6129 {
6130 #ifdef CONFIG_PHYDM_DEBUG_FUNCTION
6131 struct dm_struct *dm = (struct dm_struct *)dm_void;
6132 int i = 0;
6133 u8 extend_c2h_sub_id = 0, extend_c2h_dbg_len = 0;
6134 u8 extend_c2h_dbg_seq = 0;
6135 u8 fw_debug_trace[128];
6136 u8 *extend_c2h_dbg_content = 0;
6137
6138 if (cmd_len > 127)
6139 return;
6140
6141 extend_c2h_sub_id = buffer[0];
6142 extend_c2h_dbg_len = buffer[1];
6143 extend_c2h_dbg_content = buffer + 2; /*@DbgSeq+DbgContent for show HEX*/
6144
6145 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
6146 RT_DISP(FC2H, C2H_Summary, ("[Extend C2H packet], Extend_c2hSubId=0x%x, extend_c2h_dbg_len=%d\n",
6147 extend_c2h_sub_id, extend_c2h_dbg_len));
6148
6149 RT_DISP_DATA(FC2H, C2H_Summary, "[Extend C2H packet], Content Hex:", extend_c2h_dbg_content, cmd_len - 2);
6150 #endif
6151
6152 go_backfor_aggre_dbg_pkt:
6153 i = 0;
6154 extend_c2h_dbg_seq = buffer[2];
6155 extend_c2h_dbg_content = buffer + 3;
6156
6157 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
6158 RT_DISP(FC2H, C2H_Summary, ("[RTKFW, SEQ= %d] :", extend_c2h_dbg_seq));
6159 #endif
6160
6161 for (;; i++) {
6162 fw_debug_trace[i] = extend_c2h_dbg_content[i];
6163 if (extend_c2h_dbg_content[i + 1] == '\0') {
6164 fw_debug_trace[i + 1] = '\0';
6165 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s",
6166 &fw_debug_trace[0]);
6167 break;
6168 } else if (extend_c2h_dbg_content[i] == '\n') {
6169 fw_debug_trace[i + 1] = '\0';
6170 PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s",
6171 &fw_debug_trace[0]);
6172 buffer = extend_c2h_dbg_content + i + 3;
6173 goto go_backfor_aggre_dbg_pkt;
6174 }
6175 }
6176 #endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
6177 }
6178