1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2017 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called LICENSE. 16 * 17 * Contact Information: 18 * wlanfae <wlanfae@realtek.com> 19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20 * Hsinchu 300, Taiwan. 21 * 22 * Larry Finger <Larry.Finger@lwfinger.net> 23 * 24 *****************************************************************************/ 25 26 #ifndef __HALRF_H__ 27 #define __HALRF_H__ 28 29 /*@============================================================*/ 30 /*@include files*/ 31 /*@============================================================*/ 32 #include "halrf/halrf_psd.h" 33 #if (RTL8822B_SUPPORT == 1) 34 #include "halrf/rtl8822b/halrf_rfk_init_8822b.h" 35 #endif 36 #if (RTL8822C_SUPPORT == 1) 37 #include "halrf/rtl8822c/halrf_rfk_init_8822c.h" 38 #include "halrf/rtl8822c/halrf_iqk_8822c.h" 39 #include "halrf/rtl8822c/halrf_tssi_8822c.h" 40 #include "halrf/rtl8822c/halrf_dpk_8822c.h" 41 #include "halrf/rtl8822c/halrf_txgapk_8822c.h" 42 #endif 43 44 #if (DM_ODM_SUPPORT_TYPE & ODM_AP) 45 #if (RTL8197G_SUPPORT == 1) 46 #include "halrf/rtl8197g/halrf_rfk_init_8197g.h" 47 #endif 48 #if (RTL8198F_SUPPORT == 1) 49 #include "halrf/rtl8198f/halrf_rfk_init_8198f.h" 50 #endif 51 #if (RTL8812F_SUPPORT == 1) 52 #include "halrf/rtl8812f/halrf_rfk_init_8812f.h" 53 #endif 54 55 #endif 56 57 #if (RTL8814B_SUPPORT == 1) 58 #include "halrf/rtl8814b/halrf_rfk_init_8814b.h" 59 #include "halrf/rtl8814b/halrf_iqk_8814b.h" 60 #include "halrf/rtl8814b/halrf_dpk_8814b.h" 61 #include "halrf/rtl8814b/halrf_txgapk_8814b.h" 62 #endif 63 64 /*@============================================================*/ 65 /*@Definition */ 66 /*@============================================================*/ 67 /*IQK version*/ 68 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) 69 #define IQK_VER_8188E "0x14" 70 #define IQK_VER_8192E "0x01" 71 #define IQK_VER_8192F "0x01" 72 #define IQK_VER_8723B "0x1e" 73 #define IQK_VER_8812A "0x02" 74 #define IQK_VER_8821A "0x02" 75 #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) 76 #define IQK_VER_8188E "0x01" 77 #define IQK_VER_8192E "0x01" 78 #define IQK_VER_8192F "0x01" 79 #define IQK_VER_8723B "0x1f" 80 #define IQK_VER_8812A "0x01" 81 #define IQK_VER_8821A "0x01" 82 #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) 83 #define IQK_VER_8188E "0x01" 84 #define IQK_VER_8192E "0x01" 85 #define IQK_VER_8192F "0x01" 86 #define IQK_VER_8723B "0x1e" 87 #define IQK_VER_8812A "0x01" 88 #define IQK_VER_8821A "0x01" 89 #elif (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) 90 #define IQK_VER_8188E "0x01" 91 #define IQK_VER_8192E "0x01" 92 #define IQK_VER_8192F "0x01" 93 #define IQK_VER_8723B "0x1e" 94 #define IQK_VER_8812A "0x01" 95 #define IQK_VER_8821A "0x01" 96 #endif 97 #define IQK_VER_8814A "0x0f" 98 #define IQK_VER_8188F "0x01" 99 #define IQK_VER_8197F "0x1d" 100 #define IQK_VER_8703B "0x05" 101 #define IQK_VER_8710B "0x01" 102 #define IQK_VER_8723D "0x02" 103 #define IQK_VER_8822B "0x32" 104 #define IQK_VER_8822C "0x14" 105 #define IQK_VER_8821C "0x23" 106 #define IQK_VER_8198F "0x0b" 107 #define IQK_VER_8814B "0x15" 108 #define IQK_VER_8812F "0x0c" 109 #define IQK_VER_8710C "0x0a" 110 #define IQK_VER_8197G "0x03" 111 #define IQK_VER_8723F "0x00" 112 113 114 /*LCK version*/ 115 #define LCK_VER_8188E "0x02" 116 #define LCK_VER_8192E "0x02" 117 #define LCK_VER_8192F "0x01" 118 #define LCK_VER_8723B "0x02" 119 #define LCK_VER_8812A "0x01" 120 #define LCK_VER_8821A "0x01" 121 #define LCK_VER_8814A "0x01" 122 #define LCK_VER_8188F "0x01" 123 #define LCK_VER_8197F "0x01" 124 #define LCK_VER_8703B "0x01" 125 #define LCK_VER_8710B "0x01" 126 #define LCK_VER_8723D "0x01" 127 #define LCK_VER_8822B "0x02" 128 #define LCK_VER_8822C "0x00" 129 #define LCK_VER_8821C "0x03" 130 #define LCK_VER_8814B "0x02" 131 #define LCK_VER_8195B "0x02" 132 #define LCK_VER_8710C "0x02" 133 #define LCK_VER_8197G "0x01" 134 #define LCK_VER_8198F "0x01" 135 136 /*power tracking version*/ 137 #define PWRTRK_VER_8188E "0x01" 138 #define PWRTRK_VER_8192E "0x01" 139 #define PWRTRK_VER_8192F "0x01" 140 #define PWRTRK_VER_8723B "0x01" 141 #define PWRTRK_VER_8812A "0x01" 142 #define PWRTRK_VER_8821A "0x01" 143 #define PWRTRK_VER_8814A "0x01" 144 #define PWRTRK_VER_8188F "0x01" 145 #define PWRTRK_VER_8197F "0x01" 146 #define PWRTRK_VER_8703B "0x01" 147 #define PWRTRK_VER_8710B "0x01" 148 #define PWRTRK_VER_8723D "0x01" 149 #define PWRTRK_VER_8822B "0x01" 150 #define PWRTRK_VER_8822C "0x00" 151 #define PWRTRK_VER_8821C "0x01" 152 #define PWRTRK_VER_8814B "0x00" 153 #define PWRTRK_VER_8197G "0x00" 154 155 /*DPK version*/ 156 #define DPK_VER_8188E "NONE" 157 #define DPK_VER_8192E "NONE" 158 #define DPK_VER_8723B "NONE" 159 #define DPK_VER_8812A "NONE" 160 #define DPK_VER_8821A "NONE" 161 #define DPK_VER_8814A "NONE" 162 #define DPK_VER_8188F "NONE" 163 #define DPK_VER_8197F "0x08" 164 #define DPK_VER_8703B "NONE" 165 #define DPK_VER_8710B "NONE" 166 #define DPK_VER_8723D "NONE" 167 #define DPK_VER_8822B "NONE" 168 #define DPK_VER_8822C "0x20" 169 #define DPK_VER_8821C "NONE" 170 #define DPK_VER_8192F "0x11" 171 #define DPK_VER_8198F "0x0e" 172 #define DPK_VER_8814B "0x0f" 173 #define DPK_VER_8195B "0x0c" 174 #define DPK_VER_8812F "0x0a" 175 #define DPK_VER_8197G "0x09" 176 177 /*RFK_INIT version*/ 178 #define RFK_INIT_VER_8822B "0x8" 179 #define RFK_INIT_VER_8822C "0x8" 180 #define RFK_INIT_VER_8195B "0x1" 181 #define RFK_INIT_VER_8198F "0x8" 182 #define RFK_INIT_VER_8814B "0xa" 183 #define RFK_INIT_VER_8812F "0x4" 184 #define RFK_INIT_VER_8197G "0x4" 185 186 /*DACK version*/ 187 #define DACK_VER_8822C "0xa" 188 #define DACK_VER_8814B "0x4" 189 190 /*TXGAPK version*/ 191 #define TXGAPK_VER_8814B "0x1" 192 #define TXGAPK_VER_8195B "0x2" 193 194 /*Kfree tracking version*/ 195 #define KFREE_VER_8188E \ 196 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 197 #define KFREE_VER_8192E \ 198 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 199 #define KFREE_VER_8192F \ 200 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 201 #define KFREE_VER_8723B \ 202 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 203 #define KFREE_VER_8812A \ 204 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 205 #define KFREE_VER_8821A \ 206 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 207 #define KFREE_VER_8814A \ 208 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 209 #define KFREE_VER_8188F \ 210 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 211 #define KFREE_VER_8197F \ 212 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 213 #define KFREE_VER_8703B \ 214 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 215 #define KFREE_VER_8710B \ 216 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 217 #define KFREE_VER_8723D \ 218 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 219 #define KFREE_VER_8822B \ 220 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 221 #define KFREE_VER_8822C \ 222 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 223 #define KFREE_VER_8821C \ 224 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 225 #define KFREE_VER_8814B \ 226 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 227 #define KFREE_VER_8197G \ 228 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 229 230 #define TSSI_VER_8812F "0x1" 231 #define TSSI_VER_8822C "0x1" 232 #define TSSI_VER_8821C "0x1" 233 #define TSSI_VER_8814B "0x1" 234 #define TSSI_VER_8197G "0x1" 235 #define TSSI_VER_8723F "0x1" 236 237 /*PA Bias Calibration version*/ 238 #define PABIASK_VER_8188E \ 239 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 240 #define PABIASK_VER_8192E \ 241 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 242 #define PABIASK_VER_8192F \ 243 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 244 #define PABIASK_VER_8723B \ 245 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 246 #define PABIASK_VER_8812A \ 247 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 248 #define PABIASK_VER_8821A \ 249 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 250 #define PABIASK_VER_8814A \ 251 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 252 #define PABIASK_VER_8188F \ 253 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 254 #define PABIASK_VER_8197F \ 255 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 256 #define PABIASK_VER_8703B \ 257 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 258 #define PABIASK_VER_8710B \ 259 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 260 #define PABIASK_VER_8723D \ 261 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 262 #define PABIASK_VER_8822B \ 263 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 264 #define PABIASK_VER_8822C \ 265 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 266 #define PABIASK_VER_8821C \ 267 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 268 #define PABIASK_VER_8814B \ 269 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 270 #define PABIASK_VER_8197G \ 271 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 272 273 #define HALRF_IQK_VER \ 274 (dm->support_ic_type == ODM_RTL8188E) ? IQK_VER_8188E : \ 275 (dm->support_ic_type == ODM_RTL8192E) ? IQK_VER_8192E : \ 276 (dm->support_ic_type == ODM_RTL8192F) ? IQK_VER_8192F : \ 277 (dm->support_ic_type == ODM_RTL8723B) ? IQK_VER_8723B : \ 278 (dm->support_ic_type == ODM_RTL8812) ? IQK_VER_8812A : \ 279 (dm->support_ic_type == ODM_RTL8821) ? IQK_VER_8821A : \ 280 (dm->support_ic_type == ODM_RTL8814A) ? IQK_VER_8814A : \ 281 (dm->support_ic_type == ODM_RTL8188F) ? IQK_VER_8188F : \ 282 (dm->support_ic_type == ODM_RTL8197F) ? IQK_VER_8197F : \ 283 (dm->support_ic_type == ODM_RTL8703B) ? IQK_VER_8703B : \ 284 (dm->support_ic_type == ODM_RTL8710B) ? IQK_VER_8710B : \ 285 (dm->support_ic_type == ODM_RTL8723D) ? IQK_VER_8723D : \ 286 (dm->support_ic_type == ODM_RTL8822B) ? IQK_VER_8822B : \ 287 (dm->support_ic_type == ODM_RTL8822C) ? IQK_VER_8822C : \ 288 (dm->support_ic_type == ODM_RTL8821C) ? IQK_VER_8821C : \ 289 (dm->support_ic_type == ODM_RTL8814B) ? IQK_VER_8814B : \ 290 (dm->support_ic_type == ODM_RTL8710C) ? IQK_VER_8710C : \ 291 (dm->support_ic_type == ODM_RTL8723F) ? IQK_VER_8723F : \ 292 (dm->support_ic_type == ODM_RTL8197G) ? IQK_VER_8197G : "unknown" 293 294 #define HALRF_LCK_VER \ 295 (dm->support_ic_type == ODM_RTL8188E) ? LCK_VER_8188E : \ 296 (dm->support_ic_type == ODM_RTL8192E) ? LCK_VER_8192E : \ 297 (dm->support_ic_type == ODM_RTL8192F) ? LCK_VER_8192F : \ 298 (dm->support_ic_type == ODM_RTL8723B) ? LCK_VER_8723B : \ 299 (dm->support_ic_type == ODM_RTL8812) ? LCK_VER_8812A : \ 300 (dm->support_ic_type == ODM_RTL8821) ? LCK_VER_8821A : \ 301 (dm->support_ic_type == ODM_RTL8814A) ? LCK_VER_8814A : \ 302 (dm->support_ic_type == ODM_RTL8188F) ? LCK_VER_8188F : \ 303 (dm->support_ic_type == ODM_RTL8197F) ? LCK_VER_8197F : \ 304 (dm->support_ic_type == ODM_RTL8703B) ? LCK_VER_8703B : \ 305 (dm->support_ic_type == ODM_RTL8710B) ? LCK_VER_8710B : \ 306 (dm->support_ic_type == ODM_RTL8723D) ? LCK_VER_8723D : \ 307 (dm->support_ic_type == ODM_RTL8822B) ? LCK_VER_8822B : \ 308 (dm->support_ic_type == ODM_RTL8822C) ? LCK_VER_8822C : \ 309 (dm->support_ic_type == ODM_RTL8821C) ? LCK_VER_8821C : \ 310 (dm->support_ic_type == ODM_RTL8814B) ? LCK_VER_8814B : \ 311 (dm->support_ic_type == ODM_RTL8710C) ? LCK_VER_8710C : \ 312 (dm->support_ic_type == ODM_RTL8710C) ? LCK_VER_8710C : "unknown" 313 #define HALRF_POWRTRACKING_VER \ 314 (dm->support_ic_type == ODM_RTL8188E) ? PWRTRK_VER_8188E : \ 315 (dm->support_ic_type == ODM_RTL8192E) ? PWRTRK_VER_8192E : \ 316 (dm->support_ic_type == ODM_RTL8192F) ? PWRTRK_VER_8192F : \ 317 (dm->support_ic_type == ODM_RTL8723B) ? PWRTRK_VER_8723B : \ 318 (dm->support_ic_type == ODM_RTL8812) ? PWRTRK_VER_8812A : \ 319 (dm->support_ic_type == ODM_RTL8821) ? PWRTRK_VER_8821A : \ 320 (dm->support_ic_type == ODM_RTL8814A) ? PWRTRK_VER_8814A : \ 321 (dm->support_ic_type == ODM_RTL8188F) ? PWRTRK_VER_8188F : \ 322 (dm->support_ic_type == ODM_RTL8197F) ? PWRTRK_VER_8197F : \ 323 (dm->support_ic_type == ODM_RTL8703B) ? PWRTRK_VER_8703B : \ 324 (dm->support_ic_type == ODM_RTL8710B) ? PWRTRK_VER_8710B : \ 325 (dm->support_ic_type == ODM_RTL8723D) ? PWRTRK_VER_8723D : \ 326 (dm->support_ic_type == ODM_RTL8822B) ? PWRTRK_VER_8822B : \ 327 (dm->support_ic_type == ODM_RTL8822C) ? PWRTRK_VER_8822C : \ 328 (dm->support_ic_type == ODM_RTL8821C) ? PWRTRK_VER_8821C : \ 329 (dm->support_ic_type == ODM_RTL8197G) ? PWRTRK_VER_8197G : "unknown" 330 331 #define HALRF_DPK_VER \ 332 (dm->support_ic_type == ODM_RTL8188E) ? DPK_VER_8188E : \ 333 (dm->support_ic_type == ODM_RTL8192E) ? DPK_VER_8192E : \ 334 (dm->support_ic_type == ODM_RTL8192F) ? DPK_VER_8192F : \ 335 (dm->support_ic_type == ODM_RTL8723B) ? DPK_VER_8723B : \ 336 (dm->support_ic_type == ODM_RTL8812) ? DPK_VER_8812A : \ 337 (dm->support_ic_type == ODM_RTL8821) ? DPK_VER_8821A : \ 338 (dm->support_ic_type == ODM_RTL8814A) ? DPK_VER_8814A : \ 339 (dm->support_ic_type == ODM_RTL8188F) ? DPK_VER_8188F : \ 340 (dm->support_ic_type == ODM_RTL8197F) ? DPK_VER_8197F : \ 341 (dm->support_ic_type == ODM_RTL8198F) ? DPK_VER_8198F : \ 342 (dm->support_ic_type == ODM_RTL8703B) ? DPK_VER_8703B : \ 343 (dm->support_ic_type == ODM_RTL8710B) ? DPK_VER_8710B : \ 344 (dm->support_ic_type == ODM_RTL8723D) ? DPK_VER_8723D : \ 345 (dm->support_ic_type == ODM_RTL8822B) ? DPK_VER_8822B : \ 346 (dm->support_ic_type == ODM_RTL8822C) ? DPK_VER_8822C : \ 347 (dm->support_ic_type == ODM_RTL8812F) ? DPK_VER_8812F : \ 348 (dm->support_ic_type == ODM_RTL8821C) ? DPK_VER_8821C : \ 349 (dm->support_ic_type == ODM_RTL8814B) ? DPK_VER_8814B : \ 350 (dm->support_ic_type == ODM_RTL8197G) ? DPK_VER_8197G : "unknown" 351 352 #define HALRF_KFREE_VER \ 353 (dm->support_ic_type == ODM_RTL8188E) ? KFREE_VER_8188E : \ 354 (dm->support_ic_type == ODM_RTL8192E) ? KFREE_VER_8192E : \ 355 (dm->support_ic_type == ODM_RTL8192F) ? KFREE_VER_8192F : \ 356 (dm->support_ic_type == ODM_RTL8723B) ? KFREE_VER_8723B : \ 357 (dm->support_ic_type == ODM_RTL8812) ? KFREE_VER_8812A : \ 358 (dm->support_ic_type == ODM_RTL8821) ? KFREE_VER_8821A : \ 359 (dm->support_ic_type == ODM_RTL8814A) ? KFREE_VER_8814A : \ 360 (dm->support_ic_type == ODM_RTL8188F) ? KFREE_VER_8188F : \ 361 (dm->support_ic_type == ODM_RTL8197F) ? KFREE_VER_8197F : \ 362 (dm->support_ic_type == ODM_RTL8703B) ? KFREE_VER_8703B : \ 363 (dm->support_ic_type == ODM_RTL8710B) ? KFREE_VER_8710B : \ 364 (dm->support_ic_type == ODM_RTL8723D) ? KFREE_VER_8723D : \ 365 (dm->support_ic_type == ODM_RTL8822B) ? KFREE_VER_8822B : \ 366 (dm->support_ic_type == ODM_RTL8822C) ? KFREE_VER_8822C : \ 367 (dm->support_ic_type == ODM_RTL8821C) ? KFREE_VER_8821C : \ 368 (dm->support_ic_type == ODM_RTL8814B) ? KFREE_VER_8814B : \ 369 (dm->support_ic_type == ODM_RTL8197G) ? KFREE_VER_8197G : "unknown" 370 371 #define HALRF_TSSI_VER \ 372 (dm->support_ic_type == ODM_RTL8812F) ? TSSI_VER_8812F : \ 373 (dm->support_ic_type == ODM_RTL8822C) ? TSSI_VER_8822C : \ 374 (dm->support_ic_type == ODM_RTL8821C) ? TSSI_VER_8821C : \ 375 (dm->support_ic_type == ODM_RTL8814B) ? TSSI_VER_8814B : \ 376 (dm->support_ic_type == ODM_RTL8197G) ? TSSI_VER_8197G : \ 377 (dm->support_ic_type == ODM_RTL8723F) ? TSSI_VER_8723F : "unknown" 378 379 #define HALRF_PABIASK_VER \ 380 (dm->support_ic_type == ODM_RTL8188E) ? PABIASK_VER_8188E : \ 381 (dm->support_ic_type == ODM_RTL8192E) ? PABIASK_VER_8192E : \ 382 (dm->support_ic_type == ODM_RTL8192F) ? PABIASK_VER_8192F : \ 383 (dm->support_ic_type == ODM_RTL8723B) ? PABIASK_VER_8723B : \ 384 (dm->support_ic_type == ODM_RTL8812) ? PABIASK_VER_8812A : \ 385 (dm->support_ic_type == ODM_RTL8821) ? PABIASK_VER_8821A : \ 386 (dm->support_ic_type == ODM_RTL8814A) ? PABIASK_VER_8814A : \ 387 (dm->support_ic_type == ODM_RTL8188F) ? PABIASK_VER_8188F : \ 388 (dm->support_ic_type == ODM_RTL8197F) ? PABIASK_VER_8197F : \ 389 (dm->support_ic_type == ODM_RTL8703B) ? PABIASK_VER_8703B : \ 390 (dm->support_ic_type == ODM_RTL8710B) ? PABIASK_VER_8710B : \ 391 (dm->support_ic_type == ODM_RTL8723D) ? PABIASK_VER_8723D : \ 392 (dm->support_ic_type == ODM_RTL8822B) ? PABIASK_VER_8822B : \ 393 (dm->support_ic_type == ODM_RTL8822C) ? PABIASK_VER_8822C : \ 394 (dm->support_ic_type == ODM_RTL8821C) ? PABIASK_VER_8821C : \ 395 (dm->support_ic_type == ODM_RTL8814B) ? PABIASK_VER_8814B : \ 396 (dm->support_ic_type == ODM_RTL8197G) ? PABIASK_VER_8197G : "unknown" 397 398 #define HALRF_RFK_INIT_VER \ 399 (dm->support_ic_type == ODM_RTL8822B) ? RFK_INIT_VER_8822B : \ 400 (dm->support_ic_type == ODM_RTL8822C) ? RFK_INIT_VER_8822C : \ 401 (dm->support_ic_type == ODM_RTL8812F) ? RFK_INIT_VER_8812F : \ 402 (dm->support_ic_type == ODM_RTL8198F) ? RFK_INIT_VER_8198F : \ 403 (dm->support_ic_type == ODM_RTL8814B) ? RFK_INIT_VER_8814B : \ 404 (dm->support_ic_type == ODM_RTL8197G) ? RFK_INIT_VER_8197G : "unknown" 405 406 #define HALRF_DACK_VER \ 407 (dm->support_ic_type == ODM_RTL8822C) ? DACK_VER_8822C : \ 408 (dm->support_ic_type == ODM_RTL8814B) ? DACK_VER_8814B : "unknown" 409 410 #define IQK_THRESHOLD 8 411 #define DPK_THRESHOLD 4 412 #define HALRF_ABS(a,b) ((a>b) ? (a-b) : (b-a)) 413 #define SN 100 414 415 #define CCK_TSSI_NUM 6 416 #define OFDM_2G_TSSI_NUM 5 417 #define OFDM_5G_TSSI_NUM 14 418 419 420 421 /*@===========================================================*/ 422 /*AGC RX High Power mode*/ 423 /*@===========================================================*/ 424 #define lna_low_gain_1 0x64 425 #define lna_low_gain_2 0x5A 426 #define lna_low_gain_3 0x58 427 428 /*@============================================================*/ 429 /*@ enumeration */ 430 /*@============================================================*/ 431 432 enum halrf_func_idx { /*F_XXX = PHYDM XXX function*/ 433 RF00_PWR_TRK = 0, /*Pow_trk, TSSI_trk*/ 434 RF01_IQK = 1, /*LOK, IQK*/ 435 RF02_LCK = 2, 436 RF03_DPK = 3, 437 RF04_TXGAPK = 4, 438 RF05_DACK = 5, 439 RF06_DPK_TRK = 6, 440 RF07_2GBAND_SHIFT = 7, 441 RF08_RXDCK = 8, 442 RF09_RFK = 9 443 }; 444 445 enum halrf_ability { 446 HAL_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK), 447 HAL_RF_IQK = BIT(RF01_IQK), 448 HAL_RF_LCK = BIT(RF02_LCK), 449 HAL_RF_DPK = BIT(RF03_DPK), 450 HAL_RF_TXGAPK = BIT(RF04_TXGAPK), 451 HAL_RF_DACK = BIT(RF05_DACK), 452 HAL_RF_DPK_TRACK = BIT(RF06_DPK_TRK), 453 HAL_2GBAND_SHIFT = BIT(RF07_2GBAND_SHIFT), 454 HAL_RF_RXDCK = BIT(RF08_RXDCK) 455 }; 456 457 enum halrf_shift_band { 458 HAL_RF_2P4 = 0, 459 HAL_RF_2P3 = 1, 460 HAL_RF_2P5 = 2 461 }; 462 463 enum halrf_dbg_comp { 464 DBG_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK), 465 DBG_RF_IQK = BIT(RF01_IQK), 466 DBG_RF_LCK = BIT(RF02_LCK), 467 DBG_RF_DPK = BIT(RF03_DPK), 468 DBG_RF_TXGAPK = BIT(RF04_TXGAPK), 469 DBG_RF_DACK = BIT(RF05_DACK), 470 DBG_RF_DPK_TRACK = BIT(RF06_DPK_TRK), 471 DBG_RF_RFK = BIT(RF09_RFK), 472 DBG_RF_MP = BIT(29), 473 DBG_RF_TMP = BIT(30), 474 DBG_RF_INIT = BIT(31) 475 }; 476 477 enum halrf_cmninfo_init { 478 HALRF_CMNINFO_ABILITY = 0, 479 HALRF_CMNINFO_DPK_EN = 1, 480 HALRF_CMNINFO_EEPROM_THERMAL_VALUE, 481 HALRF_CMNINFO_RFK_FORBIDDEN, 482 HALRF_CMNINFO_IQK_SEGMENT, 483 HALRF_CMNINFO_RATE_INDEX, 484 HALRF_CMNINFO_PWT_TYPE, 485 HALRF_CMNINFO_MP_PSD_POINT, 486 HALRF_CMNINFO_MP_PSD_START_POINT, 487 HALRF_CMNINFO_MP_PSD_STOP_POINT, 488 HALRF_CMNINFO_MP_PSD_AVERAGE, 489 HALRF_CMNINFO_IQK_TIMES, 490 HALRF_CMNINFO_MP_POWER_TRACKING_TYPE, 491 HALRF_CMNINFO_POWER_TRACK_CONTROL 492 }; 493 494 enum halrf_cmninfo_hook { 495 HALRF_CMNINFO_CON_TX, 496 HALRF_CMNINFO_SINGLE_TONE, 497 HALRF_CMNINFO_CARRIER_SUPPRESSION, 498 HALRF_CMNINFO_MP_RATE_INDEX, 499 HALRF_CMNINFO_MANUAL_RF_SUPPORTABILITY 500 }; 501 502 enum halrf_lna_set { 503 HALRF_LNA_DISABLE = 0, 504 HALRF_LNA_ENABLE = 1, 505 }; 506 507 enum halrf_k_segment_time { 508 SEGMENT_FREE = 0, 509 SEGMENT_10MS = 10, /*10ms*/ 510 SEGMENT_30MS = 30, /*30ms*/ 511 SEGMENT_50MS = 50, /*50ms*/ 512 }; 513 514 #define POWER_INDEX_DIFF 4 515 #define TSSI_TXAGC_DIFF 2 516 517 #define TSSI_CODE_NUM 84 518 519 #define TSSI_SLOPE_2G 8 520 #define TSSI_SLOPE_5G 5 521 522 #define TSSI_EFUSE_NUM 25 523 #define TSSI_EFUSE_KFREE_NUM 4 524 #define TSSI_DE_DIFF_EFUSE_NUM 10 525 526 struct _halrf_tssi_data { 527 s32 cck_offset_patha; 528 s32 cck_offset_pathb; 529 s32 tssi_trk_txagc_offset[PHYDM_MAX_RF_PATH]; 530 s32 delta_tssi_txagc_offset[PHYDM_MAX_RF_PATH]; 531 s16 txagc_codeword[TSSI_CODE_NUM]; 532 u16 tssi_codeword[TSSI_CODE_NUM]; 533 s8 tssi_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_NUM]; 534 s8 tssi_de_diff_efuse[PHYDM_MAX_RF_PATH][TSSI_DE_DIFF_EFUSE_NUM]; 535 s8 tssi_kfree_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_KFREE_NUM]; 536 u8 thermal[PHYDM_MAX_RF_PATH]; 537 u32 index[PHYDM_MAX_RF_PATH][14]; 538 u8 do_tssi; 539 u8 get_thermal; 540 u8 tssi_finish_bit[PHYDM_MAX_RF_PATH]; 541 u8 thermal_trigger; 542 s8 tssi_de; 543 }; 544 545 struct _halrf_txgapk_info { 546 u32 txgapk_rf3f_bp[5][12][PHYDM_MAX_RF_PATH]; /* band(2Gcck/2GOFDM/5GL/5GM/5GH)/idx/path */ 547 boolean txgapk_bp_done; 548 s8 offset[12][PHYDM_MAX_RF_PATH]; 549 s8 fianl_offset[12][PHYDM_MAX_RF_PATH]; 550 u8 read_txgain; 551 }; 552 553 554 /*@============================================================*/ 555 /*@ structure */ 556 /*@============================================================*/ 557 558 struct _hal_rf_ { 559 /*hook*/ 560 u8 *test1; 561 562 /*update*/ 563 u32 rf_supportability; 564 u8 rf_shift_band; 565 /*u32 halrf_tssi_data;*/ 566 567 u8 eeprom_thermal; 568 u8 dpk_en; /*Enable Function DPK OFF/ON = 0/1*/ 569 boolean dpk_done; 570 u64 dpk_progressing_time; 571 u64 iqk_progressing_time; 572 u32 fw_ver; 573 574 boolean *is_con_tx; 575 boolean *is_single_tone; 576 boolean *is_carrier_suppresion; 577 boolean is_dpk_in_progress; 578 boolean is_tssi_in_progress; 579 boolean is_bt_iqk_timeout; 580 boolean is_rfk_h2c_timeout; 581 boolean aac_checked; 582 boolean is_txgapk_in_progress; 583 584 u8 *mp_rate_index; 585 u32 *manual_rf_supportability; 586 u32 p_rate_index; 587 u8 pwt_type; 588 u32 rf_dbg_comp; 589 u8 rfk_type; 590 u32 gnt_control; 591 592 u8 ext_lna; /*@with 2G external LNA NO/Yes = 0/1*/ 593 u8 ext_lna_5g; /*@with 5G external LNA NO/Yes = 0/1*/ 594 u8 ext_pa; /*@with 2G external PNA NO/Yes = 0/1*/ 595 u8 ext_pa_5g; /*@with 5G external PNA NO/Yes = 0/1*/ 596 #if !(DM_ODM_SUPPORT_TYPE & ODM_IOT) 597 struct _halrf_psd_data halrf_psd_data; 598 struct _halrf_tssi_data halrf_tssi_data; 599 #endif 600 struct _halrf_txgapk_info halrf_txgapk_info; 601 u8 power_track_type; 602 u8 mp_pwt_type; 603 u8 pre_band_type; 604 }; 605 606 /*@============================================================*/ 607 /*@ function prototype */ 608 /*@============================================================*/ 609 610 #if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ 611 RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ 612 RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ 613 RTL8812F_SUPPORT == 1 || RTL8710C_SUPPORT == 1 ||\ 614 RTL8197G_SUPPORT == 1) 615 void halrf_iqk_info_dump(void *dm_void, u32 *_used, char *output, 616 u32 *_out_len); 617 618 void halrf_iqk_hwtx_check(void *dm_void, boolean is_check); 619 #endif 620 621 u8 halrf_match_iqk_version(void *dm_void); 622 623 void halrf_support_ability_debug(void *dm_void, char input[][16], u32 *_used, 624 char *output, u32 *_out_len); 625 #ifdef CONFIG_2G_BAND_SHIFT 626 void halrf_support_band_shift_debug(void *dm_void, char input[][16], u32 *_used, 627 char *output, u32 *_out_len); 628 #endif 629 void halrf_cmn_info_init(void *dm_void, enum halrf_cmninfo_init cmn_info, 630 u32 value); 631 632 void halrf_cmn_info_hook(void *dm_void, enum halrf_cmninfo_hook cmn_info, 633 void *value); 634 635 void halrf_cmn_info_set(void *dm_void, u32 cmn_info, u64 value); 636 637 u64 halrf_cmn_info_get(void *dm_void, u32 cmn_info); 638 639 void halrf_watchdog(void *dm_void); 640 641 void halrf_supportability_init(void *dm_void); 642 643 void halrf_init(void *dm_void); 644 645 void halrf_iqk_trigger(void *dm_void, boolean is_recovery); 646 647 void halrf_rfk_handshake(void *dm_void, boolean is_before_k); 648 649 void halrf_rf_k_connect_trigger(void *dm_void, boolean is_recovery, 650 enum halrf_k_segment_time seg_time); 651 652 void halrf_segment_iqk_trigger(void *dm_void, boolean clear, 653 boolean segment_iqk); 654 655 void halrf_lck_trigger(void *dm_void); 656 657 void halrf_iqk_debug(void *dm_void, u32 *const dm_value, u32 *_used, 658 char *output, u32 *_out_len); 659 660 void phydm_get_iqk_cfir(void *dm_void, u8 idx, u8 path, boolean debug); 661 662 void halrf_iqk_xym_read(void *dm_void, u8 path, u8 xym_type); 663 664 void halrf_rf_lna_setting(void *dm_void, enum halrf_lna_set type); 665 666 void halrf_do_imr_test(void *dm_void, u8 data); 667 668 u32 halrf_psd_log2base(u32 val); 669 670 void halrf_dpk_trigger(void *dm_void); 671 672 void halrf_txgapk_trigger(void *dm_void); 673 674 u8 halrf_dpk_result_check(void *dm_void); 675 676 void halrf_dpk_sram_read(void *dm_void); 677 678 void halrf_dpk_enable_disable(void *dm_void); 679 680 void halrf_dpk_track(void *dm_void); 681 682 void halrf_dpk_reload(void *dm_void); 683 684 void halrf_dpk_switch(void *dm_void, u8 enable); 685 686 void halrf_dpk_debug_cmd(void *dm_void, char input[][16], u32 *_used, 687 char *output, u32 *_out_len); 688 689 void halrf_dpk_c2h_report_transfer(void *dm_void, boolean is_ok, u8 *buf, u8 buf_size); 690 691 void halrf_dpk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size); 692 693 /*Global function*/ 694 695 void halrf_reload_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num); 696 697 void halrf_reload_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, 698 u8 ss); 699 700 void halrf_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num); 701 702 void halrf_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, u8 ss); 703 704 void halrf_mode(void *dm_void, u32 *i_value, u32 *q_value); 705 706 boolean halrf_compare(void *dm_void, u32 value); 707 708 u32 halrf_delta(void *dm_void, u32 v1, u32 v2); 709 710 void halrf_minmax_compare(void *dm_void, u32 value, u32 *min, u32 *max); 711 712 void halrf_b_sort(void *dm_void, u32 *iv, u32 *qv); 713 714 void halrf_bubble(void *dm_void, u32 *v1, u32 *v2); 715 716 void halrf_swap(void *dm_void, u32 *v1, u32 *v2); 717 718 enum hal_status 719 halrf_config_rfk_with_header_file(void *dm_void, u32 config_type); 720 721 #if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ 722 RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ 723 RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ 724 RTL8812F_SUPPORT == 1 || RTL8710C_SUPPORT == 1 ||\ 725 RTL8197G_SUPPORT == 1) 726 void halrf_iqk_dbg(void *dm_void); 727 #endif 728 729 void halrf_tssi_get_efuse(void *dm_void); 730 731 void halrf_do_tssi(void *dm_void); 732 733 void halrf_set_tssi_enable(void *dm_void, boolean enable); 734 735 void halrf_do_thermal(void *dm_void); 736 737 u32 halrf_set_tssi_value(void *dm_void, u32 tssi_value); 738 739 void halrf_set_tssi_power(void *dm_void, s8 power); 740 741 void halrf_tssi_set_de_for_tx_verify(void *dm_void, u32 tssi_de, u8 path); 742 743 u32 halrf_query_tssi_value(void *dm_void); 744 745 void halrf_tssi_cck(void *dm_void); 746 747 void halrf_thermal_cck(void *dm_void); 748 749 void halrf_tssi_set_de(void *dm_void); 750 751 void halrf_tssi_dck(void *dm_void, u8 direct_do); 752 753 void halrf_calculate_tssi_codeword(void *dm_void); 754 755 void halrf_set_tssi_codeword(void *dm_void); 756 757 u8 halrf_get_tssi_codeword_for_txindex(void *dm_void); 758 759 void halrf_tssi_clean_de(void *dm_void); 760 761 u32 halrf_tssi_trigger_de(void *dm_void, u8 path); 762 763 u32 halrf_tssi_get_de(void *dm_void, u8 path); 764 765 u32 halrf_get_online_tssi_de(void *dm_void, u8 path, s32 pout); 766 767 void halrf_tssi_trigger(void *dm_void); 768 769 void halrf_txgapk_write_gain_table(void *dm_void); 770 771 void halrf_txgapk_reload_tx_gain(void *dm_void); 772 773 void halrf_txgap_enable_disable(void *dm_void, u8 enable); 774 775 void halrf_set_dpk_track(void *dm_void, u8 enable); 776 777 void halrf_set_dpkbychannel(void *dm_void, boolean dpk_by_ch); 778 779 void halrf_set_dpkenable(void *dm_void, boolean is_dpk_enable); 780 781 boolean halrf_get_dpkbychannel(void *dm_void); 782 783 boolean halrf_get_dpkenable(void *dm_void); 784 785 void _iqk_check_if_reload(void *dm_void); 786 787 void halrf_do_rxbb_dck(void *dm_void); 788 789 void config_halrf_path_adda_setting_trigger(void *dm_void); 790 791 void halrf_reload_iqk(void *dm_void, boolean reset); 792 793 void halrf_dack_dbg(void *dm_void); 794 795 void halrf_dack_trigger(void *dm_void, boolean force); 796 797 void halrf_dack_restore(void *dm_void); 798 799 void halrf_iqk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size); 800 801 void halrf_set_rfsupportability(void *dm_void); 802 803 void halrf_rxdck(void *dm_void); 804 805 void halrf_delay_10us(u16 v1); 806 807 void halrf_dump_rfk_reg(void *dm_void, char input[][16], u32 *_used, 808 char *output, u32 *_out_len); 809 810 void halrf_xtal_thermal_track(void *dm_void); 811 812 void halrf_rfk_power_save(void *dm_void, boolean is_power_save); 813 814 #endif /*__HALRF_H__*/ 815