1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 #define _RTW_RF_C_
16
17 #include <drv_types.h>
18 #include <hal_data.h>
19
20 u8 center_ch_2g[CENTER_CH_2G_NUM] = {
21 /* G00 */1, 2,
22 /* G01 */3, 4, 5,
23 /* G02 */6, 7, 8,
24 /* G03 */9, 10, 11,
25 /* G04 */12, 13,
26 /* G05 */14
27 };
28
29 #define ch_to_cch_2g_idx(ch) ((ch) - 1)
30
31 u8 center_ch_2g_40m[CENTER_CH_2G_40M_NUM] = {
32 3,
33 4,
34 5,
35 6,
36 7,
37 8,
38 9,
39 10,
40 11,
41 };
42
43 u8 op_chs_of_cch_2g_40m[CENTER_CH_2G_40M_NUM][2] = {
44 {1, 5}, /* 3 */
45 {2, 6}, /* 4 */
46 {3, 7}, /* 5 */
47 {4, 8}, /* 6 */
48 {5, 9}, /* 7 */
49 {6, 10}, /* 8 */
50 {7, 11}, /* 9 */
51 {8, 12}, /* 10 */
52 {9, 13}, /* 11 */
53 };
54
55 u8 center_ch_5g_all[CENTER_CH_5G_ALL_NUM] = {
56 /* G00 */36, 38, 40,
57 42,
58 /* G01 */44, 46, 48,
59 /* 50, */
60 /* G02 */52, 54, 56,
61 58,
62 /* G03 */60, 62, 64,
63 /* G04 */100, 102, 104,
64 106,
65 /* G05 */108, 110, 112,
66 /* 114, */
67 /* G06 */116, 118, 120,
68 122,
69 /* G07 */124, 126, 128,
70 /* G08 */132, 134, 136,
71 138,
72 /* G09 */140, 142, 144,
73 /* G10 */149, 151, 153,
74 155,
75 /* G11 */157, 159, 161,
76 /* 163, */
77 /* G12 */165, 167, 169,
78 171,
79 /* G13 */173, 175, 177
80 };
81
82 u8 center_ch_5g_20m[CENTER_CH_5G_20M_NUM] = {
83 /* G00 */36, 40,
84 /* G01 */44, 48,
85 /* G02 */52, 56,
86 /* G03 */60, 64,
87 /* G04 */100, 104,
88 /* G05 */108, 112,
89 /* G06 */116, 120,
90 /* G07 */124, 128,
91 /* G08 */132, 136,
92 /* G09 */140, 144,
93 /* G10 */149, 153,
94 /* G11 */157, 161,
95 /* G12 */165, 169,
96 /* G13 */173, 177
97 };
98
99 #define ch_to_cch_5g_20m_idx(ch) \
100 ( \
101 ((ch) >= 36 && (ch) <= 64) ? (((ch) - 36) >> 2) : \
102 ((ch) >= 100 && (ch) <= 144) ? 8 + (((ch) - 100) >> 2) : \
103 ((ch) >= 149 && (ch) <= 177) ? 20 + (((ch) - 149) >> 2) : 255 \
104 )
105
106 u8 center_ch_5g_40m[CENTER_CH_5G_40M_NUM] = {
107 /* G00 */38,
108 /* G01 */46,
109 /* G02 */54,
110 /* G03 */62,
111 /* G04 */102,
112 /* G05 */110,
113 /* G06 */118,
114 /* G07 */126,
115 /* G08 */134,
116 /* G09 */142,
117 /* G10 */151,
118 /* G11 */159,
119 /* G12 */167,
120 /* G13 */175
121 };
122
123 u8 center_ch_5g_20m_40m[CENTER_CH_5G_20M_NUM + CENTER_CH_5G_40M_NUM] = {
124 /* G00 */36, 38, 40,
125 /* G01 */44, 46, 48,
126 /* G02 */52, 54, 56,
127 /* G03 */60, 62, 64,
128 /* G04 */100, 102, 104,
129 /* G05 */108, 110, 112,
130 /* G06 */116, 118, 120,
131 /* G07 */124, 126, 128,
132 /* G08 */132, 134, 136,
133 /* G09 */140, 142, 144,
134 /* G10 */149, 151, 153,
135 /* G11 */157, 159, 161,
136 /* G12 */165, 167, 169,
137 /* G13 */173, 175, 177
138 };
139
140 u8 op_chs_of_cch_5g_40m[CENTER_CH_5G_40M_NUM][2] = {
141 {36, 40}, /* 38 */
142 {44, 48}, /* 46 */
143 {52, 56}, /* 54 */
144 {60, 64}, /* 62 */
145 {100, 104}, /* 102 */
146 {108, 112}, /* 110 */
147 {116, 120}, /* 118 */
148 {124, 128}, /* 126 */
149 {132, 136}, /* 134 */
150 {140, 144}, /* 142 */
151 {149, 153}, /* 151 */
152 {157, 161}, /* 159 */
153 {165, 169}, /* 167 */
154 {173, 177}, /* 175 */
155 };
156
157 u8 center_ch_5g_80m[CENTER_CH_5G_80M_NUM] = {
158 /* G00 ~ G01*/42,
159 /* G02 ~ G03*/58,
160 /* G04 ~ G05*/106,
161 /* G06 ~ G07*/122,
162 /* G08 ~ G09*/138,
163 /* G10 ~ G11*/155,
164 /* G12 ~ G13*/171
165 };
166
167 u8 op_chs_of_cch_5g_80m[CENTER_CH_5G_80M_NUM][4] = {
168 {36, 40, 44, 48}, /* 42 */
169 {52, 56, 60, 64}, /* 58 */
170 {100, 104, 108, 112}, /* 106 */
171 {116, 120, 124, 128}, /* 122 */
172 {132, 136, 140, 144}, /* 138 */
173 {149, 153, 157, 161}, /* 155 */
174 {165, 169, 173, 177}, /* 171 */
175 };
176
177 u8 center_ch_5g_160m[CENTER_CH_5G_160M_NUM] = {
178 /* G00 ~ G03*/50,
179 /* G04 ~ G07*/114,
180 /* G10 ~ G13*/163
181 };
182
183 u8 op_chs_of_cch_5g_160m[CENTER_CH_5G_160M_NUM][8] = {
184 {36, 40, 44, 48, 52, 56, 60, 64}, /* 50 */
185 {100, 104, 108, 112, 116, 120, 124, 128}, /* 114 */
186 {149, 153, 157, 161, 165, 169, 173, 177}, /* 163 */
187 };
188
189 struct center_chs_ent_t {
190 u8 ch_num;
191 u8 *chs;
192 };
193
194 struct center_chs_ent_t center_chs_2g_by_bw[] = {
195 {CENTER_CH_2G_NUM, center_ch_2g},
196 {CENTER_CH_2G_40M_NUM, center_ch_2g_40m},
197 };
198
199 struct center_chs_ent_t center_chs_5g_by_bw[] = {
200 {CENTER_CH_5G_20M_NUM, center_ch_5g_20m},
201 {CENTER_CH_5G_40M_NUM, center_ch_5g_40m},
202 {CENTER_CH_5G_80M_NUM, center_ch_5g_80m},
203 {CENTER_CH_5G_160M_NUM, center_ch_5g_160m},
204 };
205
206 /*
207 * Get center channel of smaller bandwidth by @param cch, @param bw, @param offset
208 * @cch: the given center channel
209 * @bw: the given bandwidth
210 * @offset: the given primary SC offset of the given bandwidth
211 *
212 * return center channel of smaller bandiwdth if valid, or 0
213 */
rtw_get_scch_by_cch_offset(u8 cch,u8 bw,u8 offset)214 u8 rtw_get_scch_by_cch_offset(u8 cch, u8 bw, u8 offset)
215 {
216 u8 t_cch = 0;
217
218 if (bw == CHANNEL_WIDTH_20) {
219 t_cch = cch;
220 goto exit;
221 }
222
223 if (offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) {
224 rtw_warn_on(1);
225 goto exit;
226 }
227
228 /* 2.4G, 40MHz */
229 if (cch >= 3 && cch <= 11 && bw == CHANNEL_WIDTH_40) {
230 t_cch = (offset == HAL_PRIME_CHNL_OFFSET_UPPER) ? cch + 2 : cch - 2;
231 goto exit;
232 }
233
234 /* 5G, 160MHz */
235 if (cch >= 50 && cch <= 163 && bw == CHANNEL_WIDTH_160) {
236 t_cch = (offset == HAL_PRIME_CHNL_OFFSET_UPPER) ? cch + 8 : cch - 8;
237 goto exit;
238
239 /* 5G, 80MHz */
240 } else if (cch >= 42 && cch <= 171 && bw == CHANNEL_WIDTH_80) {
241 t_cch = (offset == HAL_PRIME_CHNL_OFFSET_UPPER) ? cch + 4 : cch - 4;
242 goto exit;
243
244 /* 5G, 40MHz */
245 } else if (cch >= 38 && cch <= 175 && bw == CHANNEL_WIDTH_40) {
246 t_cch = (offset == HAL_PRIME_CHNL_OFFSET_UPPER) ? cch + 2 : cch - 2;
247 goto exit;
248
249 } else {
250 rtw_warn_on(1);
251 goto exit;
252 }
253
254 exit:
255 return t_cch;
256 }
257
258 /*
259 * Get center channel of smaller bandwidth by @param cch, @param bw, @param opch
260 * @cch: the given center channel
261 * @bw: the given bandwidth
262 * @opch: the given operating channel
263 *
264 * return center channel of smaller bandiwdth if valid, or 0
265 */
rtw_get_scch_by_cch_opch(u8 cch,u8 bw,u8 opch)266 u8 rtw_get_scch_by_cch_opch(u8 cch, u8 bw, u8 opch)
267 {
268 u8 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
269
270 if (opch > cch)
271 offset = HAL_PRIME_CHNL_OFFSET_UPPER;
272 else if (opch < cch)
273 offset = HAL_PRIME_CHNL_OFFSET_LOWER;
274
275 return rtw_get_scch_by_cch_offset(cch, bw, offset);
276 }
277
278 struct op_chs_ent_t {
279 u8 ch_num;
280 u8 *chs;
281 };
282
283 struct op_chs_ent_t op_chs_of_cch_2g_by_bw[] = {
284 {1, center_ch_2g},
285 {2, (u8 *)op_chs_of_cch_2g_40m},
286 };
287
288 struct op_chs_ent_t op_chs_of_cch_5g_by_bw[] = {
289 {1, center_ch_5g_20m},
290 {2, (u8 *)op_chs_of_cch_5g_40m},
291 {4, (u8 *)op_chs_of_cch_5g_80m},
292 {8, (u8 *)op_chs_of_cch_5g_160m},
293 };
294
center_chs_2g_num(u8 bw)295 inline u8 center_chs_2g_num(u8 bw)
296 {
297 if (bw > CHANNEL_WIDTH_40)
298 return 0;
299
300 return center_chs_2g_by_bw[bw].ch_num;
301 }
302
center_chs_2g(u8 bw,u8 id)303 inline u8 center_chs_2g(u8 bw, u8 id)
304 {
305 if (bw > CHANNEL_WIDTH_40)
306 return 0;
307
308 if (id >= center_chs_2g_num(bw))
309 return 0;
310
311 return center_chs_2g_by_bw[bw].chs[id];
312 }
313
center_chs_5g_num(u8 bw)314 inline u8 center_chs_5g_num(u8 bw)
315 {
316 if (bw > CHANNEL_WIDTH_160)
317 return 0;
318
319 return center_chs_5g_by_bw[bw].ch_num;
320 }
321
center_chs_5g(u8 bw,u8 id)322 inline u8 center_chs_5g(u8 bw, u8 id)
323 {
324 if (bw > CHANNEL_WIDTH_160)
325 return 0;
326
327 if (id >= center_chs_5g_num(bw))
328 return 0;
329
330 return center_chs_5g_by_bw[bw].chs[id];
331 }
332
333 /*
334 * Get available op channels by @param cch, @param bw
335 * @cch: the given center channel
336 * @bw: the given bandwidth
337 * @op_chs: the pointer to return pointer of op channel array
338 * @op_ch_num: the pointer to return pointer of op channel number
339 *
340 * return valid (1) or not (0)
341 */
rtw_get_op_chs_by_cch_bw(u8 cch,u8 bw,u8 ** op_chs,u8 * op_ch_num)342 u8 rtw_get_op_chs_by_cch_bw(u8 cch, u8 bw, u8 **op_chs, u8 *op_ch_num)
343 {
344 int i;
345 struct center_chs_ent_t *c_chs_ent = NULL;
346 struct op_chs_ent_t *op_chs_ent = NULL;
347 u8 valid = 1;
348
349 if (cch <= 14
350 && bw <= CHANNEL_WIDTH_40
351 ) {
352 c_chs_ent = ¢er_chs_2g_by_bw[bw];
353 op_chs_ent = &op_chs_of_cch_2g_by_bw[bw];
354 } else if (cch >= 36 && cch <= 177
355 && bw <= CHANNEL_WIDTH_160
356 ) {
357 c_chs_ent = ¢er_chs_5g_by_bw[bw];
358 op_chs_ent = &op_chs_of_cch_5g_by_bw[bw];
359 } else {
360 valid = 0;
361 goto exit;
362 }
363
364 for (i = 0; i < c_chs_ent->ch_num; i++)
365 if (cch == *(c_chs_ent->chs + i))
366 break;
367
368 if (i == c_chs_ent->ch_num) {
369 valid = 0;
370 goto exit;
371 }
372
373 *op_chs = op_chs_ent->chs + op_chs_ent->ch_num * i;
374 *op_ch_num = op_chs_ent->ch_num;
375
376 exit:
377 return valid;
378 }
379
rtw_get_offset_by_chbw(u8 ch,u8 bw,u8 * r_offset)380 u8 rtw_get_offset_by_chbw(u8 ch, u8 bw, u8 *r_offset)
381 {
382 u8 valid = 1;
383 u8 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
384
385 if (bw == CHANNEL_WIDTH_20)
386 goto exit;
387
388 if (bw >= CHANNEL_WIDTH_80 && ch <= 14) {
389 valid = 0;
390 goto exit;
391 }
392
393 if (ch >= 1 && ch <= 4)
394 offset = HAL_PRIME_CHNL_OFFSET_LOWER;
395 else if (ch >= 5 && ch <= 9) {
396 if (*r_offset == HAL_PRIME_CHNL_OFFSET_LOWER || *r_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
397 offset = *r_offset; /* both lower and upper is valid, obey input value */
398 else
399 offset = HAL_PRIME_CHNL_OFFSET_UPPER; /* default use upper */
400 } else if (ch >= 10 && ch <= 13)
401 offset = HAL_PRIME_CHNL_OFFSET_UPPER;
402 else if (ch == 14) {
403 valid = 0; /* ch14 doesn't support 40MHz bandwidth */
404 goto exit;
405 } else if (ch >= 36 && ch <= 177) {
406 switch (ch) {
407 case 36:
408 case 44:
409 case 52:
410 case 60:
411 case 100:
412 case 108:
413 case 116:
414 case 124:
415 case 132:
416 case 140:
417 case 149:
418 case 157:
419 case 165:
420 case 173:
421 offset = HAL_PRIME_CHNL_OFFSET_LOWER;
422 break;
423 case 40:
424 case 48:
425 case 56:
426 case 64:
427 case 104:
428 case 112:
429 case 120:
430 case 128:
431 case 136:
432 case 144:
433 case 153:
434 case 161:
435 case 169:
436 case 177:
437 offset = HAL_PRIME_CHNL_OFFSET_UPPER;
438 break;
439 default:
440 valid = 0;
441 break;
442 }
443 } else
444 valid = 0;
445
446 exit:
447 if (valid && r_offset)
448 *r_offset = offset;
449 return valid;
450 }
451
rtw_get_center_ch(u8 ch,u8 bw,u8 offset)452 u8 rtw_get_center_ch(u8 ch, u8 bw, u8 offset)
453 {
454 u8 cch = ch;
455
456 if (bw == CHANNEL_WIDTH_160) {
457 if (ch % 4 == 0) {
458 if (ch >= 36 && ch <= 64)
459 cch = 50;
460 else if (ch >= 100 && ch <= 128)
461 cch = 114;
462 } else if (ch % 4 == 1) {
463 if (ch >= 149 && ch <= 177)
464 cch = 163;
465 }
466
467 } else if (bw == CHANNEL_WIDTH_80) {
468 if (ch <= 14)
469 cch = 7; /* special case for 2.4G */
470 else if (ch % 4 == 0) {
471 if (ch >= 36 && ch <= 48)
472 cch = 42;
473 else if (ch >= 52 && ch <= 64)
474 cch = 58;
475 else if (ch >= 100 && ch <= 112)
476 cch = 106;
477 else if (ch >= 116 && ch <= 128)
478 cch = 122;
479 else if (ch >= 132 && ch <= 144)
480 cch = 138;
481 } else if (ch % 4 == 1) {
482 if (ch >= 149 && ch <= 161)
483 cch = 155;
484 else if (ch >= 165 && ch <= 177)
485 cch = 171;
486 }
487
488 } else if (bw == CHANNEL_WIDTH_40) {
489 if (offset == HAL_PRIME_CHNL_OFFSET_LOWER)
490 cch = ch + 2;
491 else if (offset == HAL_PRIME_CHNL_OFFSET_UPPER)
492 cch = ch - 2;
493
494 } else if (bw == CHANNEL_WIDTH_20
495 || bw == CHANNEL_WIDTH_10
496 || bw == CHANNEL_WIDTH_5
497 )
498 ; /* same as ch */
499 else
500 rtw_warn_on(1);
501
502 return cch;
503 }
504
rtw_get_ch_group(u8 ch,u8 * group,u8 * cck_group)505 u8 rtw_get_ch_group(u8 ch, u8 *group, u8 *cck_group)
506 {
507 BAND_TYPE band = BAND_MAX;
508 s8 gp = -1, cck_gp = -1;
509
510 if (ch <= 14) {
511 band = BAND_ON_2_4G;
512
513 if (1 <= ch && ch <= 2)
514 gp = 0;
515 else if (3 <= ch && ch <= 5)
516 gp = 1;
517 else if (6 <= ch && ch <= 8)
518 gp = 2;
519 else if (9 <= ch && ch <= 11)
520 gp = 3;
521 else if (12 <= ch && ch <= 14)
522 gp = 4;
523 else
524 band = BAND_MAX;
525
526 if (ch == 14)
527 cck_gp = 5;
528 else
529 cck_gp = gp;
530 } else {
531 band = BAND_ON_5G;
532
533 if (36 <= ch && ch <= 42)
534 gp = 0;
535 else if (44 <= ch && ch <= 48)
536 gp = 1;
537 else if (50 <= ch && ch <= 58)
538 gp = 2;
539 else if (60 <= ch && ch <= 64)
540 gp = 3;
541 else if (100 <= ch && ch <= 106)
542 gp = 4;
543 else if (108 <= ch && ch <= 114)
544 gp = 5;
545 else if (116 <= ch && ch <= 122)
546 gp = 6;
547 else if (124 <= ch && ch <= 130)
548 gp = 7;
549 else if (132 <= ch && ch <= 138)
550 gp = 8;
551 else if (140 <= ch && ch <= 144)
552 gp = 9;
553 else if (149 <= ch && ch <= 155)
554 gp = 10;
555 else if (157 <= ch && ch <= 161)
556 gp = 11;
557 else if (165 <= ch && ch <= 171)
558 gp = 12;
559 else if (173 <= ch && ch <= 177)
560 gp = 13;
561 else
562 band = BAND_MAX;
563 }
564
565 if (band == BAND_MAX
566 || (band == BAND_ON_2_4G && cck_gp == -1)
567 || gp == -1
568 ) {
569 RTW_WARN("%s invalid channel:%u", __func__, ch);
570 rtw_warn_on(1);
571 goto exit;
572 }
573
574 if (group)
575 *group = gp;
576 if (cck_group && band == BAND_ON_2_4G)
577 *cck_group = cck_gp;
578
579 exit:
580 return band;
581 }
582
rtw_ch2freq(int chan)583 int rtw_ch2freq(int chan)
584 {
585 /* see 802.11 17.3.8.3.2 and Annex J
586 * there are overlapping channel numbers in 5GHz and 2GHz bands */
587
588 /*
589 * RTK: don't consider the overlapping channel numbers: 5G channel <= 14,
590 * because we don't support it. simply judge from channel number
591 */
592
593 if (chan >= 1 && chan <= 14) {
594 if (chan == 14)
595 return 2484;
596 else if (chan < 14)
597 return 2407 + chan * 5;
598 } else if (chan >= 36 && chan <= 177)
599 return 5000 + chan * 5;
600
601 return 0; /* not supported */
602 }
603
rtw_freq2ch(int freq)604 int rtw_freq2ch(int freq)
605 {
606 /* see 802.11 17.3.8.3.2 and Annex J */
607 if (freq == 2484)
608 return 14;
609 else if (freq < 2484)
610 return (freq - 2407) / 5;
611 else if (freq >= 4910 && freq <= 4980)
612 return (freq - 4000) / 5;
613 else if (freq <= 45000) /* DMG band lower limit */
614 return (freq - 5000) / 5;
615 else if (freq >= 58320 && freq <= 64800)
616 return (freq - 56160) / 2160;
617 else
618 return 0;
619 }
620
rtw_chbw_to_freq_range(u8 ch,u8 bw,u8 offset,u32 * hi,u32 * lo)621 bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo)
622 {
623 u8 c_ch;
624 u32 freq;
625 u32 hi_ret = 0, lo_ret = 0;
626 bool valid = _FALSE;
627
628 if (hi)
629 *hi = 0;
630 if (lo)
631 *lo = 0;
632
633 c_ch = rtw_get_center_ch(ch, bw, offset);
634 freq = rtw_ch2freq(c_ch);
635
636 if (!freq) {
637 rtw_warn_on(1);
638 goto exit;
639 }
640
641 if (bw == CHANNEL_WIDTH_160) {
642 hi_ret = freq + 80;
643 lo_ret = freq - 80;
644 } else if (bw == CHANNEL_WIDTH_80) {
645 hi_ret = freq + 40;
646 lo_ret = freq - 40;
647 } else if (bw == CHANNEL_WIDTH_40) {
648 hi_ret = freq + 20;
649 lo_ret = freq - 20;
650 } else if (bw == CHANNEL_WIDTH_20) {
651 hi_ret = freq + 10;
652 lo_ret = freq - 10;
653 } else
654 rtw_warn_on(1);
655
656 if (hi)
657 *hi = hi_ret;
658 if (lo)
659 *lo = lo_ret;
660
661 valid = _TRUE;
662
663 exit:
664 return valid;
665 }
666
667 const char *const _ch_width_str[CHANNEL_WIDTH_MAX] = {
668 [CHANNEL_WIDTH_20] = "20MHz",
669 [CHANNEL_WIDTH_40] = "40MHz",
670 [CHANNEL_WIDTH_80] = "80MHz",
671 [CHANNEL_WIDTH_160] = "160MHz",
672 [CHANNEL_WIDTH_80_80] = "80_80MHz",
673 [CHANNEL_WIDTH_5] = "5MHz",
674 [CHANNEL_WIDTH_10] = "10MHz",
675 };
676
677 const u8 _ch_width_to_bw_cap[CHANNEL_WIDTH_MAX] = {
678 [CHANNEL_WIDTH_20] = BW_CAP_20M,
679 [CHANNEL_WIDTH_40] = BW_CAP_40M,
680 [CHANNEL_WIDTH_80] = BW_CAP_80M,
681 [CHANNEL_WIDTH_160] = BW_CAP_160M,
682 [CHANNEL_WIDTH_80_80] = BW_CAP_80_80M,
683 [CHANNEL_WIDTH_5] = BW_CAP_5M,
684 [CHANNEL_WIDTH_10] = BW_CAP_10M,
685 };
686
687 const char *const _band_str[] = {
688 "2.4G",
689 "5G",
690 "BAND_MAX",
691 };
692
693 const u8 _band_to_band_cap[] = {
694 BAND_CAP_2G,
695 BAND_CAP_5G,
696 0,
697 };
698
699 const char *const _opc_bw_str[OPC_BW_NUM] = {
700 "20M ", /* OPC_BW20 */
701 "40M+", /* OPC_BW40PLUS */
702 "40M-", /* OPC_BW40MINUS */
703 "80M ", /* OPC_BW80 */
704 "160M ", /* OPC_BW160 */
705 "80+80M ", /* OPC_BW80P80 */
706 };
707
708 const u8 _opc_bw_to_ch_width[OPC_BW_NUM] = {
709 CHANNEL_WIDTH_20, /* OPC_BW20 */
710 CHANNEL_WIDTH_40, /* OPC_BW40PLUS */
711 CHANNEL_WIDTH_40, /* OPC_BW40MINUS */
712 CHANNEL_WIDTH_80, /* OPC_BW80 */
713 CHANNEL_WIDTH_160, /* OPC_BW160 */
714 CHANNEL_WIDTH_80_80, /* OPC_BW80P80 */
715 };
716
717 /* global operating class database */
718
719 struct op_class_t {
720 u8 class_id;
721 BAND_TYPE band;
722 enum opc_bw bw;
723 u8 *len_ch_attr;
724 };
725
726 #define OPC_CH_LIST_LEN(_opc) (_opc.len_ch_attr[0])
727 #define OPC_CH_LIST_CH(_opc, _i) (_opc.len_ch_attr[_i + 1])
728
729 #define OP_CLASS_ENT(_class, _band, _bw, _len, arg...) \
730 {.class_id = _class, .band = _band, .bw = _bw, .len_ch_attr = (uint8_t[_len + 1]) {_len, ##arg},}
731
732 /* 802.11-2016 Table E-4, partial */
733 static const struct op_class_t global_op_class[] = {
734 /* 2G ch1~13, 20M */
735 OP_CLASS_ENT(81, BAND_ON_2_4G, OPC_BW20, 13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),
736 /* 2G ch14, 20M */
737 OP_CLASS_ENT(82, BAND_ON_2_4G, OPC_BW20, 1, 14),
738 /* 2G, 40M */
739 OP_CLASS_ENT(83, BAND_ON_2_4G, OPC_BW40PLUS, 9, 1, 2, 3, 4, 5, 6, 7, 8, 9),
740 OP_CLASS_ENT(84, BAND_ON_2_4G, OPC_BW40MINUS, 9, 5, 6, 7, 8, 9, 10, 11, 12, 13),
741 /* 5G band 1, 20M & 40M */
742 OP_CLASS_ENT(115, BAND_ON_5G, OPC_BW20, 4, 36, 40, 44, 48),
743 OP_CLASS_ENT(116, BAND_ON_5G, OPC_BW40PLUS, 2, 36, 44),
744 OP_CLASS_ENT(117, BAND_ON_5G, OPC_BW40MINUS, 2, 40, 48),
745 /* 5G band 2, 20M & 40M */
746 OP_CLASS_ENT(118, BAND_ON_5G, OPC_BW20, 4, 52, 56, 60, 64),
747 OP_CLASS_ENT(119, BAND_ON_5G, OPC_BW40PLUS, 2, 52, 60),
748 OP_CLASS_ENT(120, BAND_ON_5G, OPC_BW40MINUS, 2, 56, 64),
749 /* 5G band 3, 20M & 40M */
750 OP_CLASS_ENT(121, BAND_ON_5G, OPC_BW20, 12, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144),
751 OP_CLASS_ENT(122, BAND_ON_5G, OPC_BW40PLUS, 6, 100, 108, 116, 124, 132, 140),
752 OP_CLASS_ENT(123, BAND_ON_5G, OPC_BW40MINUS, 6, 104, 112, 120, 128, 136, 144),
753 /* 5G band 4, 20M & 40M */
754 OP_CLASS_ENT(124, BAND_ON_5G, OPC_BW20, 4, 149, 153, 157, 161),
755 OP_CLASS_ENT(125, BAND_ON_5G, OPC_BW20, 6, 149, 153, 157, 161, 165, 169),
756 OP_CLASS_ENT(126, BAND_ON_5G, OPC_BW40PLUS, 2, 149, 157),
757 OP_CLASS_ENT(127, BAND_ON_5G, OPC_BW40MINUS, 2, 153, 161),
758 /* 5G, 80M & 160M */
759 OP_CLASS_ENT(128, BAND_ON_5G, OPC_BW80, 24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161),
760 OP_CLASS_ENT(129, BAND_ON_5G, OPC_BW160, 16, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128),
761 #if 0 /* TODO */
762 /* 5G, 80+80M */
763 {130, BAND_ON_5G, OPC_BW80P80, 0x0FFFFFF},
764 #endif
765 };
766
767 static const int global_op_class_num = sizeof(global_op_class) / sizeof(struct op_class_t);
768
get_global_op_class_by_id(u8 gid)769 static const struct op_class_t *get_global_op_class_by_id(u8 gid)
770 {
771 int i;
772
773 for (i = 0; i < global_op_class_num; i++)
774 if (global_op_class[i].class_id == gid)
775 break;
776
777 return i < global_op_class_num ? &global_op_class[i] : NULL;
778 }
779
is_valid_global_op_class_id(u8 gid)780 bool is_valid_global_op_class_id(u8 gid)
781 {
782 return get_global_op_class_by_id(gid) ? 1 : 0;
783 }
784
is_valid_global_op_class_ch(const struct op_class_t * opc,u8 ch)785 static bool is_valid_global_op_class_ch(const struct op_class_t *opc, u8 ch)
786 {
787 int array_idx;
788 int i;
789
790 if (opc < global_op_class
791 || (((u8 *)opc) - ((u8 *)global_op_class)) % sizeof(struct op_class_t)
792 ) {
793 RTW_ERR("Invalid opc pointer:%p (global_op_class:%p, sizeof(struct op_class_t):%zu, %zu)\n"
794 , opc, global_op_class, sizeof(struct op_class_t), (((u8 *)opc) - ((u8 *)global_op_class)) % sizeof(struct op_class_t));
795 return 0;
796 }
797
798 array_idx = (((u8 *)opc) - ((u8 *)global_op_class)) / sizeof(struct op_class_t);
799
800 for (i = 0; i < OPC_CH_LIST_LEN(global_op_class[array_idx]); i++)
801 if (OPC_CH_LIST_CH(global_op_class[array_idx], i) == ch)
802 break;
803
804 return i < OPC_CH_LIST_LEN(global_op_class[array_idx]);
805 }
806
get_global_opc_bw_by_id(u8 gid)807 static enum opc_bw get_global_opc_bw_by_id(u8 gid)
808 {
809 int i;
810
811 for (i = 0; i < global_op_class_num; i++)
812 if (global_op_class[i].class_id == gid)
813 break;
814
815 return i < global_op_class_num ? global_op_class[i].bw : OPC_BW_NUM;
816 }
817
818 /* -2: logic error, -1: error, 0: is already BW20 */
get_sub_op_class(u8 gid,u8 ch)819 s16 get_sub_op_class(u8 gid, u8 ch)
820 {
821 const struct op_class_t *opc = get_global_op_class_by_id(gid);
822 int i;
823 enum channel_width bw;
824
825 if (!opc)
826 return -1;
827
828 if (!is_valid_global_op_class_ch(opc, ch)) {
829 return -1;
830 }
831
832 if (opc->bw == OPC_BW20)
833 return 0;
834
835 bw = opc_bw_to_ch_width(opc->bw);
836
837 for (i = 0; i < global_op_class_num; i++) {
838 if (bw != opc_bw_to_ch_width(global_op_class[i].bw) + 1)
839 continue;
840 if (is_valid_global_op_class_ch(&global_op_class[i], ch))
841 break;
842 }
843
844 return i < global_op_class_num ? global_op_class[i].class_id : -2;
845 }
846
dump_op_class_ch_title(void * sel)847 static void dump_op_class_ch_title(void *sel)
848 {
849 RTW_PRINT_SEL(sel, "%-5s %-4s %-7s ch_list\n"
850 , "class", "band", "bw");
851 }
852
dump_global_op_class_ch_single(void * sel,u8 gid)853 static void dump_global_op_class_ch_single(void *sel, u8 gid)
854 {
855 u8 i;
856 char buf[100];
857 char *pos = buf;
858
859 for (i = 0; i < OPC_CH_LIST_LEN(global_op_class[gid]); i++)
860 pos += snprintf(pos, 100 - (pos - buf), " %u", OPC_CH_LIST_CH(global_op_class[gid], i));
861
862 RTW_PRINT_SEL(sel, "%5u %4s %7s%s\n"
863 , global_op_class[gid].class_id
864 , band_str(global_op_class[gid].band)
865 , opc_bw_str(global_op_class[gid].bw), buf);
866 }
867
868 #ifdef CONFIG_RTW_DEBUG
dbg_global_op_class_validate(u8 gid)869 static bool dbg_global_op_class_validate(u8 gid)
870 {
871 u8 i;
872 u8 ch, bw, offset, cch;
873 bool ret = 1;
874
875 switch (global_op_class[gid].bw) {
876 case OPC_BW20:
877 bw = CHANNEL_WIDTH_20;
878 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
879 break;
880 case OPC_BW40PLUS:
881 bw = CHANNEL_WIDTH_40;
882 offset = HAL_PRIME_CHNL_OFFSET_LOWER;
883 break;
884 case OPC_BW40MINUS:
885 bw = CHANNEL_WIDTH_40;
886 offset = HAL_PRIME_CHNL_OFFSET_UPPER;
887 break;
888 case OPC_BW80:
889 bw = CHANNEL_WIDTH_80;
890 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
891 break;
892 case OPC_BW160:
893 bw = CHANNEL_WIDTH_160;
894 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
895 break;
896 case OPC_BW80P80: /* TODO */
897 default:
898 RTW_ERR("%s class:%u unsupported opc_bw:%u\n"
899 , __func__, global_op_class[gid].class_id, global_op_class[gid].bw);
900 ret = 0;
901 goto exit;
902 }
903
904 for (i = 0; i < OPC_CH_LIST_LEN(global_op_class[gid]); i++) {
905 u8 *op_chs;
906 u8 op_ch_num;
907 u8 k;
908
909 ch = OPC_CH_LIST_CH(global_op_class[gid], i);
910 cch = rtw_get_center_ch(ch ,bw, offset);
911 if (!cch) {
912 RTW_ERR("%s can't get cch from class:%u ch:%u\n"
913 , __func__, global_op_class[gid].class_id, ch);
914 ret = 0;
915 continue;
916 }
917
918 if (!rtw_get_op_chs_by_cch_bw(cch, bw, &op_chs, &op_ch_num)) {
919 RTW_ERR("%s can't get op chs from class:%u cch:%u\n"
920 , __func__, global_op_class[gid].class_id, cch);
921 ret = 0;
922 continue;
923 }
924
925 for (k = 0; k < op_ch_num; k++) {
926 if (*(op_chs + k) == ch)
927 break;
928 }
929 if (k >= op_ch_num) {
930 RTW_ERR("%s can't get ch:%u from op_chs class:%u cch:%u\n"
931 , __func__, ch, global_op_class[i].class_id, cch);
932 ret = 0;
933 }
934 }
935
936 exit:
937 return ret;
938 }
939 #endif /* CONFIG_RTW_DEBUG */
940
dump_global_op_class(void * sel)941 void dump_global_op_class(void *sel)
942 {
943 u8 i;
944
945 dump_op_class_ch_title(sel);
946
947 for (i = 0; i < global_op_class_num; i++)
948 dump_global_op_class_ch_single(sel, i);
949 }
950
rtw_get_op_class_by_chbw(u8 ch,u8 bw,u8 offset)951 u8 rtw_get_op_class_by_chbw(u8 ch, u8 bw, u8 offset)
952 {
953 BAND_TYPE band = BAND_MAX;
954 int i;
955 u8 gid = 0; /* invalid */
956
957 if (rtw_is_2g_ch(ch))
958 band = BAND_ON_2_4G;
959 else if (rtw_is_5g_ch(ch))
960 band = BAND_ON_5G;
961 else
962 goto exit;
963
964 switch (bw) {
965 case CHANNEL_WIDTH_20:
966 case CHANNEL_WIDTH_40:
967 case CHANNEL_WIDTH_80:
968 case CHANNEL_WIDTH_160:
969 #if 0 /* TODO */
970 case CHANNEL_WIDTH_80_80:
971 #endif
972 break;
973 default:
974 goto exit;
975 }
976
977 for (i = 0; i < global_op_class_num; i++) {
978 if (band != global_op_class[i].band)
979 continue;
980
981 if (opc_bw_to_ch_width(global_op_class[i].bw) != bw)
982 continue;
983
984 if ((global_op_class[i].bw == OPC_BW40PLUS
985 && offset != HAL_PRIME_CHNL_OFFSET_LOWER)
986 || (global_op_class[i].bw == OPC_BW40MINUS
987 && offset != HAL_PRIME_CHNL_OFFSET_UPPER)
988 )
989 continue;
990
991 if (is_valid_global_op_class_ch(&global_op_class[i], ch))
992 goto get;
993 }
994
995 get:
996 if (i < global_op_class_num) {
997 #if 0 /* TODO */
998 if (bw == CHANNEL_WIDTH_80_80) {
999 /* search another ch */
1000 if (!is_valid_global_op_class_ch(&global_op_class[i], ch2))
1001 goto exit;
1002 }
1003 #endif
1004
1005 gid = global_op_class[i].class_id;
1006 }
1007
1008 exit:
1009 return gid;
1010 }
1011
rtw_get_bw_offset_by_op_class_ch(u8 gid,u8 ch,u8 * bw,u8 * offset)1012 u8 rtw_get_bw_offset_by_op_class_ch(u8 gid, u8 ch, u8 *bw, u8 *offset)
1013 {
1014 enum opc_bw opc_bw;
1015 u8 valid = 0;
1016 int i;
1017
1018 opc_bw = get_global_opc_bw_by_id(gid);
1019 if (opc_bw == OPC_BW_NUM)
1020 goto exit;
1021
1022 *bw = opc_bw_to_ch_width(opc_bw);
1023
1024 if (opc_bw == OPC_BW40PLUS)
1025 *offset = HAL_PRIME_CHNL_OFFSET_LOWER;
1026 else if (opc_bw == OPC_BW40MINUS)
1027 *offset = HAL_PRIME_CHNL_OFFSET_UPPER;
1028
1029 if (rtw_get_offset_by_chbw(ch, *bw, offset))
1030 valid = 1;
1031
1032 exit:
1033 return valid;
1034 }
1035
opc_pref_alloc(u8 class_id)1036 static struct op_class_pref_t *opc_pref_alloc(u8 class_id)
1037 {
1038 int i, j;
1039 struct op_class_pref_t *opc_pref = NULL;
1040
1041 for (i = 0; i < global_op_class_num; i++)
1042 if (global_op_class[i].class_id == class_id)
1043 break;
1044
1045 if (i >= global_op_class_num)
1046 goto exit;
1047
1048 opc_pref = rtw_zmalloc(sizeof(*opc_pref));
1049 if (!opc_pref)
1050 goto exit;
1051
1052 opc_pref->class_id = global_op_class[i].class_id;
1053 opc_pref->band = global_op_class[i].band;
1054 opc_pref->bw = global_op_class[i].bw;
1055
1056 for (j = 0; j < OPC_CH_LIST_LEN(global_op_class[i]); j++) {
1057 opc_pref->chs[j].ch = OPC_CH_LIST_CH(global_op_class[i], j);
1058 opc_pref->chs[j].static_non_op = 1;
1059 opc_pref->chs[j].no_ir = 1;
1060 opc_pref->chs[j].max_txpwr = UNSPECIFIED_MBM;
1061 }
1062 opc_pref->ch_num = OPC_CH_LIST_LEN(global_op_class[i]);
1063
1064 exit:
1065 return opc_pref;
1066 }
1067
opc_pref_free(struct op_class_pref_t * opc_pref)1068 static void opc_pref_free(struct op_class_pref_t *opc_pref)
1069 {
1070 rtw_mfree(opc_pref, sizeof(*opc_pref));
1071 }
1072
op_class_pref_init(_adapter * adapter)1073 int op_class_pref_init(_adapter *adapter)
1074 {
1075 struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
1076 struct registry_priv *regsty = adapter_to_regsty(adapter);
1077 u8 bw;
1078 struct op_class_pref_t *opc_pref;
1079 int i;
1080 u8 op_class_num = 0;
1081 u8 band_bmp = 0;
1082 u8 bw_bmp[BAND_MAX] = {0};
1083 int ret = _FAIL;
1084
1085 rfctl->spt_op_class_ch = rtw_zmalloc(sizeof(struct op_class_pref_t *) * global_op_class_num);
1086 if (!rfctl->spt_op_class_ch) {
1087 RTW_ERR("%s alloc rfctl->spt_op_class_ch fail\n", __func__);
1088 goto exit;
1089 }
1090
1091 if (IsSupported24G(regsty->wireless_mode) && hal_chk_band_cap(adapter, BAND_CAP_2G))
1092 band_bmp |= BAND_CAP_2G;
1093 if (is_supported_5g(regsty->wireless_mode) && hal_chk_band_cap(adapter, BAND_CAP_5G))
1094 band_bmp |= BAND_CAP_5G;
1095
1096 bw_bmp[BAND_ON_2_4G] = (ch_width_to_bw_cap(REGSTY_BW_2G(regsty) + 1) - 1) & (GET_HAL_SPEC(adapter)->bw_cap);
1097 bw_bmp[BAND_ON_5G] = (ch_width_to_bw_cap(REGSTY_BW_5G(regsty) + 1) - 1) & (GET_HAL_SPEC(adapter)->bw_cap);
1098 if (!REGSTY_IS_11AC_ENABLE(regsty)
1099 || !is_supported_vht(regsty->wireless_mode)
1100 )
1101 bw_bmp[BAND_ON_5G] &= ~(BW_CAP_80M | BW_CAP_160M);
1102
1103 if (0) {
1104 RTW_INFO("REGSTY_BW_2G(regsty):%u\n", REGSTY_BW_2G(regsty));
1105 RTW_INFO("REGSTY_BW_5G(regsty):%u\n", REGSTY_BW_5G(regsty));
1106 RTW_INFO("GET_HAL_SPEC(adapter)->bw_cap:0x%x\n", GET_HAL_SPEC(adapter)->bw_cap);
1107 RTW_INFO("band_bmp:0x%x\n", band_bmp);
1108 RTW_INFO("bw_bmp[2G]:0x%x\n", bw_bmp[BAND_ON_2_4G]);
1109 RTW_INFO("bw_bmp[5G]:0x%x\n", bw_bmp[BAND_ON_5G]);
1110 }
1111
1112 for (i = 0; i < global_op_class_num; i++) {
1113 #ifdef CONFIG_RTW_DEBUG
1114 rtw_warn_on(!dbg_global_op_class_validate(i));
1115 #endif
1116
1117 if (!(band_bmp & band_to_band_cap(global_op_class[i].band)))
1118 continue;
1119
1120 bw = opc_bw_to_ch_width(global_op_class[i].bw);
1121 if (bw == CHANNEL_WIDTH_MAX
1122 || bw == CHANNEL_WIDTH_80_80 /* TODO */
1123 )
1124 continue;
1125
1126 if (!(bw_bmp[global_op_class[i].band] & ch_width_to_bw_cap(bw)))
1127 continue;
1128
1129 opc_pref = opc_pref_alloc(global_op_class[i].class_id);
1130 if (!opc_pref) {
1131 RTW_ERR("%s opc_pref_alloc(%u) fail\n", __func__, global_op_class[i].class_id);
1132 goto exit;
1133 }
1134
1135 if (opc_pref->ch_num) {
1136 rfctl->spt_op_class_ch[i] = opc_pref;
1137 op_class_num++;
1138 } else
1139 opc_pref_free(opc_pref);
1140 }
1141
1142 rfctl->cap_spt_op_class_num = op_class_num;
1143 ret = _SUCCESS;
1144
1145 exit:
1146 return ret;
1147 }
1148
op_class_pref_deinit(_adapter * adapter)1149 void op_class_pref_deinit(_adapter *adapter)
1150 {
1151 struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
1152 int i;
1153
1154 if (!rfctl->spt_op_class_ch)
1155 return;
1156
1157 for (i = 0; i < global_op_class_num; i++) {
1158 if (rfctl->spt_op_class_ch[i]) {
1159 opc_pref_free(rfctl->spt_op_class_ch[i]);
1160 rfctl->spt_op_class_ch[i] = NULL;
1161 }
1162 }
1163
1164 rtw_mfree(rfctl->spt_op_class_ch, sizeof(struct op_class_pref_t *) * global_op_class_num);
1165 rfctl->spt_op_class_ch = NULL;
1166 }
1167
op_class_pref_apply_regulatory(_adapter * adapter,u8 reason)1168 void op_class_pref_apply_regulatory(_adapter *adapter, u8 reason)
1169 {
1170 struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
1171 RT_CHANNEL_INFO *chset = rfctl->channel_set;
1172 struct registry_priv *regsty = adapter_to_regsty(adapter);
1173 u8 ch, bw, offset, cch;
1174 struct op_class_pref_t *opc_pref;
1175 int i, j;
1176 u8 reg_op_class_num = 0;
1177 u8 op_class_num = 0;
1178
1179 for (i = 0; i < global_op_class_num; i++) {
1180 if (!rfctl->spt_op_class_ch[i])
1181 continue;
1182 opc_pref = rfctl->spt_op_class_ch[i];
1183
1184 /* reset all channel */
1185 for (j = 0; opc_pref->chs[j].ch != 0; j++) {
1186 if (reason >= REG_CHANGE)
1187 opc_pref->chs[j].static_non_op = 1;
1188 if (reason != REG_TXPWR_CHANGE)
1189 opc_pref->chs[j].no_ir = 1;
1190 if (reason >= REG_TXPWR_CHANGE)
1191 opc_pref->chs[j].max_txpwr = UNSPECIFIED_MBM;
1192 }
1193 if (reason >= REG_CHANGE)
1194 opc_pref->op_ch_num = 0;
1195 if (reason != REG_TXPWR_CHANGE)
1196 opc_pref->ir_ch_num = 0;
1197
1198 switch (opc_pref->bw) {
1199 case OPC_BW20:
1200 bw = CHANNEL_WIDTH_20;
1201 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
1202 break;
1203 case OPC_BW40PLUS:
1204 bw = CHANNEL_WIDTH_40;
1205 offset = HAL_PRIME_CHNL_OFFSET_LOWER;
1206 break;
1207 case OPC_BW40MINUS:
1208 bw = CHANNEL_WIDTH_40;
1209 offset = HAL_PRIME_CHNL_OFFSET_UPPER;
1210 break;
1211 case OPC_BW80:
1212 bw = CHANNEL_WIDTH_80;
1213 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
1214 break;
1215 case OPC_BW160:
1216 bw = CHANNEL_WIDTH_160;
1217 offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
1218 break;
1219 case OPC_BW80P80: /* TODO */
1220 default:
1221 continue;
1222 }
1223
1224 if (rfctl->country_ent && !COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)
1225 && (bw == CHANNEL_WIDTH_80 || bw == CHANNEL_WIDTH_160))
1226 continue;
1227
1228 for (j = 0; opc_pref->chs[j].ch != 0; j++) {
1229 u8 *op_chs;
1230 u8 op_ch_num;
1231 u8 k, l;
1232 int chset_idx;
1233
1234 ch = opc_pref->chs[j].ch;
1235
1236 if (reason >= REG_TXPWR_CHANGE)
1237 opc_pref->chs[j].max_txpwr = rtw_rfctl_get_reg_max_txpwr_mbm(rfctl, ch, bw, offset, 1);
1238
1239 if (reason == REG_TXPWR_CHANGE)
1240 continue;
1241
1242 cch = rtw_get_center_ch(ch ,bw, offset);
1243 if (!cch)
1244 continue;
1245
1246 if (!rtw_get_op_chs_by_cch_bw(cch, bw, &op_chs, &op_ch_num))
1247 continue;
1248
1249 for (k = 0, l = 0; k < op_ch_num; k++) {
1250 chset_idx = rtw_chset_search_ch(chset, *(op_chs + k));
1251 if (chset_idx == -1)
1252 break;
1253 if (bw >= CHANNEL_WIDTH_40) {
1254 if ((chset[chset_idx].flags & RTW_CHF_NO_HT40U) && k % 2 == 0)
1255 break;
1256 if ((chset[chset_idx].flags & RTW_CHF_NO_HT40L) && k % 2 == 1)
1257 break;
1258 }
1259 if (bw >= CHANNEL_WIDTH_80 && (chset[chset_idx].flags & RTW_CHF_NO_80MHZ))
1260 break;
1261 if (bw >= CHANNEL_WIDTH_160 && (chset[chset_idx].flags & RTW_CHF_NO_160MHZ))
1262 break;
1263 if ((chset[chset_idx].flags & RTW_CHF_DFS) && rtw_rfctl_dfs_domain_unknown(rfctl))
1264 continue;
1265 if (chset[chset_idx].flags & RTW_CHF_NO_IR)
1266 continue;
1267 l++;
1268 }
1269 if (k < op_ch_num)
1270 continue;
1271
1272 if (reason >= REG_CHANGE) {
1273 opc_pref->chs[j].static_non_op = 0;
1274 opc_pref->op_ch_num++;
1275 }
1276
1277 if (l >= op_ch_num) {
1278 opc_pref->chs[j].no_ir = 0;
1279 opc_pref->ir_ch_num++;
1280 }
1281 }
1282
1283 if (opc_pref->op_ch_num)
1284 reg_op_class_num++;
1285 if (opc_pref->ir_ch_num)
1286 op_class_num++;
1287 }
1288
1289 rfctl->reg_spt_op_class_num = reg_op_class_num;
1290 rfctl->cur_spt_op_class_num = op_class_num;
1291 }
1292
dump_opc_pref_single(void * sel,struct op_class_pref_t * opc_pref,bool show_snon_ocp,bool show_no_ir,bool detail)1293 static void dump_opc_pref_single(void *sel, struct op_class_pref_t *opc_pref, bool show_snon_ocp, bool show_no_ir, bool detail)
1294 {
1295 u8 i;
1296 u8 ch_num = 0;
1297 char buf[256];
1298 char *pos = buf;
1299
1300 if (!show_snon_ocp && !opc_pref->op_ch_num)
1301 return;
1302 if (!show_no_ir && !opc_pref->ir_ch_num)
1303 return;
1304
1305 for (i = 0; opc_pref->chs[i].ch != 0; i++) {
1306 if ((show_snon_ocp || !opc_pref->chs[i].static_non_op)
1307 && (show_no_ir || !opc_pref->chs[i].no_ir)
1308 ) {
1309 if (detail)
1310 pos += snprintf(pos, 256 - (pos - buf), " %4u", opc_pref->chs[i].ch);
1311 else
1312 pos += snprintf(pos, 256 - (pos - buf), " %u", opc_pref->chs[i].ch);
1313 }
1314 }
1315
1316 RTW_PRINT_SEL(sel, "%5u %4s %7s%s\n"
1317 , opc_pref->class_id
1318 , band_str(opc_pref->band)
1319 , opc_bw_str(opc_pref->bw), buf);
1320
1321 if (!detail)
1322 return;
1323
1324 pos = buf;
1325 for (i = 0; opc_pref->chs[i].ch != 0; i++) {
1326 if ((show_snon_ocp || !opc_pref->chs[i].static_non_op)
1327 && (show_no_ir || !opc_pref->chs[i].no_ir)
1328 ) {
1329 pos += snprintf(pos, 256 - (pos - buf), " %c%c"
1330 , opc_pref->chs[i].no_ir ? ' ' : 'I'
1331 , opc_pref->chs[i].static_non_op ? ' ' : 'E'
1332 );
1333 }
1334 }
1335 RTW_PRINT_SEL(sel, " %s\n", buf);
1336
1337 pos = buf;
1338 for (i = 0; opc_pref->chs[i].ch != 0; i++) {
1339 if ((show_snon_ocp || !opc_pref->chs[i].static_non_op)
1340 && (show_no_ir || !opc_pref->chs[i].no_ir)
1341 ) {
1342 if (opc_pref->chs[i].max_txpwr == UNSPECIFIED_MBM)
1343 pos += snprintf(pos, 256 - (pos - buf), " ");
1344 else
1345 pos += snprintf(pos, 256 - (pos - buf), " %4d", opc_pref->chs[i].max_txpwr);
1346 }
1347 }
1348 RTW_PRINT_SEL(sel, " %s\n", buf);
1349 }
1350
dump_cap_spt_op_class_ch(void * sel,struct rf_ctl_t * rfctl,bool detail)1351 void dump_cap_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail)
1352 {
1353 u8 i;
1354
1355 dump_op_class_ch_title(sel);
1356
1357 for (i = 0; i < global_op_class_num; i++) {
1358 if (!rfctl->spt_op_class_ch[i])
1359 continue;
1360 dump_opc_pref_single(sel, rfctl->spt_op_class_ch[i], 1, 1, detail);
1361 }
1362
1363 RTW_PRINT_SEL(sel, "op_class number:%d\n", rfctl->cap_spt_op_class_num);
1364 }
1365
dump_reg_spt_op_class_ch(void * sel,struct rf_ctl_t * rfctl,bool detail)1366 void dump_reg_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail)
1367 {
1368 u8 i;
1369
1370 dump_op_class_ch_title(sel);
1371
1372 for (i = 0; i < global_op_class_num; i++) {
1373 if (!rfctl->spt_op_class_ch[i])
1374 continue;
1375 dump_opc_pref_single(sel, rfctl->spt_op_class_ch[i], 0, 1, detail);
1376 }
1377
1378 RTW_PRINT_SEL(sel, "op_class number:%d\n", rfctl->reg_spt_op_class_num);
1379 }
1380
dump_cur_spt_op_class_ch(void * sel,struct rf_ctl_t * rfctl,bool detail)1381 void dump_cur_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail)
1382 {
1383 u8 i;
1384
1385 dump_op_class_ch_title(sel);
1386
1387 for (i = 0; i < global_op_class_num; i++) {
1388 if (!rfctl->spt_op_class_ch[i])
1389 continue;
1390 dump_opc_pref_single(sel, rfctl->spt_op_class_ch[i], 0, 0, detail);
1391 }
1392
1393 RTW_PRINT_SEL(sel, "op_class number:%d\n", rfctl->cur_spt_op_class_num);
1394 }
1395
1396 const u8 _rf_type_to_rf_tx_cnt[RF_TYPE_MAX] = {
1397 [RF_1T1R] = 1,
1398 [RF_1T2R] = 1,
1399 [RF_1T3R] = 1,
1400 [RF_1T4R] = 1,
1401 [RF_2T1R] = 2,
1402 [RF_2T2R] = 2,
1403 [RF_2T3R] = 2,
1404 [RF_2T4R] = 2,
1405 [RF_3T1R] = 3,
1406 [RF_3T2R] = 3,
1407 [RF_3T3R] = 3,
1408 [RF_3T4R] = 3,
1409 [RF_4T1R] = 4,
1410 [RF_4T2R] = 4,
1411 [RF_4T3R] = 4,
1412 [RF_4T4R] = 4,
1413 };
1414
1415 const u8 _rf_type_to_rf_rx_cnt[RF_TYPE_MAX] = {
1416 [RF_1T1R] = 1,
1417 [RF_1T2R] = 2,
1418 [RF_1T3R] = 3,
1419 [RF_1T4R] = 4,
1420 [RF_2T1R] = 1,
1421 [RF_2T2R] = 2,
1422 [RF_2T3R] = 3,
1423 [RF_2T4R] = 4,
1424 [RF_3T1R] = 1,
1425 [RF_3T2R] = 2,
1426 [RF_3T3R] = 3,
1427 [RF_3T4R] = 4,
1428 [RF_4T1R] = 1,
1429 [RF_4T2R] = 2,
1430 [RF_4T3R] = 3,
1431 [RF_4T4R] = 4,
1432 };
1433
1434 const char *const _rf_type_to_rfpath_str[RF_TYPE_MAX] = {
1435 [RF_1T1R] = "RF_1T1R",
1436 [RF_1T2R] = "RF_1T2R",
1437 [RF_1T3R] = "RF_1T3R",
1438 [RF_1T4R] = "RF_1T4R",
1439 [RF_2T1R] = "RF_2T1R",
1440 [RF_2T2R] = "RF_2T2R",
1441 [RF_2T3R] = "RF_2T3R",
1442 [RF_2T4R] = "RF_2T4R",
1443 [RF_3T1R] = "RF_3T1R",
1444 [RF_3T2R] = "RF_3T2R",
1445 [RF_3T3R] = "RF_3T3R",
1446 [RF_3T4R] = "RF_3T4R",
1447 [RF_4T1R] = "RF_4T1R",
1448 [RF_4T2R] = "RF_4T2R",
1449 [RF_4T3R] = "RF_4T3R",
1450 [RF_4T4R] = "RF_4T4R",
1451 };
1452
rf_type_to_default_trx_bmp(enum rf_type rf,enum bb_path * tx,enum bb_path * rx)1453 void rf_type_to_default_trx_bmp(enum rf_type rf, enum bb_path *tx, enum bb_path *rx)
1454 {
1455 u8 tx_num = rf_type_to_rf_tx_cnt(rf);
1456 u8 rx_num = rf_type_to_rf_rx_cnt(rf);
1457 int i;
1458
1459 *tx = *rx = 0;
1460
1461 for (i = 0; i < tx_num; i++)
1462 *tx |= BIT(i);
1463 for (i = 0; i < rx_num; i++)
1464 *rx |= BIT(i);
1465 }
1466
1467 static const u8 _trx_num_to_rf_type[RF_PATH_MAX][RF_PATH_MAX] = {
1468 {RF_1T1R, RF_1T2R, RF_1T3R, RF_1T4R},
1469 {RF_2T1R, RF_2T2R, RF_2T3R, RF_2T4R},
1470 {RF_3T1R, RF_3T2R, RF_3T3R, RF_3T4R},
1471 {RF_4T1R, RF_4T2R, RF_4T3R, RF_4T4R},
1472 };
1473
trx_num_to_rf_type(u8 tx_num,u8 rx_num)1474 enum rf_type trx_num_to_rf_type(u8 tx_num, u8 rx_num)
1475 {
1476 if (tx_num > 0 && tx_num <= RF_PATH_MAX && rx_num > 0 && rx_num <= RF_PATH_MAX)
1477 return _trx_num_to_rf_type[tx_num - 1][rx_num - 1];
1478 return RF_TYPE_MAX;
1479 }
1480
trx_bmp_to_rf_type(u8 tx_bmp,u8 rx_bmp)1481 enum rf_type trx_bmp_to_rf_type(u8 tx_bmp, u8 rx_bmp)
1482 {
1483 u8 tx_num = 0;
1484 u8 rx_num = 0;
1485 int i;
1486
1487 for (i = 0; i < RF_PATH_MAX; i++) {
1488 if (tx_bmp >> i & BIT0)
1489 tx_num++;
1490 if (rx_bmp >> i & BIT0)
1491 rx_num++;
1492 }
1493
1494 return trx_num_to_rf_type(tx_num, rx_num);
1495 }
1496
rf_type_is_a_in_b(enum rf_type a,enum rf_type b)1497 bool rf_type_is_a_in_b(enum rf_type a, enum rf_type b)
1498 {
1499 return rf_type_to_rf_tx_cnt(a) <= rf_type_to_rf_tx_cnt(b)
1500 && rf_type_to_rf_rx_cnt(a) <= rf_type_to_rf_rx_cnt(b);
1501 }
1502
rtw_path_bmp_limit_from_higher(u8 * bmp,u8 * bmp_bit_cnt,u8 bit_cnt_lmt)1503 static void rtw_path_bmp_limit_from_higher(u8 *bmp, u8 *bmp_bit_cnt, u8 bit_cnt_lmt)
1504 {
1505 int i;
1506
1507 for (i = RF_PATH_MAX - 1; *bmp_bit_cnt > bit_cnt_lmt && i >= 0; i--) {
1508 if (*bmp & BIT(i)) {
1509 *bmp &= ~BIT(i);
1510 (*bmp_bit_cnt)--;
1511 }
1512 }
1513 }
1514
rtw_restrict_trx_path_bmp_by_trx_num_lmt(u8 trx_path_bmp,u8 tx_num_lmt,u8 rx_num_lmt,u8 * tx_num,u8 * rx_num)1515 u8 rtw_restrict_trx_path_bmp_by_trx_num_lmt(u8 trx_path_bmp, u8 tx_num_lmt, u8 rx_num_lmt, u8 *tx_num, u8 *rx_num)
1516 {
1517 u8 bmp_tx = (trx_path_bmp & 0xF0) >> 4;
1518 u8 bmp_rx = trx_path_bmp & 0x0F;
1519 u8 bmp_tx_num = 0, bmp_rx_num = 0;
1520 enum rf_type ret_type = RF_TYPE_MAX;
1521 int i, j;
1522
1523 for (i = 0; i < RF_PATH_MAX; i++) {
1524 if (bmp_tx & BIT(i))
1525 bmp_tx_num++;
1526 if (bmp_rx & BIT(i))
1527 bmp_rx_num++;
1528 }
1529
1530 /* limit higher bit first according to input type */
1531 if (tx_num_lmt)
1532 rtw_path_bmp_limit_from_higher(&bmp_tx, &bmp_tx_num, tx_num_lmt);
1533 if (rx_num_lmt)
1534 rtw_path_bmp_limit_from_higher(&bmp_rx, &bmp_rx_num, rx_num_lmt);
1535
1536 /* search for valid rf_type (larger RX prefer) */
1537 for (j = bmp_rx_num; j > 0; j--) {
1538 for (i = bmp_tx_num; i > 0; i--) {
1539 ret_type = trx_num_to_rf_type(i, j);
1540 if (RF_TYPE_VALID(ret_type)) {
1541 rtw_path_bmp_limit_from_higher(&bmp_tx, &bmp_tx_num, i);
1542 rtw_path_bmp_limit_from_higher(&bmp_rx, &bmp_rx_num, j);
1543 if (tx_num)
1544 *tx_num = bmp_tx_num;
1545 if (rx_num)
1546 *rx_num = bmp_rx_num;
1547 goto exit;
1548 }
1549 }
1550 }
1551
1552 exit:
1553 return RF_TYPE_VALID(ret_type) ? ((bmp_tx << 4) | bmp_rx) : 0x00;
1554 }
1555
rtw_restrict_trx_path_bmp_by_rftype(u8 trx_path_bmp,enum rf_type type,u8 * tx_num,u8 * rx_num)1556 u8 rtw_restrict_trx_path_bmp_by_rftype(u8 trx_path_bmp, enum rf_type type, u8 *tx_num, u8 *rx_num)
1557 {
1558 return rtw_restrict_trx_path_bmp_by_trx_num_lmt(trx_path_bmp
1559 , rf_type_to_rf_tx_cnt(type), rf_type_to_rf_rx_cnt(type), tx_num, rx_num);
1560 }
1561
1562 /* config to non N-TX value, path with lower index prefer */
tx_path_nss_set_default(enum bb_path txpath_nss[],u8 txpath_num_nss[],u8 txpath)1563 void tx_path_nss_set_default(enum bb_path txpath_nss[], u8 txpath_num_nss[], u8 txpath)
1564 {
1565 int i, j;
1566 u8 cnt;
1567
1568 for (i = 4; i > 0; i--) {
1569 cnt = 0;
1570 txpath_nss[i - 1] = 0;
1571 for (j = 0; j < RF_PATH_MAX; j++) {
1572 if (txpath & BIT(j)) {
1573 txpath_nss[i - 1] |= BIT(j);
1574 if (++cnt == i)
1575 break;
1576 }
1577 }
1578 txpath_num_nss[i - 1] = i;
1579 }
1580 }
1581
1582 /* config to full N-TX value */
tx_path_nss_set_full_tx(enum bb_path txpath_nss[],u8 txpath_num_nss[],u8 txpath)1583 void tx_path_nss_set_full_tx(enum bb_path txpath_nss[], u8 txpath_num_nss[], u8 txpath)
1584 {
1585 u8 tx_num = 0;
1586 int i;
1587
1588 for (i = 0; i < RF_PATH_MAX; i++)
1589 if (txpath & BIT(i))
1590 tx_num++;
1591
1592 for (i = 4; i > 0; i--) {
1593 txpath_nss[i - 1] = txpath;
1594 txpath_num_nss[i - 1] = tx_num;
1595 }
1596 }
1597
1598 /*
1599 * input with txpwr value in unit of txpwr index
1600 * return string in length 6 at least (for -xx.xx)
1601 */
txpwr_idx_get_dbm_str(s8 idx,u8 txgi_max,u8 txgi_pdbm,SIZE_T cwidth,char dbm_str[],u8 dbm_str_len)1602 void txpwr_idx_get_dbm_str(s8 idx, u8 txgi_max, u8 txgi_pdbm, SIZE_T cwidth, char dbm_str[], u8 dbm_str_len)
1603 {
1604 char fmt[16];
1605
1606 if (idx == txgi_max) {
1607 snprintf(fmt, 16, "%%%zus", cwidth >= 6 ? cwidth + 1 : 6);
1608 snprintf(dbm_str, dbm_str_len, fmt, "NA");
1609 } else if (idx > -txgi_pdbm && idx < 0) { /* -0.xx */
1610 snprintf(fmt, 16, "%%%zus-0.%%02d", cwidth >= 6 ? cwidth - 4 : 1);
1611 snprintf(dbm_str, dbm_str_len, fmt, "", (rtw_abs(idx) % txgi_pdbm) * 100 / txgi_pdbm);
1612 } else if (idx % txgi_pdbm) { /* d.xx */
1613 snprintf(fmt, 16, "%%%zud.%%02d", cwidth >= 6 ? cwidth - 2 : 3);
1614 snprintf(dbm_str, dbm_str_len, fmt, idx / txgi_pdbm, (rtw_abs(idx) % txgi_pdbm) * 100 / txgi_pdbm);
1615 } else { /* d */
1616 snprintf(fmt, 16, "%%%zud", cwidth >= 6 ? cwidth + 1 : 6);
1617 snprintf(dbm_str, dbm_str_len, fmt, idx / txgi_pdbm);
1618 }
1619 }
1620
1621 /*
1622 * input with txpwr value in unit of mbm
1623 * return string in length 6 at least (for -xx.xx)
1624 */
txpwr_mbm_get_dbm_str(s16 mbm,SIZE_T cwidth,char dbm_str[],u8 dbm_str_len)1625 void txpwr_mbm_get_dbm_str(s16 mbm, SIZE_T cwidth, char dbm_str[], u8 dbm_str_len)
1626 {
1627 char fmt[16];
1628
1629 if (mbm == UNSPECIFIED_MBM) {
1630 snprintf(fmt, 16, "%%%zus", cwidth >= 6 ? cwidth + 1 : 6);
1631 snprintf(dbm_str, dbm_str_len, fmt, "NA");
1632 } else if (mbm > -MBM_PDBM && mbm < 0) { /* -0.xx */
1633 snprintf(fmt, 16, "%%%zus-0.%%02d", cwidth >= 6 ? cwidth - 4 : 1);
1634 snprintf(dbm_str, dbm_str_len, fmt, "", (rtw_abs(mbm) % MBM_PDBM) * 100 / MBM_PDBM);
1635 } else if (mbm % MBM_PDBM) { /* d.xx */
1636 snprintf(fmt, 16, "%%%zud.%%02d", cwidth >= 6 ? cwidth - 2 : 3);
1637 snprintf(dbm_str, dbm_str_len, fmt, mbm / MBM_PDBM, (rtw_abs(mbm) % MBM_PDBM) * 100 / MBM_PDBM);
1638 } else { /* d */
1639 snprintf(fmt, 16, "%%%zud", cwidth >= 6 ? cwidth + 1 : 6);
1640 snprintf(dbm_str, dbm_str_len, fmt, mbm / MBM_PDBM);
1641 }
1642 }
1643
1644 static const s16 _mb_of_ntx[] = {
1645 0, /* 1TX */
1646 301, /* 2TX */
1647 477, /* 3TX */
1648 602, /* 4TX */
1649 699, /* 5TX */
1650 778, /* 6TX */
1651 845, /* 7TX */
1652 903, /* 8TX */
1653 };
1654
1655 /* get mB(100 *dB) for specifc TX count relative to 1TX */
mb_of_ntx(u8 ntx)1656 s16 mb_of_ntx(u8 ntx)
1657 {
1658 if (ntx == 0 || ntx > 8) {
1659 RTW_ERR("ntx=%u, out of range\n", ntx);
1660 rtw_warn_on(1);
1661 }
1662
1663 return _mb_of_ntx[ntx - 1];
1664 }
1665
1666 #if CONFIG_TXPWR_LIMIT
_dump_regd_exc_list(void * sel,struct rf_ctl_t * rfctl)1667 void _dump_regd_exc_list(void *sel, struct rf_ctl_t *rfctl)
1668 {
1669 struct regd_exc_ent *ent;
1670 _list *cur, *head;
1671
1672 RTW_PRINT_SEL(sel, "regd_exc_num:%u\n", rfctl->regd_exc_num);
1673
1674 if (!rfctl->regd_exc_num)
1675 goto exit;
1676
1677 RTW_PRINT_SEL(sel, "%-7s %-6s %-8s\n", "country", "domain", "lmt_name");
1678
1679 head = &rfctl->reg_exc_list;
1680 cur = get_next(head);
1681
1682 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
1683 u8 has_country;
1684
1685 ent = LIST_CONTAINOR(cur, struct regd_exc_ent, list);
1686 cur = get_next(cur);
1687 has_country = (ent->country[0] == '\0' && ent->country[1] == '\0') ? 0 : 1;
1688
1689 RTW_PRINT_SEL(sel, " %c%c 0x%02x %s\n"
1690 , has_country ? ent->country[0] : '0'
1691 , has_country ? ent->country[1] : '0'
1692 , ent->domain
1693 , ent->lmt_name
1694 );
1695 }
1696
1697 exit:
1698 return;
1699 }
1700
dump_regd_exc_list(void * sel,struct rf_ctl_t * rfctl)1701 inline void dump_regd_exc_list(void *sel, struct rf_ctl_t *rfctl)
1702 {
1703 _irqL irqL;
1704
1705 _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1706 _dump_regd_exc_list(sel, rfctl);
1707 _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1708 }
1709
rtw_regd_exc_add_with_nlen(struct rf_ctl_t * rfctl,const char * country,u8 domain,const char * lmt_name,u32 nlen)1710 void rtw_regd_exc_add_with_nlen(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *lmt_name, u32 nlen)
1711 {
1712 struct regd_exc_ent *ent;
1713 _irqL irqL;
1714
1715 if (!lmt_name || !nlen) {
1716 rtw_warn_on(1);
1717 goto exit;
1718 }
1719
1720 ent = (struct regd_exc_ent *)rtw_zmalloc(sizeof(struct regd_exc_ent) + nlen + 1);
1721 if (!ent)
1722 goto exit;
1723
1724 _rtw_init_listhead(&ent->list);
1725 if (country)
1726 _rtw_memcpy(ent->country, country, 2);
1727 ent->domain = domain;
1728 _rtw_memcpy(ent->lmt_name, lmt_name, nlen);
1729
1730 _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1731
1732 rtw_list_insert_tail(&ent->list, &rfctl->reg_exc_list);
1733 rfctl->regd_exc_num++;
1734
1735 _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1736
1737 exit:
1738 return;
1739 }
1740
rtw_regd_exc_add(struct rf_ctl_t * rfctl,const char * country,u8 domain,const char * lmt_name)1741 inline void rtw_regd_exc_add(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *lmt_name)
1742 {
1743 rtw_regd_exc_add_with_nlen(rfctl, country, domain, lmt_name, strlen(lmt_name));
1744 }
1745
_rtw_regd_exc_search(struct rf_ctl_t * rfctl,const char * country,u8 domain)1746 struct regd_exc_ent *_rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain)
1747 {
1748 struct regd_exc_ent *ent;
1749 _list *cur, *head;
1750 u8 match = 0;
1751
1752 head = &rfctl->reg_exc_list;
1753 cur = get_next(head);
1754
1755 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
1756 u8 has_country;
1757
1758 ent = LIST_CONTAINOR(cur, struct regd_exc_ent, list);
1759 cur = get_next(cur);
1760 has_country = (ent->country[0] == '\0' && ent->country[1] == '\0') ? 0 : 1;
1761
1762 /* entry has country condition to match */
1763 if (has_country) {
1764 if (!country)
1765 continue;
1766 if (ent->country[0] != country[0]
1767 || ent->country[1] != country[1])
1768 continue;
1769 }
1770
1771 /* entry has domain condition to match */
1772 if (ent->domain != 0xFF) {
1773 if (domain == 0xFF)
1774 continue;
1775 if (ent->domain != domain)
1776 continue;
1777 }
1778
1779 match = 1;
1780 break;
1781 }
1782
1783 if (match)
1784 return ent;
1785 else
1786 return NULL;
1787 }
1788
rtw_regd_exc_search(struct rf_ctl_t * rfctl,const char * country,u8 domain)1789 inline struct regd_exc_ent *rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain)
1790 {
1791 struct regd_exc_ent *ent;
1792 _irqL irqL;
1793
1794 _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1795 ent = _rtw_regd_exc_search(rfctl, country, domain);
1796 _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1797
1798 return ent;
1799 }
1800
rtw_regd_exc_list_free(struct rf_ctl_t * rfctl)1801 void rtw_regd_exc_list_free(struct rf_ctl_t *rfctl)
1802 {
1803 struct regd_exc_ent *ent;
1804 _irqL irqL;
1805 _list *cur, *head;
1806
1807 _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1808
1809 head = &rfctl->reg_exc_list;
1810 cur = get_next(head);
1811
1812 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
1813 ent = LIST_CONTAINOR(cur, struct regd_exc_ent, list);
1814 cur = get_next(cur);
1815 rtw_list_delete(&ent->list);
1816 rtw_mfree((u8 *)ent, sizeof(struct regd_exc_ent) + strlen(ent->lmt_name) + 1);
1817 }
1818 rfctl->regd_exc_num = 0;
1819
1820 _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1821 }
1822
dump_txpwr_lmt(void * sel,_adapter * adapter)1823 void dump_txpwr_lmt(void *sel, _adapter *adapter)
1824 {
1825 #define TMP_STR_LEN 16
1826 struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
1827 HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
1828 struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
1829 _irqL irqL;
1830 char fmt[16];
1831 char tmp_str[TMP_STR_LEN];
1832 s8 *lmt_idx = NULL;
1833 int bw, band, ch_num, tlrs, ntx_idx, rs, i, path;
1834 u8 ch, n, rfpath_num;
1835
1836 _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
1837
1838 _dump_regd_exc_list(sel, rfctl);
1839 RTW_PRINT_SEL(sel, "\n");
1840
1841 if (!rfctl->txpwr_lmt_num)
1842 goto release_lock;
1843
1844 lmt_idx = rtw_malloc(sizeof(s8) * RF_PATH_MAX * rfctl->txpwr_lmt_num);
1845 if (!lmt_idx) {
1846 RTW_ERR("%s alloc fail\n", __func__);
1847 goto release_lock;
1848 }
1849
1850 RTW_PRINT_SEL(sel, "txpwr_lmt_2g_cck_ofdm_state:0x%02x\n", rfctl->txpwr_lmt_2g_cck_ofdm_state);
1851 #if CONFIG_IEEE80211_BAND_5GHZ
1852 if (IS_HARDWARE_TYPE_JAGUAR_ALL(adapter)) {
1853 RTW_PRINT_SEL(sel, "txpwr_lmt_5g_cck_ofdm_state:0x%02x\n", rfctl->txpwr_lmt_5g_cck_ofdm_state);
1854 RTW_PRINT_SEL(sel, "txpwr_lmt_5g_20_40_ref:0x%02x\n", rfctl->txpwr_lmt_5g_20_40_ref);
1855 }
1856 #endif
1857 RTW_PRINT_SEL(sel, "\n");
1858
1859 for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) {
1860 if (!hal_is_band_support(adapter, band))
1861 continue;
1862
1863 rfpath_num = (band == BAND_ON_2_4G ? hal_spec->rfpath_num_2g : hal_spec->rfpath_num_5g);
1864
1865 for (bw = 0; bw < MAX_5G_BANDWIDTH_NUM; bw++) {
1866
1867 if (bw >= CHANNEL_WIDTH_160)
1868 break;
1869 if (band == BAND_ON_2_4G && bw >= CHANNEL_WIDTH_80)
1870 break;
1871
1872 if (band == BAND_ON_2_4G)
1873 ch_num = CENTER_CH_2G_NUM;
1874 else
1875 ch_num = center_chs_5g_num(bw);
1876
1877 if (ch_num == 0) {
1878 rtw_warn_on(1);
1879 break;
1880 }
1881
1882 for (tlrs = TXPWR_LMT_RS_CCK; tlrs < TXPWR_LMT_RS_NUM; tlrs++) {
1883
1884 if (band == BAND_ON_2_4G && tlrs == TXPWR_LMT_RS_VHT)
1885 continue;
1886 if (band == BAND_ON_5G && tlrs == TXPWR_LMT_RS_CCK)
1887 continue;
1888 if (bw > CHANNEL_WIDTH_20 && (tlrs == TXPWR_LMT_RS_CCK || tlrs == TXPWR_LMT_RS_OFDM))
1889 continue;
1890 if (bw > CHANNEL_WIDTH_40 && tlrs == TXPWR_LMT_RS_HT)
1891 continue;
1892 if (tlrs == TXPWR_LMT_RS_VHT && !IS_HARDWARE_TYPE_JAGUAR_ALL(adapter))
1893 continue;
1894
1895 for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) {
1896 struct txpwr_lmt_ent *ent;
1897 _list *cur, *head;
1898
1899 if (ntx_idx + 1 > hal_data->max_tx_cnt)
1900 continue;
1901
1902 /* bypass CCK multi-TX is not defined */
1903 if (tlrs == TXPWR_LMT_RS_CCK && ntx_idx > RF_1TX) {
1904 if (band == BAND_ON_2_4G
1905 && !(rfctl->txpwr_lmt_2g_cck_ofdm_state & (TXPWR_LMT_HAS_CCK_1T << ntx_idx)))
1906 continue;
1907 }
1908
1909 /* bypass OFDM multi-TX is not defined */
1910 if (tlrs == TXPWR_LMT_RS_OFDM && ntx_idx > RF_1TX) {
1911 if (band == BAND_ON_2_4G
1912 && !(rfctl->txpwr_lmt_2g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx)))
1913 continue;
1914 #if CONFIG_IEEE80211_BAND_5GHZ
1915 if (band == BAND_ON_5G
1916 && !(rfctl->txpwr_lmt_5g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx)))
1917 continue;
1918 #endif
1919 }
1920
1921 /* bypass 5G 20M, 40M pure reference */
1922 #if CONFIG_IEEE80211_BAND_5GHZ
1923 if (band == BAND_ON_5G && (bw == CHANNEL_WIDTH_20 || bw == CHANNEL_WIDTH_40)) {
1924 if (rfctl->txpwr_lmt_5g_20_40_ref == TXPWR_LMT_REF_HT_FROM_VHT) {
1925 if (tlrs == TXPWR_LMT_RS_HT)
1926 continue;
1927 } else if (rfctl->txpwr_lmt_5g_20_40_ref == TXPWR_LMT_REF_VHT_FROM_HT) {
1928 if (tlrs == TXPWR_LMT_RS_VHT && bw <= CHANNEL_WIDTH_40)
1929 continue;
1930 }
1931 }
1932 #endif
1933
1934 /* choose n-SS mapping rate section to get lmt diff value */
1935 if (tlrs == TXPWR_LMT_RS_CCK)
1936 rs = CCK;
1937 else if (tlrs == TXPWR_LMT_RS_OFDM)
1938 rs = OFDM;
1939 else if (tlrs == TXPWR_LMT_RS_HT)
1940 rs = HT_1SS + ntx_idx;
1941 else if (tlrs == TXPWR_LMT_RS_VHT)
1942 rs = VHT_1SS + ntx_idx;
1943 else {
1944 RTW_ERR("%s invalid tlrs %u\n", __func__, tlrs);
1945 continue;
1946 }
1947
1948 RTW_PRINT_SEL(sel, "[%s][%s][%s][%uT]\n"
1949 , band_str(band)
1950 , ch_width_str(bw)
1951 , txpwr_lmt_rs_str(tlrs)
1952 , ntx_idx + 1
1953 );
1954
1955 /* header for limit in db */
1956 RTW_PRINT_SEL(sel, "%3s ", "ch");
1957
1958 head = &rfctl->txpwr_lmt_list;
1959 cur = get_next(head);
1960 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
1961 ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
1962 cur = get_next(cur);
1963
1964 sprintf(fmt, "%%%zus%%s ", strlen(ent->name) >= 6 ? 1 : 6 - strlen(ent->name));
1965 snprintf(tmp_str, TMP_STR_LEN, fmt
1966 , strcmp(ent->name, rfctl->txpwr_lmt_name) == 0 ? "*" : ""
1967 , ent->name);
1968 _RTW_PRINT_SEL(sel, "%s", tmp_str);
1969 }
1970 sprintf(fmt, "%%%zus%%s ", strlen(txpwr_lmt_str(TXPWR_LMT_WW)) >= 6 ? 1 : 6 - strlen(txpwr_lmt_str(TXPWR_LMT_WW)));
1971 snprintf(tmp_str, TMP_STR_LEN, fmt
1972 , strcmp(rfctl->txpwr_lmt_name, txpwr_lmt_str(TXPWR_LMT_WW)) == 0 ? "*" : ""
1973 , txpwr_lmt_str(TXPWR_LMT_WW));
1974 _RTW_PRINT_SEL(sel, "%s", tmp_str);
1975
1976 /* header for limit offset */
1977 for (path = 0; path < RF_PATH_MAX; path++) {
1978 if (path >= rfpath_num)
1979 break;
1980 _RTW_PRINT_SEL(sel, "|");
1981 head = &rfctl->txpwr_lmt_list;
1982 cur = get_next(head);
1983 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
1984 ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
1985 cur = get_next(cur);
1986 _RTW_PRINT_SEL(sel, "%3c "
1987 , strcmp(ent->name, rfctl->txpwr_lmt_name) == 0 ? rf_path_char(path) : ' ');
1988 }
1989 _RTW_PRINT_SEL(sel, "%3c "
1990 , strcmp(rfctl->txpwr_lmt_name, txpwr_lmt_str(TXPWR_LMT_WW)) == 0 ? rf_path_char(path) : ' ');
1991 }
1992 _RTW_PRINT_SEL(sel, "\n");
1993
1994 for (n = 0; n < ch_num; n++) {
1995 s8 lmt;
1996 s8 lmt_offset;
1997 u8 base;
1998
1999 if (band == BAND_ON_2_4G)
2000 ch = n + 1;
2001 else
2002 ch = center_chs_5g(bw, n);
2003
2004 if (ch == 0) {
2005 rtw_warn_on(1);
2006 break;
2007 }
2008
2009 /* dump limit in dBm */
2010 RTW_PRINT_SEL(sel, "%3u ", ch);
2011 head = &rfctl->txpwr_lmt_list;
2012 cur = get_next(head);
2013 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
2014 ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
2015 cur = get_next(cur);
2016 lmt = phy_get_txpwr_lmt(adapter, ent->name, band, bw, tlrs, ntx_idx, ch, 0);
2017 txpwr_idx_get_dbm_str(lmt, hal_spec->txgi_max, hal_spec->txgi_pdbm, strlen(ent->name), tmp_str, TMP_STR_LEN);
2018 _RTW_PRINT_SEL(sel, "%s ", tmp_str);
2019 }
2020 lmt = phy_get_txpwr_lmt(adapter, txpwr_lmt_str(TXPWR_LMT_WW), band, bw, tlrs, ntx_idx, ch, 0);
2021 txpwr_idx_get_dbm_str(lmt, hal_spec->txgi_max, hal_spec->txgi_pdbm, strlen(txpwr_lmt_str(TXPWR_LMT_WW)), tmp_str, TMP_STR_LEN);
2022 _RTW_PRINT_SEL(sel, "%s ", tmp_str);
2023
2024 /* dump limit offset of each path */
2025 for (path = RF_PATH_A; path < RF_PATH_MAX; path++) {
2026 if (path >= rfpath_num)
2027 break;
2028
2029 base = phy_get_target_txpwr(adapter, band, path, rs);
2030
2031 _RTW_PRINT_SEL(sel, "|");
2032 head = &rfctl->txpwr_lmt_list;
2033 cur = get_next(head);
2034 i = 0;
2035 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
2036 ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
2037 cur = get_next(cur);
2038 lmt_offset = phy_get_txpwr_lmt_diff(adapter, ent->name, band, bw, path, rs, tlrs, ntx_idx, ch, 0);
2039 if (lmt_offset == hal_spec->txgi_max) {
2040 *(lmt_idx + i * RF_PATH_MAX + path) = hal_spec->txgi_max;
2041 _RTW_PRINT_SEL(sel, "%3s ", "NA");
2042 } else {
2043 *(lmt_idx + i * RF_PATH_MAX + path) = lmt_offset + base;
2044 _RTW_PRINT_SEL(sel, "%3d ", lmt_offset);
2045 }
2046 i++;
2047 }
2048 lmt_offset = phy_get_txpwr_lmt_diff(adapter, txpwr_lmt_str(TXPWR_LMT_WW), band, bw, path, rs, tlrs, ntx_idx, ch, 0);
2049 if (lmt_offset == hal_spec->txgi_max)
2050 _RTW_PRINT_SEL(sel, "%3s ", "NA");
2051 else
2052 _RTW_PRINT_SEL(sel, "%3d ", lmt_offset);
2053
2054 }
2055
2056 /* compare limit_idx of each path, print 'x' when mismatch */
2057 if (rfpath_num > 1) {
2058 for (i = 0; i < rfctl->txpwr_lmt_num; i++) {
2059 for (path = 0; path < RF_PATH_MAX; path++) {
2060 if (path >= rfpath_num)
2061 break;
2062 if (*(lmt_idx + i * RF_PATH_MAX + path) != *(lmt_idx + i * RF_PATH_MAX + ((path + 1) % rfpath_num)))
2063 break;
2064 }
2065 if (path >= rfpath_num)
2066 _RTW_PRINT_SEL(sel, " ");
2067 else
2068 _RTW_PRINT_SEL(sel, "x");
2069 }
2070 }
2071 _RTW_PRINT_SEL(sel, "\n");
2072
2073 }
2074 RTW_PRINT_SEL(sel, "\n");
2075 }
2076 } /* loop for rate sections */
2077 } /* loop for bandwidths */
2078 } /* loop for bands */
2079
2080 if (lmt_idx)
2081 rtw_mfree(lmt_idx, sizeof(s8) * RF_PATH_MAX * rfctl->txpwr_lmt_num);
2082
2083 release_lock:
2084 _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
2085 }
2086
2087 /* search matcing first, if not found, alloc one */
rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t * rfctl,const char * lmt_name,u32 nlen,u8 band,u8 bw,u8 tlrs,u8 ntx_idx,u8 ch_idx,s8 lmt)2088 void rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t *rfctl, const char *lmt_name, u32 nlen
2089 , u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt)
2090 {
2091 struct hal_spec_t *hal_spec = GET_HAL_SPEC(dvobj_get_primary_adapter(rfctl_to_dvobj(rfctl)));
2092 struct txpwr_lmt_ent *ent;
2093 _irqL irqL;
2094 _list *cur, *head;
2095 s8 pre_lmt;
2096
2097 if (!lmt_name || !nlen) {
2098 rtw_warn_on(1);
2099 goto exit;
2100 }
2101
2102 _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
2103
2104 /* search for existed entry */
2105 head = &rfctl->txpwr_lmt_list;
2106 cur = get_next(head);
2107 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
2108 ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
2109 cur = get_next(cur);
2110
2111 if (strlen(ent->name) == nlen
2112 && _rtw_memcmp(ent->name, lmt_name, nlen) == _TRUE)
2113 goto chk_lmt_val;
2114 }
2115
2116 /* alloc new one */
2117 ent = (struct txpwr_lmt_ent *)rtw_zvmalloc(sizeof(struct txpwr_lmt_ent) + nlen + 1);
2118 if (!ent)
2119 goto release_lock;
2120
2121 _rtw_init_listhead(&ent->list);
2122 _rtw_memcpy(ent->name, lmt_name, nlen);
2123 {
2124 u8 j, k, l, m;
2125
2126 for (j = 0; j < MAX_2_4G_BANDWIDTH_NUM; ++j)
2127 for (k = 0; k < TXPWR_LMT_RS_NUM_2G; ++k)
2128 for (m = 0; m < CENTER_CH_2G_NUM; ++m)
2129 for (l = 0; l < MAX_TX_COUNT; ++l)
2130 ent->lmt_2g[j][k][m][l] = hal_spec->txgi_max;
2131 #if CONFIG_IEEE80211_BAND_5GHZ
2132 for (j = 0; j < MAX_5G_BANDWIDTH_NUM; ++j)
2133 for (k = 0; k < TXPWR_LMT_RS_NUM_5G; ++k)
2134 for (m = 0; m < CENTER_CH_5G_ALL_NUM; ++m)
2135 for (l = 0; l < MAX_TX_COUNT; ++l)
2136 ent->lmt_5g[j][k][m][l] = hal_spec->txgi_max;
2137 #endif
2138 }
2139
2140 rtw_list_insert_tail(&ent->list, &rfctl->txpwr_lmt_list);
2141 rfctl->txpwr_lmt_num++;
2142
2143 chk_lmt_val:
2144 if (band == BAND_ON_2_4G)
2145 pre_lmt = ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx];
2146 #if CONFIG_IEEE80211_BAND_5GHZ
2147 else if (band == BAND_ON_5G)
2148 pre_lmt = ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx];
2149 #endif
2150 else
2151 goto release_lock;
2152
2153 if (pre_lmt != hal_spec->txgi_max)
2154 RTW_PRINT("duplicate txpwr_lmt for [%s][%s][%s][%s][%uT][%d]\n"
2155 , lmt_name, band_str(band), ch_width_str(bw), txpwr_lmt_rs_str(tlrs), ntx_idx + 1
2156 , band == BAND_ON_2_4G ? ch_idx + 1 : center_ch_5g_all[ch_idx]);
2157
2158 lmt = rtw_min(pre_lmt, lmt);
2159 if (band == BAND_ON_2_4G)
2160 ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx] = lmt;
2161 #if CONFIG_IEEE80211_BAND_5GHZ
2162 else if (band == BAND_ON_5G)
2163 ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx] = lmt;
2164 #endif
2165
2166 if (0)
2167 RTW_PRINT("%s, %4s, %6s, %7s, %uT, ch%3d = %d\n"
2168 , lmt_name, band_str(band), ch_width_str(bw), txpwr_lmt_rs_str(tlrs), ntx_idx + 1
2169 , band == BAND_ON_2_4G ? ch_idx + 1 : center_ch_5g_all[ch_idx]
2170 , lmt);
2171
2172 release_lock:
2173 _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
2174
2175 exit:
2176 return;
2177 }
2178
rtw_txpwr_lmt_add(struct rf_ctl_t * rfctl,const char * lmt_name,u8 band,u8 bw,u8 tlrs,u8 ntx_idx,u8 ch_idx,s8 lmt)2179 inline void rtw_txpwr_lmt_add(struct rf_ctl_t *rfctl, const char *lmt_name
2180 , u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt)
2181 {
2182 rtw_txpwr_lmt_add_with_nlen(rfctl, lmt_name, strlen(lmt_name)
2183 , band, bw, tlrs, ntx_idx, ch_idx, lmt);
2184 }
2185
_rtw_txpwr_lmt_get_by_name(struct rf_ctl_t * rfctl,const char * lmt_name)2186 struct txpwr_lmt_ent *_rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *lmt_name)
2187 {
2188 struct txpwr_lmt_ent *ent;
2189 _list *cur, *head;
2190 u8 found = 0;
2191
2192 head = &rfctl->txpwr_lmt_list;
2193 cur = get_next(head);
2194
2195 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
2196 ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
2197 cur = get_next(cur);
2198
2199 if (strcmp(ent->name, lmt_name) == 0) {
2200 found = 1;
2201 break;
2202 }
2203 }
2204
2205 if (found)
2206 return ent;
2207 return NULL;
2208 }
2209
rtw_txpwr_lmt_get_by_name(struct rf_ctl_t * rfctl,const char * lmt_name)2210 inline struct txpwr_lmt_ent *rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *lmt_name)
2211 {
2212 struct txpwr_lmt_ent *ent;
2213 _irqL irqL;
2214
2215 _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
2216 ent = _rtw_txpwr_lmt_get_by_name(rfctl, lmt_name);
2217 _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
2218
2219 return ent;
2220 }
2221
rtw_txpwr_lmt_list_free(struct rf_ctl_t * rfctl)2222 void rtw_txpwr_lmt_list_free(struct rf_ctl_t *rfctl)
2223 {
2224 struct txpwr_lmt_ent *ent;
2225 _irqL irqL;
2226 _list *cur, *head;
2227
2228 _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
2229
2230 head = &rfctl->txpwr_lmt_list;
2231 cur = get_next(head);
2232
2233 while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
2234 ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
2235 cur = get_next(cur);
2236 if (ent->name == rfctl->txpwr_lmt_name)
2237 rfctl->txpwr_lmt_name = txpwr_lmt_str(TXPWR_LMT_NONE);
2238 rtw_list_delete(&ent->list);
2239 rtw_vmfree((u8 *)ent, sizeof(struct txpwr_lmt_ent) + strlen(ent->name) + 1);
2240 }
2241 rfctl->txpwr_lmt_num = 0;
2242
2243 _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
2244 }
2245 #endif /* CONFIG_TXPWR_LIMIT */
2246
rtw_ch_to_bb_gain_sel(int ch)2247 int rtw_ch_to_bb_gain_sel(int ch)
2248 {
2249 int sel = -1;
2250
2251 if (ch >= 1 && ch <= 14)
2252 sel = BB_GAIN_2G;
2253 #if CONFIG_IEEE80211_BAND_5GHZ
2254 else if (ch >= 36 && ch < 48)
2255 sel = BB_GAIN_5GLB1;
2256 else if (ch >= 52 && ch <= 64)
2257 sel = BB_GAIN_5GLB2;
2258 else if (ch >= 100 && ch <= 120)
2259 sel = BB_GAIN_5GMB1;
2260 else if (ch >= 124 && ch <= 144)
2261 sel = BB_GAIN_5GMB2;
2262 else if (ch >= 149 && ch <= 177)
2263 sel = BB_GAIN_5GHB;
2264 #endif
2265
2266 return sel;
2267 }
2268
rtw_rf_get_kfree_tx_gain_offset(_adapter * padapter,u8 path,u8 ch)2269 s8 rtw_rf_get_kfree_tx_gain_offset(_adapter *padapter, u8 path, u8 ch)
2270 {
2271 s8 kfree_offset = 0;
2272
2273 #ifdef CONFIG_RF_POWER_TRIM
2274 struct kfree_data_t *kfree_data = GET_KFREE_DATA(padapter);
2275 s8 bb_gain_sel = rtw_ch_to_bb_gain_sel(ch);
2276
2277 if (bb_gain_sel < BB_GAIN_2G || bb_gain_sel >= BB_GAIN_NUM) {
2278 rtw_warn_on(1);
2279 goto exit;
2280 }
2281
2282 if (kfree_data->flag & KFREE_FLAG_ON) {
2283 kfree_offset = kfree_data->bb_gain[bb_gain_sel][path];
2284 if (IS_HARDWARE_TYPE_8723D(padapter))
2285 RTW_INFO("%s path:%s, ch:%u, bb_gain_sel:%d, kfree_offset:%d\n"
2286 , __func__, (path == 0)?"S1":"S0",
2287 ch, bb_gain_sel, kfree_offset);
2288 else
2289 RTW_INFO("%s path:%u, ch:%u, bb_gain_sel:%d, kfree_offset:%d\n"
2290 , __func__, path, ch, bb_gain_sel, kfree_offset);
2291 }
2292 exit:
2293 #endif /* CONFIG_RF_POWER_TRIM */
2294 return kfree_offset;
2295 }
2296
rtw_rf_set_tx_gain_offset(_adapter * adapter,u8 path,s8 offset)2297 void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset)
2298 {
2299 #if !defined(CONFIG_RTL8814A) && !defined(CONFIG_RTL8822B) && !defined(CONFIG_RTL8821C) && !defined(CONFIG_RTL8822C) \
2300 && !defined(CONFIG_RTL8723F)
2301 u8 write_value;
2302 #endif
2303 u8 target_path = 0;
2304 u32 val32 = 0;
2305
2306 if (IS_HARDWARE_TYPE_8723D(adapter)) {
2307 target_path = RF_PATH_A; /*in 8723D case path means S0/S1*/
2308 if (path == PPG_8723D_S1)
2309 RTW_INFO("kfree gain_offset 0x55:0x%x ",
2310 rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff));
2311 else if (path == PPG_8723D_S0)
2312 RTW_INFO("kfree gain_offset 0x65:0x%x ",
2313 rtw_hal_read_rfreg(adapter, target_path, 0x65, 0xffffffff));
2314 } else {
2315 target_path = path;
2316 RTW_INFO("kfree gain_offset 0x55:0x%x ", rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff));
2317 }
2318
2319 switch (rtw_get_chip_type(adapter)) {
2320 #ifdef CONFIG_RTL8723D
2321 case RTL8723D:
2322 write_value = RF_TX_GAIN_OFFSET_8723D(offset);
2323 if (path == PPG_8723D_S1)
2324 rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value);
2325 else if (path == PPG_8723D_S0)
2326 rtw_hal_write_rfreg(adapter, target_path, 0x65, 0x0f8000, write_value);
2327 break;
2328 #endif /* CONFIG_RTL8723D */
2329 #ifdef CONFIG_RTL8703B
2330 case RTL8703B:
2331 write_value = RF_TX_GAIN_OFFSET_8703B(offset);
2332 rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value);
2333 break;
2334 #endif /* CONFIG_RTL8703B */
2335 #ifdef CONFIG_RTL8188F
2336 case RTL8188F:
2337 write_value = RF_TX_GAIN_OFFSET_8188F(offset);
2338 rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value);
2339 break;
2340 #endif /* CONFIG_RTL8188F */
2341 #ifdef CONFIG_RTL8188GTV
2342 case RTL8188GTV:
2343 write_value = RF_TX_GAIN_OFFSET_8188GTV(offset);
2344 rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value);
2345 break;
2346 #endif /* CONFIG_RTL8188GTV */
2347 #ifdef CONFIG_RTL8192E
2348 case RTL8192E:
2349 write_value = RF_TX_GAIN_OFFSET_8192E(offset);
2350 rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value);
2351 break;
2352 #endif /* CONFIG_RTL8188F */
2353
2354 #ifdef CONFIG_RTL8821A
2355 case RTL8821:
2356 write_value = RF_TX_GAIN_OFFSET_8821A(offset);
2357 rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value);
2358 break;
2359 #endif /* CONFIG_RTL8821A */
2360 #if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8192F) || defined(CONFIG_RTL8822C) \
2361 || defined(CONFIG_RTL8723F)
2362 case RTL8814A:
2363 case RTL8822B:
2364 case RTL8822C:
2365 case RTL8821C:
2366 case RTL8192F:
2367 case RTL8723F:
2368 RTW_INFO("\nkfree by PhyDM on the sw CH. path %d\n", path);
2369 break;
2370 #endif /* CONFIG_RTL8814A || CONFIG_RTL8822B || CONFIG_RTL8821C || CONFIG_RTL8723F */
2371
2372 default:
2373 rtw_warn_on(1);
2374 break;
2375 }
2376
2377 if (IS_HARDWARE_TYPE_8723D(adapter)) {
2378 if (path == PPG_8723D_S1)
2379 val32 = rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff);
2380 else if (path == PPG_8723D_S0)
2381 val32 = rtw_hal_read_rfreg(adapter, target_path, 0x65, 0xffffffff);
2382 } else {
2383 val32 = rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff);
2384 }
2385 RTW_INFO(" after :0x%x\n", val32);
2386 }
2387
rtw_rf_apply_tx_gain_offset(_adapter * adapter,u8 ch)2388 void rtw_rf_apply_tx_gain_offset(_adapter *adapter, u8 ch)
2389 {
2390 struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
2391 s8 kfree_offset = 0;
2392 s8 tx_pwr_track_offset = 0; /* TODO: 8814A should consider tx pwr track when setting tx gain offset */
2393 s8 total_offset;
2394 int i, total = 0;
2395
2396 if (IS_HARDWARE_TYPE_8723D(adapter))
2397 total = 2; /* S1 and S0 */
2398 else
2399 total = hal_spec->rf_reg_path_num;
2400
2401 for (i = 0; i < total; i++) {
2402 kfree_offset = rtw_rf_get_kfree_tx_gain_offset(adapter, i, ch);
2403 total_offset = kfree_offset + tx_pwr_track_offset;
2404 rtw_rf_set_tx_gain_offset(adapter, i, total_offset);
2405 }
2406 }
2407
rtw_is_long_cac_range(u32 hi,u32 lo,u8 dfs_region)2408 bool rtw_is_long_cac_range(u32 hi, u32 lo, u8 dfs_region)
2409 {
2410 return (dfs_region == RTW_DFS_REGD_ETSI && rtw_is_range_overlap(hi, lo, 5650, 5600)) ? _TRUE : _FALSE;
2411 }
2412
rtw_is_long_cac_ch(u8 ch,u8 bw,u8 offset,u8 dfs_region)2413 bool rtw_is_long_cac_ch(u8 ch, u8 bw, u8 offset, u8 dfs_region)
2414 {
2415 u32 hi, lo;
2416
2417 if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE)
2418 return _FALSE;
2419
2420 return rtw_is_long_cac_range(hi, lo, dfs_region) ? _TRUE : _FALSE;
2421 }
2422