1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26 /*@************************************************************
27 * include files
28 ************************************************************/
29
30 #include "mp_precomp.h"
31 #include "phydm_precomp.h"
32
33 #define READ_AND_CONFIG_MP(ic, txt) (odm_read_and_config_mp_##ic##txt(dm))
34 #define READ_AND_CONFIG_TC(ic, txt) (odm_read_and_config_tc_##ic##txt(dm))
35
36 #if (PHYDM_TESTCHIP_SUPPORT == 1)
37 #define READ_AND_CONFIG(ic, txt) \
38 do { \
39 if (dm->is_mp_chip) \
40 READ_AND_CONFIG_MP(ic, txt); \
41 else \
42 READ_AND_CONFIG_TC(ic, txt); \
43 } while (0)
44 #else
45 #define READ_AND_CONFIG READ_AND_CONFIG_MP
46 #endif
47
48 #define GET_VERSION_MP(ic, txt) (odm_get_version_mp_##ic##txt())
49 #define GET_VERSION_TC(ic, txt) (odm_get_version_tc_##ic##txt())
50
51 #if (PHYDM_TESTCHIP_SUPPORT == 1)
52 #define GET_VERSION(ic, txt) (dm->is_mp_chip ? GET_VERSION_MP(ic, txt) : GET_VERSION_TC(ic, txt))
53 #else
54 #define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt)
55 #endif
56
57 enum hal_status
odm_config_rf_with_header_file(struct dm_struct * dm,enum odm_rf_config_type config_type,u8 e_rf_path)58 odm_config_rf_with_header_file(struct dm_struct *dm,
59 enum odm_rf_config_type config_type,
60 u8 e_rf_path)
61 {
62 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
63 void *adapter = dm->adapter;
64 PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo;
65 #endif
66 enum hal_status result = HAL_STATUS_SUCCESS;
67
68 PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__,
69 (dm->is_mp_chip) ? "MPChip" : "TestChip");
70 PHYDM_DBG(dm, ODM_COMP_INIT,
71 "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
72 dm->support_platform, dm->support_interface, dm->board_type);
73
74 /* @1 AP doesn't use PHYDM power tracking table in these ICs */
75 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
76 #if (RTL8812A_SUPPORT == 1)
77 if (dm->support_ic_type == ODM_RTL8812) {
78 if (config_type == CONFIG_RF_RADIO) {
79 if (e_rf_path == RF_PATH_A)
80 READ_AND_CONFIG_MP(8812a, _radioa);
81 else if (e_rf_path == RF_PATH_B)
82 READ_AND_CONFIG_MP(8812a, _radiob);
83 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
84 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE)
85 HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter));
86 if ((hal_data->EEPROMSVID == 0x17AA && hal_data->EEPROMSMID == 0xA811) ||
87 (hal_data->EEPROMSVID == 0x10EC && hal_data->EEPROMSMID == 0xA812) ||
88 (hal_data->EEPROMSVID == 0x10EC && hal_data->EEPROMSMID == 0x8812))
89 READ_AND_CONFIG_MP(8812a, _txpwr_lmt_hm812a03);
90 else
91 #endif
92 READ_AND_CONFIG_MP(8812a, _txpwr_lmt);
93 }
94 }
95 #endif
96 #if (RTL8821A_SUPPORT == 1)
97 if (dm->support_ic_type == ODM_RTL8821) {
98 if (config_type == CONFIG_RF_RADIO) {
99 if (e_rf_path == RF_PATH_A)
100 READ_AND_CONFIG_MP(8821a, _radioa);
101 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
102 if (dm->support_interface == ODM_ITRF_USB) {
103 if (dm->ext_pa_5g || dm->ext_lna_5g)
104 READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8811a_u_fem);
105 else
106 READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8811a_u_ipa);
107 } else {
108 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
109 if (mgnt_info->CustomerID == RT_CID_8821AE_ASUS_MB)
110 READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a_sar_8mm);
111 else if (mgnt_info->CustomerID == RT_CID_ASUS_NB)
112 READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a_sar_5mm);
113 else
114 #endif
115 READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a);
116 }
117 }
118 }
119 #endif
120 #if (RTL8192E_SUPPORT == 1)
121 if (dm->support_ic_type == ODM_RTL8192E) {
122 if (config_type == CONFIG_RF_RADIO) {
123 if (e_rf_path == RF_PATH_A)
124 READ_AND_CONFIG_MP(8192e, _radioa);
125 else if (e_rf_path == RF_PATH_B)
126 READ_AND_CONFIG_MP(8192e, _radiob);
127 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
128 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) /*Refine by Vincent Lan for 5mm SAR pwr limit*/
129 HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter));
130
131 if ((hal_data->EEPROMSVID == 0x11AD && hal_data->EEPROMSMID == 0x8192) ||
132 (hal_data->EEPROMSVID == 0x11AD && hal_data->EEPROMSMID == 0x8193))
133 READ_AND_CONFIG_MP(8192e, _txpwr_lmt_8192e_sar_5mm);
134 else
135 #endif
136 READ_AND_CONFIG_MP(8192e, _txpwr_lmt);
137 }
138 }
139 #endif
140 #if (RTL8723D_SUPPORT == 1)
141 if (dm->support_ic_type == ODM_RTL8723D) {
142 if (config_type == CONFIG_RF_RADIO) {
143 if (e_rf_path == RF_PATH_A)
144 READ_AND_CONFIG_MP(8723d, _radioa);
145 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
146 READ_AND_CONFIG_MP(8723d, _txpwr_lmt);
147 }
148 }
149 #endif
150 /* @JJ ADD 20161014 */
151 #if (RTL8710B_SUPPORT == 1)
152 if (dm->support_ic_type == ODM_RTL8710B) {
153 if (config_type == CONFIG_RF_RADIO) {
154 if (e_rf_path == RF_PATH_A)
155 READ_AND_CONFIG_MP(8710b, _radioa);
156 } else if (config_type == CONFIG_RF_TXPWR_LMT)
157 READ_AND_CONFIG_MP(8710b, _txpwr_lmt);
158 }
159 #endif
160
161 #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
162 /* @1 All platforms support */
163 #if (RTL8188E_SUPPORT == 1)
164 if (dm->support_ic_type == ODM_RTL8188E) {
165 if (config_type == CONFIG_RF_RADIO) {
166 if (e_rf_path == RF_PATH_A)
167 READ_AND_CONFIG_MP(8188e, _radioa);
168 } else if (config_type == CONFIG_RF_TXPWR_LMT)
169 READ_AND_CONFIG_MP(8188e, _txpwr_lmt);
170 }
171 #endif
172 #if (RTL8723B_SUPPORT == 1)
173 if (dm->support_ic_type == ODM_RTL8723B) {
174 if (config_type == CONFIG_RF_RADIO)
175 READ_AND_CONFIG_MP(8723b, _radioa);
176 else if (config_type == CONFIG_RF_TXPWR_LMT)
177 READ_AND_CONFIG_MP(8723b, _txpwr_lmt);
178 }
179 #endif
180 #if (RTL8814A_SUPPORT == 1)
181 if (dm->support_ic_type == ODM_RTL8814A) {
182 if (config_type == CONFIG_RF_RADIO) {
183 if (e_rf_path == RF_PATH_A)
184 READ_AND_CONFIG_MP(8814a, _radioa);
185 else if (e_rf_path == RF_PATH_B)
186 READ_AND_CONFIG_MP(8814a, _radiob);
187 else if (e_rf_path == RF_PATH_C)
188 READ_AND_CONFIG_MP(8814a, _radioc);
189 else if (e_rf_path == RF_PATH_D)
190 READ_AND_CONFIG_MP(8814a, _radiod);
191 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
192 if (dm->rfe_type == 0)
193 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type0);
194 else if (dm->rfe_type == 1)
195 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type1);
196 else if (dm->rfe_type == 2)
197 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type2);
198 else if (dm->rfe_type == 3)
199 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type3);
200 else if (dm->rfe_type == 5)
201 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type5);
202 else if (dm->rfe_type == 7)
203 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type7);
204 else if (dm->rfe_type == 8)
205 READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type8);
206 else
207 READ_AND_CONFIG_MP(8814a, _txpwr_lmt);
208 }
209 }
210 #endif
211 #if (RTL8703B_SUPPORT == 1)
212 if (dm->support_ic_type == ODM_RTL8703B) {
213 if (config_type == CONFIG_RF_RADIO) {
214 if (e_rf_path == RF_PATH_A)
215 READ_AND_CONFIG_MP(8703b, _radioa);
216 }
217 }
218 #endif
219 #if (RTL8188F_SUPPORT == 1)
220 if (dm->support_ic_type == ODM_RTL8188F) {
221 if (config_type == CONFIG_RF_RADIO) {
222 if (e_rf_path == RF_PATH_A)
223 READ_AND_CONFIG_MP(8188f, _radioa);
224 } else if (config_type == CONFIG_RF_TXPWR_LMT)
225 READ_AND_CONFIG_MP(8188f, _txpwr_lmt);
226 }
227 #endif
228 #if (RTL8822B_SUPPORT == 1)
229 if (dm->support_ic_type == ODM_RTL8822B) {
230 if (config_type == CONFIG_RF_RADIO) {
231 if (e_rf_path == RF_PATH_A)
232 READ_AND_CONFIG_MP(8822b, _radioa);
233 else if (e_rf_path == RF_PATH_B)
234 READ_AND_CONFIG_MP(8822b, _radiob);
235 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
236 if (dm->rfe_type == 5)
237 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type5);
238 else if (dm->rfe_type == 2)
239 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type2);
240 else if (dm->rfe_type == 3)
241 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type3);
242 else if (dm->rfe_type == 4)
243 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type4);
244 else if (dm->rfe_type == 12)
245 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type12);
246 else if (dm->rfe_type == 15)
247 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type15);
248 else if (dm->rfe_type == 16)
249 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type16);
250 else if (dm->rfe_type == 17)
251 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type17);
252 else if (dm->rfe_type == 18)
253 READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type18);
254 //else if (dm->rfe_type == 19)
255 //READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type19);
256 else
257 READ_AND_CONFIG_MP(8822b, _txpwr_lmt);
258 }
259 }
260 #endif
261
262 #if (RTL8197F_SUPPORT == 1)
263 if (dm->support_ic_type == ODM_RTL8197F) {
264 if (config_type == CONFIG_RF_RADIO) {
265 if (e_rf_path == RF_PATH_A)
266 READ_AND_CONFIG_MP(8197f, _radioa);
267 else if (e_rf_path == RF_PATH_B)
268 READ_AND_CONFIG_MP(8197f, _radiob);
269 }
270 }
271 #endif
272 /*@jj add 20170822*/
273 #if (RTL8192F_SUPPORT == 1)
274 if (dm->support_ic_type == ODM_RTL8192F) {
275 if (config_type == CONFIG_RF_RADIO) {
276 if (e_rf_path == RF_PATH_A)
277 READ_AND_CONFIG_MP(8192f, _radioa);
278 else if (e_rf_path == RF_PATH_B)
279 READ_AND_CONFIG_MP(8192f, _radiob);
280 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
281 if (dm->rfe_type == 0)
282 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type0);
283 else if (dm->rfe_type == 1)
284 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type1);
285 else if (dm->rfe_type == 2)
286 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type2);
287 else if (dm->rfe_type == 3)
288 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type3);
289 else if (dm->rfe_type == 4)
290 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type4);
291 else if (dm->rfe_type == 5)
292 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type5);
293 else if (dm->rfe_type == 6)
294 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type6);
295 else if (dm->rfe_type == 7)
296 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type7);
297 else if (dm->rfe_type == 8)
298 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type8);
299 else if (dm->rfe_type == 9)
300 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type9);
301 else if (dm->rfe_type == 10)
302 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type10);
303 else if (dm->rfe_type == 11)
304 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type11);
305 else if (dm->rfe_type == 12)
306 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type12);
307 else if (dm->rfe_type == 13)
308 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type13);
309 else if (dm->rfe_type == 14)
310 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type14);
311 else if (dm->rfe_type == 15)
312 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type15);
313 else if (dm->rfe_type == 16)
314 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type16);
315 else if (dm->rfe_type == 17)
316 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type17);
317 else if (dm->rfe_type == 18)
318 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type18);
319 else if (dm->rfe_type == 19)
320 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type19);
321 else if (dm->rfe_type == 20)
322 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type20);
323 else if (dm->rfe_type == 21)
324 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type21);
325 else if (dm->rfe_type == 22)
326 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type22);
327 else if (dm->rfe_type == 23)
328 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type23);
329 else if (dm->rfe_type == 24)
330 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type24);
331 else if (dm->rfe_type == 25)
332 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type25);
333 else if (dm->rfe_type == 26)
334 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type26);
335 else if (dm->rfe_type == 27)
336 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type27);
337 else if (dm->rfe_type == 28)
338 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type28);
339 else if (dm->rfe_type == 29)
340 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type29);
341 else if (dm->rfe_type == 30)
342 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type30);
343 else if (dm->rfe_type == 31)
344 READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type31);
345 else
346 READ_AND_CONFIG_MP(8192f, _txpwr_lmt);
347 }
348 }
349 #endif
350 #if (RTL8721D_SUPPORT == 1)
351 if (dm->support_ic_type == ODM_RTL8721D) {
352 if (config_type == CONFIG_RF_RADIO) {
353 if (e_rf_path == RF_PATH_A)
354 READ_AND_CONFIG_MP(8721d, _radioa);
355 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
356 if (dm->power_voltage == ODM_POWER_18V)
357 READ_AND_CONFIG_MP(8721d, _txpwr_lmt_type0);
358 else
359 READ_AND_CONFIG_MP(8721d, _txpwr_lmt_type1);
360 }
361 }
362 #endif
363
364 #if (RTL8710C_SUPPORT == 1)
365 if (dm->support_ic_type == ODM_RTL8710C) {
366 if (config_type == CONFIG_RF_RADIO) {
367 if (e_rf_path == RF_PATH_A)
368 READ_AND_CONFIG_MP(8710c, _radioa);
369 } else if (config_type == CONFIG_RF_TXPWR_LMT)
370 READ_AND_CONFIG_MP(8710c, _txpwr_lmt);
371 }
372 #endif
373
374 #if (RTL8821C_SUPPORT == 1)
375 if (dm->support_ic_type == ODM_RTL8821C) {
376 if (config_type == CONFIG_RF_RADIO) {
377 if (e_rf_path == RF_PATH_A)
378 READ_AND_CONFIG(8821c, _radioa);
379 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
380 READ_AND_CONFIG(8821c, _txpwr_lmt);
381 }
382 }
383 #endif
384 #if (RTL8195B_SUPPORT == 1)
385 if (dm->support_ic_type == ODM_RTL8195B) {
386 if (config_type == CONFIG_RF_RADIO) {
387 if (e_rf_path == RF_PATH_A)
388 READ_AND_CONFIG(8195b, _radioa);
389 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
390 READ_AND_CONFIG(8195b, _txpwr_lmt);
391 }
392 }
393 #endif
394 #if (RTL8198F_SUPPORT == 1)
395 if (dm->support_ic_type == ODM_RTL8198F) {
396 if (config_type == CONFIG_RF_RADIO) {
397 if (e_rf_path == RF_PATH_A)
398 READ_AND_CONFIG_MP(8198f, _radioa);
399 else if (e_rf_path == RF_PATH_B)
400 READ_AND_CONFIG_MP(8198f, _radiob);
401 else if (e_rf_path == RF_PATH_C)
402 READ_AND_CONFIG_MP(8198f, _radioc);
403 else if (e_rf_path == RF_PATH_D)
404 READ_AND_CONFIG_MP(8198f, _radiod);
405 }
406 }
407 #endif
408 /*#if (RTL8814B_SUPPORT == 1)
409 if (dm->support_ic_type == ODM_RTL8814B) {
410 if (config_type == CONFIG_RF_RADIO) {
411 if (e_rf_path == RF_PATH_A)
412 READ_AND_CONFIG_MP(8814b, _radioa);
413 else if (e_rf_path == RF_PATH_B)
414 READ_AND_CONFIG_MP(8814b, _radiob);
415 else if (e_rf_path == RF_PATH_C)
416 READ_AND_CONFIG_MP(8814b, _radioc);
417 else if (e_rf_path == RF_PATH_D)
418 READ_AND_CONFIG_MP(8814b, _radiod);
419 }
420 }
421 #endif
422 */
423 #if (RTL8822C_SUPPORT)
424 if (dm->support_ic_type == ODM_RTL8822C) {
425 if (config_type == CONFIG_RF_RADIO) {
426 if (e_rf_path == RF_PATH_A)
427 READ_AND_CONFIG_MP(8822c, _radioa);
428 else if (e_rf_path == RF_PATH_B)
429 READ_AND_CONFIG_MP(8822c, _radiob);
430 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
431 READ_AND_CONFIG_MP(8822c, _txpwr_lmt);
432 }
433 }
434 #endif
435 #if (RTL8812F_SUPPORT)
436 if (dm->support_ic_type == ODM_RTL8812F) {
437 if (config_type == CONFIG_RF_RADIO) {
438 if (e_rf_path == RF_PATH_A)
439 READ_AND_CONFIG_MP(8812f, _radioa);
440 else if (e_rf_path == RF_PATH_B)
441 READ_AND_CONFIG_MP(8812f, _radiob);
442 }
443 }
444 #endif
445 #if (RTL8197G_SUPPORT)
446 if (dm->support_ic_type == ODM_RTL8197G) {
447 if (config_type == CONFIG_RF_RADIO) {
448 if (e_rf_path == RF_PATH_A)
449 READ_AND_CONFIG_MP(8197g, _radioa);
450 else if (e_rf_path == RF_PATH_B)
451 READ_AND_CONFIG_MP(8197g, _radiob);
452 }
453 }
454 #endif
455
456 /*8814B need review, when phydm has related files*/
457 #if (RTL8814B_SUPPORT)
458 if (dm->support_ic_type == ODM_RTL8814B) {
459 if (config_type == CONFIG_RF_RADIO) {
460 if (e_rf_path == RF_PATH_A)
461 READ_AND_CONFIG_MP(8814b, _radioa);
462 else if (e_rf_path == RF_PATH_B)
463 READ_AND_CONFIG_MP(8814b, _radiob);
464 else if (e_rf_path == RF_PATH_C)
465 READ_AND_CONFIG_MP(8814b, _radioc);
466 else if (e_rf_path == RF_PATH_D)
467 READ_AND_CONFIG_MP(8814b, _radiod);
468 }
469 if (config_type == CONFIG_RF_SYN_RADIO) {
470 if (e_rf_path == RF_SYN0)
471 READ_AND_CONFIG_MP(8814b, _radiosyn0);
472 else if (e_rf_path == RF_SYN1)
473 READ_AND_CONFIG_MP(8814b, _radiosyn1);
474 } else if (config_type == CONFIG_RF_TXPWR_LMT) {
475 READ_AND_CONFIG_MP(8814b, _txpwr_lmt);
476 }
477 }
478 #endif
479
480 if (config_type == CONFIG_RF_RADIO) {
481 if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
482 result = phydm_set_reg_by_fw(dm,
483 PHYDM_HALMAC_CMD_END,
484 0,
485 0,
486 0,
487 (enum rf_path)0,
488 0);
489 PHYDM_DBG(dm, ODM_COMP_INIT,
490 "rf param offload end!result = %d", result);
491 }
492 }
493
494 return result;
495 }
496
497 enum hal_status
odm_config_rf_with_tx_pwr_track_header_file(struct dm_struct * dm)498 odm_config_rf_with_tx_pwr_track_header_file(struct dm_struct *dm)
499 {
500 PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__,
501 (dm->is_mp_chip) ? "MPChip" : "TestChip");
502 PHYDM_DBG(dm, ODM_COMP_INIT,
503 "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
504 dm->support_platform, dm->support_interface, dm->board_type);
505
506 /* @1 AP doesn't use PHYDM power tracking table in these ICs */
507 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
508 #if RTL8821A_SUPPORT
509 if (dm->support_ic_type == ODM_RTL8821) {
510 if (dm->support_interface == ODM_ITRF_PCIE)
511 READ_AND_CONFIG_MP(8821a, _txpowertrack_pcie);
512 else if (dm->support_interface == ODM_ITRF_USB)
513 READ_AND_CONFIG_MP(8821a, _txpowertrack_usb);
514 else if (dm->support_interface == ODM_ITRF_SDIO)
515 READ_AND_CONFIG_MP(8821a, _txpowertrack_sdio);
516 }
517 #endif
518 #if RTL8812A_SUPPORT
519 if (dm->support_ic_type == ODM_RTL8812) {
520 if (dm->support_interface == ODM_ITRF_PCIE)
521 READ_AND_CONFIG_MP(8812a, _txpowertrack_pcie);
522 else if (dm->support_interface == ODM_ITRF_USB) {
523 if (dm->rfe_type == 3 && dm->is_mp_chip)
524 READ_AND_CONFIG_MP(8812a, _txpowertrack_rfe3);
525 else
526 READ_AND_CONFIG_MP(8812a, _txpowertrack_usb);
527 }
528 }
529 #endif
530 #if RTL8192E_SUPPORT
531 if (dm->support_ic_type == ODM_RTL8192E) {
532 if (dm->support_interface == ODM_ITRF_PCIE)
533 READ_AND_CONFIG_MP(8192e, _txpowertrack_pcie);
534 else if (dm->support_interface == ODM_ITRF_USB)
535 READ_AND_CONFIG_MP(8192e, _txpowertrack_usb);
536 else if (dm->support_interface == ODM_ITRF_SDIO)
537 READ_AND_CONFIG_MP(8192e, _txpowertrack_sdio);
538 }
539 #endif
540 #if RTL8723D_SUPPORT
541 if (dm->support_ic_type == ODM_RTL8723D) {
542 if (dm->support_interface == ODM_ITRF_PCIE)
543 READ_AND_CONFIG_MP(8723d, _txpowertrack_pcie);
544 else if (dm->support_interface == ODM_ITRF_USB)
545 READ_AND_CONFIG_MP(8723d, _txpowertrack_usb);
546 else if (dm->support_interface == ODM_ITRF_SDIO)
547 READ_AND_CONFIG_MP(8723d, _txpowertrack_sdio);
548
549 READ_AND_CONFIG_MP(8723d, _txxtaltrack);
550 }
551 #endif
552 /* @JJ ADD 20161014 */
553 #if RTL8710B_SUPPORT
554 if (dm->support_ic_type == ODM_RTL8710B) {
555 if (dm->package_type == 1)
556 READ_AND_CONFIG_MP(8710b, _txpowertrack_qfn48m_smic);
557 else if (dm->package_type == 5)
558 READ_AND_CONFIG_MP(8710b, _txpowertrack_qfn48m_umc);
559
560 READ_AND_CONFIG_MP(8710b, _txxtaltrack);
561 }
562 #endif
563 #if RTL8188E_SUPPORT
564 if (dm->support_ic_type == ODM_RTL8188E) {
565 if (odm_get_mac_reg(dm, R_0xf0, 0xF000) >= 8) { /*@if 0xF0[15:12] >= 8, SMIC*/
566 if (dm->support_interface == ODM_ITRF_PCIE)
567 READ_AND_CONFIG_MP(8188e, _txpowertrack_pcie_icut);
568 else if (dm->support_interface == ODM_ITRF_USB)
569 READ_AND_CONFIG_MP(8188e, _txpowertrack_usb_icut);
570 else if (dm->support_interface == ODM_ITRF_SDIO)
571 READ_AND_CONFIG_MP(8188e, _txpowertrack_sdio_icut);
572 } else { /*@else 0xF0[15:12] < 8, TSMC*/
573 if (dm->support_interface == ODM_ITRF_PCIE)
574 READ_AND_CONFIG_MP(8188e, _txpowertrack_pcie);
575 else if (dm->support_interface == ODM_ITRF_USB)
576 READ_AND_CONFIG_MP(8188e, _txpowertrack_usb);
577 else if (dm->support_interface == ODM_ITRF_SDIO)
578 READ_AND_CONFIG_MP(8188e, _txpowertrack_sdio);
579 }
580 }
581 #endif
582 #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
583 /* @1 All platforms support */
584 #if RTL8723B_SUPPORT
585 if (dm->support_ic_type == ODM_RTL8723B) {
586 if (dm->support_interface == ODM_ITRF_PCIE)
587 READ_AND_CONFIG_MP(8723b, _txpowertrack_pcie);
588 else if (dm->support_interface == ODM_ITRF_USB)
589 READ_AND_CONFIG_MP(8723b, _txpowertrack_usb);
590 else if (dm->support_interface == ODM_ITRF_SDIO)
591 READ_AND_CONFIG_MP(8723b, _txpowertrack_sdio);
592 }
593 #endif
594 #if RTL8814A_SUPPORT
595 if (dm->support_ic_type == ODM_RTL8814A) {
596 if (dm->rfe_type == 0)
597 READ_AND_CONFIG_MP(8814a, _txpowertrack_type0);
598 else if (dm->rfe_type == 2)
599 READ_AND_CONFIG_MP(8814a, _txpowertrack_type2);
600 else if (dm->rfe_type == 5)
601 READ_AND_CONFIG_MP(8814a, _txpowertrack_type5);
602 else if (dm->rfe_type == 7)
603 READ_AND_CONFIG_MP(8814a, _txpowertrack_type7);
604 else if (dm->rfe_type == 8)
605 READ_AND_CONFIG_MP(8814a, _txpowertrack_type8);
606 else
607 READ_AND_CONFIG_MP(8814a, _txpowertrack);
608
609 READ_AND_CONFIG_MP(8814a, _txpowertssi);
610 }
611 #endif
612 #if RTL8703B_SUPPORT
613 if (dm->support_ic_type == ODM_RTL8703B) {
614 if (dm->support_interface == ODM_ITRF_USB)
615 READ_AND_CONFIG_MP(8703b, _txpowertrack_usb);
616 else if (dm->support_interface == ODM_ITRF_SDIO)
617 READ_AND_CONFIG_MP(8703b, _txpowertrack_sdio);
618
619 READ_AND_CONFIG_MP(8703b, _txxtaltrack);
620 }
621 #endif
622 #if RTL8188F_SUPPORT
623 if (dm->support_ic_type == ODM_RTL8188F) {
624 if (dm->support_interface == ODM_ITRF_USB)
625 READ_AND_CONFIG_MP(8188f, _txpowertrack_usb);
626 else if (dm->support_interface == ODM_ITRF_SDIO)
627 READ_AND_CONFIG_MP(8188f, _txpowertrack_sdio);
628 }
629 #endif
630 #if RTL8822B_SUPPORT
631 if (dm->support_ic_type == ODM_RTL8822B) {
632 if (dm->rfe_type == 0)
633 READ_AND_CONFIG_MP(8822b, _txpowertrack_type0);
634 else if (dm->rfe_type == 1)
635 READ_AND_CONFIG_MP(8822b, _txpowertrack_type1);
636 else if (dm->rfe_type == 2)
637 READ_AND_CONFIG_MP(8822b, _txpowertrack_type2);
638 else if ((dm->rfe_type == 3) || (dm->rfe_type == 5))
639 READ_AND_CONFIG_MP(8822b, _txpowertrack_type3_type5);
640 else if (dm->rfe_type == 4)
641 READ_AND_CONFIG_MP(8822b, _txpowertrack_type4);
642 else if (dm->rfe_type == 6)
643 READ_AND_CONFIG_MP(8822b, _txpowertrack_type6);
644 else if (dm->rfe_type == 7)
645 READ_AND_CONFIG_MP(8822b, _txpowertrack_type7);
646 else if (dm->rfe_type == 8)
647 READ_AND_CONFIG_MP(8822b, _txpowertrack_type8);
648 else if (dm->rfe_type == 9)
649 READ_AND_CONFIG_MP(8822b, _txpowertrack_type9);
650 else if (dm->rfe_type == 10)
651 READ_AND_CONFIG_MP(8822b, _txpowertrack_type10);
652 else if (dm->rfe_type == 11)
653 READ_AND_CONFIG_MP(8822b, _txpowertrack_type11);
654 else if (dm->rfe_type == 12)
655 READ_AND_CONFIG_MP(8822b, _txpowertrack_type12);
656 else if (dm->rfe_type == 13)
657 READ_AND_CONFIG_MP(8822b, _txpowertrack_type13);
658 else if (dm->rfe_type == 14)
659 READ_AND_CONFIG_MP(8822b, _txpowertrack_type14);
660 else if (dm->rfe_type == 15)
661 READ_AND_CONFIG_MP(8822b, _txpowertrack_type15);
662 else if (dm->rfe_type == 16)
663 READ_AND_CONFIG_MP(8822b, _txpowertrack_type16);
664 else if (dm->rfe_type == 17)
665 READ_AND_CONFIG_MP(8822b, _txpowertrack_type17);
666 else if (dm->rfe_type == 18)
667 READ_AND_CONFIG_MP(8822b, _txpowertrack_type18);
668 //else if (dm->rfe_type == 19)
669 //READ_AND_CONFIG_MP(8822b, _txpowertrack_type19);
670 else
671 READ_AND_CONFIG_MP(8822b, _txpowertrack);
672 }
673 #endif
674 #if RTL8197F_SUPPORT
675 if (dm->support_ic_type == ODM_RTL8197F) {
676 if (dm->rfe_type == 0)
677 READ_AND_CONFIG_MP(8197f, _txpowertrack_type0);
678 else if (dm->rfe_type == 1)
679 READ_AND_CONFIG_MP(8197f, _txpowertrack_type1);
680 else
681 READ_AND_CONFIG_MP(8197f, _txpowertrack);
682 }
683 #endif
684 /*@jj add 20170822*/
685 #if RTL8192F_SUPPORT
686 if (dm->support_ic_type == ODM_RTL8192F) {
687 if (dm->rfe_type == 0)
688 READ_AND_CONFIG_MP(8192f, _txpowertrack_type0);
689 else if (dm->rfe_type == 1)
690 READ_AND_CONFIG_MP(8192f, _txpowertrack_type1);
691 else if (dm->rfe_type == 2)
692 READ_AND_CONFIG_MP(8192f, _txpowertrack_type2);
693 else if (dm->rfe_type == 3)
694 READ_AND_CONFIG_MP(8192f, _txpowertrack_type3);
695 else if (dm->rfe_type == 4)
696 READ_AND_CONFIG_MP(8192f, _txpowertrack_type4);
697 else if (dm->rfe_type == 5)
698 READ_AND_CONFIG_MP(8192f, _txpowertrack_type5);
699 else if (dm->rfe_type == 6)
700 READ_AND_CONFIG_MP(8192f, _txpowertrack_type6);
701 else if (dm->rfe_type == 7)
702 READ_AND_CONFIG_MP(8192f, _txpowertrack_type7);
703 else if (dm->rfe_type == 8)
704 READ_AND_CONFIG_MP(8192f, _txpowertrack_type8);
705 else if (dm->rfe_type == 9)
706 READ_AND_CONFIG_MP(8192f, _txpowertrack_type9);
707 else if (dm->rfe_type == 10)
708 READ_AND_CONFIG_MP(8192f, _txpowertrack_type10);
709 else if (dm->rfe_type == 11)
710 READ_AND_CONFIG_MP(8192f, _txpowertrack_type11);
711 else if (dm->rfe_type == 12)
712 READ_AND_CONFIG_MP(8192f, _txpowertrack_type12);
713 else if (dm->rfe_type == 13)
714 READ_AND_CONFIG_MP(8192f, _txpowertrack_type13);
715 else if (dm->rfe_type == 14)
716 READ_AND_CONFIG_MP(8192f, _txpowertrack_type14);
717 else if (dm->rfe_type == 15)
718 READ_AND_CONFIG_MP(8192f, _txpowertrack_type15);
719 else if (dm->rfe_type == 16)
720 READ_AND_CONFIG_MP(8192f, _txpowertrack_type16);
721 else if (dm->rfe_type == 17)
722 READ_AND_CONFIG_MP(8192f, _txpowertrack_type17);
723 else if (dm->rfe_type == 18)
724 READ_AND_CONFIG_MP(8192f, _txpowertrack_type18);
725 else if (dm->rfe_type == 19)
726 READ_AND_CONFIG_MP(8192f, _txpowertrack_type19);
727 else if (dm->rfe_type == 20)
728 READ_AND_CONFIG_MP(8192f, _txpowertrack_type20);
729 else if (dm->rfe_type == 21)
730 READ_AND_CONFIG_MP(8192f, _txpowertrack_type21);
731 else if (dm->rfe_type == 22)
732 READ_AND_CONFIG_MP(8192f, _txpowertrack_type22);
733 else if (dm->rfe_type == 23)
734 READ_AND_CONFIG_MP(8192f, _txpowertrack_type23);
735 else if (dm->rfe_type == 24)
736 READ_AND_CONFIG_MP(8192f, _txpowertrack_type24);
737 else if (dm->rfe_type == 25)
738 READ_AND_CONFIG_MP(8192f, _txpowertrack_type25);
739 else if (dm->rfe_type == 26)
740 READ_AND_CONFIG_MP(8192f, _txpowertrack_type26);
741 else if (dm->rfe_type == 27)
742 READ_AND_CONFIG_MP(8192f, _txpowertrack_type27);
743 else if (dm->rfe_type == 28)
744 READ_AND_CONFIG_MP(8192f, _txpowertrack_type28);
745 else if (dm->rfe_type == 29)
746 READ_AND_CONFIG_MP(8192f, _txpowertrack_type29);
747 else if (dm->rfe_type == 30)
748 READ_AND_CONFIG_MP(8192f, _txpowertrack_type30);
749 else if (dm->rfe_type == 31)
750 READ_AND_CONFIG_MP(8192f, _txpowertrack_type31);
751 else
752 READ_AND_CONFIG_MP(8192f, _txpowertrack);
753
754 READ_AND_CONFIG_MP(8192f, _txxtaltrack);
755 }
756 #endif
757
758 #if RTL8721D_SUPPORT
759 if (dm->support_ic_type == ODM_RTL8721D) {
760 #if 0
761 if (dm->package_type == 1)
762 READ_AND_CONFIG_MP(8721d, _txpowertrack_qfn48m_smic);
763 else if (dm->package_type == 5)
764 READ_AND_CONFIG_MP(8721d, _txpowertrack_qfn48m_umc);
765 #endif
766 READ_AND_CONFIG_MP(8721d, _txpowertrack);
767 READ_AND_CONFIG_MP(8721d, _txxtaltrack);
768 }
769 #endif
770
771 #if RTL8710C_SUPPORT
772 if (dm->support_ic_type == ODM_RTL8710C) {
773 #if 0
774 if (dm->package_type == 1)
775 READ_AND_CONFIG_MP(8710c, _txpowertrack_qfn48m_smic);
776 else if (dm->package_type == 5)
777 READ_AND_CONFIG_MP(8710c, _txpowertrack_qfn48m_umc);
778 #endif
779 READ_AND_CONFIG_MP(8710c, _txpowertrack);
780 READ_AND_CONFIG_MP(8710c, _txxtaltrack);
781 }
782 #endif
783
784 #if RTL8821C_SUPPORT
785 if (dm->support_ic_type == ODM_RTL8821C) {
786 if (dm->rfe_type == 0x5)
787 READ_AND_CONFIG(8821c, _txpowertrack_type0x28);
788 else if (dm->rfe_type == 0x4)
789 READ_AND_CONFIG(8821c, _txpowertrack_type0x20);
790 else
791 READ_AND_CONFIG(8821c, _txpowertrack);
792 }
793 #endif
794
795 #if RTL8198F_SUPPORT
796 if (dm->support_ic_type == ODM_RTL8198F) {
797 if (dm->rfe_type == 0)
798 READ_AND_CONFIG_MP(8198f, _txpowertrack_type0);
799 else if (dm->rfe_type == 1)
800 READ_AND_CONFIG_MP(8198f, _txpowertrack_type1);
801 else if (dm->rfe_type == 3)
802 READ_AND_CONFIG_MP(8198f, _txpowertrack_type3);
803 else
804 READ_AND_CONFIG_MP(8198f, _txpowertrack);
805 }
806 #endif
807
808 #if RTL8195B_SUPPORT
809 if (dm->support_ic_type == ODM_RTL8195B) {
810 if (dm->package_type == 1) {
811 READ_AND_CONFIG_MP(8195b, _txpowertrack_pkg1);
812 READ_AND_CONFIG_MP(8195b, _txxtaltrack_pkg1);
813 } else {
814 READ_AND_CONFIG_MP(8195b, _txpowertrack);
815 READ_AND_CONFIG_MP(8195b, _txxtaltrack);
816 }
817 }
818 #endif
819
820 #if (RTL8822C_SUPPORT)
821 if (dm->support_ic_type == ODM_RTL8822C) {
822 if (dm->en_tssi_mode)
823 READ_AND_CONFIG_MP(8822c, _txpowertracktssi);
824 else
825 READ_AND_CONFIG_MP(8822c, _txpowertrack);
826 }
827 #endif
828
829 #if (RTL8812F_SUPPORT)
830 if (dm->support_ic_type == ODM_RTL8812F) {
831 if (dm->rfe_type == 0)
832 READ_AND_CONFIG_MP(8812f, _txpowertrack_type0);
833 else if (dm->rfe_type == 1)
834 READ_AND_CONFIG_MP(8812f, _txpowertrack_type1);
835 else if (dm->rfe_type == 2)
836 READ_AND_CONFIG_MP(8812f, _txpowertrack_type2);
837 else if (dm->rfe_type == 3)
838 READ_AND_CONFIG_MP(8812f, _txpowertrack_type3);
839 else if (dm->rfe_type == 4)
840 READ_AND_CONFIG_MP(8812f, _txpowertrack_type4);
841 else
842 READ_AND_CONFIG_MP(8812f, _txpowertrack);
843 }
844 #endif
845
846 #if (RTL8197G_SUPPORT)
847 if (dm->support_ic_type == ODM_RTL8197G)
848 READ_AND_CONFIG_MP(8197g, _txpowertrack);
849 #endif
850
851 #if RTL8814B_SUPPORT
852 if (dm->support_ic_type == ODM_RTL8814B) {
853 if (dm->rfe_type == 0)
854 READ_AND_CONFIG_MP(8814b, _txpowertrack_type0);
855 else if (dm->rfe_type == 1)
856 READ_AND_CONFIG_MP(8814b, _txpowertrack_type1);
857 else if (dm->rfe_type == 2)
858 READ_AND_CONFIG_MP(8814b, _txpowertrack_type2);
859 #if 0
860 else if (dm->rfe_type == 3)
861 READ_AND_CONFIG_MP(8814b, _txpowertrack_type3);
862 else if (dm->rfe_type == 6)
863 READ_AND_CONFIG_MP(8814b, _txpowertrack_type6);
864 #endif
865 else
866 READ_AND_CONFIG_MP(8814b, _txpowertrack);
867 }
868 #endif
869
870 return HAL_STATUS_SUCCESS;
871 }
872
873 enum hal_status
odm_config_bb_with_header_file(struct dm_struct * dm,enum odm_bb_config_type config_type)874 odm_config_bb_with_header_file(struct dm_struct *dm,
875 enum odm_bb_config_type config_type)
876 {
877 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
878 void *adapter = dm->adapter;
879 PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo;
880 #endif
881 enum hal_status result = HAL_STATUS_SUCCESS;
882
883 /* @1 AP doesn't use PHYDM initialization in these ICs */
884 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
885 #if (RTL8812A_SUPPORT == 1)
886 if (dm->support_ic_type == ODM_RTL8812) {
887 if (config_type == CONFIG_BB_PHY_REG)
888 READ_AND_CONFIG_MP(8812a, _phy_reg);
889 else if (config_type == CONFIG_BB_AGC_TAB)
890 READ_AND_CONFIG_MP(8812a, _agc_tab);
891 else if (config_type == CONFIG_BB_PHY_REG_PG) {
892 if (dm->rfe_type == 3 && dm->is_mp_chip)
893 READ_AND_CONFIG_MP(8812a, _phy_reg_pg_asus);
894 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
895 else if (mgnt_info->CustomerID == RT_CID_WNC_NEC && dm->is_mp_chip)
896 READ_AND_CONFIG_MP(8812a, _phy_reg_pg_nec);
897 #if RT_PLATFORM == PLATFORM_MACOSX
898 /*@{1827}{1024} for BUFFALO power by rate table. Isaiah 2013-11-29*/
899 else if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO)
900 READ_AND_CONFIG_MP(8812a, _phy_reg_pg_dni);
901 /* TP-Link T4UH, Isaiah 2015-03-16*/
902 else if (mgnt_info->CustomerID == RT_CID_TPLINK_HPWR) {
903 pr_debug("RT_CID_TPLINK_HPWR:: _PHY_REG_PG_TPLINK\n");
904 READ_AND_CONFIG_MP(8812a, _phy_reg_pg_tplink);
905 }
906 #endif
907 #endif
908 else
909 READ_AND_CONFIG_MP(8812a, _phy_reg_pg);
910 } else if (config_type == CONFIG_BB_PHY_REG_MP)
911 READ_AND_CONFIG_MP(8812a, _phy_reg_mp);
912 else if (config_type == CONFIG_BB_AGC_TAB_DIFF) {
913 dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD;
914 /*@AGC_TAB DIFF dont support FW offload*/
915 if ((*dm->channel >= 36) && (*dm->channel <= 64))
916 AGC_DIFF_CONFIG_MP(8812a, lb);
917 else if (*dm->channel >= 100)
918 AGC_DIFF_CONFIG_MP(8812a, hb);
919 }
920 }
921 #endif
922 #if (RTL8821A_SUPPORT == 1)
923 if (dm->support_ic_type == ODM_RTL8821) {
924 if (config_type == CONFIG_BB_PHY_REG)
925 READ_AND_CONFIG_MP(8821a, _phy_reg);
926 else if (config_type == CONFIG_BB_AGC_TAB)
927 READ_AND_CONFIG_MP(8821a, _agc_tab);
928 else if (config_type == CONFIG_BB_PHY_REG_PG) {
929 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
930 #if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
931 HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter));
932
933 if ((hal_data->EEPROMSVID == 0x1043 && hal_data->EEPROMSMID == 0x207F))
934 READ_AND_CONFIG_MP(8821a, _phy_reg_pg_e202_sa);
935 else
936 #endif
937 #if (RT_PLATFORM == PLATFORM_MACOSX)
938 /*@ for BUFFALO pwr by rate table */
939 if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO) {
940 /*@ for BUFFALO pwr by rate table (JP/US)*/
941 if (mgnt_info->ChannelPlan == RT_CHANNEL_DOMAIN_US_2G_CANADA_5G)
942 READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_us);
943 else
944 READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_jp);
945 } else
946 #endif
947 #endif
948 READ_AND_CONFIG_MP(8821a, _phy_reg_pg);
949 }
950 }
951 #endif
952 #if (RTL8192E_SUPPORT == 1)
953 if (dm->support_ic_type == ODM_RTL8192E) {
954 if (config_type == CONFIG_BB_PHY_REG)
955 READ_AND_CONFIG_MP(8192e, _phy_reg);
956 else if (config_type == CONFIG_BB_AGC_TAB)
957 READ_AND_CONFIG_MP(8192e, _agc_tab);
958 else if (config_type == CONFIG_BB_PHY_REG_PG)
959 READ_AND_CONFIG_MP(8192e, _phy_reg_pg);
960 }
961 #endif
962 #if (RTL8723D_SUPPORT == 1)
963 if (dm->support_ic_type == ODM_RTL8723D) {
964 if (config_type == CONFIG_BB_PHY_REG)
965 READ_AND_CONFIG_MP(8723d, _phy_reg);
966 else if (config_type == CONFIG_BB_AGC_TAB)
967 READ_AND_CONFIG_MP(8723d, _agc_tab);
968 else if (config_type == CONFIG_BB_PHY_REG_PG)
969 READ_AND_CONFIG_MP(8723d, _phy_reg_pg);
970 }
971 #endif
972 /* @JJ ADD 20161014 */
973 #if (RTL8710B_SUPPORT == 1)
974 if (dm->support_ic_type == ODM_RTL8710B) {
975 if (config_type == CONFIG_BB_PHY_REG)
976 READ_AND_CONFIG_MP(8710b, _phy_reg);
977 else if (config_type == CONFIG_BB_AGC_TAB)
978 READ_AND_CONFIG_MP(8710b, _agc_tab);
979 else if (config_type == CONFIG_BB_PHY_REG_PG)
980 READ_AND_CONFIG_MP(8710b, _phy_reg_pg);
981 }
982 #endif
983
984 #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
985 /* @1 All platforms support */
986 #if (RTL8188E_SUPPORT == 1)
987 if (dm->support_ic_type == ODM_RTL8188E) {
988 if (config_type == CONFIG_BB_PHY_REG)
989 READ_AND_CONFIG_MP(8188e, _phy_reg);
990 else if (config_type == CONFIG_BB_AGC_TAB)
991 READ_AND_CONFIG_MP(8188e, _agc_tab);
992 else if (config_type == CONFIG_BB_PHY_REG_PG)
993 READ_AND_CONFIG_MP(8188e, _phy_reg_pg);
994 }
995 #endif
996 #if (RTL8723B_SUPPORT == 1)
997 if (dm->support_ic_type == ODM_RTL8723B) {
998 if (config_type == CONFIG_BB_PHY_REG)
999 READ_AND_CONFIG_MP(8723b, _phy_reg);
1000 else if (config_type == CONFIG_BB_AGC_TAB)
1001 READ_AND_CONFIG_MP(8723b, _agc_tab);
1002 else if (config_type == CONFIG_BB_PHY_REG_PG)
1003 READ_AND_CONFIG_MP(8723b, _phy_reg_pg);
1004 }
1005 #endif
1006 #if (RTL8814A_SUPPORT == 1)
1007 if (dm->support_ic_type == ODM_RTL8814A) {
1008 if (config_type == CONFIG_BB_PHY_REG)
1009 READ_AND_CONFIG_MP(8814a, _phy_reg);
1010 else if (config_type == CONFIG_BB_AGC_TAB)
1011 READ_AND_CONFIG_MP(8814a, _agc_tab);
1012 else if (config_type == CONFIG_BB_PHY_REG_PG) {
1013 if (dm->rfe_type == 0)
1014 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type0);
1015 else if (dm->rfe_type == 2)
1016 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type2);
1017 else if (dm->rfe_type == 3)
1018 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type3);
1019 else if (dm->rfe_type == 4)
1020 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type4);
1021 else if (dm->rfe_type == 5)
1022 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type5);
1023 else if (dm->rfe_type == 7)
1024 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type7);
1025 else if (dm->rfe_type == 8)
1026 READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type8);
1027 else
1028 READ_AND_CONFIG_MP(8814a, _phy_reg_pg);
1029 } else if (config_type == CONFIG_BB_PHY_REG_MP)
1030 READ_AND_CONFIG_MP(8814a, _phy_reg_mp);
1031 }
1032 #endif
1033 #if (RTL8703B_SUPPORT == 1)
1034 if (dm->support_ic_type == ODM_RTL8703B) {
1035 if (config_type == CONFIG_BB_PHY_REG)
1036 READ_AND_CONFIG_MP(8703b, _phy_reg);
1037 else if (config_type == CONFIG_BB_AGC_TAB)
1038 READ_AND_CONFIG_MP(8703b, _agc_tab);
1039 else if (config_type == CONFIG_BB_PHY_REG_PG)
1040 READ_AND_CONFIG_MP(8703b, _phy_reg_pg);
1041 }
1042 #endif
1043 #if (RTL8188F_SUPPORT == 1)
1044 if (dm->support_ic_type == ODM_RTL8188F) {
1045 if (config_type == CONFIG_BB_PHY_REG)
1046 READ_AND_CONFIG_MP(8188f, _phy_reg);
1047 else if (config_type == CONFIG_BB_AGC_TAB)
1048 READ_AND_CONFIG_MP(8188f, _agc_tab);
1049 else if (config_type == CONFIG_BB_PHY_REG_PG)
1050 READ_AND_CONFIG_MP(8188f, _phy_reg_pg);
1051 }
1052 #endif
1053 #if (RTL8822B_SUPPORT == 1)
1054 if (dm->support_ic_type == ODM_RTL8822B) {
1055 if (config_type == CONFIG_BB_PHY_REG) {
1056 READ_AND_CONFIG_MP(8822b, _phy_reg);
1057 } else if (config_type == CONFIG_BB_AGC_TAB) {
1058 READ_AND_CONFIG_MP(8822b, _agc_tab);
1059 } else if (config_type == CONFIG_BB_PHY_REG_PG) {
1060 if (dm->rfe_type == 2)
1061 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type2);
1062 else if (dm->rfe_type == 3)
1063 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type3);
1064 else if (dm->rfe_type == 4)
1065 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type4);
1066 else if (dm->rfe_type == 5)
1067 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type5);
1068 else if (dm->rfe_type == 12)
1069 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type12);
1070 else if (dm->rfe_type == 15)
1071 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type15);
1072 else if (dm->rfe_type == 16)
1073 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type16);
1074 else if (dm->rfe_type == 17)
1075 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type17);
1076 else if (dm->rfe_type == 18)
1077 READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type18);
1078 //else if (dm->rfe_type == 19)
1079 //READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type19);
1080 else
1081 READ_AND_CONFIG_MP(8822b, _phy_reg_pg);
1082 }
1083 }
1084 #endif
1085
1086 #if (RTL8197F_SUPPORT == 1)
1087 if (dm->support_ic_type == ODM_RTL8197F) {
1088 if (config_type == CONFIG_BB_PHY_REG) {
1089 READ_AND_CONFIG_MP(8197f, _phy_reg);
1090 if (dm->cut_version == ODM_CUT_A)
1091 phydm_phypara_a_cut(dm);
1092 } else if (config_type == CONFIG_BB_AGC_TAB)
1093 READ_AND_CONFIG_MP(8197f, _agc_tab);
1094 }
1095 #endif
1096 /*@jj add 20170822*/
1097 #if (RTL8192F_SUPPORT == 1)
1098 if (dm->support_ic_type == ODM_RTL8192F) {
1099 if (config_type == CONFIG_BB_PHY_REG) {
1100 READ_AND_CONFIG_MP(8192f, _phy_reg);
1101 } else if (config_type == CONFIG_BB_AGC_TAB) {
1102 READ_AND_CONFIG_MP(8192f, _agc_tab);
1103 } else if (config_type == CONFIG_BB_PHY_REG_PG) {
1104 if (dm->rfe_type == 0)
1105 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type0);
1106 else if (dm->rfe_type == 1)
1107 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type1);
1108 else if (dm->rfe_type == 2)
1109 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type2);
1110 else if (dm->rfe_type == 3)
1111 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type3);
1112 else if (dm->rfe_type == 4)
1113 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type4);
1114 else if (dm->rfe_type == 5)
1115 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type5);
1116 else if (dm->rfe_type == 6)
1117 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type6);
1118 else if (dm->rfe_type == 7)
1119 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type7);
1120 else if (dm->rfe_type == 8)
1121 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type8);
1122 else if (dm->rfe_type == 9)
1123 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type9);
1124 else if (dm->rfe_type == 10)
1125 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type10);
1126 else if (dm->rfe_type == 11)
1127 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type11);
1128 else if (dm->rfe_type == 12)
1129 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type12);
1130 else if (dm->rfe_type == 13)
1131 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type13);
1132 else if (dm->rfe_type == 14)
1133 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type14);
1134 else if (dm->rfe_type == 15)
1135 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type15);
1136 else if (dm->rfe_type == 16)
1137 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type16);
1138 else if (dm->rfe_type == 17)
1139 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type17);
1140 else if (dm->rfe_type == 18)
1141 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type18);
1142 else if (dm->rfe_type == 19)
1143 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type19);
1144 else if (dm->rfe_type == 20)
1145 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type20);
1146 else if (dm->rfe_type == 21)
1147 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type21);
1148 else if (dm->rfe_type == 22)
1149 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type22);
1150 else if (dm->rfe_type == 23)
1151 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type23);
1152 else if (dm->rfe_type == 24)
1153 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type24);
1154 else if (dm->rfe_type == 25)
1155 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type25);
1156 else if (dm->rfe_type == 26)
1157 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type26);
1158 else if (dm->rfe_type == 27)
1159 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type27);
1160 else if (dm->rfe_type == 28)
1161 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type28);
1162 else if (dm->rfe_type == 29)
1163 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type29);
1164 else if (dm->rfe_type == 30)
1165 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type30);
1166 else if (dm->rfe_type == 31)
1167 READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type31);
1168 else
1169 READ_AND_CONFIG_MP(8192f, _phy_reg_pg);
1170 }
1171 }
1172 #endif
1173 #if (RTL8721D_SUPPORT == 1)
1174 if (dm->support_ic_type == ODM_RTL8721D) {
1175 if (config_type == CONFIG_BB_PHY_REG)
1176 READ_AND_CONFIG_MP(8721d, _phy_reg);
1177 else if (config_type == CONFIG_BB_AGC_TAB)
1178 READ_AND_CONFIG_MP(8721d, _agc_tab);
1179 else if (config_type == CONFIG_BB_PHY_REG_PG) {
1180 if (dm->power_voltage == ODM_POWER_18V)
1181 READ_AND_CONFIG_MP(8721d, _phy_reg_pg_type0);
1182 else
1183 READ_AND_CONFIG_MP(8721d, _phy_reg_pg_type1);
1184 }
1185 }
1186 #endif
1187
1188 #if (RTL8710C_SUPPORT == 1)
1189 if (dm->support_ic_type == ODM_RTL8710C) {
1190 if (config_type == CONFIG_BB_PHY_REG)
1191 READ_AND_CONFIG_MP(8710c, _phy_reg);
1192 else if (config_type == CONFIG_BB_AGC_TAB)
1193 READ_AND_CONFIG_MP(8710c, _agc_tab);
1194 else if (config_type == CONFIG_BB_PHY_REG_PG)
1195 READ_AND_CONFIG_MP(8710c, _phy_reg_pg);
1196 }
1197 #endif
1198
1199 #if (RTL8821C_SUPPORT == 1)
1200 if (dm->support_ic_type == ODM_RTL8821C) {
1201 if (config_type == CONFIG_BB_PHY_REG) {
1202 READ_AND_CONFIG(8821c, _phy_reg);
1203 } else if (config_type == CONFIG_BB_AGC_TAB) {
1204 READ_AND_CONFIG(8821c, _agc_tab);
1205 /* @According to RFEtype, choosing correct AGC table*/
1206 if (dm->default_rf_set_8821c == SWITCH_TO_BTG)
1207 AGC_DIFF_CONFIG_MP(8821c, btg);
1208 } else if (config_type == CONFIG_BB_PHY_REG_PG) {
1209 if (dm->rfe_type == 0x5)
1210 READ_AND_CONFIG(8821c, _phy_reg_pg_type0x28);
1211 else
1212 READ_AND_CONFIG(8821c, _phy_reg_pg);
1213 } else if (config_type == CONFIG_BB_AGC_TAB_DIFF) {
1214 dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD;
1215 /*@AGC_TAB DIFF dont support FW offload*/
1216 if (dm->current_rf_set_8821c == SWITCH_TO_BTG)
1217 AGC_DIFF_CONFIG_MP(8821c, btg);
1218 else if (dm->current_rf_set_8821c == SWITCH_TO_WLG)
1219 AGC_DIFF_CONFIG_MP(8821c, wlg);
1220 } else if (config_type == CONFIG_BB_PHY_REG_MP) {
1221 READ_AND_CONFIG(8821c, _phy_reg_mp);
1222 }
1223 }
1224 #endif
1225
1226 #if (RTL8195A_SUPPORT == 1)
1227 if (dm->support_ic_type == ODM_RTL8195A) {
1228 if (config_type == CONFIG_BB_PHY_REG)
1229 READ_AND_CONFIG(8195a, _phy_reg);
1230 else if (config_type == CONFIG_BB_AGC_TAB)
1231 READ_AND_CONFIG(8195a, _agc_tab);
1232 else if (config_type == CONFIG_BB_PHY_REG_PG)
1233 READ_AND_CONFIG(8195a, _phy_reg_pg);
1234 }
1235 #endif
1236 #if (RTL8195B_SUPPORT == 1)
1237 if (dm->support_ic_type == ODM_RTL8195B) {
1238 if (config_type == CONFIG_BB_PHY_REG) {
1239 READ_AND_CONFIG(8195b, _phy_reg);
1240 } else if (config_type == CONFIG_BB_AGC_TAB) {
1241 READ_AND_CONFIG(8195b, _agc_tab);
1242 } else if (config_type == CONFIG_BB_PHY_REG_PG) {
1243 READ_AND_CONFIG(8195b, _phy_reg_pg);
1244 } else if (config_type == CONFIG_BB_PHY_REG_MP) {
1245 if (dm->package_type == 1)
1246 odm_set_bb_reg(dm, R_0xaa8, 0x1f0000, 0x10);
1247 else
1248 odm_set_bb_reg(dm, R_0xaa8, 0x1f0000, 0x12);
1249 }
1250 }
1251 #endif
1252 #if (RTL8198F_SUPPORT == 1)
1253 if (dm->support_ic_type == ODM_RTL8198F) {
1254 if (config_type == CONFIG_BB_PHY_REG)
1255 READ_AND_CONFIG_MP(8198f, _phy_reg);
1256 else if (config_type == CONFIG_BB_AGC_TAB)
1257 READ_AND_CONFIG_MP(8198f, _agc_tab);
1258 }
1259 #endif
1260 #if (RTL8814B_SUPPORT == 1)
1261 if (dm->support_ic_type == ODM_RTL8814B) {
1262 if (config_type == CONFIG_BB_PHY_REG)
1263 READ_AND_CONFIG_MP(8814b, _phy_reg);
1264 else if (config_type == CONFIG_BB_AGC_TAB)
1265 READ_AND_CONFIG_MP(8814b, _agc_tab);
1266 else if (config_type == CONFIG_BB_PHY_REG_PG) {
1267 if (dm->rfe_type == 1)
1268 READ_AND_CONFIG(8814b, _phy_reg_pg_type1);
1269 else
1270 READ_AND_CONFIG(8814b, _phy_reg_pg);
1271 }
1272 }
1273 #endif
1274 #if (RTL8822C_SUPPORT)
1275 if (dm->support_ic_type == ODM_RTL8822C) {
1276 if (config_type == CONFIG_BB_PHY_REG)
1277 READ_AND_CONFIG_MP(8822c, _phy_reg);
1278 else if (config_type == CONFIG_BB_AGC_TAB)
1279 READ_AND_CONFIG_MP(8822c, _agc_tab);
1280 else if (config_type == CONFIG_BB_PHY_REG_PG)
1281 READ_AND_CONFIG(8822c, _phy_reg_pg);
1282 }
1283 #endif
1284 #if (RTL8812F_SUPPORT)
1285 if (dm->support_ic_type == ODM_RTL8812F) {
1286 if (config_type == CONFIG_BB_PHY_REG)
1287 READ_AND_CONFIG_MP(8812f, _phy_reg);
1288 else if (config_type == CONFIG_BB_AGC_TAB)
1289 READ_AND_CONFIG_MP(8812f, _agc_tab);
1290 else if (config_type == CONFIG_BB_PHY_REG_PG)
1291 READ_AND_CONFIG(8812f, _phy_reg_pg);
1292 }
1293 #endif
1294 #if (RTL8197G_SUPPORT)
1295 if (dm->support_ic_type == ODM_RTL8197G) {
1296 if (config_type == CONFIG_BB_PHY_REG)
1297 READ_AND_CONFIG_MP(8197g, _phy_reg);
1298 else if (config_type == CONFIG_BB_AGC_TAB)
1299 READ_AND_CONFIG_MP(8197g, _agc_tab);
1300 else if (config_type == CONFIG_BB_PHY_REG_PG)
1301 READ_AND_CONFIG(8197g, _phy_reg_pg);
1302 }
1303 #endif
1304
1305 if (config_type == CONFIG_BB_PHY_REG ||
1306 config_type == CONFIG_BB_AGC_TAB)
1307 if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
1308 result = phydm_set_reg_by_fw(dm,
1309 PHYDM_HALMAC_CMD_END,
1310 0,
1311 0,
1312 0,
1313 (enum rf_path)0,
1314 0);
1315 PHYDM_DBG(dm, ODM_COMP_INIT,
1316 "phy param offload end!result = %d", result);
1317 }
1318
1319 return result;
1320 }
1321
1322 enum hal_status
odm_config_mac_with_header_file(struct dm_struct * dm)1323 odm_config_mac_with_header_file(struct dm_struct *dm)
1324 {
1325 enum hal_status result = HAL_STATUS_SUCCESS;
1326
1327 PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__,
1328 (dm->is_mp_chip) ? "MPChip" : "TestChip");
1329 PHYDM_DBG(dm, ODM_COMP_INIT,
1330 "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
1331 dm->support_platform, dm->support_interface, dm->board_type);
1332
1333 #if (RTL8822C_SUPPORT || RTL8812F_SUPPORT || RTL8814B_SUPPORT)
1334 if (dm->support_ic_type &
1335 (ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8814B)) {
1336 PHYDM_DBG(dm, ODM_COMP_INIT, "MAC para-package in HALMAC\n");
1337 return result;
1338 }
1339 #endif
1340
1341 /* @1 AP doesn't use PHYDM initialization in these ICs */
1342 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
1343 #if (RTL8812A_SUPPORT == 1)
1344 if (dm->support_ic_type == ODM_RTL8812)
1345 READ_AND_CONFIG_MP(8812a, _mac_reg);
1346 #endif
1347 #if (RTL8821A_SUPPORT == 1)
1348 if (dm->support_ic_type == ODM_RTL8821)
1349 READ_AND_CONFIG_MP(8821a, _mac_reg);
1350 #endif
1351 #if (RTL8192E_SUPPORT == 1)
1352 if (dm->support_ic_type == ODM_RTL8192E)
1353 READ_AND_CONFIG_MP(8192e, _mac_reg);
1354 #endif
1355 #if (RTL8723D_SUPPORT == 1)
1356 if (dm->support_ic_type == ODM_RTL8723D)
1357 READ_AND_CONFIG_MP(8723d, _mac_reg);
1358 #endif
1359 #if (RTL8710B_SUPPORT == 1)
1360 if (dm->support_ic_type == ODM_RTL8710B)
1361 READ_AND_CONFIG_MP(8710b, _mac_reg);
1362 #endif
1363 #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
1364
1365 /* @1 All platforms support */
1366 #if (RTL8188E_SUPPORT == 1)
1367 if (dm->support_ic_type == ODM_RTL8188E)
1368 READ_AND_CONFIG_MP(8188e, _mac_reg);
1369 #endif
1370 #if (RTL8723B_SUPPORT == 1)
1371 if (dm->support_ic_type == ODM_RTL8723B)
1372 READ_AND_CONFIG_MP(8723b, _mac_reg);
1373 #endif
1374 #if (RTL8814A_SUPPORT == 1)
1375 if (dm->support_ic_type == ODM_RTL8814A)
1376 READ_AND_CONFIG_MP(8814a, _mac_reg);
1377 #endif
1378 #if (RTL8703B_SUPPORT == 1)
1379 if (dm->support_ic_type == ODM_RTL8703B)
1380 READ_AND_CONFIG_MP(8703b, _mac_reg);
1381 #endif
1382 #if (RTL8188F_SUPPORT == 1)
1383 if (dm->support_ic_type == ODM_RTL8188F)
1384 READ_AND_CONFIG_MP(8188f, _mac_reg);
1385 #endif
1386 #if (RTL8822B_SUPPORT == 1)
1387 if (dm->support_ic_type == ODM_RTL8822B)
1388 READ_AND_CONFIG_MP(8822b, _mac_reg);
1389 #endif
1390 #if (RTL8197F_SUPPORT == 1)
1391 if (dm->support_ic_type == ODM_RTL8197F)
1392 READ_AND_CONFIG_MP(8197f, _mac_reg);
1393 #endif
1394 #if (RTL8192F_SUPPORT == 1)
1395 if (dm->support_ic_type == ODM_RTL8192F)
1396 READ_AND_CONFIG_MP(8192f, _mac_reg);
1397 #endif
1398 #if (RTL8721D_SUPPORT == 1)
1399 if (dm->support_ic_type == ODM_RTL8721D)
1400 READ_AND_CONFIG_MP(8721d, _mac_reg);
1401 #endif
1402
1403 #if (RTL8710C_SUPPORT == 1)
1404 if (dm->support_ic_type == ODM_RTL8710C)
1405 READ_AND_CONFIG_MP(8710c, _mac_reg);
1406 #endif
1407
1408 #if (RTL8821C_SUPPORT == 1)
1409 if (dm->support_ic_type == ODM_RTL8821C)
1410 READ_AND_CONFIG(8821c, _mac_reg);
1411 #endif
1412 #if (RTL8195A_SUPPORT == 1)
1413 if (dm->support_ic_type == ODM_RTL8195A)
1414 READ_AND_CONFIG_MP(8195a, _mac_reg);
1415 #endif
1416 #if (RTL8195B_SUPPORT == 1)
1417 if (dm->support_ic_type == ODM_RTL8195B)
1418 READ_AND_CONFIG_MP(8195b, _mac_reg);
1419 #endif
1420 #if (RTL8198F_SUPPORT == 1)
1421 if (dm->support_ic_type == ODM_RTL8198F)
1422 READ_AND_CONFIG_MP(8198f, _mac_reg);
1423 #endif
1424 #if (RTL8197G_SUPPORT == 1)
1425 if (dm->support_ic_type == ODM_RTL8197G)
1426 READ_AND_CONFIG_MP(8197g, _mac_reg);
1427 #endif
1428
1429 if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
1430 result = phydm_set_reg_by_fw(dm,
1431 PHYDM_HALMAC_CMD_END,
1432 0,
1433 0,
1434 0,
1435 (enum rf_path)0,
1436 0);
1437 PHYDM_DBG(dm, ODM_COMP_INIT,
1438 "mac param offload end!result = %d", result);
1439 }
1440
1441 return result;
1442 }
1443
odm_get_hw_img_version(struct dm_struct * dm)1444 u32 odm_get_hw_img_version(struct dm_struct *dm)
1445 {
1446 u32 version = 0;
1447
1448 switch (dm->support_ic_type) {
1449 /* @1 AP doesn't use PHYDM initialization in these ICs */
1450 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
1451 #if (RTL8821A_SUPPORT)
1452 case ODM_RTL8821:
1453 version = odm_get_version_mp_8821a_phy_reg();
1454 break;
1455 #endif
1456 #if (RTL8192E_SUPPORT)
1457 case ODM_RTL8192E:
1458 version = odm_get_version_mp_8192e_phy_reg();
1459 break;
1460 #endif
1461 #if (RTL8812A_SUPPORT)
1462 case ODM_RTL8812:
1463 version = odm_get_version_mp_8812a_phy_reg();
1464 break;
1465 #endif
1466 #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
1467 #if (RTL8723D_SUPPORT)
1468 case ODM_RTL8723D:
1469 version = odm_get_version_mp_8723d_phy_reg();
1470 break;
1471 #endif
1472 #if (RTL8710B_SUPPORT)
1473 case ODM_RTL8710B:
1474 version = odm_get_version_mp_8710b_phy_reg();
1475 break;
1476 #endif
1477 #if (RTL8188E_SUPPORT)
1478 case ODM_RTL8188E:
1479 version = odm_get_version_mp_8188e_phy_reg();
1480 break;
1481 #endif
1482 #if (RTL8723B_SUPPORT)
1483 case ODM_RTL8723B:
1484 version = odm_get_version_mp_8723b_phy_reg();
1485 break;
1486 #endif
1487 #if (RTL8814A_SUPPORT)
1488 case ODM_RTL8814A:
1489 version = odm_get_version_mp_8814a_phy_reg();
1490 break;
1491 #endif
1492 #if (RTL8703B_SUPPORT)
1493 case ODM_RTL8703B:
1494 version = odm_get_version_mp_8703b_phy_reg();
1495 break;
1496 #endif
1497 #if (RTL8188F_SUPPORT)
1498 case ODM_RTL8188F:
1499 version = odm_get_version_mp_8188f_phy_reg();
1500 break;
1501 #endif
1502 #if (RTL8822B_SUPPORT)
1503 case ODM_RTL8822B:
1504 version = odm_get_version_mp_8822b_phy_reg();
1505 break;
1506 #endif
1507 #if (RTL8197F_SUPPORT)
1508 case ODM_RTL8197F:
1509 version = odm_get_version_mp_8197f_phy_reg();
1510 break;
1511 #endif
1512
1513 #if (RTL8192F_SUPPORT)
1514 case ODM_RTL8192F:
1515 version = odm_get_version_mp_8192f_phy_reg();
1516 break;
1517 #endif
1518 #if (RTL8721D_SUPPORT)
1519 case ODM_RTL8721D:
1520 version = odm_get_version_mp_8721d_phy_reg();
1521 break;
1522 #endif
1523 #if (RTL8710C_SUPPORT)
1524 case ODM_RTL8710C:
1525 version = GET_VERSION_MP(8710c, _mac_reg);
1526 #endif
1527 #if (RTL8821C_SUPPORT)
1528 case ODM_RTL8821C:
1529 version = odm_get_version_mp_8821c_phy_reg();
1530 break;
1531 #endif
1532 #if (RTL8195B_SUPPORT)
1533 case ODM_RTL8195B:
1534 version = odm_get_version_mp_8195b_phy_reg();
1535 break;
1536 #endif
1537 #if (RTL8198F_SUPPORT)
1538 case ODM_RTL8198F:
1539 version = odm_get_version_mp_8198f_phy_reg();
1540 break;
1541 #endif
1542 #if (RTL8822C_SUPPORT)
1543 case ODM_RTL8822C:
1544 version = odm_get_version_mp_8822c_phy_reg();
1545 break;
1546 #endif
1547 #if (RTL8812F_SUPPORT)
1548 case ODM_RTL8812F:
1549 version = odm_get_version_mp_8812f_phy_reg();
1550 break;
1551 #endif
1552 #if (RTL8197G_SUPPORT)
1553 case ODM_RTL8197G:
1554 version = odm_get_version_mp_8197g_phy_reg();
1555 break;
1556 #endif
1557 #if (RTL8814B_SUPPORT)
1558 case ODM_RTL8814B:
1559 version = odm_get_version_mp_8814b_phy_reg();
1560 break;
1561 #endif
1562 }
1563
1564 return version;
1565 }
1566
query_phydm_trx_capability(struct dm_struct * dm)1567 u32 query_phydm_trx_capability(struct dm_struct *dm)
1568 {
1569 u32 value32 = 0xFFFFFFFF;
1570
1571 #if (RTL8821C_SUPPORT == 1)
1572 if (dm->support_ic_type == ODM_RTL8821C)
1573 value32 = query_phydm_trx_capability_8821c(dm);
1574 #endif
1575 #if (RTL8195B_SUPPORT == 1)
1576 if (dm->support_ic_type == ODM_RTL8195B)
1577 value32 = query_phydm_trx_capability_8195b(dm);
1578 #endif
1579 return value32;
1580 }
1581
query_phydm_stbc_capability(struct dm_struct * dm)1582 u32 query_phydm_stbc_capability(struct dm_struct *dm)
1583 {
1584 u32 value32 = 0xFFFFFFFF;
1585
1586 #if (RTL8821C_SUPPORT == 1)
1587 if (dm->support_ic_type == ODM_RTL8821C)
1588 value32 = query_phydm_stbc_capability_8821c(dm);
1589 #endif
1590 #if (RTL8195B_SUPPORT == 1)
1591 if (dm->support_ic_type == ODM_RTL8195B)
1592 value32 = query_phydm_stbc_capability_8195b(dm);
1593 #endif
1594
1595 return value32;
1596 }
1597
query_phydm_ldpc_capability(struct dm_struct * dm)1598 u32 query_phydm_ldpc_capability(struct dm_struct *dm)
1599 {
1600 u32 value32 = 0xFFFFFFFF;
1601
1602 #if (RTL8821C_SUPPORT == 1)
1603 if (dm->support_ic_type == ODM_RTL8821C)
1604 value32 = query_phydm_ldpc_capability_8821c(dm);
1605 #endif
1606 #if (RTL8195B_SUPPORT == 1)
1607 if (dm->support_ic_type == ODM_RTL8195B)
1608 value32 = query_phydm_ldpc_capability_8195b(dm);
1609 #endif
1610 return value32;
1611 }
1612
query_phydm_txbf_parameters(struct dm_struct * dm)1613 u32 query_phydm_txbf_parameters(struct dm_struct *dm)
1614 {
1615 u32 value32 = 0xFFFFFFFF;
1616
1617 #if (RTL8821C_SUPPORT == 1)
1618 if (dm->support_ic_type == ODM_RTL8821C)
1619 value32 = query_phydm_txbf_parameters_8821c(dm);
1620 #endif
1621 #if (RTL8195B_SUPPORT == 1)
1622 if (dm->support_ic_type == ODM_RTL8195B)
1623 value32 = query_phydm_txbf_parameters_8195b(dm);
1624 #endif
1625 return value32;
1626 }
1627
query_phydm_txbf_capability(struct dm_struct * dm)1628 u32 query_phydm_txbf_capability(struct dm_struct *dm)
1629 {
1630 u32 value32 = 0xFFFFFFFF;
1631
1632 #if (RTL8821C_SUPPORT == 1)
1633 if (dm->support_ic_type == ODM_RTL8821C)
1634 value32 = query_phydm_txbf_capability_8821c(dm);
1635 #endif
1636 #if (RTL8195B_SUPPORT == 1)
1637 if (dm->support_ic_type == ODM_RTL8195B)
1638 value32 = query_phydm_txbf_capability_8195b(dm);
1639 #endif
1640 return value32;
1641 }
1642