1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2017 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called LICENSE. 16 * 17 * Contact Information: 18 * wlanfae <wlanfae@realtek.com> 19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20 * Hsinchu 300, Taiwan. 21 * 22 * Larry Finger <Larry.Finger@lwfinger.net> 23 * 24 *****************************************************************************/ 25 26 #ifndef __HALRF_POWERTRACKING_H__ 27 #define __HALRF_POWERTRACKING_H__ 28 29 #define DPK_DELTA_MAPPING_NUM 13 30 #define index_mapping_HP_NUM 15 31 #define OFDM_TABLE_SIZE 43 32 #define CCK_TABLE_SIZE 33 33 #define CCK_TABLE_SIZE_88F 21 34 #define TXSCALE_TABLE_SIZE 37 35 #define CCK_TABLE_SIZE_8723D 41 36 /*@JJ ADD 20161014 */ 37 #define CCK_TABLE_SIZE_8710B 41 38 #define CCK_TABLE_SIZE_8192F 41 39 40 #define TXPWR_TRACK_TABLE_SIZE 30 41 #define DELTA_SWINGIDX_SIZE 30 42 #define DELTA_SWINTSSI_SIZE 61 43 #define BAND_NUM 4 44 45 #define AVG_THERMAL_NUM 8 46 #define IQK_MAC_REG_NUM 4 47 #define IQK_ADDA_REG_NUM 16 48 #define IQK_BB_REG_NUM_MAX 10 49 50 #define IQK_BB_REG_NUM 9 51 52 #define iqk_matrix_reg_num 8 53 #if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) 54 #else 55 /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */ 56 #define IQK_MATRIX_SETTINGS_NUM (14 + 24 + 21) 57 #endif 58 59 extern u32 ofdm_swing_table[OFDM_TABLE_SIZE]; 60 extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8]; 61 extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8]; 62 63 extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE]; 64 extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8]; 65 extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8]; 66 extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16]; 67 extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16]; 68 extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16]; 69 extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D]; 70 /*@JJ ADD 20161014 */ 71 extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B]; 72 extern u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F]; 73 74 extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE]; 75 76 /*@<20121018, Kordan> In case fail to read TxPowerTrack.txt */ 77 /* we use the table of 88E as the default table. */ 78 #if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) 79 #else 80 extern u8 delta_swing_table_idx_2ga_p_8188e[]; 81 extern u8 delta_swing_table_idx_2ga_n_8188e[]; 82 #endif 83 84 #define dm_check_txpowertracking odm_txpowertracking_check 85 86 struct iqk_matrix_regs_setting { 87 boolean is_iqk_done; 88 s32 value[3][iqk_matrix_reg_num]; 89 boolean is_bw_iqk_result_saved[3]; 90 }; 91 92 struct dm_rf_calibration_struct { 93 /* for tx power tracking */ 94 95 u32 rega24; /* for TempCCK */ 96 s32 rege94; 97 s32 rege9c; 98 s32 regeb4; 99 s32 regebc; 100 101 u8 tx_powercount; 102 boolean is_txpowertracking_init; 103 boolean is_txpowertracking; 104 /* for mp mode, turn off txpwrtracking as default */ 105 u8 txpowertrack_control; 106 u8 tm_trigger; 107 u8 internal_pa_5g[2]; /* pathA / pathB */ 108 109 /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */ 110 u8 thermal_meter[2]; 111 u8 thermal_value; 112 u8 thermal_value_path[MAX_RF_PATH]; 113 u8 thermal_value_lck; 114 u8 thermal_value_iqk; 115 s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */ 116 u8 thermal_value_dpk; 117 u8 thermal_value_avg[AVG_THERMAL_NUM]; 118 u8 thermal_value_avg_path[MAX_RF_PATH][AVG_THERMAL_NUM]; 119 u8 thermal_value_avg_index; 120 u8 thermal_value_avg_index_path[MAX_RF_PATH]; 121 u8 thermal_value_rx_gain; 122 u8 thermal_value_crystal; 123 u8 thermal_value_dpk_store; 124 u8 thermal_value_dpk_track; 125 boolean txpowertracking_in_progress; 126 127 boolean is_reloadtxpowerindex; 128 u8 is_rf_pi_enable; 129 u32 txpowertracking_callback_cnt; /* cosa add for debug */ 130 131 /*@---------------------- Tx power Tracking ---------------------- */ 132 u8 is_cck_in_ch14; 133 u8 CCK_index; 134 u8 OFDM_index[MAX_RF_PATH]; 135 s8 power_index_offset[MAX_RF_PATH]; 136 s8 delta_power_index[MAX_RF_PATH]; 137 s8 delta_power_index_last[MAX_RF_PATH]; 138 boolean is_tx_power_changed; 139 s8 xtal_offset; 140 s8 xtal_offset_last; 141 u8 xtal_offset_eanble; 142 143 struct iqk_matrix_regs_setting 144 iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM]; 145 u8 delta_lck; 146 s8 bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */ 147 u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE]; 148 u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE]; 149 u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE]; 150 u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE]; 151 u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE]; 152 u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE]; 153 u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE]; 154 u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE]; 155 u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE]; 156 u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE]; 157 u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE]; 158 u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE]; 159 u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE]; 160 u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE]; 161 u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE]; 162 u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE]; 163 u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; 164 u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; 165 u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; 166 u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; 167 u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; 168 u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; 169 u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; 170 u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; 171 u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE]; 172 u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE]; 173 u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE]; 174 u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE]; 175 u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE]; 176 u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE]; 177 u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE]; 178 u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE]; 179 u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE]; 180 u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE]; 181 u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE]; 182 u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE]; 183 s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE]; 184 s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE]; 185 u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE]; 186 u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE]; 187 188 u8 bb_swing_idx_ofdm[MAX_RF_PATH]; 189 u8 bb_swing_idx_ofdm_current; 190 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) 191 u8 bb_swing_idx_ofdm_base[MAX_RF_PATH]; 192 #else 193 u8 bb_swing_idx_ofdm_base; 194 #endif 195 boolean default_bb_swing_index_flag; 196 boolean bb_swing_flag_ofdm; 197 u8 bb_swing_idx_cck; 198 u8 bb_swing_idx_cck_current; 199 u8 bb_swing_idx_cck_base; 200 u8 default_ofdm_index; 201 u8 default_cck_index; 202 s8 default_txagc_index; 203 boolean bb_swing_flag_cck; 204 205 s8 absolute_ofdm_swing_idx[MAX_RF_PATH]; 206 s8 remnant_ofdm_swing_idx[MAX_RF_PATH]; 207 s8 absolute_cck_swing_idx[MAX_RF_PATH]; 208 s8 remnant_cck_swing_idx; 209 s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */ 210 boolean modify_tx_agc_flag_path_a; 211 boolean modify_tx_agc_flag_path_b; 212 boolean modify_tx_agc_flag_path_c; 213 boolean modify_tx_agc_flag_path_d; 214 boolean modify_tx_agc_flag_path_a_cck; 215 boolean modify_tx_agc_flag_path_b_cck; 216 217 s8 kfree_offset[MAX_RF_PATH]; 218 219 /*@----------------------------------------------------------------- */ 220 221 /* for IQK */ 222 u32 regc04; 223 u32 reg874; 224 u32 regc08; 225 u32 regb68; 226 u32 regb6c; 227 u32 reg870; 228 u32 reg860; 229 u32 reg864; 230 231 boolean is_iqk_initialized; 232 boolean is_lck_in_progress; 233 boolean is_antenna_detected; 234 boolean is_need_iqk; 235 boolean is_iqk_in_progress; 236 boolean is_iqk_pa_off; 237 u8 delta_iqk; 238 u32 ADDA_backup[IQK_ADDA_REG_NUM]; 239 u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; 240 u32 IQK_BB_backup_recover[9]; 241 u32 IQK_BB_backup[IQK_BB_REG_NUM]; 242 /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ 243 u32 tx_iqc_8723b[2][3][2]; 244 /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ 245 u32 rx_iqc_8723b[2][2][2]; 246 /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ 247 u32 tx_iqc_8703b[3][2]; 248 /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ 249 u32 rx_iqc_8703b[2][2]; 250 /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ 251 u32 tx_iqc_8723d[2][3][2]; 252 /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ 253 u32 rx_iqc_8723d[2][2][2]; 254 /* JJ ADD 20161014 */ 255 /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ 256 u32 tx_iqc_8710b[2][3][2]; 257 /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ 258 u32 rx_iqc_8710b[2][2][2]; 259 260 u8 iqk_step; 261 u8 kcount; 262 u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */ 263 boolean is_mp_mode; 264 265 /*@<James> IQK time measurement */ 266 u64 iqk_start_time; 267 u64 iqk_progressing_time; 268 u64 iqk_total_progressing_time; 269 u64 lck_progressing_time; 270 271 u32 lok_result; 272 273 /* for APK */ 274 u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */ 275 u8 is_ap_kdone; 276 u8 is_apk_thermal_meter_ignore; 277 278 /* DPK */ 279 boolean is_dpk_fail; 280 u8 is_dp_done; 281 u8 is_dp_path_aok; 282 u8 is_dp_path_bok; 283 284 u32 tx_lok[2]; 285 u32 dpk_tx_agc; 286 s32 dpk_gain; 287 u32 dpk_thermal[4]; 288 s8 modify_tx_agc_value_ofdm; 289 s8 modify_tx_agc_value_cck; 290 291 /*@Add by Yuchen for Kfree Phydm*/ 292 u8 reg_rf_kfree_enable; /*for registry*/ 293 u8 rf_kfree_enable; /*for efuse enable check*/ 294 }; 295 296 void odm_txpowertracking_check(void *dm_void); 297 298 void odm_txpowertracking_init(void *dm_void); 299 300 void odm_txpowertracking_check_ap(void *dm_void); 301 302 void odm_txpowertracking_thermal_meter_init(void *dm_void); 303 304 void odm_txpowertracking_init(void *dm_void); 305 306 void odm_txpowertracking_check_mp(void *dm_void); 307 308 void odm_txpowertracking_check_ce(void *dm_void); 309 310 void odm_txpowertracking_direct_ce(void *dm_void); 311 312 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) 313 314 void odm_txpowertracking_callback_thermal_meter92c( 315 void *adapter); 316 317 void odm_txpowertracking_callback_rx_gain_thermal_meter92d( 318 void *adapter); 319 320 void odm_txpowertracking_callback_thermal_meter92d( 321 void *adapter); 322 323 void odm_txpowertracking_direct_call92c( 324 void *adapter); 325 326 void odm_txpowertracking_thermal_meter_check( 327 void *adapter); 328 329 #endif 330 331 #endif /*__HALRF_POWER_TRACKING_H__*/ 332