1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2017 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 16 #ifndef __HALRF_POWERTRACKING_H__ 17 #define __HALRF_POWERTRACKING_H__ 18 19 #if (DM_ODM_SUPPORT_TYPE == ODM_AP) 20 #ifdef RTK_AC_SUPPORT 21 #define ODM_IC_11AC_SERIES_SUPPORT 1 22 #else 23 #define ODM_IC_11AC_SERIES_SUPPORT 0 24 #endif 25 #else 26 #define ODM_IC_11AC_SERIES_SUPPORT 1 27 #endif 28 29 #define DPK_DELTA_MAPPING_NUM 13 30 #define index_mapping_HP_NUM 15 31 #define DELTA_SWINGIDX_SIZE 30 32 #define DELTA_SWINTSSI_SIZE 61 33 #define BAND_NUM 3 34 #define MAX_RF_PATH 4 35 #define TXSCALE_TABLE_SIZE 37 36 #define CCK_TABLE_SIZE_8723D 41 37 /* JJ ADD 20161014 */ 38 #define CCK_TABLE_SIZE_8710B 41 39 40 #define IQK_MAC_REG_NUM 4 41 #define IQK_ADDA_REG_NUM 16 42 #define IQK_BB_REG_NUM_MAX 10 43 44 #define IQK_BB_REG_NUM 9 45 46 #define AVG_THERMAL_NUM 8 47 #define AVG_THERMAL_NUM_DPK 8 48 #define THERMAL_DPK_AVG_NUM 4 49 50 #define iqk_matrix_reg_num 8 51 /* #define IQK_MATRIX_SETTINGS_NUM 1+24+21 */ 52 #define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */ 53 54 #if !defined(_OUTSRC_COEXIST) 55 #define OFDM_TABLE_SIZE_92D 43 56 #define OFDM_TABLE_SIZE 37 57 #define CCK_TABLE_SIZE 33 58 #define CCK_TABLE_SIZE_88F 21 59 #define CCK_TABLE_SIZE_8192F 41 60 61 62 63 /* #define OFDM_TABLE_SIZE_92E 54 */ 64 /* #define CCK_TABLE_SIZE_92E 54 */ 65 extern u32 ofdm_swing_table[OFDM_TABLE_SIZE_92D]; 66 extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8]; 67 extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8]; 68 69 70 extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE_92D]; 71 extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8]; 72 extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8]; 73 extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16]; 74 extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16]; 75 extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16]; 76 extern u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F]; 77 78 #endif 79 80 #define ODM_OFDM_TABLE_SIZE 37 81 #define ODM_CCK_TABLE_SIZE 33 82 #define TXPWR_TRACK_TABLE_SIZE 30 83 /* <20140613, YuChen> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */ 84 extern u8 delta_swing_table_idx_2ga_p_default[DELTA_SWINGIDX_SIZE]; 85 extern u8 delta_swing_table_idx_2ga_n_default[DELTA_SWINGIDX_SIZE]; 86 87 static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; 88 static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; 89 90 /* extern u32 ofdm_swing_table_92e[OFDM_TABLE_SIZE_92E]; 91 * extern u8 cck_swing_table_ch1_ch13_92e[CCK_TABLE_SIZE_92E][8]; 92 * extern u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8]; */ 93 94 #ifdef CONFIG_WLAN_HAL_8192EE 95 #define OFDM_TABLE_SIZE_92E 54 96 #define CCK_TABLE_SIZE_92E 54 97 extern u32 ofdm_swing_table_92e[OFDM_TABLE_SIZE_92E]; 98 extern u8 cck_swing_table_ch1_ch13_92e[CCK_TABLE_SIZE_92E][8]; 99 extern u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8]; 100 #endif 101 102 #define OFDM_TABLE_SIZE_8812 43 103 #define AVG_THERMAL_NUM_8812 4 104 105 #if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 ||\ 106 RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ 107 RTL8814B_SUPPORT == 1) 108 extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE]; 109 #elif(ODM_IC_11AC_SERIES_SUPPORT) 110 extern unsigned int ofdm_swing_table_8812[OFDM_TABLE_SIZE_8812]; 111 #endif 112 113 extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D]; 114 /* JJ ADD 20161014 */ 115 extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B]; 116 117 #define dm_check_txpowertracking odm_txpowertracking_check 118 119 struct iqk_matrix_regs_setting { 120 boolean is_iqk_done; 121 s32 value[1][iqk_matrix_reg_num]; 122 }; 123 124 struct dm_rf_calibration_struct { 125 /* for tx power tracking */ 126 127 u32 rega24; /* for TempCCK */ 128 s32 rege94; 129 s32 rege9c; 130 s32 regeb4; 131 s32 regebc; 132 133 /* u8 is_txpowertracking; */ 134 u8 tx_powercount; 135 boolean is_txpowertracking_init; 136 boolean is_txpowertracking; 137 u8 txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */ 138 u8 tm_trigger; 139 u8 internal_pa_5g[2]; /* pathA / pathB */ 140 141 u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */ 142 u8 thermal_value; 143 u8 thermal_value_path[MAX_RF_PATH]; 144 u8 thermal_value_lck; 145 u8 thermal_value_iqk; 146 s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */ 147 u8 thermal_value_avg[AVG_THERMAL_NUM]; 148 u8 thermal_value_avg_path[MAX_RF_PATH][AVG_THERMAL_NUM]; 149 u8 thermal_value_avg_index; 150 u8 thermal_value_avg_index_path[MAX_RF_PATH]; 151 s8 power_index_offset_path[MAX_RF_PATH]; 152 153 u8 thermal_value_rx_gain; 154 u8 thermal_value_crystal; 155 u8 thermal_value_dpk_store; 156 u8 thermal_value_dpk_track; 157 boolean txpowertracking_in_progress; 158 159 160 boolean is_reloadtxpowerindex; 161 u8 is_rf_pi_enable; 162 u32 txpowertracking_callback_cnt; /* cosa add for debug */ 163 164 u8 is_cck_in_ch14; 165 u8 CCK_index; 166 u8 OFDM_index[MAX_RF_PATH]; 167 s8 power_index_offset; 168 s8 delta_power_index; 169 s8 delta_power_index_path[MAX_RF_PATH]; 170 s8 delta_power_index_last; 171 s8 delta_power_index_last_path[MAX_RF_PATH]; 172 boolean is_tx_power_changed; 173 174 struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM]; 175 u8 delta_lck; 176 u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE]; 177 u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE]; 178 u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE]; 179 u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE]; 180 u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE]; 181 u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE]; 182 u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE]; 183 u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE]; 184 u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE]; 185 u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE]; 186 u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE]; 187 u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE]; 188 u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE]; 189 u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE]; 190 u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE]; 191 u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE]; 192 u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; 193 u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; 194 u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; 195 u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; 196 u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; 197 u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; 198 u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; 199 u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; 200 u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE]; 201 u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE]; 202 u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE]; 203 u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE]; 204 u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE]; 205 u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE]; 206 u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE]; 207 u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE]; 208 u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE]; 209 u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE]; 210 u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE]; 211 u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE]; 212 s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE]; 213 s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE]; 214 u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE]; 215 u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE]; 216 217 u8 bb_swing_idx_ofdm[MAX_RF_PATH]; 218 u8 bb_swing_idx_ofdm_current; 219 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) 220 u8 bb_swing_idx_ofdm_base[MAX_RF_PATH]; 221 #else 222 u8 bb_swing_idx_ofdm_base; 223 u8 bb_swing_idx_ofdm_base_path[MAX_RF_PATH]; 224 #endif 225 boolean bb_swing_flag_ofdm; 226 u8 bb_swing_idx_cck; 227 u8 bb_swing_idx_cck_current; 228 u8 bb_swing_idx_cck_base; 229 u8 default_ofdm_index; 230 u8 default_cck_index; 231 s8 default_txagc_index; 232 boolean bb_swing_flag_cck; 233 234 s8 absolute_ofdm_swing_idx[MAX_RF_PATH]; 235 s8 remnant_ofdm_swing_idx[MAX_RF_PATH]; 236 s8 absolute_cck_swing_idx[MAX_RF_PATH]; 237 s8 remnant_cck_swing_idx; 238 s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */ 239 boolean modify_tx_agc_flag_path_a; 240 boolean modify_tx_agc_flag_path_b; 241 boolean modify_tx_agc_flag_path_c; 242 boolean modify_tx_agc_flag_path_d; 243 boolean modify_tx_agc_flag_path_a_cck; 244 boolean modify_tx_agc_flag_path_b_cck; 245 246 s8 kfree_offset[MAX_RF_PATH]; 247 248 /* -------------------------------------------------------------------- */ 249 250 /* for IQK */ 251 u32 regc04; 252 u32 reg874; 253 u32 regc08; 254 u32 regb68; 255 u32 regb6c; 256 u32 reg870; 257 u32 reg860; 258 u32 reg864; 259 260 boolean is_iqk_initialized; 261 boolean is_lck_in_progress; 262 boolean is_antenna_detected; 263 boolean is_need_iqk; 264 boolean is_iqk_in_progress; 265 boolean is_iqk_pa_off; 266 u8 delta_iqk; 267 u32 ADDA_backup[IQK_ADDA_REG_NUM]; 268 u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; 269 u32 IQK_BB_backup_recover[9]; 270 u32 IQK_BB_backup[IQK_BB_REG_NUM]; 271 u32 tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ 272 u32 rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ 273 u32 tx_iqc_8703b[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ 274 u32 rx_iqc_8703b[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ 275 276 u64 iqk_start_time; 277 u64 iqk_total_progressing_time; 278 u64 iqk_progressing_time; 279 u64 lck_progressing_time; 280 u32 lok_result; 281 u8 iqk_step; 282 u8 kcount; 283 u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */ 284 boolean is_mp_mode; 285 286 /* for APK */ 287 u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */ 288 u8 is_ap_kdone; 289 u8 is_apk_thermal_meter_ignore; 290 u8 is_dp_done; 291 #if 0 /*move below members to halrf_dpk.h*/ 292 u8 is_dp_path_aok; 293 u8 is_dp_path_bok; 294 u8 is_dp_path_cok; 295 u8 is_dp_path_dok; 296 u8 dp_path_a_result[3]; 297 u8 dp_path_b_result[3]; 298 u8 dp_path_c_result[3]; 299 u8 dp_path_d_result[3]; 300 boolean is_dpk_enable; 301 u32 txrate[11]; 302 u8 pwsf_2g_a[3]; 303 u8 pwsf_2g_b[3]; 304 u8 pwsf_2g_c[3]; 305 u8 pwsf_2g_d[3]; 306 u32 lut_2g_even_a[3][64]; 307 u32 lut_2g_odd_a[3][64]; 308 u32 lut_2g_even_b[3][64]; 309 u32 lut_2g_odd_b[3][64]; 310 u32 lut_2g_even_c[3][64]; 311 u32 lut_2g_odd_c[3][64]; 312 u32 lut_2g_even_d[3][64]; 313 u32 lut_2g_odd_d[3][64]; 314 u1Byte is_5g_pdk_a_ok; 315 u1Byte is_5g_pdk_b_ok; 316 u1Byte is_5g_pdk_c_ok; 317 u1Byte is_5g_pdk_d_ok; 318 u1Byte pwsf_5g_a[9]; 319 u1Byte pwsf_5g_b[9]; 320 u1Byte pwsf_5g_c[9]; 321 u1Byte pwsf_5g_d[9]; 322 u4Byte lut_5g_even_a[9][16]; 323 u4Byte lut_5g_odd_a[9][16]; 324 u4Byte lut_5g_even_b[9][16]; 325 u4Byte lut_5g_odd_b[9][16]; 326 u4Byte lut_5g_even_c[9][16]; 327 u4Byte lut_5g_odd_c[9][16]; 328 u4Byte lut_5g_even_d[9][16]; 329 u4Byte lut_5g_odd_d[9][16]; 330 u8 thermal_value_dpk; 331 u8 thermal_value_dpk_avg[AVG_THERMAL_NUM_DPK]; 332 u8 thermal_value_dpk_avg_index; 333 #endif 334 s8 modify_tx_agc_value_ofdm; 335 s8 modify_tx_agc_value_cck; 336 337 /*Add by Yuchen for Kfree Phydm*/ 338 u8 reg_rf_kfree_enable; /*for registry*/ 339 u8 rf_kfree_enable; /*for efuse enable check*/ 340 u32 tx_lok[2]; 341 }; 342 343 void 344 odm_txpowertracking_check_ap( 345 void *dm_void 346 ); 347 348 void 349 odm_txpowertracking_check( 350 void *dm_void 351 ); 352 353 354 void 355 odm_txpowertracking_thermal_meter_init( 356 void *dm_void 357 ); 358 359 void 360 odm_txpowertracking_init( 361 void *dm_void 362 ); 363 364 void 365 odm_txpowertracking_check_mp( 366 void *dm_void 367 ); 368 369 370 void 371 odm_txpowertracking_check_ce( 372 void *dm_void 373 ); 374 375 376 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) 377 378 void 379 odm_txpowertracking_callback_thermal_meter92c( 380 void *adapter 381 ); 382 383 void 384 odm_txpowertracking_callback_rx_gain_thermal_meter92d( 385 void *adapter 386 ); 387 388 void 389 odm_txpowertracking_callback_thermal_meter92d( 390 void *adapter 391 ); 392 393 void 394 odm_txpowertracking_direct_call92c( 395 void *adapter 396 ); 397 398 void 399 odm_txpowertracking_thermal_meter_check( 400 void *adapter 401 ); 402 403 #endif 404 405 406 407 #endif /*#ifndef __HALRF_POWER_TRACKING_H__*/ 408