1*4882a593Smuzhiyun /****************************************************************************** 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright(c) 2007 - 2017 Realtek Corporation. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it 6*4882a593Smuzhiyun * under the terms of version 2 of the GNU General Public License as 7*4882a593Smuzhiyun * published by the Free Software Foundation. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but WITHOUT 10*4882a593Smuzhiyun * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12*4882a593Smuzhiyun * more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * The full GNU General Public License is included in this distribution in the 15*4882a593Smuzhiyun * file called LICENSE. 16*4882a593Smuzhiyun * 17*4882a593Smuzhiyun * Contact Information: 18*4882a593Smuzhiyun * wlanfae <wlanfae@realtek.com> 19*4882a593Smuzhiyun * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20*4882a593Smuzhiyun * Hsinchu 300, Taiwan. 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun * Larry Finger <Larry.Finger@lwfinger.net> 23*4882a593Smuzhiyun * 24*4882a593Smuzhiyun *****************************************************************************/ 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #ifndef __HALRF_H__ 27*4882a593Smuzhiyun #define __HALRF_H__ 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /*@============================================================*/ 30*4882a593Smuzhiyun /*@include files*/ 31*4882a593Smuzhiyun /*@============================================================*/ 32*4882a593Smuzhiyun #include "halrf/halrf_psd.h" 33*4882a593Smuzhiyun #if (RTL8822B_SUPPORT == 1) 34*4882a593Smuzhiyun #include "halrf/rtl8822b/halrf_rfk_init_8822b.h" 35*4882a593Smuzhiyun #endif 36*4882a593Smuzhiyun #if (RTL8822C_SUPPORT == 1) 37*4882a593Smuzhiyun #include "halrf/rtl8822c/halrf_rfk_init_8822c.h" 38*4882a593Smuzhiyun #include "halrf/rtl8822c/halrf_iqk_8822c.h" 39*4882a593Smuzhiyun #include "halrf/rtl8822c/halrf_tssi_8822c.h" 40*4882a593Smuzhiyun #include "halrf/rtl8822c/halrf_dpk_8822c.h" 41*4882a593Smuzhiyun #include "halrf/rtl8822c/halrf_txgapk_8822c.h" 42*4882a593Smuzhiyun #endif 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #if (DM_ODM_SUPPORT_TYPE & ODM_AP) 45*4882a593Smuzhiyun #if (RTL8197G_SUPPORT == 1) 46*4882a593Smuzhiyun #include "halrf/rtl8197g/halrf_rfk_init_8197g.h" 47*4882a593Smuzhiyun #endif 48*4882a593Smuzhiyun #if (RTL8198F_SUPPORT == 1) 49*4882a593Smuzhiyun #include "halrf/rtl8198f/halrf_rfk_init_8198f.h" 50*4882a593Smuzhiyun #endif 51*4882a593Smuzhiyun #if (RTL8812F_SUPPORT == 1) 52*4882a593Smuzhiyun #include "halrf/rtl8812f/halrf_rfk_init_8812f.h" 53*4882a593Smuzhiyun #endif 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #endif 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #if (RTL8814B_SUPPORT == 1) 58*4882a593Smuzhiyun #include "halrf/rtl8814b/halrf_rfk_init_8814b.h" 59*4882a593Smuzhiyun #include "halrf/rtl8814b/halrf_iqk_8814b.h" 60*4882a593Smuzhiyun #include "halrf/rtl8814b/halrf_dpk_8814b.h" 61*4882a593Smuzhiyun #include "halrf/rtl8814b/halrf_txgapk_8814b.h" 62*4882a593Smuzhiyun #endif 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun /*@============================================================*/ 65*4882a593Smuzhiyun /*@Definition */ 66*4882a593Smuzhiyun /*@============================================================*/ 67*4882a593Smuzhiyun /*IQK version*/ 68*4882a593Smuzhiyun #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) 69*4882a593Smuzhiyun #define IQK_VER_8188E "0x14" 70*4882a593Smuzhiyun #define IQK_VER_8192E "0x01" 71*4882a593Smuzhiyun #define IQK_VER_8192F "0x01" 72*4882a593Smuzhiyun #define IQK_VER_8723B "0x1e" 73*4882a593Smuzhiyun #define IQK_VER_8812A "0x02" 74*4882a593Smuzhiyun #define IQK_VER_8821A "0x02" 75*4882a593Smuzhiyun #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) 76*4882a593Smuzhiyun #define IQK_VER_8188E "0x01" 77*4882a593Smuzhiyun #define IQK_VER_8192E "0x01" 78*4882a593Smuzhiyun #define IQK_VER_8192F "0x01" 79*4882a593Smuzhiyun #define IQK_VER_8723B "0x1f" 80*4882a593Smuzhiyun #define IQK_VER_8812A "0x01" 81*4882a593Smuzhiyun #define IQK_VER_8821A "0x01" 82*4882a593Smuzhiyun #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) 83*4882a593Smuzhiyun #define IQK_VER_8188E "0x01" 84*4882a593Smuzhiyun #define IQK_VER_8192E "0x01" 85*4882a593Smuzhiyun #define IQK_VER_8192F "0x01" 86*4882a593Smuzhiyun #define IQK_VER_8723B "0x1e" 87*4882a593Smuzhiyun #define IQK_VER_8812A "0x01" 88*4882a593Smuzhiyun #define IQK_VER_8821A "0x01" 89*4882a593Smuzhiyun #elif (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) 90*4882a593Smuzhiyun #define IQK_VER_8188E "0x01" 91*4882a593Smuzhiyun #define IQK_VER_8192E "0x01" 92*4882a593Smuzhiyun #define IQK_VER_8192F "0x01" 93*4882a593Smuzhiyun #define IQK_VER_8723B "0x1e" 94*4882a593Smuzhiyun #define IQK_VER_8812A "0x01" 95*4882a593Smuzhiyun #define IQK_VER_8821A "0x01" 96*4882a593Smuzhiyun #endif 97*4882a593Smuzhiyun #define IQK_VER_8814A "0x0f" 98*4882a593Smuzhiyun #define IQK_VER_8188F "0x01" 99*4882a593Smuzhiyun #define IQK_VER_8197F "0x1d" 100*4882a593Smuzhiyun #define IQK_VER_8703B "0x05" 101*4882a593Smuzhiyun #define IQK_VER_8710B "0x01" 102*4882a593Smuzhiyun #define IQK_VER_8723D "0x02" 103*4882a593Smuzhiyun #define IQK_VER_8822B "0x32" 104*4882a593Smuzhiyun #define IQK_VER_8822C "0x14" 105*4882a593Smuzhiyun #define IQK_VER_8821C "0x23" 106*4882a593Smuzhiyun #define IQK_VER_8198F "0x0b" 107*4882a593Smuzhiyun #define IQK_VER_8814B "0x13" 108*4882a593Smuzhiyun #define IQK_VER_8812F "0x0c" 109*4882a593Smuzhiyun #define IQK_VER_8710C "0x08" 110*4882a593Smuzhiyun #define IQK_VER_8197G "0x03" 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun /*LCK version*/ 113*4882a593Smuzhiyun #define LCK_VER_8188E "0x02" 114*4882a593Smuzhiyun #define LCK_VER_8192E "0x02" 115*4882a593Smuzhiyun #define LCK_VER_8192F "0x01" 116*4882a593Smuzhiyun #define LCK_VER_8723B "0x02" 117*4882a593Smuzhiyun #define LCK_VER_8812A "0x01" 118*4882a593Smuzhiyun #define LCK_VER_8821A "0x01" 119*4882a593Smuzhiyun #define LCK_VER_8814A "0x01" 120*4882a593Smuzhiyun #define LCK_VER_8188F "0x01" 121*4882a593Smuzhiyun #define LCK_VER_8197F "0x01" 122*4882a593Smuzhiyun #define LCK_VER_8703B "0x01" 123*4882a593Smuzhiyun #define LCK_VER_8710B "0x01" 124*4882a593Smuzhiyun #define LCK_VER_8723D "0x01" 125*4882a593Smuzhiyun #define LCK_VER_8822B "0x02" 126*4882a593Smuzhiyun #define LCK_VER_8822C "0x00" 127*4882a593Smuzhiyun #define LCK_VER_8821C "0x02" 128*4882a593Smuzhiyun #define LCK_VER_8814B "0x02" 129*4882a593Smuzhiyun #define LCK_VER_8195B "0x02" 130*4882a593Smuzhiyun #define LCK_VER_8710C "0x02" 131*4882a593Smuzhiyun #define LCK_VER_8197G "0x01" 132*4882a593Smuzhiyun #define LCK_VER_8198F "0x01" 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun /*power tracking version*/ 135*4882a593Smuzhiyun #define PWRTRK_VER_8188E "0x01" 136*4882a593Smuzhiyun #define PWRTRK_VER_8192E "0x01" 137*4882a593Smuzhiyun #define PWRTRK_VER_8192F "0x01" 138*4882a593Smuzhiyun #define PWRTRK_VER_8723B "0x01" 139*4882a593Smuzhiyun #define PWRTRK_VER_8812A "0x01" 140*4882a593Smuzhiyun #define PWRTRK_VER_8821A "0x01" 141*4882a593Smuzhiyun #define PWRTRK_VER_8814A "0x01" 142*4882a593Smuzhiyun #define PWRTRK_VER_8188F "0x01" 143*4882a593Smuzhiyun #define PWRTRK_VER_8197F "0x01" 144*4882a593Smuzhiyun #define PWRTRK_VER_8703B "0x01" 145*4882a593Smuzhiyun #define PWRTRK_VER_8710B "0x01" 146*4882a593Smuzhiyun #define PWRTRK_VER_8723D "0x01" 147*4882a593Smuzhiyun #define PWRTRK_VER_8822B "0x01" 148*4882a593Smuzhiyun #define PWRTRK_VER_8822C "0x00" 149*4882a593Smuzhiyun #define PWRTRK_VER_8821C "0x01" 150*4882a593Smuzhiyun #define PWRTRK_VER_8814B "0x00" 151*4882a593Smuzhiyun #define PWRTRK_VER_8197G "0x00" 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun /*DPK version*/ 154*4882a593Smuzhiyun #define DPK_VER_8188E "NONE" 155*4882a593Smuzhiyun #define DPK_VER_8192E "NONE" 156*4882a593Smuzhiyun #define DPK_VER_8723B "NONE" 157*4882a593Smuzhiyun #define DPK_VER_8812A "NONE" 158*4882a593Smuzhiyun #define DPK_VER_8821A "NONE" 159*4882a593Smuzhiyun #define DPK_VER_8814A "NONE" 160*4882a593Smuzhiyun #define DPK_VER_8188F "NONE" 161*4882a593Smuzhiyun #define DPK_VER_8197F "0x08" 162*4882a593Smuzhiyun #define DPK_VER_8703B "NONE" 163*4882a593Smuzhiyun #define DPK_VER_8710B "NONE" 164*4882a593Smuzhiyun #define DPK_VER_8723D "NONE" 165*4882a593Smuzhiyun #define DPK_VER_8822B "NONE" 166*4882a593Smuzhiyun #define DPK_VER_8822C "0x1f" 167*4882a593Smuzhiyun #define DPK_VER_8821C "NONE" 168*4882a593Smuzhiyun #define DPK_VER_8192F "0x0d" 169*4882a593Smuzhiyun #define DPK_VER_8198F "0x0e" 170*4882a593Smuzhiyun #define DPK_VER_8814B "0x0f" 171*4882a593Smuzhiyun #define DPK_VER_8195B "0x0c" 172*4882a593Smuzhiyun #define DPK_VER_8812F "0x0a" 173*4882a593Smuzhiyun #define DPK_VER_8197G "0x09" 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun /*RFK_INIT version*/ 176*4882a593Smuzhiyun #define RFK_INIT_VER_8822B "0x8" 177*4882a593Smuzhiyun #define RFK_INIT_VER_8822C "0x8" 178*4882a593Smuzhiyun #define RFK_INIT_VER_8195B "0x1" 179*4882a593Smuzhiyun #define RFK_INIT_VER_8198F "0x8" 180*4882a593Smuzhiyun #define RFK_INIT_VER_8814B "0xa" 181*4882a593Smuzhiyun #define RFK_INIT_VER_8812F "0x4" 182*4882a593Smuzhiyun #define RFK_INIT_VER_8197G "0x4" 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun /*DACK version*/ 185*4882a593Smuzhiyun #define DACK_VER_8822C "0xa" 186*4882a593Smuzhiyun #define DACK_VER_8814B "0x4" 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun /*TXGAPK version*/ 189*4882a593Smuzhiyun #define TXGAPK_VER_8814B "0x1" 190*4882a593Smuzhiyun #define TXGAPK_VER_8195B "0x2" 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun /*Kfree tracking version*/ 193*4882a593Smuzhiyun #define KFREE_VER_8188E \ 194*4882a593Smuzhiyun (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 195*4882a593Smuzhiyun #define KFREE_VER_8192E \ 196*4882a593Smuzhiyun (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 197*4882a593Smuzhiyun #define KFREE_VER_8192F \ 198*4882a593Smuzhiyun (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 199*4882a593Smuzhiyun #define KFREE_VER_8723B \ 200*4882a593Smuzhiyun (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 201*4882a593Smuzhiyun #define KFREE_VER_8812A \ 202*4882a593Smuzhiyun (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 203*4882a593Smuzhiyun #define KFREE_VER_8821A \ 204*4882a593Smuzhiyun (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 205*4882a593Smuzhiyun #define KFREE_VER_8814A \ 206*4882a593Smuzhiyun (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 207*4882a593Smuzhiyun #define KFREE_VER_8188F \ 208*4882a593Smuzhiyun (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 209*4882a593Smuzhiyun #define KFREE_VER_8197F \ 210*4882a593Smuzhiyun (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 211*4882a593Smuzhiyun #define KFREE_VER_8703B \ 212*4882a593Smuzhiyun (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 213*4882a593Smuzhiyun #define KFREE_VER_8710B \ 214*4882a593Smuzhiyun (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 215*4882a593Smuzhiyun #define KFREE_VER_8723D \ 216*4882a593Smuzhiyun (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 217*4882a593Smuzhiyun #define KFREE_VER_8822B \ 218*4882a593Smuzhiyun (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 219*4882a593Smuzhiyun #define KFREE_VER_8822C \ 220*4882a593Smuzhiyun (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 221*4882a593Smuzhiyun #define KFREE_VER_8821C \ 222*4882a593Smuzhiyun (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 223*4882a593Smuzhiyun #define KFREE_VER_8814B \ 224*4882a593Smuzhiyun (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 225*4882a593Smuzhiyun #define KFREE_VER_8197G \ 226*4882a593Smuzhiyun (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun #define TSSI_VER_8812F "0x1" 229*4882a593Smuzhiyun #define TSSI_VER_8822C "0x1" 230*4882a593Smuzhiyun #define TSSI_VER_8821C "0x1" 231*4882a593Smuzhiyun #define TSSI_VER_8814B "0x1" 232*4882a593Smuzhiyun #define TSSI_VER_8197G "0x1" 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun /*PA Bias Calibration version*/ 235*4882a593Smuzhiyun #define PABIASK_VER_8188E \ 236*4882a593Smuzhiyun (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 237*4882a593Smuzhiyun #define PABIASK_VER_8192E \ 238*4882a593Smuzhiyun (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 239*4882a593Smuzhiyun #define PABIASK_VER_8192F \ 240*4882a593Smuzhiyun (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 241*4882a593Smuzhiyun #define PABIASK_VER_8723B \ 242*4882a593Smuzhiyun (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 243*4882a593Smuzhiyun #define PABIASK_VER_8812A \ 244*4882a593Smuzhiyun (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 245*4882a593Smuzhiyun #define PABIASK_VER_8821A \ 246*4882a593Smuzhiyun (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 247*4882a593Smuzhiyun #define PABIASK_VER_8814A \ 248*4882a593Smuzhiyun (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 249*4882a593Smuzhiyun #define PABIASK_VER_8188F \ 250*4882a593Smuzhiyun (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 251*4882a593Smuzhiyun #define PABIASK_VER_8197F \ 252*4882a593Smuzhiyun (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 253*4882a593Smuzhiyun #define PABIASK_VER_8703B \ 254*4882a593Smuzhiyun (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 255*4882a593Smuzhiyun #define PABIASK_VER_8710B \ 256*4882a593Smuzhiyun (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 257*4882a593Smuzhiyun #define PABIASK_VER_8723D \ 258*4882a593Smuzhiyun (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 259*4882a593Smuzhiyun #define PABIASK_VER_8822B \ 260*4882a593Smuzhiyun (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 261*4882a593Smuzhiyun #define PABIASK_VER_8822C \ 262*4882a593Smuzhiyun (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 263*4882a593Smuzhiyun #define PABIASK_VER_8821C \ 264*4882a593Smuzhiyun (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 265*4882a593Smuzhiyun #define PABIASK_VER_8814B \ 266*4882a593Smuzhiyun (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 267*4882a593Smuzhiyun #define PABIASK_VER_8197G \ 268*4882a593Smuzhiyun (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 269*4882a593Smuzhiyun 270*4882a593Smuzhiyun #define HALRF_IQK_VER \ 271*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8188E) ? IQK_VER_8188E : \ 272*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8192E) ? IQK_VER_8192E : \ 273*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8192F) ? IQK_VER_8192F : \ 274*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8723B) ? IQK_VER_8723B : \ 275*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8812) ? IQK_VER_8812A : \ 276*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8821) ? IQK_VER_8821A : \ 277*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8814A) ? IQK_VER_8814A : \ 278*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8188F) ? IQK_VER_8188F : \ 279*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8197F) ? IQK_VER_8197F : \ 280*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8703B) ? IQK_VER_8703B : \ 281*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8710B) ? IQK_VER_8710B : \ 282*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8723D) ? IQK_VER_8723D : \ 283*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8822B) ? IQK_VER_8822B : \ 284*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8822C) ? IQK_VER_8822C : \ 285*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8821C) ? IQK_VER_8821C : \ 286*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8814B) ? IQK_VER_8814B : \ 287*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8710C) ? IQK_VER_8710C : \ 288*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8197G) ? IQK_VER_8197G : "unknown" 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun #define HALRF_LCK_VER \ 291*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8188E) ? LCK_VER_8188E : \ 292*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8192E) ? LCK_VER_8192E : \ 293*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8192F) ? LCK_VER_8192F : \ 294*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8723B) ? LCK_VER_8723B : \ 295*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8812) ? LCK_VER_8812A : \ 296*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8821) ? LCK_VER_8821A : \ 297*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8814A) ? LCK_VER_8814A : \ 298*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8188F) ? LCK_VER_8188F : \ 299*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8197F) ? LCK_VER_8197F : \ 300*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8703B) ? LCK_VER_8703B : \ 301*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8710B) ? LCK_VER_8710B : \ 302*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8723D) ? LCK_VER_8723D : \ 303*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8822B) ? LCK_VER_8822B : \ 304*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8822C) ? LCK_VER_8822C : \ 305*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8821C) ? LCK_VER_8821C : \ 306*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8814B) ? LCK_VER_8814B : \ 307*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8710C) ? LCK_VER_8710C : \ 308*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8710C) ? LCK_VER_8710C : "unknown" 309*4882a593Smuzhiyun #define HALRF_POWRTRACKING_VER \ 310*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8188E) ? PWRTRK_VER_8188E : \ 311*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8192E) ? PWRTRK_VER_8192E : \ 312*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8192F) ? PWRTRK_VER_8192F : \ 313*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8723B) ? PWRTRK_VER_8723B : \ 314*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8812) ? PWRTRK_VER_8812A : \ 315*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8821) ? PWRTRK_VER_8821A : \ 316*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8814A) ? PWRTRK_VER_8814A : \ 317*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8188F) ? PWRTRK_VER_8188F : \ 318*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8197F) ? PWRTRK_VER_8197F : \ 319*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8703B) ? PWRTRK_VER_8703B : \ 320*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8710B) ? PWRTRK_VER_8710B : \ 321*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8723D) ? PWRTRK_VER_8723D : \ 322*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8822B) ? PWRTRK_VER_8822B : \ 323*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8822C) ? PWRTRK_VER_8822C : \ 324*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8821C) ? PWRTRK_VER_8821C : \ 325*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8197G) ? PWRTRK_VER_8197G : "unknown" 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun #define HALRF_DPK_VER \ 328*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8188E) ? DPK_VER_8188E : \ 329*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8192E) ? DPK_VER_8192E : \ 330*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8192F) ? DPK_VER_8192F : \ 331*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8723B) ? DPK_VER_8723B : \ 332*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8812) ? DPK_VER_8812A : \ 333*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8821) ? DPK_VER_8821A : \ 334*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8814A) ? DPK_VER_8814A : \ 335*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8188F) ? DPK_VER_8188F : \ 336*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8197F) ? DPK_VER_8197F : \ 337*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8198F) ? DPK_VER_8198F : \ 338*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8703B) ? DPK_VER_8703B : \ 339*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8710B) ? DPK_VER_8710B : \ 340*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8723D) ? DPK_VER_8723D : \ 341*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8822B) ? DPK_VER_8822B : \ 342*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8822C) ? DPK_VER_8822C : \ 343*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8812F) ? DPK_VER_8812F : \ 344*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8821C) ? DPK_VER_8821C : \ 345*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8814B) ? DPK_VER_8814B : \ 346*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8197G) ? DPK_VER_8197G : "unknown" 347*4882a593Smuzhiyun 348*4882a593Smuzhiyun #define HALRF_KFREE_VER \ 349*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8188E) ? KFREE_VER_8188E : \ 350*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8192E) ? KFREE_VER_8192E : \ 351*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8192F) ? KFREE_VER_8192F : \ 352*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8723B) ? KFREE_VER_8723B : \ 353*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8812) ? KFREE_VER_8812A : \ 354*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8821) ? KFREE_VER_8821A : \ 355*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8814A) ? KFREE_VER_8814A : \ 356*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8188F) ? KFREE_VER_8188F : \ 357*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8197F) ? KFREE_VER_8197F : \ 358*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8703B) ? KFREE_VER_8703B : \ 359*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8710B) ? KFREE_VER_8710B : \ 360*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8723D) ? KFREE_VER_8723D : \ 361*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8822B) ? KFREE_VER_8822B : \ 362*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8822C) ? KFREE_VER_8822C : \ 363*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8821C) ? KFREE_VER_8821C : \ 364*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8814B) ? KFREE_VER_8814B : \ 365*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8197G) ? KFREE_VER_8197G : "unknown" 366*4882a593Smuzhiyun 367*4882a593Smuzhiyun #define HALRF_TSSI_VER \ 368*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8812F) ? TSSI_VER_8812F : \ 369*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8822C) ? TSSI_VER_8822C : \ 370*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8821C) ? TSSI_VER_8821C : \ 371*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8814B) ? TSSI_VER_8814B : \ 372*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8197G) ? TSSI_VER_8197G : "unknown" 373*4882a593Smuzhiyun 374*4882a593Smuzhiyun #define HALRF_PABIASK_VER \ 375*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8188E) ? PABIASK_VER_8188E : \ 376*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8192E) ? PABIASK_VER_8192E : \ 377*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8192F) ? PABIASK_VER_8192F : \ 378*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8723B) ? PABIASK_VER_8723B : \ 379*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8812) ? PABIASK_VER_8812A : \ 380*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8821) ? PABIASK_VER_8821A : \ 381*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8814A) ? PABIASK_VER_8814A : \ 382*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8188F) ? PABIASK_VER_8188F : \ 383*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8197F) ? PABIASK_VER_8197F : \ 384*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8703B) ? PABIASK_VER_8703B : \ 385*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8710B) ? PABIASK_VER_8710B : \ 386*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8723D) ? PABIASK_VER_8723D : \ 387*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8822B) ? PABIASK_VER_8822B : \ 388*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8822C) ? PABIASK_VER_8822C : \ 389*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8821C) ? PABIASK_VER_8821C : \ 390*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8814B) ? PABIASK_VER_8814B : \ 391*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8197G) ? PABIASK_VER_8197G : "unknown" 392*4882a593Smuzhiyun 393*4882a593Smuzhiyun #define HALRF_RFK_INIT_VER \ 394*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8822B) ? RFK_INIT_VER_8822B : \ 395*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8822C) ? RFK_INIT_VER_8822C : \ 396*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8812F) ? RFK_INIT_VER_8812F : \ 397*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8198F) ? RFK_INIT_VER_8198F : \ 398*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8814B) ? RFK_INIT_VER_8814B : \ 399*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8197G) ? RFK_INIT_VER_8197G : "unknown" 400*4882a593Smuzhiyun 401*4882a593Smuzhiyun #define HALRF_DACK_VER \ 402*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8822C) ? DACK_VER_8822C : \ 403*4882a593Smuzhiyun (dm->support_ic_type == ODM_RTL8814B) ? DACK_VER_8814B : "unknown" 404*4882a593Smuzhiyun 405*4882a593Smuzhiyun #define IQK_THRESHOLD 8 406*4882a593Smuzhiyun #define DPK_THRESHOLD 4 407*4882a593Smuzhiyun #define HALRF_ABS(a,b) ((a>b) ? (a-b) : (b-a)) 408*4882a593Smuzhiyun #define SN 100 409*4882a593Smuzhiyun 410*4882a593Smuzhiyun #define CCK_TSSI_NUM 6 411*4882a593Smuzhiyun #define OFDM_2G_TSSI_NUM 5 412*4882a593Smuzhiyun #define OFDM_5G_TSSI_NUM 14 413*4882a593Smuzhiyun 414*4882a593Smuzhiyun 415*4882a593Smuzhiyun 416*4882a593Smuzhiyun /*@===========================================================*/ 417*4882a593Smuzhiyun /*AGC RX High Power mode*/ 418*4882a593Smuzhiyun /*@===========================================================*/ 419*4882a593Smuzhiyun #define lna_low_gain_1 0x64 420*4882a593Smuzhiyun #define lna_low_gain_2 0x5A 421*4882a593Smuzhiyun #define lna_low_gain_3 0x58 422*4882a593Smuzhiyun 423*4882a593Smuzhiyun /*@============================================================*/ 424*4882a593Smuzhiyun /*@ enumeration */ 425*4882a593Smuzhiyun /*@============================================================*/ 426*4882a593Smuzhiyun 427*4882a593Smuzhiyun enum halrf_func_idx { /*F_XXX = PHYDM XXX function*/ 428*4882a593Smuzhiyun RF00_PWR_TRK = 0, /*Pow_trk, TSSI_trk*/ 429*4882a593Smuzhiyun RF01_IQK = 1, /*LOK, IQK*/ 430*4882a593Smuzhiyun RF02_LCK = 2, 431*4882a593Smuzhiyun RF03_DPK = 3, 432*4882a593Smuzhiyun RF04_TXGAPK = 4, 433*4882a593Smuzhiyun RF05_DACK = 5, 434*4882a593Smuzhiyun RF06_DPK_TRK = 6, 435*4882a593Smuzhiyun RF07_2GBAND_SHIFT = 7, 436*4882a593Smuzhiyun RF08_RXDCK = 8, 437*4882a593Smuzhiyun RF09_RFK = 9 438*4882a593Smuzhiyun }; 439*4882a593Smuzhiyun 440*4882a593Smuzhiyun enum halrf_ability { 441*4882a593Smuzhiyun HAL_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK), 442*4882a593Smuzhiyun HAL_RF_IQK = BIT(RF01_IQK), 443*4882a593Smuzhiyun HAL_RF_LCK = BIT(RF02_LCK), 444*4882a593Smuzhiyun HAL_RF_DPK = BIT(RF03_DPK), 445*4882a593Smuzhiyun HAL_RF_TXGAPK = BIT(RF04_TXGAPK), 446*4882a593Smuzhiyun HAL_RF_DACK = BIT(RF05_DACK), 447*4882a593Smuzhiyun HAL_RF_DPK_TRACK = BIT(RF06_DPK_TRK), 448*4882a593Smuzhiyun HAL_2GBAND_SHIFT = BIT(RF07_2GBAND_SHIFT), 449*4882a593Smuzhiyun HAL_RF_RXDCK = BIT(RF08_RXDCK) 450*4882a593Smuzhiyun }; 451*4882a593Smuzhiyun 452*4882a593Smuzhiyun enum halrf_shift_band { 453*4882a593Smuzhiyun HAL_RF_2P4 = 0, 454*4882a593Smuzhiyun HAL_RF_2P3 = 1, 455*4882a593Smuzhiyun HAL_RF_2P5 = 2 456*4882a593Smuzhiyun }; 457*4882a593Smuzhiyun 458*4882a593Smuzhiyun enum halrf_dbg_comp { 459*4882a593Smuzhiyun DBG_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK), 460*4882a593Smuzhiyun DBG_RF_IQK = BIT(RF01_IQK), 461*4882a593Smuzhiyun DBG_RF_LCK = BIT(RF02_LCK), 462*4882a593Smuzhiyun DBG_RF_DPK = BIT(RF03_DPK), 463*4882a593Smuzhiyun DBG_RF_TXGAPK = BIT(RF04_TXGAPK), 464*4882a593Smuzhiyun DBG_RF_DACK = BIT(RF05_DACK), 465*4882a593Smuzhiyun DBG_RF_DPK_TRACK = BIT(RF06_DPK_TRK), 466*4882a593Smuzhiyun DBG_RF_RFK = BIT(RF09_RFK), 467*4882a593Smuzhiyun DBG_RF_MP = BIT(29), 468*4882a593Smuzhiyun DBG_RF_TMP = BIT(30), 469*4882a593Smuzhiyun DBG_RF_INIT = BIT(31) 470*4882a593Smuzhiyun }; 471*4882a593Smuzhiyun 472*4882a593Smuzhiyun enum halrf_cmninfo_init { 473*4882a593Smuzhiyun HALRF_CMNINFO_ABILITY = 0, 474*4882a593Smuzhiyun HALRF_CMNINFO_DPK_EN = 1, 475*4882a593Smuzhiyun HALRF_CMNINFO_EEPROM_THERMAL_VALUE, 476*4882a593Smuzhiyun HALRF_CMNINFO_RFK_FORBIDDEN, 477*4882a593Smuzhiyun HALRF_CMNINFO_IQK_SEGMENT, 478*4882a593Smuzhiyun HALRF_CMNINFO_RATE_INDEX, 479*4882a593Smuzhiyun HALRF_CMNINFO_PWT_TYPE, 480*4882a593Smuzhiyun HALRF_CMNINFO_MP_PSD_POINT, 481*4882a593Smuzhiyun HALRF_CMNINFO_MP_PSD_START_POINT, 482*4882a593Smuzhiyun HALRF_CMNINFO_MP_PSD_STOP_POINT, 483*4882a593Smuzhiyun HALRF_CMNINFO_MP_PSD_AVERAGE, 484*4882a593Smuzhiyun HALRF_CMNINFO_IQK_TIMES, 485*4882a593Smuzhiyun HALRF_CMNINFO_MP_POWER_TRACKING_TYPE, 486*4882a593Smuzhiyun HALRF_CMNINFO_POWER_TRACK_CONTROL 487*4882a593Smuzhiyun }; 488*4882a593Smuzhiyun 489*4882a593Smuzhiyun enum halrf_cmninfo_hook { 490*4882a593Smuzhiyun HALRF_CMNINFO_CON_TX, 491*4882a593Smuzhiyun HALRF_CMNINFO_SINGLE_TONE, 492*4882a593Smuzhiyun HALRF_CMNINFO_CARRIER_SUPPRESSION, 493*4882a593Smuzhiyun HALRF_CMNINFO_MP_RATE_INDEX, 494*4882a593Smuzhiyun HALRF_CMNINFO_MANUAL_RF_SUPPORTABILITY 495*4882a593Smuzhiyun }; 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun enum halrf_lna_set { 498*4882a593Smuzhiyun HALRF_LNA_DISABLE = 0, 499*4882a593Smuzhiyun HALRF_LNA_ENABLE = 1, 500*4882a593Smuzhiyun }; 501*4882a593Smuzhiyun 502*4882a593Smuzhiyun enum halrf_k_segment_time { 503*4882a593Smuzhiyun SEGMENT_FREE = 0, 504*4882a593Smuzhiyun SEGMENT_10MS = 10, /*10ms*/ 505*4882a593Smuzhiyun SEGMENT_30MS = 30, /*30ms*/ 506*4882a593Smuzhiyun SEGMENT_50MS = 50, /*50ms*/ 507*4882a593Smuzhiyun }; 508*4882a593Smuzhiyun 509*4882a593Smuzhiyun #define POWER_INDEX_DIFF 4 510*4882a593Smuzhiyun #define TSSI_TXAGC_DIFF 2 511*4882a593Smuzhiyun 512*4882a593Smuzhiyun #define TSSI_CODE_NUM 84 513*4882a593Smuzhiyun 514*4882a593Smuzhiyun #define TSSI_SLOPE_2G 8 515*4882a593Smuzhiyun #define TSSI_SLOPE_5G 5 516*4882a593Smuzhiyun 517*4882a593Smuzhiyun #define TSSI_EFUSE_NUM 25 518*4882a593Smuzhiyun #define TSSI_EFUSE_KFREE_NUM 4 519*4882a593Smuzhiyun 520*4882a593Smuzhiyun struct _halrf_tssi_data { 521*4882a593Smuzhiyun s32 cck_offset_patha; 522*4882a593Smuzhiyun s32 cck_offset_pathb; 523*4882a593Smuzhiyun s32 tssi_trk_txagc_offset[PHYDM_MAX_RF_PATH]; 524*4882a593Smuzhiyun s32 delta_tssi_txagc_offset[PHYDM_MAX_RF_PATH]; 525*4882a593Smuzhiyun s16 txagc_codeword[TSSI_CODE_NUM]; 526*4882a593Smuzhiyun u16 tssi_codeword[TSSI_CODE_NUM]; 527*4882a593Smuzhiyun s8 tssi_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_NUM]; 528*4882a593Smuzhiyun s8 tssi_kfree_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_KFREE_NUM]; 529*4882a593Smuzhiyun u8 thermal[PHYDM_MAX_RF_PATH]; 530*4882a593Smuzhiyun u32 index[PHYDM_MAX_RF_PATH][14]; 531*4882a593Smuzhiyun u8 do_tssi; 532*4882a593Smuzhiyun u8 get_thermal; 533*4882a593Smuzhiyun u8 tssi_finish_bit[PHYDM_MAX_RF_PATH]; 534*4882a593Smuzhiyun u8 thermal_trigger; 535*4882a593Smuzhiyun }; 536*4882a593Smuzhiyun 537*4882a593Smuzhiyun struct _halrf_txgapk_info { 538*4882a593Smuzhiyun u32 txgapk_rf3f_bp[5][12][PHYDM_MAX_RF_PATH]; /* band(2Gcck/2GOFDM/5GL/5GM/5GH)/idx/path */ 539*4882a593Smuzhiyun boolean txgapk_bp_done; 540*4882a593Smuzhiyun s8 offset[12][PHYDM_MAX_RF_PATH]; 541*4882a593Smuzhiyun s8 fianl_offset[12][PHYDM_MAX_RF_PATH]; 542*4882a593Smuzhiyun u8 read_txgain; 543*4882a593Smuzhiyun }; 544*4882a593Smuzhiyun 545*4882a593Smuzhiyun 546*4882a593Smuzhiyun /*@============================================================*/ 547*4882a593Smuzhiyun /*@ structure */ 548*4882a593Smuzhiyun /*@============================================================*/ 549*4882a593Smuzhiyun 550*4882a593Smuzhiyun struct _hal_rf_ { 551*4882a593Smuzhiyun /*hook*/ 552*4882a593Smuzhiyun u8 *test1; 553*4882a593Smuzhiyun 554*4882a593Smuzhiyun /*update*/ 555*4882a593Smuzhiyun u32 rf_supportability; 556*4882a593Smuzhiyun u8 rf_shift_band; 557*4882a593Smuzhiyun /*u32 halrf_tssi_data;*/ 558*4882a593Smuzhiyun 559*4882a593Smuzhiyun u8 eeprom_thermal; 560*4882a593Smuzhiyun u8 dpk_en; /*Enable Function DPK OFF/ON = 0/1*/ 561*4882a593Smuzhiyun boolean dpk_done; 562*4882a593Smuzhiyun u64 dpk_progressing_time; 563*4882a593Smuzhiyun u64 iqk_progressing_time; 564*4882a593Smuzhiyun u32 fw_ver; 565*4882a593Smuzhiyun 566*4882a593Smuzhiyun boolean *is_con_tx; 567*4882a593Smuzhiyun boolean *is_single_tone; 568*4882a593Smuzhiyun boolean *is_carrier_suppresion; 569*4882a593Smuzhiyun boolean is_dpk_in_progress; 570*4882a593Smuzhiyun boolean is_tssi_in_progress; 571*4882a593Smuzhiyun boolean is_bt_iqk_timeout; 572*4882a593Smuzhiyun boolean is_rfk_h2c_timeout; 573*4882a593Smuzhiyun boolean aac_checked; 574*4882a593Smuzhiyun boolean is_txgapk_in_progress; 575*4882a593Smuzhiyun 576*4882a593Smuzhiyun u8 *mp_rate_index; 577*4882a593Smuzhiyun u32 *manual_rf_supportability; 578*4882a593Smuzhiyun u32 p_rate_index; 579*4882a593Smuzhiyun u8 pwt_type; 580*4882a593Smuzhiyun u32 rf_dbg_comp; 581*4882a593Smuzhiyun 582*4882a593Smuzhiyun u8 ext_lna; /*@with 2G external LNA NO/Yes = 0/1*/ 583*4882a593Smuzhiyun u8 ext_lna_5g; /*@with 5G external LNA NO/Yes = 0/1*/ 584*4882a593Smuzhiyun u8 ext_pa; /*@with 2G external PNA NO/Yes = 0/1*/ 585*4882a593Smuzhiyun u8 ext_pa_5g; /*@with 5G external PNA NO/Yes = 0/1*/ 586*4882a593Smuzhiyun #if !(DM_ODM_SUPPORT_TYPE & ODM_IOT) 587*4882a593Smuzhiyun struct _halrf_psd_data halrf_psd_data; 588*4882a593Smuzhiyun struct _halrf_tssi_data halrf_tssi_data; 589*4882a593Smuzhiyun #endif 590*4882a593Smuzhiyun struct _halrf_txgapk_info halrf_txgapk_info; 591*4882a593Smuzhiyun u8 power_track_type; 592*4882a593Smuzhiyun u8 mp_pwt_type; 593*4882a593Smuzhiyun u8 pre_band_type; 594*4882a593Smuzhiyun }; 595*4882a593Smuzhiyun 596*4882a593Smuzhiyun /*@============================================================*/ 597*4882a593Smuzhiyun /*@ function prototype */ 598*4882a593Smuzhiyun /*@============================================================*/ 599*4882a593Smuzhiyun 600*4882a593Smuzhiyun #if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ 601*4882a593Smuzhiyun RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ 602*4882a593Smuzhiyun RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ 603*4882a593Smuzhiyun RTL8812F_SUPPORT == 1 || RTL8710C_SUPPORT == 1 ||\ 604*4882a593Smuzhiyun RTL8197G_SUPPORT == 1) 605*4882a593Smuzhiyun void halrf_iqk_info_dump(void *dm_void, u32 *_used, char *output, 606*4882a593Smuzhiyun u32 *_out_len); 607*4882a593Smuzhiyun 608*4882a593Smuzhiyun void halrf_iqk_hwtx_check(void *dm_void, boolean is_check); 609*4882a593Smuzhiyun #endif 610*4882a593Smuzhiyun 611*4882a593Smuzhiyun u8 halrf_match_iqk_version(void *dm_void); 612*4882a593Smuzhiyun 613*4882a593Smuzhiyun void halrf_support_ability_debug(void *dm_void, char input[][16], u32 *_used, 614*4882a593Smuzhiyun char *output, u32 *_out_len); 615*4882a593Smuzhiyun #ifdef CONFIG_2G_BAND_SHIFT 616*4882a593Smuzhiyun void halrf_support_band_shift_debug(void *dm_void, char input[][16], u32 *_used, 617*4882a593Smuzhiyun char *output, u32 *_out_len); 618*4882a593Smuzhiyun #endif 619*4882a593Smuzhiyun void halrf_cmn_info_init(void *dm_void, enum halrf_cmninfo_init cmn_info, 620*4882a593Smuzhiyun u32 value); 621*4882a593Smuzhiyun 622*4882a593Smuzhiyun void halrf_cmn_info_hook(void *dm_void, enum halrf_cmninfo_hook cmn_info, 623*4882a593Smuzhiyun void *value); 624*4882a593Smuzhiyun 625*4882a593Smuzhiyun void halrf_cmn_info_set(void *dm_void, u32 cmn_info, u64 value); 626*4882a593Smuzhiyun 627*4882a593Smuzhiyun u64 halrf_cmn_info_get(void *dm_void, u32 cmn_info); 628*4882a593Smuzhiyun 629*4882a593Smuzhiyun void halrf_watchdog(void *dm_void); 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun void halrf_supportability_init(void *dm_void); 632*4882a593Smuzhiyun 633*4882a593Smuzhiyun void halrf_init(void *dm_void); 634*4882a593Smuzhiyun 635*4882a593Smuzhiyun void halrf_iqk_trigger(void *dm_void, boolean is_recovery); 636*4882a593Smuzhiyun 637*4882a593Smuzhiyun void halrf_rfk_handshake(void *dm_void, boolean is_before_k); 638*4882a593Smuzhiyun 639*4882a593Smuzhiyun void halrf_rf_k_connect_trigger(void *dm_void, boolean is_recovery, 640*4882a593Smuzhiyun enum halrf_k_segment_time seg_time); 641*4882a593Smuzhiyun 642*4882a593Smuzhiyun void halrf_segment_iqk_trigger(void *dm_void, boolean clear, 643*4882a593Smuzhiyun boolean segment_iqk); 644*4882a593Smuzhiyun 645*4882a593Smuzhiyun void halrf_lck_trigger(void *dm_void); 646*4882a593Smuzhiyun 647*4882a593Smuzhiyun void halrf_iqk_debug(void *dm_void, u32 *const dm_value, u32 *_used, 648*4882a593Smuzhiyun char *output, u32 *_out_len); 649*4882a593Smuzhiyun 650*4882a593Smuzhiyun void phydm_get_iqk_cfir(void *dm_void, u8 idx, u8 path, boolean debug); 651*4882a593Smuzhiyun 652*4882a593Smuzhiyun void halrf_iqk_xym_read(void *dm_void, u8 path, u8 xym_type); 653*4882a593Smuzhiyun 654*4882a593Smuzhiyun void halrf_rf_lna_setting(void *dm_void, enum halrf_lna_set type); 655*4882a593Smuzhiyun 656*4882a593Smuzhiyun void halrf_do_imr_test(void *dm_void, u8 data); 657*4882a593Smuzhiyun 658*4882a593Smuzhiyun u32 halrf_psd_log2base(u32 val); 659*4882a593Smuzhiyun 660*4882a593Smuzhiyun void halrf_dpk_trigger(void *dm_void); 661*4882a593Smuzhiyun 662*4882a593Smuzhiyun void halrf_txgapk_trigger(void *dm_void); 663*4882a593Smuzhiyun 664*4882a593Smuzhiyun u8 halrf_dpk_result_check(void *dm_void); 665*4882a593Smuzhiyun 666*4882a593Smuzhiyun void halrf_dpk_sram_read(void *dm_void); 667*4882a593Smuzhiyun 668*4882a593Smuzhiyun void halrf_dpk_enable_disable(void *dm_void); 669*4882a593Smuzhiyun 670*4882a593Smuzhiyun void halrf_dpk_track(void *dm_void); 671*4882a593Smuzhiyun 672*4882a593Smuzhiyun void halrf_dpk_reload(void *dm_void); 673*4882a593Smuzhiyun 674*4882a593Smuzhiyun void halrf_dpk_switch(void *dm_void, u8 enable); 675*4882a593Smuzhiyun 676*4882a593Smuzhiyun void halrf_dpk_debug_cmd(void *dm_void, char input[][16], u32 *_used, 677*4882a593Smuzhiyun char *output, u32 *_out_len); 678*4882a593Smuzhiyun 679*4882a593Smuzhiyun void halrf_dpk_c2h_report_transfer(void *dm_void, boolean is_ok, u8 *buf, u8 buf_size); 680*4882a593Smuzhiyun 681*4882a593Smuzhiyun void halrf_dpk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size); 682*4882a593Smuzhiyun 683*4882a593Smuzhiyun /*Global function*/ 684*4882a593Smuzhiyun 685*4882a593Smuzhiyun void halrf_reload_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num); 686*4882a593Smuzhiyun 687*4882a593Smuzhiyun void halrf_reload_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, 688*4882a593Smuzhiyun u8 ss); 689*4882a593Smuzhiyun 690*4882a593Smuzhiyun void halrf_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num); 691*4882a593Smuzhiyun 692*4882a593Smuzhiyun void halrf_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, u8 ss); 693*4882a593Smuzhiyun 694*4882a593Smuzhiyun void halrf_mode(void *dm_void, u32 *i_value, u32 *q_value); 695*4882a593Smuzhiyun 696*4882a593Smuzhiyun boolean halrf_compare(void *dm_void, u32 value); 697*4882a593Smuzhiyun 698*4882a593Smuzhiyun u32 halrf_delta(void *dm_void, u32 v1, u32 v2); 699*4882a593Smuzhiyun 700*4882a593Smuzhiyun void halrf_minmax_compare(void *dm_void, u32 value, u32 *min, u32 *max); 701*4882a593Smuzhiyun 702*4882a593Smuzhiyun void halrf_b_sort(void *dm_void, u32 *iv, u32 *qv); 703*4882a593Smuzhiyun 704*4882a593Smuzhiyun void halrf_bubble(void *dm_void, u32 *v1, u32 *v2); 705*4882a593Smuzhiyun 706*4882a593Smuzhiyun void halrf_swap(void *dm_void, u32 *v1, u32 *v2); 707*4882a593Smuzhiyun 708*4882a593Smuzhiyun enum hal_status 709*4882a593Smuzhiyun halrf_config_rfk_with_header_file(void *dm_void, u32 config_type); 710*4882a593Smuzhiyun 711*4882a593Smuzhiyun #if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ 712*4882a593Smuzhiyun RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ 713*4882a593Smuzhiyun RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ 714*4882a593Smuzhiyun RTL8812F_SUPPORT == 1 || RTL8710C_SUPPORT == 1 ||\ 715*4882a593Smuzhiyun RTL8197G_SUPPORT == 1) 716*4882a593Smuzhiyun void halrf_iqk_dbg(void *dm_void); 717*4882a593Smuzhiyun #endif 718*4882a593Smuzhiyun 719*4882a593Smuzhiyun void halrf_tssi_get_efuse(void *dm_void); 720*4882a593Smuzhiyun 721*4882a593Smuzhiyun void halrf_do_tssi(void *dm_void); 722*4882a593Smuzhiyun 723*4882a593Smuzhiyun void halrf_set_tssi_enable(void *dm_void, boolean enable); 724*4882a593Smuzhiyun 725*4882a593Smuzhiyun void halrf_do_thermal(void *dm_void); 726*4882a593Smuzhiyun 727*4882a593Smuzhiyun u32 halrf_set_tssi_value(void *dm_void, u32 tssi_value); 728*4882a593Smuzhiyun 729*4882a593Smuzhiyun void halrf_set_tssi_power(void *dm_void, s8 power); 730*4882a593Smuzhiyun 731*4882a593Smuzhiyun void halrf_tssi_set_de_for_tx_verify(void *dm_void, u32 tssi_de, u8 path); 732*4882a593Smuzhiyun 733*4882a593Smuzhiyun u32 halrf_query_tssi_value(void *dm_void); 734*4882a593Smuzhiyun 735*4882a593Smuzhiyun void halrf_tssi_cck(void *dm_void); 736*4882a593Smuzhiyun 737*4882a593Smuzhiyun void halrf_thermal_cck(void *dm_void); 738*4882a593Smuzhiyun 739*4882a593Smuzhiyun void halrf_tssi_set_de(void *dm_void); 740*4882a593Smuzhiyun 741*4882a593Smuzhiyun void halrf_tssi_dck(void *dm_void, u8 direct_do); 742*4882a593Smuzhiyun 743*4882a593Smuzhiyun void halrf_calculate_tssi_codeword(void *dm_void); 744*4882a593Smuzhiyun 745*4882a593Smuzhiyun void halrf_set_tssi_codeword(void *dm_void); 746*4882a593Smuzhiyun 747*4882a593Smuzhiyun u8 halrf_get_tssi_codeword_for_txindex(void *dm_void); 748*4882a593Smuzhiyun 749*4882a593Smuzhiyun void halrf_tssi_clean_de(void *dm_void); 750*4882a593Smuzhiyun 751*4882a593Smuzhiyun u32 halrf_tssi_trigger_de(void *dm_void, u8 path); 752*4882a593Smuzhiyun 753*4882a593Smuzhiyun u32 halrf_tssi_get_de(void *dm_void, u8 path); 754*4882a593Smuzhiyun 755*4882a593Smuzhiyun void halrf_tssi_trigger(void *dm_void); 756*4882a593Smuzhiyun 757*4882a593Smuzhiyun void halrf_txgapk_write_gain_table(void *dm_void); 758*4882a593Smuzhiyun 759*4882a593Smuzhiyun void halrf_txgapk_reload_tx_gain(void *dm_void); 760*4882a593Smuzhiyun 761*4882a593Smuzhiyun void halrf_txgap_enable_disable(void *dm_void, u8 enable); 762*4882a593Smuzhiyun 763*4882a593Smuzhiyun void halrf_set_dpk_track(void *dm_void, u8 enable); 764*4882a593Smuzhiyun 765*4882a593Smuzhiyun void halrf_set_dpkbychannel(void *dm_void, boolean dpk_by_ch); 766*4882a593Smuzhiyun 767*4882a593Smuzhiyun void halrf_set_dpkenable(void *dm_void, boolean is_dpk_enable); 768*4882a593Smuzhiyun 769*4882a593Smuzhiyun boolean halrf_get_dpkbychannel(void *dm_void); 770*4882a593Smuzhiyun 771*4882a593Smuzhiyun boolean halrf_get_dpkenable(void *dm_void); 772*4882a593Smuzhiyun 773*4882a593Smuzhiyun void _iqk_check_if_reload(void *dm_void); 774*4882a593Smuzhiyun 775*4882a593Smuzhiyun void halrf_do_rxbb_dck(void *dm_void); 776*4882a593Smuzhiyun 777*4882a593Smuzhiyun void config_halrf_path_adda_setting_trigger(void *dm_void); 778*4882a593Smuzhiyun 779*4882a593Smuzhiyun void halrf_reload_iqk(void *dm_void, boolean reset); 780*4882a593Smuzhiyun 781*4882a593Smuzhiyun void halrf_dack_dbg(void *dm_void); 782*4882a593Smuzhiyun 783*4882a593Smuzhiyun void halrf_dack_trigger(void *dm_void, boolean force); 784*4882a593Smuzhiyun 785*4882a593Smuzhiyun void halrf_dack_restore(void *dm_void); 786*4882a593Smuzhiyun 787*4882a593Smuzhiyun void halrf_iqk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size); 788*4882a593Smuzhiyun 789*4882a593Smuzhiyun void halrf_set_rfsupportability(void *dm_void); 790*4882a593Smuzhiyun 791*4882a593Smuzhiyun void halrf_rxdck(void *dm_void); 792*4882a593Smuzhiyun 793*4882a593Smuzhiyun void halrf_delay_10us(u16 v1); 794*4882a593Smuzhiyun 795*4882a593Smuzhiyun void halrf_dump_rfk_reg(void *dm_void, char input[][16], u32 *_used, 796*4882a593Smuzhiyun char *output, u32 *_out_len); 797*4882a593Smuzhiyun 798*4882a593Smuzhiyun void halrf_rfk_power_save(void *dm_void, boolean is_power_save); 799*4882a593Smuzhiyun 800*4882a593Smuzhiyun #endif /*__HALRF_H__*/ 801