1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2017 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called LICENSE. 16 * 17 * Contact Information: 18 * wlanfae <wlanfae@realtek.com> 19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 20 * Hsinchu 300, Taiwan. 21 * 22 * Larry Finger <Larry.Finger@lwfinger.net> 23 * 24 *****************************************************************************/ 25 26 #ifndef __HALRF_H__ 27 #define __HALRF_H__ 28 29 /*@============================================================*/ 30 /*@include files*/ 31 /*@============================================================*/ 32 #include "halrf/halrf_psd.h" 33 #if (RTL8822B_SUPPORT == 1) 34 #include "halrf/rtl8822b/halrf_rfk_init_8822b.h" 35 #endif 36 #if (RTL8822C_SUPPORT == 1) 37 #include "halrf/rtl8822c/halrf_rfk_init_8822c.h" 38 #include "halrf/rtl8822c/halrf_iqk_8822c.h" 39 #include "halrf/rtl8822c/halrf_tssi_8822c.h" 40 #include "halrf/rtl8822c/halrf_dpk_8822c.h" 41 #include "halrf/rtl8822c/halrf_txgapk_8822c.h" 42 #endif 43 44 #if (DM_ODM_SUPPORT_TYPE & ODM_AP) 45 #if (RTL8197G_SUPPORT == 1) 46 #include "halrf/rtl8197g/halrf_rfk_init_8197g.h" 47 #endif 48 #if (RTL8198F_SUPPORT == 1) 49 #include "halrf/rtl8198f/halrf_rfk_init_8198f.h" 50 #endif 51 #if (RTL8812F_SUPPORT == 1) 52 #include "halrf/rtl8812f/halrf_rfk_init_8812f.h" 53 #endif 54 55 #endif 56 57 #if (RTL8814B_SUPPORT == 1) 58 #include "halrf/rtl8814b/halrf_rfk_init_8814b.h" 59 #include "halrf/rtl8814b/halrf_iqk_8814b.h" 60 #include "halrf/rtl8814b/halrf_dpk_8814b.h" 61 #include "halrf/rtl8814b/halrf_txgapk_8814b.h" 62 #endif 63 64 /*@============================================================*/ 65 /*@Definition */ 66 /*@============================================================*/ 67 /*IQK version*/ 68 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) 69 #define IQK_VER_8188E "0x14" 70 #define IQK_VER_8192E "0x01" 71 #define IQK_VER_8192F "0x01" 72 #define IQK_VER_8723B "0x1e" 73 #define IQK_VER_8812A "0x02" 74 #define IQK_VER_8821A "0x02" 75 #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) 76 #define IQK_VER_8188E "0x01" 77 #define IQK_VER_8192E "0x01" 78 #define IQK_VER_8192F "0x01" 79 #define IQK_VER_8723B "0x1f" 80 #define IQK_VER_8812A "0x01" 81 #define IQK_VER_8821A "0x01" 82 #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) 83 #define IQK_VER_8188E "0x01" 84 #define IQK_VER_8192E "0x01" 85 #define IQK_VER_8192F "0x01" 86 #define IQK_VER_8723B "0x1e" 87 #define IQK_VER_8812A "0x01" 88 #define IQK_VER_8821A "0x01" 89 #elif (DM_ODM_SUPPORT_TYPE & (ODM_IOT)) 90 #define IQK_VER_8188E "0x01" 91 #define IQK_VER_8192E "0x01" 92 #define IQK_VER_8192F "0x01" 93 #define IQK_VER_8723B "0x1e" 94 #define IQK_VER_8812A "0x01" 95 #define IQK_VER_8821A "0x01" 96 #endif 97 #define IQK_VER_8814A "0x0f" 98 #define IQK_VER_8188F "0x01" 99 #define IQK_VER_8197F "0x1d" 100 #define IQK_VER_8703B "0x05" 101 #define IQK_VER_8710B "0x01" 102 #define IQK_VER_8723D "0x02" 103 #define IQK_VER_8822B "0x32" 104 #define IQK_VER_8822C "0x14" 105 #define IQK_VER_8821C "0x23" 106 #define IQK_VER_8198F "0x0b" 107 #define IQK_VER_8814B "0x13" 108 #define IQK_VER_8812F "0x0c" 109 #define IQK_VER_8710C "0x08" 110 #define IQK_VER_8197G "0x03" 111 112 /*LCK version*/ 113 #define LCK_VER_8188E "0x02" 114 #define LCK_VER_8192E "0x02" 115 #define LCK_VER_8192F "0x01" 116 #define LCK_VER_8723B "0x02" 117 #define LCK_VER_8812A "0x01" 118 #define LCK_VER_8821A "0x01" 119 #define LCK_VER_8814A "0x01" 120 #define LCK_VER_8188F "0x01" 121 #define LCK_VER_8197F "0x01" 122 #define LCK_VER_8703B "0x01" 123 #define LCK_VER_8710B "0x01" 124 #define LCK_VER_8723D "0x01" 125 #define LCK_VER_8822B "0x02" 126 #define LCK_VER_8822C "0x00" 127 #define LCK_VER_8821C "0x02" 128 #define LCK_VER_8814B "0x02" 129 #define LCK_VER_8195B "0x02" 130 #define LCK_VER_8710C "0x02" 131 #define LCK_VER_8197G "0x01" 132 #define LCK_VER_8198F "0x01" 133 134 /*power tracking version*/ 135 #define PWRTRK_VER_8188E "0x01" 136 #define PWRTRK_VER_8192E "0x01" 137 #define PWRTRK_VER_8192F "0x01" 138 #define PWRTRK_VER_8723B "0x01" 139 #define PWRTRK_VER_8812A "0x01" 140 #define PWRTRK_VER_8821A "0x01" 141 #define PWRTRK_VER_8814A "0x01" 142 #define PWRTRK_VER_8188F "0x01" 143 #define PWRTRK_VER_8197F "0x01" 144 #define PWRTRK_VER_8703B "0x01" 145 #define PWRTRK_VER_8710B "0x01" 146 #define PWRTRK_VER_8723D "0x01" 147 #define PWRTRK_VER_8822B "0x01" 148 #define PWRTRK_VER_8822C "0x00" 149 #define PWRTRK_VER_8821C "0x01" 150 #define PWRTRK_VER_8814B "0x00" 151 #define PWRTRK_VER_8197G "0x00" 152 153 /*DPK version*/ 154 #define DPK_VER_8188E "NONE" 155 #define DPK_VER_8192E "NONE" 156 #define DPK_VER_8723B "NONE" 157 #define DPK_VER_8812A "NONE" 158 #define DPK_VER_8821A "NONE" 159 #define DPK_VER_8814A "NONE" 160 #define DPK_VER_8188F "NONE" 161 #define DPK_VER_8197F "0x08" 162 #define DPK_VER_8703B "NONE" 163 #define DPK_VER_8710B "NONE" 164 #define DPK_VER_8723D "NONE" 165 #define DPK_VER_8822B "NONE" 166 #define DPK_VER_8822C "0x1f" 167 #define DPK_VER_8821C "NONE" 168 #define DPK_VER_8192F "0x0d" 169 #define DPK_VER_8198F "0x0e" 170 #define DPK_VER_8814B "0x0f" 171 #define DPK_VER_8195B "0x0c" 172 #define DPK_VER_8812F "0x0a" 173 #define DPK_VER_8197G "0x09" 174 175 /*RFK_INIT version*/ 176 #define RFK_INIT_VER_8822B "0x8" 177 #define RFK_INIT_VER_8822C "0x8" 178 #define RFK_INIT_VER_8195B "0x1" 179 #define RFK_INIT_VER_8198F "0x8" 180 #define RFK_INIT_VER_8814B "0xa" 181 #define RFK_INIT_VER_8812F "0x4" 182 #define RFK_INIT_VER_8197G "0x4" 183 184 /*DACK version*/ 185 #define DACK_VER_8822C "0xa" 186 #define DACK_VER_8814B "0x4" 187 188 /*TXGAPK version*/ 189 #define TXGAPK_VER_8814B "0x1" 190 #define TXGAPK_VER_8195B "0x2" 191 192 /*Kfree tracking version*/ 193 #define KFREE_VER_8188E \ 194 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 195 #define KFREE_VER_8192E \ 196 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 197 #define KFREE_VER_8192F \ 198 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 199 #define KFREE_VER_8723B \ 200 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 201 #define KFREE_VER_8812A \ 202 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 203 #define KFREE_VER_8821A \ 204 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 205 #define KFREE_VER_8814A \ 206 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 207 #define KFREE_VER_8188F \ 208 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 209 #define KFREE_VER_8197F \ 210 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 211 #define KFREE_VER_8703B \ 212 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 213 #define KFREE_VER_8710B \ 214 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 215 #define KFREE_VER_8723D \ 216 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 217 #define KFREE_VER_8822B \ 218 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 219 #define KFREE_VER_8822C \ 220 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 221 #define KFREE_VER_8821C \ 222 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 223 #define KFREE_VER_8814B \ 224 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 225 #define KFREE_VER_8197G \ 226 (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE" 227 228 #define TSSI_VER_8812F "0x1" 229 #define TSSI_VER_8822C "0x1" 230 #define TSSI_VER_8821C "0x1" 231 #define TSSI_VER_8814B "0x1" 232 #define TSSI_VER_8197G "0x1" 233 234 /*PA Bias Calibration version*/ 235 #define PABIASK_VER_8188E \ 236 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 237 #define PABIASK_VER_8192E \ 238 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 239 #define PABIASK_VER_8192F \ 240 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 241 #define PABIASK_VER_8723B \ 242 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 243 #define PABIASK_VER_8812A \ 244 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 245 #define PABIASK_VER_8821A \ 246 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 247 #define PABIASK_VER_8814A \ 248 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 249 #define PABIASK_VER_8188F \ 250 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 251 #define PABIASK_VER_8197F \ 252 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 253 #define PABIASK_VER_8703B \ 254 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 255 #define PABIASK_VER_8710B \ 256 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 257 #define PABIASK_VER_8723D \ 258 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 259 #define PABIASK_VER_8822B \ 260 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 261 #define PABIASK_VER_8822C \ 262 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 263 #define PABIASK_VER_8821C \ 264 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 265 #define PABIASK_VER_8814B \ 266 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 267 #define PABIASK_VER_8197G \ 268 (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE" 269 270 #define HALRF_IQK_VER \ 271 (dm->support_ic_type == ODM_RTL8188E) ? IQK_VER_8188E : \ 272 (dm->support_ic_type == ODM_RTL8192E) ? IQK_VER_8192E : \ 273 (dm->support_ic_type == ODM_RTL8192F) ? IQK_VER_8192F : \ 274 (dm->support_ic_type == ODM_RTL8723B) ? IQK_VER_8723B : \ 275 (dm->support_ic_type == ODM_RTL8812) ? IQK_VER_8812A : \ 276 (dm->support_ic_type == ODM_RTL8821) ? IQK_VER_8821A : \ 277 (dm->support_ic_type == ODM_RTL8814A) ? IQK_VER_8814A : \ 278 (dm->support_ic_type == ODM_RTL8188F) ? IQK_VER_8188F : \ 279 (dm->support_ic_type == ODM_RTL8197F) ? IQK_VER_8197F : \ 280 (dm->support_ic_type == ODM_RTL8703B) ? IQK_VER_8703B : \ 281 (dm->support_ic_type == ODM_RTL8710B) ? IQK_VER_8710B : \ 282 (dm->support_ic_type == ODM_RTL8723D) ? IQK_VER_8723D : \ 283 (dm->support_ic_type == ODM_RTL8822B) ? IQK_VER_8822B : \ 284 (dm->support_ic_type == ODM_RTL8822C) ? IQK_VER_8822C : \ 285 (dm->support_ic_type == ODM_RTL8821C) ? IQK_VER_8821C : \ 286 (dm->support_ic_type == ODM_RTL8814B) ? IQK_VER_8814B : \ 287 (dm->support_ic_type == ODM_RTL8710C) ? IQK_VER_8710C : \ 288 (dm->support_ic_type == ODM_RTL8197G) ? IQK_VER_8197G : "unknown" 289 290 #define HALRF_LCK_VER \ 291 (dm->support_ic_type == ODM_RTL8188E) ? LCK_VER_8188E : \ 292 (dm->support_ic_type == ODM_RTL8192E) ? LCK_VER_8192E : \ 293 (dm->support_ic_type == ODM_RTL8192F) ? LCK_VER_8192F : \ 294 (dm->support_ic_type == ODM_RTL8723B) ? LCK_VER_8723B : \ 295 (dm->support_ic_type == ODM_RTL8812) ? LCK_VER_8812A : \ 296 (dm->support_ic_type == ODM_RTL8821) ? LCK_VER_8821A : \ 297 (dm->support_ic_type == ODM_RTL8814A) ? LCK_VER_8814A : \ 298 (dm->support_ic_type == ODM_RTL8188F) ? LCK_VER_8188F : \ 299 (dm->support_ic_type == ODM_RTL8197F) ? LCK_VER_8197F : \ 300 (dm->support_ic_type == ODM_RTL8703B) ? LCK_VER_8703B : \ 301 (dm->support_ic_type == ODM_RTL8710B) ? LCK_VER_8710B : \ 302 (dm->support_ic_type == ODM_RTL8723D) ? LCK_VER_8723D : \ 303 (dm->support_ic_type == ODM_RTL8822B) ? LCK_VER_8822B : \ 304 (dm->support_ic_type == ODM_RTL8822C) ? LCK_VER_8822C : \ 305 (dm->support_ic_type == ODM_RTL8821C) ? LCK_VER_8821C : \ 306 (dm->support_ic_type == ODM_RTL8814B) ? LCK_VER_8814B : \ 307 (dm->support_ic_type == ODM_RTL8710C) ? LCK_VER_8710C : \ 308 (dm->support_ic_type == ODM_RTL8710C) ? LCK_VER_8710C : "unknown" 309 #define HALRF_POWRTRACKING_VER \ 310 (dm->support_ic_type == ODM_RTL8188E) ? PWRTRK_VER_8188E : \ 311 (dm->support_ic_type == ODM_RTL8192E) ? PWRTRK_VER_8192E : \ 312 (dm->support_ic_type == ODM_RTL8192F) ? PWRTRK_VER_8192F : \ 313 (dm->support_ic_type == ODM_RTL8723B) ? PWRTRK_VER_8723B : \ 314 (dm->support_ic_type == ODM_RTL8812) ? PWRTRK_VER_8812A : \ 315 (dm->support_ic_type == ODM_RTL8821) ? PWRTRK_VER_8821A : \ 316 (dm->support_ic_type == ODM_RTL8814A) ? PWRTRK_VER_8814A : \ 317 (dm->support_ic_type == ODM_RTL8188F) ? PWRTRK_VER_8188F : \ 318 (dm->support_ic_type == ODM_RTL8197F) ? PWRTRK_VER_8197F : \ 319 (dm->support_ic_type == ODM_RTL8703B) ? PWRTRK_VER_8703B : \ 320 (dm->support_ic_type == ODM_RTL8710B) ? PWRTRK_VER_8710B : \ 321 (dm->support_ic_type == ODM_RTL8723D) ? PWRTRK_VER_8723D : \ 322 (dm->support_ic_type == ODM_RTL8822B) ? PWRTRK_VER_8822B : \ 323 (dm->support_ic_type == ODM_RTL8822C) ? PWRTRK_VER_8822C : \ 324 (dm->support_ic_type == ODM_RTL8821C) ? PWRTRK_VER_8821C : \ 325 (dm->support_ic_type == ODM_RTL8197G) ? PWRTRK_VER_8197G : "unknown" 326 327 #define HALRF_DPK_VER \ 328 (dm->support_ic_type == ODM_RTL8188E) ? DPK_VER_8188E : \ 329 (dm->support_ic_type == ODM_RTL8192E) ? DPK_VER_8192E : \ 330 (dm->support_ic_type == ODM_RTL8192F) ? DPK_VER_8192F : \ 331 (dm->support_ic_type == ODM_RTL8723B) ? DPK_VER_8723B : \ 332 (dm->support_ic_type == ODM_RTL8812) ? DPK_VER_8812A : \ 333 (dm->support_ic_type == ODM_RTL8821) ? DPK_VER_8821A : \ 334 (dm->support_ic_type == ODM_RTL8814A) ? DPK_VER_8814A : \ 335 (dm->support_ic_type == ODM_RTL8188F) ? DPK_VER_8188F : \ 336 (dm->support_ic_type == ODM_RTL8197F) ? DPK_VER_8197F : \ 337 (dm->support_ic_type == ODM_RTL8198F) ? DPK_VER_8198F : \ 338 (dm->support_ic_type == ODM_RTL8703B) ? DPK_VER_8703B : \ 339 (dm->support_ic_type == ODM_RTL8710B) ? DPK_VER_8710B : \ 340 (dm->support_ic_type == ODM_RTL8723D) ? DPK_VER_8723D : \ 341 (dm->support_ic_type == ODM_RTL8822B) ? DPK_VER_8822B : \ 342 (dm->support_ic_type == ODM_RTL8822C) ? DPK_VER_8822C : \ 343 (dm->support_ic_type == ODM_RTL8812F) ? DPK_VER_8812F : \ 344 (dm->support_ic_type == ODM_RTL8821C) ? DPK_VER_8821C : \ 345 (dm->support_ic_type == ODM_RTL8814B) ? DPK_VER_8814B : \ 346 (dm->support_ic_type == ODM_RTL8197G) ? DPK_VER_8197G : "unknown" 347 348 #define HALRF_KFREE_VER \ 349 (dm->support_ic_type == ODM_RTL8188E) ? KFREE_VER_8188E : \ 350 (dm->support_ic_type == ODM_RTL8192E) ? KFREE_VER_8192E : \ 351 (dm->support_ic_type == ODM_RTL8192F) ? KFREE_VER_8192F : \ 352 (dm->support_ic_type == ODM_RTL8723B) ? KFREE_VER_8723B : \ 353 (dm->support_ic_type == ODM_RTL8812) ? KFREE_VER_8812A : \ 354 (dm->support_ic_type == ODM_RTL8821) ? KFREE_VER_8821A : \ 355 (dm->support_ic_type == ODM_RTL8814A) ? KFREE_VER_8814A : \ 356 (dm->support_ic_type == ODM_RTL8188F) ? KFREE_VER_8188F : \ 357 (dm->support_ic_type == ODM_RTL8197F) ? KFREE_VER_8197F : \ 358 (dm->support_ic_type == ODM_RTL8703B) ? KFREE_VER_8703B : \ 359 (dm->support_ic_type == ODM_RTL8710B) ? KFREE_VER_8710B : \ 360 (dm->support_ic_type == ODM_RTL8723D) ? KFREE_VER_8723D : \ 361 (dm->support_ic_type == ODM_RTL8822B) ? KFREE_VER_8822B : \ 362 (dm->support_ic_type == ODM_RTL8822C) ? KFREE_VER_8822C : \ 363 (dm->support_ic_type == ODM_RTL8821C) ? KFREE_VER_8821C : \ 364 (dm->support_ic_type == ODM_RTL8814B) ? KFREE_VER_8814B : \ 365 (dm->support_ic_type == ODM_RTL8197G) ? KFREE_VER_8197G : "unknown" 366 367 #define HALRF_TSSI_VER \ 368 (dm->support_ic_type == ODM_RTL8812F) ? TSSI_VER_8812F : \ 369 (dm->support_ic_type == ODM_RTL8822C) ? TSSI_VER_8822C : \ 370 (dm->support_ic_type == ODM_RTL8821C) ? TSSI_VER_8821C : \ 371 (dm->support_ic_type == ODM_RTL8814B) ? TSSI_VER_8814B : \ 372 (dm->support_ic_type == ODM_RTL8197G) ? TSSI_VER_8197G : "unknown" 373 374 #define HALRF_PABIASK_VER \ 375 (dm->support_ic_type == ODM_RTL8188E) ? PABIASK_VER_8188E : \ 376 (dm->support_ic_type == ODM_RTL8192E) ? PABIASK_VER_8192E : \ 377 (dm->support_ic_type == ODM_RTL8192F) ? PABIASK_VER_8192F : \ 378 (dm->support_ic_type == ODM_RTL8723B) ? PABIASK_VER_8723B : \ 379 (dm->support_ic_type == ODM_RTL8812) ? PABIASK_VER_8812A : \ 380 (dm->support_ic_type == ODM_RTL8821) ? PABIASK_VER_8821A : \ 381 (dm->support_ic_type == ODM_RTL8814A) ? PABIASK_VER_8814A : \ 382 (dm->support_ic_type == ODM_RTL8188F) ? PABIASK_VER_8188F : \ 383 (dm->support_ic_type == ODM_RTL8197F) ? PABIASK_VER_8197F : \ 384 (dm->support_ic_type == ODM_RTL8703B) ? PABIASK_VER_8703B : \ 385 (dm->support_ic_type == ODM_RTL8710B) ? PABIASK_VER_8710B : \ 386 (dm->support_ic_type == ODM_RTL8723D) ? PABIASK_VER_8723D : \ 387 (dm->support_ic_type == ODM_RTL8822B) ? PABIASK_VER_8822B : \ 388 (dm->support_ic_type == ODM_RTL8822C) ? PABIASK_VER_8822C : \ 389 (dm->support_ic_type == ODM_RTL8821C) ? PABIASK_VER_8821C : \ 390 (dm->support_ic_type == ODM_RTL8814B) ? PABIASK_VER_8814B : \ 391 (dm->support_ic_type == ODM_RTL8197G) ? PABIASK_VER_8197G : "unknown" 392 393 #define HALRF_RFK_INIT_VER \ 394 (dm->support_ic_type == ODM_RTL8822B) ? RFK_INIT_VER_8822B : \ 395 (dm->support_ic_type == ODM_RTL8822C) ? RFK_INIT_VER_8822C : \ 396 (dm->support_ic_type == ODM_RTL8812F) ? RFK_INIT_VER_8812F : \ 397 (dm->support_ic_type == ODM_RTL8198F) ? RFK_INIT_VER_8198F : \ 398 (dm->support_ic_type == ODM_RTL8814B) ? RFK_INIT_VER_8814B : \ 399 (dm->support_ic_type == ODM_RTL8197G) ? RFK_INIT_VER_8197G : "unknown" 400 401 #define HALRF_DACK_VER \ 402 (dm->support_ic_type == ODM_RTL8822C) ? DACK_VER_8822C : \ 403 (dm->support_ic_type == ODM_RTL8814B) ? DACK_VER_8814B : "unknown" 404 405 #define IQK_THRESHOLD 8 406 #define DPK_THRESHOLD 4 407 #define HALRF_ABS(a,b) ((a>b) ? (a-b) : (b-a)) 408 #define SN 100 409 410 #define CCK_TSSI_NUM 6 411 #define OFDM_2G_TSSI_NUM 5 412 #define OFDM_5G_TSSI_NUM 14 413 414 415 416 /*@===========================================================*/ 417 /*AGC RX High Power mode*/ 418 /*@===========================================================*/ 419 #define lna_low_gain_1 0x64 420 #define lna_low_gain_2 0x5A 421 #define lna_low_gain_3 0x58 422 423 /*@============================================================*/ 424 /*@ enumeration */ 425 /*@============================================================*/ 426 427 enum halrf_func_idx { /*F_XXX = PHYDM XXX function*/ 428 RF00_PWR_TRK = 0, /*Pow_trk, TSSI_trk*/ 429 RF01_IQK = 1, /*LOK, IQK*/ 430 RF02_LCK = 2, 431 RF03_DPK = 3, 432 RF04_TXGAPK = 4, 433 RF05_DACK = 5, 434 RF06_DPK_TRK = 6, 435 RF07_2GBAND_SHIFT = 7, 436 RF08_RXDCK = 8, 437 RF09_RFK = 9 438 }; 439 440 enum halrf_ability { 441 HAL_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK), 442 HAL_RF_IQK = BIT(RF01_IQK), 443 HAL_RF_LCK = BIT(RF02_LCK), 444 HAL_RF_DPK = BIT(RF03_DPK), 445 HAL_RF_TXGAPK = BIT(RF04_TXGAPK), 446 HAL_RF_DACK = BIT(RF05_DACK), 447 HAL_RF_DPK_TRACK = BIT(RF06_DPK_TRK), 448 HAL_2GBAND_SHIFT = BIT(RF07_2GBAND_SHIFT), 449 HAL_RF_RXDCK = BIT(RF08_RXDCK) 450 }; 451 452 enum halrf_shift_band { 453 HAL_RF_2P4 = 0, 454 HAL_RF_2P3 = 1, 455 HAL_RF_2P5 = 2 456 }; 457 458 enum halrf_dbg_comp { 459 DBG_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK), 460 DBG_RF_IQK = BIT(RF01_IQK), 461 DBG_RF_LCK = BIT(RF02_LCK), 462 DBG_RF_DPK = BIT(RF03_DPK), 463 DBG_RF_TXGAPK = BIT(RF04_TXGAPK), 464 DBG_RF_DACK = BIT(RF05_DACK), 465 DBG_RF_DPK_TRACK = BIT(RF06_DPK_TRK), 466 DBG_RF_RFK = BIT(RF09_RFK), 467 DBG_RF_MP = BIT(29), 468 DBG_RF_TMP = BIT(30), 469 DBG_RF_INIT = BIT(31) 470 }; 471 472 enum halrf_cmninfo_init { 473 HALRF_CMNINFO_ABILITY = 0, 474 HALRF_CMNINFO_DPK_EN = 1, 475 HALRF_CMNINFO_EEPROM_THERMAL_VALUE, 476 HALRF_CMNINFO_RFK_FORBIDDEN, 477 HALRF_CMNINFO_IQK_SEGMENT, 478 HALRF_CMNINFO_RATE_INDEX, 479 HALRF_CMNINFO_PWT_TYPE, 480 HALRF_CMNINFO_MP_PSD_POINT, 481 HALRF_CMNINFO_MP_PSD_START_POINT, 482 HALRF_CMNINFO_MP_PSD_STOP_POINT, 483 HALRF_CMNINFO_MP_PSD_AVERAGE, 484 HALRF_CMNINFO_IQK_TIMES, 485 HALRF_CMNINFO_MP_POWER_TRACKING_TYPE, 486 HALRF_CMNINFO_POWER_TRACK_CONTROL 487 }; 488 489 enum halrf_cmninfo_hook { 490 HALRF_CMNINFO_CON_TX, 491 HALRF_CMNINFO_SINGLE_TONE, 492 HALRF_CMNINFO_CARRIER_SUPPRESSION, 493 HALRF_CMNINFO_MP_RATE_INDEX, 494 HALRF_CMNINFO_MANUAL_RF_SUPPORTABILITY 495 }; 496 497 enum halrf_lna_set { 498 HALRF_LNA_DISABLE = 0, 499 HALRF_LNA_ENABLE = 1, 500 }; 501 502 enum halrf_k_segment_time { 503 SEGMENT_FREE = 0, 504 SEGMENT_10MS = 10, /*10ms*/ 505 SEGMENT_30MS = 30, /*30ms*/ 506 SEGMENT_50MS = 50, /*50ms*/ 507 }; 508 509 #define POWER_INDEX_DIFF 4 510 #define TSSI_TXAGC_DIFF 2 511 512 #define TSSI_CODE_NUM 84 513 514 #define TSSI_SLOPE_2G 8 515 #define TSSI_SLOPE_5G 5 516 517 #define TSSI_EFUSE_NUM 25 518 #define TSSI_EFUSE_KFREE_NUM 4 519 520 struct _halrf_tssi_data { 521 s32 cck_offset_patha; 522 s32 cck_offset_pathb; 523 s32 tssi_trk_txagc_offset[PHYDM_MAX_RF_PATH]; 524 s32 delta_tssi_txagc_offset[PHYDM_MAX_RF_PATH]; 525 s16 txagc_codeword[TSSI_CODE_NUM]; 526 u16 tssi_codeword[TSSI_CODE_NUM]; 527 s8 tssi_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_NUM]; 528 s8 tssi_kfree_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_KFREE_NUM]; 529 u8 thermal[PHYDM_MAX_RF_PATH]; 530 u32 index[PHYDM_MAX_RF_PATH][14]; 531 u8 do_tssi; 532 u8 get_thermal; 533 u8 tssi_finish_bit[PHYDM_MAX_RF_PATH]; 534 u8 thermal_trigger; 535 }; 536 537 struct _halrf_txgapk_info { 538 u32 txgapk_rf3f_bp[5][12][PHYDM_MAX_RF_PATH]; /* band(2Gcck/2GOFDM/5GL/5GM/5GH)/idx/path */ 539 boolean txgapk_bp_done; 540 s8 offset[12][PHYDM_MAX_RF_PATH]; 541 s8 fianl_offset[12][PHYDM_MAX_RF_PATH]; 542 u8 read_txgain; 543 }; 544 545 546 /*@============================================================*/ 547 /*@ structure */ 548 /*@============================================================*/ 549 550 struct _hal_rf_ { 551 /*hook*/ 552 u8 *test1; 553 554 /*update*/ 555 u32 rf_supportability; 556 u8 rf_shift_band; 557 /*u32 halrf_tssi_data;*/ 558 559 u8 eeprom_thermal; 560 u8 dpk_en; /*Enable Function DPK OFF/ON = 0/1*/ 561 boolean dpk_done; 562 u64 dpk_progressing_time; 563 u64 iqk_progressing_time; 564 u32 fw_ver; 565 566 boolean *is_con_tx; 567 boolean *is_single_tone; 568 boolean *is_carrier_suppresion; 569 boolean is_dpk_in_progress; 570 boolean is_tssi_in_progress; 571 boolean is_bt_iqk_timeout; 572 boolean is_rfk_h2c_timeout; 573 boolean aac_checked; 574 boolean is_txgapk_in_progress; 575 576 u8 *mp_rate_index; 577 u32 *manual_rf_supportability; 578 u32 p_rate_index; 579 u8 pwt_type; 580 u32 rf_dbg_comp; 581 582 u8 ext_lna; /*@with 2G external LNA NO/Yes = 0/1*/ 583 u8 ext_lna_5g; /*@with 5G external LNA NO/Yes = 0/1*/ 584 u8 ext_pa; /*@with 2G external PNA NO/Yes = 0/1*/ 585 u8 ext_pa_5g; /*@with 5G external PNA NO/Yes = 0/1*/ 586 #if !(DM_ODM_SUPPORT_TYPE & ODM_IOT) 587 struct _halrf_psd_data halrf_psd_data; 588 struct _halrf_tssi_data halrf_tssi_data; 589 #endif 590 struct _halrf_txgapk_info halrf_txgapk_info; 591 u8 power_track_type; 592 u8 mp_pwt_type; 593 u8 pre_band_type; 594 }; 595 596 /*@============================================================*/ 597 /*@ function prototype */ 598 /*@============================================================*/ 599 600 #if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ 601 RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ 602 RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ 603 RTL8812F_SUPPORT == 1 || RTL8710C_SUPPORT == 1 ||\ 604 RTL8197G_SUPPORT == 1) 605 void halrf_iqk_info_dump(void *dm_void, u32 *_used, char *output, 606 u32 *_out_len); 607 608 void halrf_iqk_hwtx_check(void *dm_void, boolean is_check); 609 #endif 610 611 u8 halrf_match_iqk_version(void *dm_void); 612 613 void halrf_support_ability_debug(void *dm_void, char input[][16], u32 *_used, 614 char *output, u32 *_out_len); 615 #ifdef CONFIG_2G_BAND_SHIFT 616 void halrf_support_band_shift_debug(void *dm_void, char input[][16], u32 *_used, 617 char *output, u32 *_out_len); 618 #endif 619 void halrf_cmn_info_init(void *dm_void, enum halrf_cmninfo_init cmn_info, 620 u32 value); 621 622 void halrf_cmn_info_hook(void *dm_void, enum halrf_cmninfo_hook cmn_info, 623 void *value); 624 625 void halrf_cmn_info_set(void *dm_void, u32 cmn_info, u64 value); 626 627 u64 halrf_cmn_info_get(void *dm_void, u32 cmn_info); 628 629 void halrf_watchdog(void *dm_void); 630 631 void halrf_supportability_init(void *dm_void); 632 633 void halrf_init(void *dm_void); 634 635 void halrf_iqk_trigger(void *dm_void, boolean is_recovery); 636 637 void halrf_rfk_handshake(void *dm_void, boolean is_before_k); 638 639 void halrf_rf_k_connect_trigger(void *dm_void, boolean is_recovery, 640 enum halrf_k_segment_time seg_time); 641 642 void halrf_segment_iqk_trigger(void *dm_void, boolean clear, 643 boolean segment_iqk); 644 645 void halrf_lck_trigger(void *dm_void); 646 647 void halrf_iqk_debug(void *dm_void, u32 *const dm_value, u32 *_used, 648 char *output, u32 *_out_len); 649 650 void phydm_get_iqk_cfir(void *dm_void, u8 idx, u8 path, boolean debug); 651 652 void halrf_iqk_xym_read(void *dm_void, u8 path, u8 xym_type); 653 654 void halrf_rf_lna_setting(void *dm_void, enum halrf_lna_set type); 655 656 void halrf_do_imr_test(void *dm_void, u8 data); 657 658 u32 halrf_psd_log2base(u32 val); 659 660 void halrf_dpk_trigger(void *dm_void); 661 662 void halrf_txgapk_trigger(void *dm_void); 663 664 u8 halrf_dpk_result_check(void *dm_void); 665 666 void halrf_dpk_sram_read(void *dm_void); 667 668 void halrf_dpk_enable_disable(void *dm_void); 669 670 void halrf_dpk_track(void *dm_void); 671 672 void halrf_dpk_reload(void *dm_void); 673 674 void halrf_dpk_switch(void *dm_void, u8 enable); 675 676 void halrf_dpk_debug_cmd(void *dm_void, char input[][16], u32 *_used, 677 char *output, u32 *_out_len); 678 679 void halrf_dpk_c2h_report_transfer(void *dm_void, boolean is_ok, u8 *buf, u8 buf_size); 680 681 void halrf_dpk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size); 682 683 /*Global function*/ 684 685 void halrf_reload_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num); 686 687 void halrf_reload_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, 688 u8 ss); 689 690 void halrf_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num); 691 692 void halrf_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, u8 ss); 693 694 void halrf_mode(void *dm_void, u32 *i_value, u32 *q_value); 695 696 boolean halrf_compare(void *dm_void, u32 value); 697 698 u32 halrf_delta(void *dm_void, u32 v1, u32 v2); 699 700 void halrf_minmax_compare(void *dm_void, u32 value, u32 *min, u32 *max); 701 702 void halrf_b_sort(void *dm_void, u32 *iv, u32 *qv); 703 704 void halrf_bubble(void *dm_void, u32 *v1, u32 *v2); 705 706 void halrf_swap(void *dm_void, u32 *v1, u32 *v2); 707 708 enum hal_status 709 halrf_config_rfk_with_header_file(void *dm_void, u32 config_type); 710 711 #if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\ 712 RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\ 713 RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\ 714 RTL8812F_SUPPORT == 1 || RTL8710C_SUPPORT == 1 ||\ 715 RTL8197G_SUPPORT == 1) 716 void halrf_iqk_dbg(void *dm_void); 717 #endif 718 719 void halrf_tssi_get_efuse(void *dm_void); 720 721 void halrf_do_tssi(void *dm_void); 722 723 void halrf_set_tssi_enable(void *dm_void, boolean enable); 724 725 void halrf_do_thermal(void *dm_void); 726 727 u32 halrf_set_tssi_value(void *dm_void, u32 tssi_value); 728 729 void halrf_set_tssi_power(void *dm_void, s8 power); 730 731 void halrf_tssi_set_de_for_tx_verify(void *dm_void, u32 tssi_de, u8 path); 732 733 u32 halrf_query_tssi_value(void *dm_void); 734 735 void halrf_tssi_cck(void *dm_void); 736 737 void halrf_thermal_cck(void *dm_void); 738 739 void halrf_tssi_set_de(void *dm_void); 740 741 void halrf_tssi_dck(void *dm_void, u8 direct_do); 742 743 void halrf_calculate_tssi_codeword(void *dm_void); 744 745 void halrf_set_tssi_codeword(void *dm_void); 746 747 u8 halrf_get_tssi_codeword_for_txindex(void *dm_void); 748 749 void halrf_tssi_clean_de(void *dm_void); 750 751 u32 halrf_tssi_trigger_de(void *dm_void, u8 path); 752 753 u32 halrf_tssi_get_de(void *dm_void, u8 path); 754 755 void halrf_tssi_trigger(void *dm_void); 756 757 void halrf_txgapk_write_gain_table(void *dm_void); 758 759 void halrf_txgapk_reload_tx_gain(void *dm_void); 760 761 void halrf_txgap_enable_disable(void *dm_void, u8 enable); 762 763 void halrf_set_dpk_track(void *dm_void, u8 enable); 764 765 void halrf_set_dpkbychannel(void *dm_void, boolean dpk_by_ch); 766 767 void halrf_set_dpkenable(void *dm_void, boolean is_dpk_enable); 768 769 boolean halrf_get_dpkbychannel(void *dm_void); 770 771 boolean halrf_get_dpkenable(void *dm_void); 772 773 void _iqk_check_if_reload(void *dm_void); 774 775 void halrf_do_rxbb_dck(void *dm_void); 776 777 void config_halrf_path_adda_setting_trigger(void *dm_void); 778 779 void halrf_reload_iqk(void *dm_void, boolean reset); 780 781 void halrf_dack_dbg(void *dm_void); 782 783 void halrf_dack_trigger(void *dm_void, boolean force); 784 785 void halrf_dack_restore(void *dm_void); 786 787 void halrf_iqk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size); 788 789 void halrf_set_rfsupportability(void *dm_void); 790 791 void halrf_rxdck(void *dm_void); 792 793 void halrf_delay_10us(u16 v1); 794 795 void halrf_dump_rfk_reg(void *dm_void, char input[][16], u32 *_used, 796 char *output, u32 *_out_len); 797 798 void halrf_rfk_power_save(void *dm_void, boolean is_power_save); 799 800 #endif /*__HALRF_H__*/ 801