1 /* 2 * EVENT_LOG System Definitions 3 * 4 * This file describes the payloads of event log entries that are data buffers 5 * rather than formatted string entries. The contents are generally XTLVs. 6 * 7 * Portions of this code are copyright (c) 2021 Cypress Semiconductor Corporation 8 * 9 * Copyright (C) 1999-2017, Broadcom Corporation 10 * 11 * Unless you and Broadcom execute a separate written software license 12 * agreement governing use of this software, this software is licensed to you 13 * under the terms of the GNU General Public License version 2 (the "GPL"), 14 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 15 * following added to such license: 16 * 17 * As a special exception, the copyright holders of this software give you 18 * permission to link this software with independent modules, and to copy and 19 * distribute the resulting executable under terms of your choice, provided that 20 * you also meet, for each linked independent module, the terms and conditions of 21 * the license of that module. An independent module is a module which is not 22 * derived from this software. The special exception does not apply to any 23 * modifications of the software. 24 * 25 * Notwithstanding the above, under no circumstances may you combine this 26 * software in any way with any other Broadcom software provided under a license 27 * other than the GPL, without Broadcom's express prior written consent. 28 * 29 * 30 * <<Broadcom-WL-IPTag/Open:>> 31 * 32 * $Id$ 33 */ 34 35 #ifndef _EVENT_LOG_PAYLOAD_H_ 36 #define _EVENT_LOG_PAYLOAD_H_ 37 38 #include <typedefs.h> 39 #include <bcmutils.h> 40 #include <ethernet.h> 41 #include <event_log_tag.h> 42 43 #define EVENT_LOG_XTLV_ID_STR 0 /**< XTLV ID for a string */ 44 #define EVENT_LOG_XTLV_ID_TXQ_SUM 1 /**< XTLV ID for txq_summary_t */ 45 #define EVENT_LOG_XTLV_ID_SCBDATA_SUM 2 /**< XTLV ID for cb_subq_summary_t */ 46 #define EVENT_LOG_XTLV_ID_SCBDATA_AMPDU_TX_SUM 3 /**< XTLV ID for scb_ampdu_tx_summary_t */ 47 #define EVENT_LOG_XTLV_ID_BSSCFGDATA_SUM 4 /**< XTLV ID for bsscfg_q_summary_t */ 48 #define EVENT_LOG_XTLV_ID_UCTXSTATUS 5 /**< XTLV ID for ucode TxStatus array */ 49 #define EVENT_LOG_XTLV_ID_TXQ_SUM_V2 6 /**< XTLV ID for txq_summary_v2_t */ 50 51 /** 52 * An XTLV holding a string 53 * String is not null terminated, length is the XTLV len. 54 */ 55 typedef struct xtlv_string { 56 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_STR */ 57 uint16 len; /* XTLV Len (String length) */ 58 char str[1]; /* var len array characters */ 59 } xtlv_string_t; 60 61 #define XTLV_STRING_FULL_LEN(str_len) (BCM_XTLV_HDR_SIZE + (str_len) * sizeof(char)) 62 63 /** 64 * Summary for a single TxQ context 65 * Two of these will be used per TxQ context---one for the high TxQ, and one for 66 * the low txq that contains DMA prepared pkts. The high TxQ is a full multi-precidence 67 * queue and also has a BSSCFG map to identify the BSSCFGS associated with the queue context. 68 * The low txq counterpart does not populate the BSSCFG map. 69 * The excursion queue will have no bsscfgs associated and is the first queue dumped. 70 */ 71 typedef struct txq_summary { 72 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_TXQ_SUM */ 73 uint16 len; /* XTLV Len */ 74 uint32 bsscfg_map; /* bitmap of bsscfg indexes associated with this queue */ 75 uint32 stopped; /* flow control bitmap */ 76 uint8 prec_count; /* count of precedences/fifos and len of following array */ 77 uint8 pad; 78 uint16 plen[1]; /* var len array of lengths of each prec/fifo in the queue */ 79 } txq_summary_t; 80 81 #define TXQ_SUMMARY_LEN (OFFSETOF(txq_summary_t, plen)) 82 #define TXQ_SUMMARY_FULL_LEN(num_q) (TXQ_SUMMARY_LEN + (num_q) * sizeof(uint16)) 83 84 typedef struct txq_summary_v2 { 85 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_TXQ_SUM_V2 */ 86 uint16 len; /* XTLV Len */ 87 uint32 bsscfg_map; /* bitmap of bsscfg indexes associated with this queue */ 88 uint32 stopped; /* flow control bitmap */ 89 uint32 hw_stopped; /* flow control bitmap */ 90 uint8 prec_count; /* count of precedences/fifos and len of following array */ 91 uint8 pad; 92 uint16 plen[1]; /* var len array of lengths of each prec/fifo in the queue */ 93 } txq_summary_v2_t; 94 95 #define TXQ_SUMMARY_V2_LEN (OFFSETOF(txq_summary_v2_t, plen)) 96 #define TXQ_SUMMARY_V2_FULL_LEN(num_q) (TXQ_SUMMARY_V2_LEN + (num_q) * sizeof(uint16)) 97 98 /** 99 * Summary for tx datapath of an SCB cubby 100 * This is a generic summary structure (one size fits all) with 101 * a cubby ID and sub-ID to differentiate SCB cubby types and possible sub-queues. 102 */ 103 typedef struct scb_subq_summary { 104 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_SCBDATA_SUM */ 105 uint16 len; /* XTLV Len */ 106 uint32 flags; /* cubby specficic flags */ 107 uint8 cubby_id; /* ID registered for cubby */ 108 uint8 sub_id; /* sub ID if a cubby has more than one queue */ 109 uint8 prec_count; /* count of precedences/fifos and len of following array */ 110 uint8 pad; 111 uint16 plen[1]; /* var len array of lengths of each prec/fifo in the queue */ 112 } scb_subq_summary_t; 113 114 #define SCB_SUBQ_SUMMARY_LEN (OFFSETOF(scb_subq_summary_t, plen)) 115 #define SCB_SUBQ_SUMMARY_FULL_LEN(num_q) (SCB_SUBQ_SUMMARY_LEN + (num_q) * sizeof(uint16)) 116 117 /* scb_subq_summary_t.flags for APPS */ 118 #define SCBDATA_APPS_F_PS 0x00000001 119 #define SCBDATA_APPS_F_PSPEND 0x00000002 120 #define SCBDATA_APPS_F_INPVB 0x00000004 121 #define SCBDATA_APPS_F_APSD_USP 0x00000008 122 #define SCBDATA_APPS_F_TXBLOCK 0x00000010 123 #define SCBDATA_APPS_F_APSD_HPKT_TMR 0x00000020 124 #define SCBDATA_APPS_F_APSD_TX_PEND 0x00000040 125 #define SCBDATA_APPS_F_INTRANS 0x00000080 126 #define SCBDATA_APPS_F_OFF_PEND 0x00000100 127 #define SCBDATA_APPS_F_OFF_BLOCKED 0x00000200 128 #define SCBDATA_APPS_F_OFF_IN_PROG 0x00000400 129 130 /** 131 * Summary for tx datapath AMPDU SCB cubby 132 * This is a specific data structure to describe the AMPDU datapath state for an SCB 133 * used instead of scb_subq_summary_t. 134 * Info is for one TID, so one will be dumped per BA TID active for an SCB. 135 */ 136 typedef struct scb_ampdu_tx_summary { 137 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_SCBDATA_AMPDU_TX_SUM */ 138 uint16 len; /* XTLV Len */ 139 uint32 flags; /* misc flags */ 140 uint8 tid; /* initiator TID (priority) */ 141 uint8 ba_state; /* internal BA state */ 142 uint8 bar_cnt; /* number of bars sent with no progress */ 143 uint8 retry_bar; /* reason code if bar to be retried at watchdog */ 144 uint16 barpending_seq; /* seqnum for bar */ 145 uint16 bar_ackpending_seq; /* seqnum of bar for which ack is pending */ 146 uint16 start_seq; /* seqnum of the first unacknowledged packet */ 147 uint16 max_seq; /* max unacknowledged seqnum sent */ 148 uint32 released_bytes_inflight; /* Number of bytes pending in bytes */ 149 uint32 released_bytes_target; 150 } scb_ampdu_tx_summary_t; 151 152 /* scb_ampdu_tx_summary.flags defs */ 153 #define SCBDATA_AMPDU_TX_F_BAR_ACKPEND 0x00000001 /* bar_ackpending */ 154 155 /** XTLV stuct to summarize a BSSCFG's packet queue */ 156 typedef struct bsscfg_q_summary { 157 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_BSSCFGDATA_SUM */ 158 uint16 len; /* XTLV Len */ 159 struct ether_addr BSSID; /* BSSID */ 160 uint8 bsscfg_idx; /* bsscfg index */ 161 uint8 type; /* bsscfg type enumeration: BSSCFG_TYPE_XXX */ 162 uint8 subtype; /* bsscfg subtype enumeration: BSSCFG_SUBTYPE_XXX */ 163 uint8 prec_count; /* count of precedences/fifos and len of following array */ 164 uint16 plen[1]; /* var len array of lengths of each prec/fifo in the queue */ 165 } bsscfg_q_summary_t; 166 167 #define BSSCFG_Q_SUMMARY_LEN (OFFSETOF(bsscfg_q_summary_t, plen)) 168 #define BSSCFG_Q_SUMMARY_FULL_LEN(num_q) (BSSCFG_Q_SUMMARY_LEN + (num_q) * sizeof(uint16)) 169 170 /** 171 * An XTLV holding a TxStats array 172 * TxStatus entries are 8 or 16 bytes, size in words (2 or 4) givent in 173 * entry_size field. 174 * Array is uint32 words 175 */ 176 typedef struct xtlv_uc_txs { 177 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_UCTXSTATUS */ 178 uint16 len; /* XTLV Len */ 179 uint8 entry_size; /* num uint32 words per entry */ 180 uint8 pad[3]; /* reserved, zero */ 181 uint32 w[1]; /* var len array of words */ 182 } xtlv_uc_txs_t; 183 184 #define XTLV_UCTXSTATUS_LEN (OFFSETOF(xtlv_uc_txs_t, w)) 185 #define XTLV_UCTXSTATUS_FULL_LEN(words) (XTLV_UCTXSTATUS_LEN + (words) * sizeof(uint32)) 186 187 #define SCAN_SUMMARY_VERSION 1 188 /* Scan flags */ 189 #define SCAN_SUM_CHAN_INFO 0x1 190 /* Scan_sum flags */ 191 #define BAND5G_SIB_ENAB 0x2 192 #define BAND2G_SIB_ENAB 0x4 193 #define PARALLEL_SCAN 0x8 194 #define SCAN_ABORT 0x10 195 196 /* scan_channel_info flags */ 197 #define ACTIVE_SCAN_SCN_SUM 0x2 198 #define SCAN_SUM_WLC_CORE0 0x4 199 #define SCAN_SUM_WLC_CORE1 0x8 200 #define HOME_CHAN 0x10 201 202 typedef struct wl_scan_ssid_info 203 { 204 uint8 ssid_len; /* the length of SSID */ 205 uint8 ssid[32]; /* SSID string */ 206 } wl_scan_ssid_info_t; 207 208 typedef struct wl_scan_channel_info { 209 uint16 chanspec; /* chanspec scanned */ 210 uint16 reserv; 211 uint32 start_time; /* Scan start time in 212 * milliseconds for the chanspec 213 * or home_dwell time start 214 */ 215 uint32 end_time; /* Scan end time in 216 * milliseconds for the chanspec 217 * or home_dwell time end 218 */ 219 uint16 probe_count; /* No of probes sent out. For future use 220 */ 221 uint16 scn_res_count; /* Count of scan_results found per 222 * channel. For future use 223 */ 224 } wl_scan_channel_info_t; 225 226 typedef struct wl_scan_summary_info { 227 uint32 total_chan_num; /* Total number of channels scanned */ 228 uint32 scan_start_time; /* Scan start time in milliseconds */ 229 uint32 scan_end_time; /* Scan end time in milliseconds */ 230 wl_scan_ssid_info_t ssid[1]; /* SSID being scanned in current 231 * channel. For future use 232 */ 233 } wl_scan_summary_info_t; 234 235 struct wl_scan_summary { 236 uint8 version; /* Version */ 237 uint8 reserved; 238 uint16 len; /* Length of the data buffer including SSID 239 * list. 240 */ 241 uint16 sync_id; /* Scan Sync ID */ 242 uint16 scan_flags; /* flags [0] or SCAN_SUM_CHAN_INFO = */ 243 /* channel_info, if not set */ 244 /* it is scan_summary_info */ 245 /* when channel_info is used, */ 246 /* the following flag bits are overridden: */ 247 /* flags[1] or ACTIVE_SCAN_SCN_SUM = active channel if set */ 248 /* passive if not set */ 249 /* flags[2] or WLC_CORE0 = if set, represents wlc_core0 */ 250 /* flags[3] or WLC_CORE1 = if set, represents wlc_core1 */ 251 /* flags[4] or HOME_CHAN = if set, represents home-channel */ 252 /* flags[5:15] = reserved */ 253 /* when scan_summary_info is used, */ 254 /* the following flag bits are used: */ 255 /* flags[1] or BAND5G_SIB_ENAB = */ 256 /* allowSIBParallelPassiveScan on 5G band */ 257 /* flags[2] or BAND2G_SIB_ENAB = */ 258 /* allowSIBParallelPassiveScan on 2G band */ 259 /* flags[3] or PARALLEL_SCAN = Parallel scan enabled or not */ 260 /* flags[4] or SCAN_ABORT = SCAN_ABORTED scenario */ 261 /* flags[5:15] = reserved */ 262 union { 263 wl_scan_channel_info_t scan_chan_info; /* scan related information 264 * for each channel scanned 265 */ 266 wl_scan_summary_info_t scan_sum_info; /* Cumulative scan related 267 * information. 268 */ 269 } u; 270 }; 271 272 /* Channel switch log record structure 273 * Host may map the following structure on channel switch event log record 274 * received from dongle. Note that all payload entries in event log record are 275 * uint32/int32. 276 */ 277 typedef struct wl_chansw_event_log_record { 278 uint32 time; /* Time in us */ 279 uint32 old_chanspec; /* Old channel spec */ 280 uint32 new_chanspec; /* New channel spec */ 281 uint32 chansw_reason; /* Reason for channel change */ 282 int32 dwell_time; 283 } wl_chansw_event_log_record_t; 284 285 typedef struct wl_chansw_event_log_record_v2 { 286 uint32 time; /* Time in us */ 287 uint32 old_chanspec; /* Old channel spec */ 288 uint32 new_chanspec; /* New channel spec */ 289 uint32 chansw_reason; /* Reason for channel change */ 290 int32 dwell_time; 291 uint32 core; 292 int32 phychanswtime; /* channel switch time */ 293 } wl_chansw_event_log_record_v2_t; 294 295 /* Sub-block type for EVENT_LOG_TAG_AMPDU_DUMP */ 296 typedef enum { 297 WL_AMPDU_STATS_TYPE_RXMCSx1 = 0, /* RX MCS rate (Nss = 1) */ 298 WL_AMPDU_STATS_TYPE_RXMCSx2 = 1, 299 WL_AMPDU_STATS_TYPE_RXMCSx3 = 2, 300 WL_AMPDU_STATS_TYPE_RXMCSx4 = 3, 301 WL_AMPDU_STATS_TYPE_RXVHTx1 = 4, /* RX VHT rate (Nss = 1) */ 302 WL_AMPDU_STATS_TYPE_RXVHTx2 = 5, 303 WL_AMPDU_STATS_TYPE_RXVHTx3 = 6, 304 WL_AMPDU_STATS_TYPE_RXVHTx4 = 7, 305 WL_AMPDU_STATS_TYPE_TXMCSx1 = 8, /* TX MCS rate (Nss = 1) */ 306 WL_AMPDU_STATS_TYPE_TXMCSx2 = 9, 307 WL_AMPDU_STATS_TYPE_TXMCSx3 = 10, 308 WL_AMPDU_STATS_TYPE_TXMCSx4 = 11, 309 WL_AMPDU_STATS_TYPE_TXVHTx1 = 12, /* TX VHT rate (Nss = 1) */ 310 WL_AMPDU_STATS_TYPE_TXVHTx2 = 13, 311 WL_AMPDU_STATS_TYPE_TXVHTx3 = 14, 312 WL_AMPDU_STATS_TYPE_TXVHTx4 = 15, 313 WL_AMPDU_STATS_TYPE_RXMCSSGI = 16, /* RX SGI usage (for all MCS rates) */ 314 WL_AMPDU_STATS_TYPE_TXMCSSGI = 17, /* TX SGI usage (for all MCS rates) */ 315 WL_AMPDU_STATS_TYPE_RXVHTSGI = 18, /* RX SGI usage (for all VHT rates) */ 316 WL_AMPDU_STATS_TYPE_TXVHTSGI = 19, /* TX SGI usage (for all VHT rates) */ 317 WL_AMPDU_STATS_TYPE_RXMCSPER = 20, /* RX PER (for all MCS rates) */ 318 WL_AMPDU_STATS_TYPE_TXMCSPER = 21, /* TX PER (for all MCS rates) */ 319 WL_AMPDU_STATS_TYPE_RXVHTPER = 22, /* RX PER (for all VHT rates) */ 320 WL_AMPDU_STATS_TYPE_TXVHTPER = 23, /* TX PER (for all VHT rates) */ 321 WL_AMPDU_STATS_TYPE_RXDENS = 24, /* RX AMPDU density */ 322 WL_AMPDU_STATS_TYPE_TXDENS = 25, /* TX AMPDU density */ 323 WL_AMPDU_STATS_TYPE_RXMCSOK = 26, /* RX all MCS rates */ 324 WL_AMPDU_STATS_TYPE_RXVHTOK = 27, /* RX all VHT rates */ 325 WL_AMPDU_STATS_TYPE_TXMCSALL = 28, /* TX all MCS rates */ 326 WL_AMPDU_STATS_TYPE_TXVHTALL = 29, /* TX all VHT rates */ 327 WL_AMPDU_STATS_TYPE_TXMCSOK = 30, /* TX all MCS rates */ 328 WL_AMPDU_STATS_TYPE_TXVHTOK = 31, /* TX all VHT rates */ 329 WL_AMPDU_STATS_MAX_CNTS = 64 330 } wl_ampdu_stat_enum_t; 331 typedef struct { 332 uint16 type; /* AMPDU statistics sub-type */ 333 uint16 len; /* Number of 32-bit counters */ 334 uint32 counters[WL_AMPDU_STATS_MAX_CNTS]; 335 } wl_ampdu_stats_generic_t; 336 337 typedef wl_ampdu_stats_generic_t wl_ampdu_stats_rx_t; 338 typedef wl_ampdu_stats_generic_t wl_ampdu_stats_tx_t; 339 340 typedef struct { 341 uint16 type; /* AMPDU statistics sub-type */ 342 uint16 len; /* Number of 32-bit counters + 2 */ 343 uint32 total_ampdu; 344 uint32 total_mpdu; 345 uint32 aggr_dist[WL_AMPDU_STATS_MAX_CNTS + 1]; 346 } wl_ampdu_stats_aggrsz_t; 347 348 /* Sub-block type for EVENT_LOG_TAG_MSCHPROFILE */ 349 #define WL_MSCH_PROFILER_START 0 /* start event check */ 350 #define WL_MSCH_PROFILER_EXIT 1 /* exit event check */ 351 #define WL_MSCH_PROFILER_REQ 2 /* request event */ 352 #define WL_MSCH_PROFILER_CALLBACK 3 /* call back event */ 353 #define WL_MSCH_PROFILER_MESSAGE 4 /* message event */ 354 #define WL_MSCH_PROFILER_PROFILE_START 5 355 #define WL_MSCH_PROFILER_PROFILE_END 6 356 #define WL_MSCH_PROFILER_REQ_HANDLE 7 357 #define WL_MSCH_PROFILER_REQ_ENTITY 8 358 #define WL_MSCH_PROFILER_CHAN_CTXT 9 359 #define WL_MSCH_PROFILER_EVENT_LOG 10 360 #define WL_MSCH_PROFILER_REQ_TIMING 11 361 #define WL_MSCH_PROFILER_TYPE_MASK 0x00ff 362 #define WL_MSCH_PROFILER_WLINDEX_SHIFT 8 363 #define WL_MSCH_PROFILER_WLINDEX_MASK 0x0f00 364 #define WL_MSCH_PROFILER_VER_SHIFT 12 365 #define WL_MSCH_PROFILER_VER_MASK 0xf000 366 367 /* MSCH Event data current verion */ 368 #define WL_MSCH_PROFILER_VER 2 369 370 /* msch version history */ 371 #define WL_MSCH_PROFILER_RSDB_VER 1 372 #define WL_MSCH_PROFILER_REPORT_VER 2 373 374 /* msch collect header size */ 375 #define WL_MSCH_PROFILE_HEAD_SIZE OFFSETOF(msch_collect_tlv_t, value) 376 377 /* msch event log header size */ 378 #define WL_MSCH_EVENT_LOG_HEAD_SIZE OFFSETOF(msch_event_log_profiler_event_data_t, data) 379 380 /* MSCH data buffer size */ 381 #define WL_MSCH_PROFILER_BUFFER_SIZE 512 382 383 /* request type used in wlc_msch_req_param_t struct */ 384 #define WL_MSCH_RT_BOTH_FIXED 0 /* both start and end time is fixed */ 385 #define WL_MSCH_RT_START_FLEX 1 /* start time is flexible and duration is fixed */ 386 #define WL_MSCH_RT_DUR_FLEX 2 /* start time is fixed and end time is flexible */ 387 #define WL_MSCH_RT_BOTH_FLEX 3 /* Both start and duration is flexible */ 388 389 /* Flags used in wlc_msch_req_param_t struct */ 390 #define WL_MSCH_REQ_FLAGS_CHAN_CONTIGUOUS (1 << 0) /* Don't break up channels in chanspec_list */ 391 #define WL_MSCH_REQ_FLAGS_MERGE_CONT_SLOTS (1 << 1) /* No slot end if slots are continous */ 392 #define WL_MSCH_REQ_FLAGS_PREMTABLE (1 << 2) /* Req can be pre-empted by PREMT_CURTS req */ 393 #define WL_MSCH_REQ_FLAGS_PREMT_CURTS (1 << 3) /* Pre-empt request at the end of curts */ 394 #define WL_MSCH_REQ_FLAGS_PREMT_IMMEDIATE (1 << 4) /* Pre-empt cur_ts immediately */ 395 396 /* Requested slot Callback states 397 * req->pend_slot/cur_slot->flags 398 */ 399 #define WL_MSCH_RC_FLAGS_ONCHAN_FIRE (1 << 0) 400 #define WL_MSCH_RC_FLAGS_START_FIRE_DONE (1 << 1) 401 #define WL_MSCH_RC_FLAGS_END_FIRE_DONE (1 << 2) 402 #define WL_MSCH_RC_FLAGS_ONFIRE_DONE (1 << 3) 403 #define WL_MSCH_RC_FLAGS_SPLIT_SLOT_START (1 << 4) 404 #define WL_MSCH_RC_FLAGS_SPLIT_SLOT_END (1 << 5) 405 #define WL_MSCH_RC_FLAGS_PRE_ONFIRE_DONE (1 << 6) 406 407 /* Request entity flags */ 408 #define WL_MSCH_ENTITY_FLAG_MULTI_INSTANCE (1 << 0) 409 410 /* Request Handle flags */ 411 #define WL_MSCH_REQ_HDL_FLAGS_NEW_REQ (1 << 0) /* req_start callback */ 412 413 /* MSCH state flags (msch_info->flags) */ 414 #define WL_MSCH_STATE_IN_TIEMR_CTXT 0x1 415 #define WL_MSCH_STATE_SCHD_PENDING 0x2 416 417 /* MSCH callback type */ 418 #define WL_MSCH_CT_REQ_START 0x1 419 #define WL_MSCH_CT_ON_CHAN 0x2 420 #define WL_MSCH_CT_SLOT_START 0x4 421 #define WL_MSCH_CT_SLOT_END 0x8 422 #define WL_MSCH_CT_SLOT_SKIP 0x10 423 #define WL_MSCH_CT_OFF_CHAN 0x20 424 #define WL_MSCH_CT_OFF_CHAN_DONE 0x40 425 #define WL_MSCH_CT_REQ_END 0x80 426 #define WL_MSCH_CT_PARTIAL 0x100 427 #define WL_MSCH_CT_PRE_ONCHAN 0x200 428 #define WL_MSCH_CT_PRE_REQ_START 0x400 429 430 /* MSCH command bits */ 431 #define WL_MSCH_CMD_ENABLE_BIT 0x01 432 #define WL_MSCH_CMD_PROFILE_BIT 0x02 433 #define WL_MSCH_CMD_CALLBACK_BIT 0x04 434 #define WL_MSCH_CMD_REGISTER_BIT 0x08 435 #define WL_MSCH_CMD_ERROR_BIT 0x10 436 #define WL_MSCH_CMD_DEBUG_BIT 0x20 437 #define WL_MSCH_CMD_INFOM_BIT 0x40 438 #define WL_MSCH_CMD_TRACE_BIT 0x80 439 #define WL_MSCH_CMD_ALL_BITS 0xfe 440 #define WL_MSCH_CMD_SIZE_MASK 0x00ff0000 441 #define WL_MSCH_CMD_SIZE_SHIFT 16 442 #define WL_MSCH_CMD_VER_MASK 0xff000000 443 #define WL_MSCH_CMD_VER_SHIFT 24 444 445 /* maximum channels returned by the get valid channels iovar */ 446 #define WL_MSCH_NUMCHANNELS 64 447 448 typedef struct msch_collect_tlv { 449 uint16 type; 450 uint16 size; 451 char value[1]; 452 } msch_collect_tlv_t; 453 454 typedef struct msch_profiler_event_data { 455 uint32 time_lo; /* Request time */ 456 uint32 time_hi; 457 } msch_profiler_event_data_t; 458 459 typedef struct msch_start_profiler_event_data { 460 uint32 time_lo; /* Request time */ 461 uint32 time_hi; 462 uint32 status; 463 } msch_start_profiler_event_data_t; 464 465 typedef struct msch_message_profiler_event_data { 466 uint32 time_lo; /* Request time */ 467 uint32 time_hi; 468 char message[1]; /* message */ 469 } msch_message_profiler_event_data_t; 470 471 typedef struct msch_event_log_profiler_event_data { 472 uint32 time_lo; /* Request time */ 473 uint32 time_hi; 474 event_log_hdr_t hdr; /* event log header */ 475 uint32 data[9]; /* event data */ 476 } msch_event_log_profiler_event_data_t; 477 478 typedef struct msch_req_param_profiler_event_data { 479 uint16 flags; /* Describe various request properties */ 480 uint8 req_type; /* Describe start and end time flexiblilty */ 481 uint8 priority; /* Define the request priority */ 482 uint32 start_time_l; /* Requested start time offset in us unit */ 483 uint32 start_time_h; 484 uint32 duration; /* Requested duration in us unit */ 485 uint32 interval; /* Requested periodic interval in us unit, 486 * 0 means non-periodic 487 */ 488 union { 489 uint32 dur_flex; /* MSCH_REG_DUR_FLEX, min_dur = duration - dur_flex */ 490 struct { 491 uint32 min_dur; /* min duration for traffic, maps to home_time */ 492 uint32 max_away_dur; /* max acceptable away dur, maps to home_away_time */ 493 uint32 hi_prio_time_l; 494 uint32 hi_prio_time_h; 495 uint32 hi_prio_interval; /* repeated high priority interval */ 496 } bf; 497 } flex; 498 } msch_req_param_profiler_event_data_t; 499 500 typedef struct msch_req_timing_profiler_event_data { 501 uint32 p_req_timing; 502 uint32 p_prev; 503 uint32 p_next; 504 uint16 flags; 505 uint16 timeslot_ptr; 506 uint32 fire_time_l; 507 uint32 fire_time_h; 508 uint32 pre_start_time_l; 509 uint32 pre_start_time_h; 510 uint32 start_time_l; 511 uint32 start_time_h; 512 uint32 end_time_l; 513 uint32 end_time_h; 514 uint32 p_timeslot; 515 } msch_req_timing_profiler_event_data_t; 516 517 typedef struct msch_chan_ctxt_profiler_event_data { 518 uint32 p_chan_ctxt; 519 uint32 p_prev; 520 uint32 p_next; 521 uint16 chanspec; 522 uint16 bf_sch_pending; 523 uint32 bf_link_prev; 524 uint32 bf_link_next; 525 uint32 onchan_time_l; 526 uint32 onchan_time_h; 527 uint32 actual_onchan_dur_l; 528 uint32 actual_onchan_dur_h; 529 uint32 pend_onchan_dur_l; 530 uint32 pend_onchan_dur_h; 531 uint16 req_entity_list_cnt; 532 uint16 req_entity_list_ptr; 533 uint16 bf_entity_list_cnt; 534 uint16 bf_entity_list_ptr; 535 uint32 bf_skipped_count; 536 } msch_chan_ctxt_profiler_event_data_t; 537 538 typedef struct msch_req_entity_profiler_event_data { 539 uint32 p_req_entity; 540 uint32 req_hdl_link_prev; 541 uint32 req_hdl_link_next; 542 uint32 chan_ctxt_link_prev; 543 uint32 chan_ctxt_link_next; 544 uint32 rt_specific_link_prev; 545 uint32 rt_specific_link_next; 546 uint32 start_fixed_link_prev; 547 uint32 start_fixed_link_next; 548 uint32 both_flex_list_prev; 549 uint32 both_flex_list_next; 550 uint16 chanspec; 551 uint16 priority; 552 uint16 cur_slot_ptr; 553 uint16 pend_slot_ptr; 554 uint16 pad; 555 uint16 chan_ctxt_ptr; 556 uint32 p_chan_ctxt; 557 uint32 p_req_hdl; 558 uint32 bf_last_serv_time_l; 559 uint32 bf_last_serv_time_h; 560 uint16 onchan_chn_idx; 561 uint16 cur_chn_idx; 562 uint32 flags; 563 uint32 actual_start_time_l; 564 uint32 actual_start_time_h; 565 uint32 curts_fire_time_l; 566 uint32 curts_fire_time_h; 567 } msch_req_entity_profiler_event_data_t; 568 569 typedef struct msch_req_handle_profiler_event_data { 570 uint32 p_req_handle; 571 uint32 p_prev; 572 uint32 p_next; 573 uint32 cb_func; 574 uint32 cb_ctxt; 575 uint16 req_param_ptr; 576 uint16 req_entity_list_cnt; 577 uint16 req_entity_list_ptr; 578 uint16 chan_cnt; 579 uint32 flags; 580 uint16 chanspec_list; 581 uint16 chanspec_cnt; 582 uint16 chan_idx; 583 uint16 last_chan_idx; 584 uint32 req_time_l; 585 uint32 req_time_h; 586 } msch_req_handle_profiler_event_data_t; 587 588 typedef struct msch_profiler_profiler_event_data { 589 uint32 time_lo; /* Request time */ 590 uint32 time_hi; 591 uint32 free_req_hdl_list; 592 uint32 free_req_entity_list; 593 uint32 free_chan_ctxt_list; 594 uint32 free_chanspec_list; 595 uint16 cur_msch_timeslot_ptr; 596 uint16 next_timeslot_ptr; 597 uint32 p_cur_msch_timeslot; 598 uint32 p_next_timeslot; 599 uint32 cur_armed_timeslot; 600 uint32 flags; 601 uint32 ts_id; 602 uint32 service_interval; 603 uint32 max_lo_prio_interval; 604 uint16 flex_list_cnt; 605 uint16 msch_chanspec_alloc_cnt; 606 uint16 msch_req_entity_alloc_cnt; 607 uint16 msch_req_hdl_alloc_cnt; 608 uint16 msch_chan_ctxt_alloc_cnt; 609 uint16 msch_timeslot_alloc_cnt; 610 uint16 msch_req_hdl_list_cnt; 611 uint16 msch_req_hdl_list_ptr; 612 uint16 msch_chan_ctxt_list_cnt; 613 uint16 msch_chan_ctxt_list_ptr; 614 uint16 msch_req_timing_list_cnt; 615 uint16 msch_req_timing_list_ptr; 616 uint16 msch_start_fixed_list_cnt; 617 uint16 msch_start_fixed_list_ptr; 618 uint16 msch_both_flex_req_entity_list_cnt; 619 uint16 msch_both_flex_req_entity_list_ptr; 620 uint16 msch_start_flex_list_cnt; 621 uint16 msch_start_flex_list_ptr; 622 uint16 msch_both_flex_list_cnt; 623 uint16 msch_both_flex_list_ptr; 624 uint32 slotskip_flag; 625 } msch_profiler_profiler_event_data_t; 626 627 typedef struct msch_req_profiler_event_data { 628 uint32 time_lo; /* Request time */ 629 uint32 time_hi; 630 uint16 chanspec_cnt; 631 uint16 chanspec_ptr; 632 uint16 req_param_ptr; 633 uint16 pad; 634 } msch_req_profiler_event_data_t; 635 636 typedef struct msch_callback_profiler_event_data { 637 uint32 time_lo; /* Request time */ 638 uint32 time_hi; 639 uint16 type; /* callback type */ 640 uint16 chanspec; /* actual chanspec, may different with requested one */ 641 uint32 start_time_l; /* time slot start time low 32bit */ 642 uint32 start_time_h; /* time slot start time high 32bit */ 643 uint32 end_time_l; /* time slot end time low 32 bit */ 644 uint32 end_time_h; /* time slot end time high 32 bit */ 645 uint32 timeslot_id; /* unique time slot id */ 646 uint32 p_req_hdl; 647 uint32 onchan_idx; /* Current channel index */ 648 uint32 cur_chan_seq_start_time_l; /* start time of current sequence */ 649 uint32 cur_chan_seq_start_time_h; 650 } msch_callback_profiler_event_data_t; 651 652 typedef struct msch_timeslot_profiler_event_data { 653 uint32 p_timeslot; 654 uint32 timeslot_id; 655 uint32 pre_start_time_l; 656 uint32 pre_start_time_h; 657 uint32 end_time_l; 658 uint32 end_time_h; 659 uint32 sch_dur_l; 660 uint32 sch_dur_h; 661 uint32 p_chan_ctxt; 662 uint32 fire_time_l; 663 uint32 fire_time_h; 664 uint32 state; 665 } msch_timeslot_profiler_event_data_t; 666 667 typedef struct msch_register_params { 668 uint16 wlc_index; /* Optional wlc index */ 669 uint16 flags; /* Describe various request properties */ 670 uint32 req_type; /* Describe start and end time flexiblilty */ 671 uint16 id; /* register id */ 672 uint16 priority; /* Define the request priority */ 673 uint32 start_time; /* Requested start time offset in ms unit */ 674 uint32 duration; /* Requested duration in ms unit */ 675 uint32 interval; /* Requested periodic interval in ms unit, 676 * 0 means non-periodic 677 */ 678 uint32 dur_flex; /* MSCH_REG_DUR_FLEX, min_dur = duration - dur_flex */ 679 uint32 min_dur; /* min duration for traffic, maps to home_time */ 680 uint32 max_away_dur; /* max acceptable away dur, maps to home_away_time */ 681 uint32 hi_prio_time; 682 uint32 hi_prio_interval; /* repeated high priority interval */ 683 uint32 chanspec_cnt; 684 uint16 chanspec_list[WL_MSCH_NUMCHANNELS]; 685 } msch_register_params_t; 686 687 typedef struct { 688 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS, 689 * Control Management (includes retransmissions) 690 */ 691 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames 692 * expecting a response 693 */ 694 uint32 rxstrt; /**< number of received frames with a good PLCP */ 695 uint32 rxbadplcp; /**< number of parity check of the PLCP header failed */ 696 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */ 697 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */ 698 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */ 699 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */ 700 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */ 701 uint32 rxanyerr; /**< Any RX error that is not counted by other counters. */ 702 uint32 rxbeaconmbss; /**< beacons received from member of BSS */ 703 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */ 704 uint32 rxdtocast; /**< number of received DATA frames (good FCS and no matching RA) */ 705 uint32 rxtoolate; /**< receive too late */ 706 uint32 goodfcs; /**< Good fcs counters */ 707 uint32 rxf0ovfl; /** < Rx FIFO0 overflow counters information */ 708 uint32 rxf1ovfl; /** < Rx FIFO1 overflow counters information */ 709 } phy_periodic_counters_v1_t; 710 711 typedef struct phycal_log_cmn { 712 uint16 chanspec; /* Current phy chanspec */ 713 uint8 last_cal_reason; /* Last Cal Reason */ 714 uint8 pad1; /* Padding byte to align with word */ 715 uint last_cal_time; /* Last cal time in sec */ 716 } phycal_log_cmn_t; 717 718 typedef struct phycal_log_core { 719 uint16 ofdm_txa; /* OFDM Tx IQ Cal a coeff */ 720 uint16 ofdm_txb; /* OFDM Tx IQ Cal b coeff */ 721 uint16 ofdm_txd; /* contain di & dq */ 722 uint16 bphy_txa; /* BPHY Tx IQ Cal a coeff */ 723 uint16 bphy_txb; /* BPHY Tx IQ Cal b coeff */ 724 uint16 bphy_txd; /* contain di & dq */ 725 726 uint16 rxa; /* Rx IQ Cal A coeffecient */ 727 uint16 rxb; /* Rx IQ Cal B coeffecient */ 728 int32 rxs; /* FDIQ Slope coeffecient */ 729 730 uint8 baseidx; /* TPC Base index */ 731 uint8 adc_coeff_cap0_adcI; /* ADC CAP Cal Cap0 I */ 732 uint8 adc_coeff_cap1_adcI; /* ADC CAP Cal Cap1 I */ 733 uint8 adc_coeff_cap2_adcI; /* ADC CAP Cal Cap2 I */ 734 uint8 adc_coeff_cap0_adcQ; /* ADC CAP Cal Cap0 Q */ 735 uint8 adc_coeff_cap1_adcQ; /* ADC CAP Cal Cap1 Q */ 736 uint8 adc_coeff_cap2_adcQ; /* ADC CAP Cal Cap2 Q */ 737 uint8 pad; /* Padding byte to align with word */ 738 } phycal_log_core_t; 739 740 #define PHYCAL_LOG_VER1 (1u) 741 742 typedef struct phycal_log_v1 { 743 uint8 version; /* Logging structure version */ 744 uint8 numcores; /* Numbe of cores for which core specific data present */ 745 uint16 length; /* Length of the entire structure */ 746 phycal_log_cmn_t phycal_log_cmn; /* Logging common structure */ 747 /* This will be a variable length based on the numcores field defined above */ 748 phycal_log_core_t phycal_log_core[1]; 749 } phycal_log_v1_t; 750 751 typedef struct phy_periodic_log_cmn { 752 uint16 chanspec; /* Current phy chanspec */ 753 uint16 vbatmeas; /* Measured VBAT sense value */ 754 uint16 featureflag; /* Currently active feature flags */ 755 int8 chiptemp; /* Chip temparature */ 756 int8 femtemp; /* Fem temparature */ 757 758 uint32 nrate; /* Current Tx nrate */ 759 760 uint8 cal_phase_id; /* Current Multi phase cal ID */ 761 uint8 rxchain; /* Rx Chain */ 762 uint8 txchain; /* Tx Chain */ 763 uint8 ofdm_desense; /* OFDM desense */ 764 765 uint8 bphy_desense; /* BPHY desense */ 766 uint8 pll_lockstatus; /* PLL Lock status */ 767 uint8 pad1; /* Padding byte to align with word */ 768 uint8 pad2; /* Padding byte to align with word */ 769 770 uint32 duration; /**< millisecs spent sampling this channel */ 771 uint32 congest_ibss; /**< millisecs in our bss (presumably this traffic will */ 772 /**< move if cur bss moves channels) */ 773 uint32 congest_obss; /**< traffic not in our bss */ 774 uint32 interference; /**< millisecs detecting a non 802.11 interferer. */ 775 776 } phy_periodic_log_cmn_t; 777 778 typedef struct phy_periodic_log_core { 779 uint8 baseindxval; /* TPC Base index */ 780 int8 tgt_pwr; /* Programmed Target power */ 781 int8 estpwradj; /* Current Est Power Adjust value */ 782 int8 crsmin_pwr; /* CRS Min/Noise power */ 783 int8 rssi_per_ant; /* RSSI Per antenna */ 784 int8 snr_per_ant; /* SNR Per antenna */ 785 int8 pad1; /* Padding byte to align with word */ 786 int8 pad2; /* Padding byte to align with word */ 787 } phy_periodic_log_core_t; 788 789 #define PHY_PERIODIC_LOG_VER1 (1u) 790 791 typedef struct phy_periodic_log_v1 { 792 uint8 version; /* Logging structure version */ 793 uint8 numcores; /* Numbe of cores for which core specific data present */ 794 uint16 length; /* Length of the entire structure */ 795 phy_periodic_log_cmn_t phy_perilog_cmn; 796 phy_periodic_counters_v1_t counters_peri_log; 797 /* This will be a variable length based on the numcores field defined above */ 798 phy_periodic_log_core_t phy_perilog_core[1]; 799 } phy_periodic_log_v1_t; 800 801 #endif /* _EVENT_LOG_PAYLOAD_H_ */ 802