xref: /OK3568_Linux_fs/external/rkwifibt/drivers/infineon/include/bcmspibrcm.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /*
2  * SD-SPI Protocol Conversion - BCMSDH->gSPI Translation Layer
3  *
4  * Portions of this code are copyright (c) 2021 Cypress Semiconductor Corporation
5  *
6  * Copyright (C) 1999-2017, Broadcom Corporation
7  *
8  *      Unless you and Broadcom execute a separate written software license
9  * agreement governing use of this software, this software is licensed to you
10  * under the terms of the GNU General Public License version 2 (the "GPL"),
11  * available at http://www.broadcom.com/licenses/GPLv2.php, with the
12  * following added to such license:
13  *
14  *      As a special exception, the copyright holders of this software give you
15  * permission to link this software with independent modules, and to copy and
16  * distribute the resulting executable under terms of your choice, provided that
17  * you also meet, for each linked independent module, the terms and conditions of
18  * the license of that module.  An independent module is a module which is not
19  * derived from this software.  The special exception does not apply to any
20  * modifications of the software.
21  *
22  *      Notwithstanding the above, under no circumstances may you combine this
23  * software in any way with any other Broadcom software provided under a license
24  * other than the GPL, without Broadcom's express prior written consent.
25  *
26  *
27  * <<Broadcom-WL-IPTag/Open:>>
28  *
29  * $Id: bcmspibrcm.h 514727 2014-11-12 03:02:48Z $
30  */
31 #ifndef	_BCM_SPI_BRCM_H
32 #define	_BCM_SPI_BRCM_H
33 
34 #ifndef SPI_MAX_IOFUNCS
35 /* Maximum number of I/O funcs */
36 #define SPI_MAX_IOFUNCS		4
37 #endif // endif
38 /* global msglevel for debug messages - bitvals come from sdiovar.h */
39 
40 #if defined(DHD_DEBUG)
41 #define sd_err(x)	do { if (sd_msglevel & SDH_ERROR_VAL) printf x; } while (0)
42 #define sd_trace(x)	do { if (sd_msglevel & SDH_TRACE_VAL) printf x; } while (0)
43 #define sd_info(x)	do { if (sd_msglevel & SDH_INFO_VAL)  printf x; } while (0)
44 #define sd_debug(x)	do { if (sd_msglevel & SDH_DEBUG_VAL) printf x; } while (0)
45 #define sd_data(x)	do { if (sd_msglevel & SDH_DATA_VAL)  printf x; } while (0)
46 #define sd_ctrl(x)	do { if (sd_msglevel & SDH_CTRL_VAL)  printf x; } while (0)
47 #else
48 #define sd_err(x)
49 #define sd_trace(x)
50 #define sd_info(x)
51 #define sd_debug(x)
52 #define sd_data(x)
53 #define sd_ctrl(x)
54 #endif // endif
55 
56 #define sd_log(x)
57 
58 #define SDIOH_ASSERT(exp) \
59 	do { if (!(exp)) \
60 		printf("!!!ASSERT fail: file %s lines %d", __FILE__, __LINE__); \
61 	} while (0)
62 
63 #define BLOCK_SIZE_F1		64
64 #define BLOCK_SIZE_F2 		2048
65 #define BLOCK_SIZE_F3 		2048
66 
67 /* internal return code */
68 #define SUCCESS	0
69 #undef ERROR
70 #define ERROR	1
71 #define ERROR_UF	2
72 #define ERROR_OF	3
73 
74 /* private bus modes */
75 #define SDIOH_MODE_SPI		0
76 
77 #define USE_BLOCKMODE		0x2	/* Block mode can be single block or multi */
78 #define USE_MULTIBLOCK		0x4
79 
80 struct sdioh_info {
81 	uint		cfg_bar;		/* pci cfg address for bar */
82 	uint32		caps;			/* cached value of capabilities reg */
83 #ifndef BCMSPI_ANDROID
84 	void		*bar0;			/* BAR0 for PCI Device */
85 #endif /* !BCMSPI_ANDROID */
86 	osl_t		*osh;			/* osh handler */
87 	void		*bcmsdh;		/* handler to upper layer stack (bcmsdh) */
88 	void		*controller;	/* Pointer to SPI Controller's private data struct */
89 	uint		lockcount;		/* nest count of spi_lock() calls */
90 	bool		client_intr_enabled;	/* interrupt connnected flag */
91 	bool		intr_handler_valid;	/* client driver interrupt handler valid */
92 	sdioh_cb_fn_t	intr_handler;		/* registered interrupt handler */
93 	void		*intr_handler_arg;	/* argument to call interrupt handler */
94 	bool		initialized;		/* card initialized */
95 	uint32		target_dev;		/* Target device ID */
96 	uint32		intmask;		/* Current active interrupts */
97 	void		*sdos_info;		/* Pointer to per-OS private data */
98 	uint32		controller_type;	/* Host controller type */
99 	uint8		version;		/* Host Controller Spec Compliance Version */
100 	uint		irq;			/* Client irq */
101 	uint32		intrcount;		/* Client interrupts */
102 	uint32		local_intrcount;	/* Controller interrupts */
103 	bool 		host_init_done;		/* Controller initted */
104 	bool 		card_init_done;		/* Client SDIO interface initted */
105 	bool 		polled_mode;		/* polling for command completion */
106 
107 	bool		sd_use_dma;		/* DMA on CMD53 */
108 	bool 		sd_blockmode;		/* sd_blockmode == FALSE => 64 Byte Cmd 53s. */
109 						/*  Must be on for sd_multiblock to be effective */
110 	bool 		use_client_ints;	/* If this is false, make sure to restore */
111 	bool		got_hcint;			/* Host Controller interrupt. */
112 						/*  polling hack in wl_linux.c:wl_timer() */
113 	int 		adapter_slot;		/* Maybe dealing with multiple slots/controllers */
114 	int 		sd_mode;		/* SD1/SD4/SPI */
115 	int 		client_block_size[SPI_MAX_IOFUNCS];		/* Blocksize */
116 	uint32 		data_xfer_count;	/* Current transfer */
117 	uint16 		card_rca;		/* Current Address */
118 	uint8 		num_funcs;		/* Supported funcs on client */
119 	uint32 		card_dstatus;		/* 32bit device status */
120 	uint32 		com_cis_ptr;
121 	uint32 		func_cis_ptr[SPI_MAX_IOFUNCS];
122 	void		*dma_buf;
123 	ulong		dma_phys;
124 	int 		r_cnt;			/* rx count */
125 	int 		t_cnt;			/* tx_count */
126 	uint32		wordlen;			/* host processor 16/32bits */
127 	uint32		prev_fun;
128 	uint32		chip;
129 	uint32		chiprev;
130 	bool		resp_delay_all;
131 	bool		dwordmode;
132 	bool		resp_delay_new;
133 
134 	struct spierrstats_t spierrstats;
135 };
136 
137 /************************************************************
138  * Internal interfaces: per-port references into bcmspibrcm.c
139  */
140 
141 /* Global message bits */
142 extern uint sd_msglevel;
143 
144 /**************************************************************
145  * Internal interfaces: bcmspibrcm.c references to per-port code
146  */
147 
148 /* Interrupt (de)registration routines */
149 extern int spi_register_irq(sdioh_info_t *sd, uint irq);
150 extern void spi_free_irq(uint irq, sdioh_info_t *sd);
151 
152 /* OS-specific interrupt wrappers (atomic interrupt enable/disable) */
153 extern void spi_lock(sdioh_info_t *sd);
154 extern void spi_unlock(sdioh_info_t *sd);
155 
156 /* Allocate/init/free per-OS private data */
157 extern int spi_osinit(sdioh_info_t *sd);
158 extern void spi_osfree(sdioh_info_t *sd);
159 
160 #define SPI_RW_FLAG_M			BITFIELD_MASK(1)	/* Bit [31] - R/W Command Bit */
161 #define SPI_RW_FLAG_S			31
162 #define SPI_ACCESS_M			BITFIELD_MASK(1)	/* Bit [30] - Fixed/Incr Access */
163 #define SPI_ACCESS_S			30
164 #define SPI_FUNCTION_M			BITFIELD_MASK(2)	/* Bit [29:28] - Function Number */
165 #define SPI_FUNCTION_S			28
166 #define SPI_REG_ADDR_M			BITFIELD_MASK(17)	/* Bit [27:11] - Address */
167 #define SPI_REG_ADDR_S			11
168 #define SPI_LEN_M			BITFIELD_MASK(11)	/* Bit [10:0] - Packet length */
169 #define SPI_LEN_S			0
170 
171 #endif /* _BCM_SPI_BRCM_H */
172