1 /*
2 * Header file describing the internal (inter-module) DHD interfaces.
3 *
4 * Provides type definitions and function prototypes used to link the
5 * DHD OS, bus, and protocol modules.
6 *
7 * Portions of this code are copyright (c) 2021 Cypress Semiconductor Corporation
8 *
9 * Copyright (C) 1999-2017, Broadcom Corporation
10 *
11 * Unless you and Broadcom execute a separate written software license
12 * agreement governing use of this software, this software is licensed to you
13 * under the terms of the GNU General Public License version 2 (the "GPL"),
14 * available at http://www.broadcom.com/licenses/GPLv2.php, with the
15 * following added to such license:
16 *
17 * As a special exception, the copyright holders of this software give you
18 * permission to link this software with independent modules, and to copy and
19 * distribute the resulting executable under terms of your choice, provided that
20 * you also meet, for each linked independent module, the terms and conditions of
21 * the license of that module. An independent module is a module which is not
22 * derived from this software. The special exception does not apply to any
23 * modifications of the software.
24 *
25 * Notwithstanding the above, under no circumstances may you combine this
26 * software in any way with any other Broadcom software provided under a license
27 * other than the GPL, without Broadcom's express prior written consent.
28 *
29 *
30 * <<Broadcom-WL-IPTag/Open:>>
31 *
32 * $Id: dhd_bus.h 701741 2017-05-26 08:18:08Z $
33 */
34
35 #ifndef _dhd_bus_h_
36 #define _dhd_bus_h_
37
38 /*
39 * Exported from dhd bus module (dhd_usb, dhd_sdio)
40 */
41
42 /* global variable for the bus */
43 extern struct dhd_bus *g_dhd_bus;
44
45 /* Indicate (dis)interest in finding dongles. */
46 extern int dhd_bus_register(void);
47 extern void dhd_bus_unregister(void);
48
49 /* Download firmware image and nvram image */
50 extern int dhd_bus_download_firmware(struct dhd_bus *bus, osl_t *osh, char *fw_path, char *nv_path);
51 #if defined(BT_OVER_SDIO)
52 extern int dhd_bus_download_btfw(struct dhd_bus *bus, osl_t *osh, char *btfw_path);
53 #endif /* defined (BT_OVER_SDIO) */
54
55 /* Stop bus module: clear pending frames, disable data flow */
56 extern void dhd_bus_stop(struct dhd_bus *bus, bool enforce_mutex);
57
58 /* Initialize bus module: prepare for communication w/dongle */
59 extern int dhd_bus_init(dhd_pub_t *dhdp, bool enforce_mutex);
60
61 /* Get the Bus Idle Time */
62 extern void dhd_bus_getidletime(dhd_pub_t *dhdp, int *idletime);
63
64 /* Set the Bus Idle Time */
65 extern void dhd_bus_setidletime(dhd_pub_t *dhdp, int idle_time);
66
67 /* Send a data frame to the dongle. Callee disposes of txp. */
68 #ifdef BCMPCIE
69 extern int dhd_bus_txdata(struct dhd_bus *bus, void *txp, uint8 ifidx);
70 #else
71 extern int dhd_bus_txdata(struct dhd_bus *bus, void *txp);
72 #endif // endif
73
74 #ifdef BCMPCIE
75 extern void dhdpcie_cto_recovery_handler(dhd_pub_t *dhd);
76 #endif /* BCMPCIE */
77
78 /* Send/receive a control message to/from the dongle.
79 * Expects caller to enforce a single outstanding transaction.
80 */
81 extern int dhd_bus_txctl(struct dhd_bus *bus, uchar *msg, uint msglen);
82 extern int dhd_bus_rxctl(struct dhd_bus *bus, uchar *msg, uint msglen);
83
84 /* Watchdog timer function */
85 extern bool dhd_bus_watchdog(dhd_pub_t *dhd);
86
87 extern int dhd_bus_oob_intr_register(dhd_pub_t *dhdp);
88 extern void dhd_bus_oob_intr_unregister(dhd_pub_t *dhdp);
89 extern void dhd_bus_oob_intr_set(dhd_pub_t *dhdp, bool enable);
90 extern void dhd_bus_dev_pm_stay_awake(dhd_pub_t *dhdpub);
91 extern void dhd_bus_dev_pm_relax(dhd_pub_t *dhdpub);
92 extern bool dhd_bus_dev_pm_enabled(dhd_pub_t *dhdpub);
93
94 /* Device console input function */
95 extern int dhd_bus_console_in(dhd_pub_t *dhd, uchar *msg, uint msglen);
96
97 /* Deferred processing for the bus, return TRUE requests reschedule */
98 extern bool dhd_bus_dpc(struct dhd_bus *bus);
99 extern void dhd_bus_isr(bool * InterruptRecognized, bool * QueueMiniportHandleInterrupt, void *arg);
100
101 /* Check for and handle local prot-specific iovar commands */
102 extern int dhd_bus_iovar_op(dhd_pub_t *dhdp, const char *name,
103 void *params, int plen, void *arg, int len, bool set);
104
105 /* Add bus dump output to a buffer */
106 extern void dhd_bus_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf);
107
108 /* Clear any bus counters */
109 extern void dhd_bus_clearcounts(dhd_pub_t *dhdp);
110
111 /* return the dongle chipid */
112 extern uint dhd_bus_chip(struct dhd_bus *bus);
113
114 /* return the dongle chiprev */
115 extern uint dhd_bus_chiprev(struct dhd_bus *bus);
116
117 /* Set user-specified nvram parameters. */
118 extern void dhd_bus_set_nvram_params(struct dhd_bus * bus, const char *nvram_params);
119
120 extern void *dhd_bus_pub(struct dhd_bus *bus);
121 extern void *dhd_bus_txq(struct dhd_bus *bus);
122 extern void *dhd_bus_sih(struct dhd_bus *bus);
123 extern uint dhd_bus_hdrlen(struct dhd_bus *bus);
124 #ifdef BCMSDIO
125 extern void dhd_bus_set_dotxinrx(struct dhd_bus *bus, bool val);
126 /* return sdio io status */
127 extern uint8 dhd_bus_is_ioready(struct dhd_bus *bus);
128 #else
129 #define dhd_bus_set_dotxinrx(a, b) do {} while (0)
130 #endif // endif
131
132 #define DHD_SET_BUS_STATE_DOWN(_bus) do { \
133 (_bus)->dhd->busstate = DHD_BUS_DOWN; \
134 } while (0)
135
136 /* Register a dummy SDIO client driver in order to be notified of new SDIO device */
137 extern int dhd_bus_reg_sdio_notify(void* semaphore);
138 extern void dhd_bus_unreg_sdio_notify(void);
139 extern void dhd_txglom_enable(dhd_pub_t *dhdp, bool enable);
140 extern int dhd_bus_get_ids(struct dhd_bus *bus, uint32 *bus_type, uint32 *bus_num,
141 uint32 *slot_num);
142
143 #if defined(DHD_FW_COREDUMP) && (defined(BCMPCIE) || defined(BCMSDIO))
144 extern int dhd_bus_mem_dump(dhd_pub_t *dhd);
145 extern int dhd_bus_get_mem_dump(dhd_pub_t *dhdp);
146 #else
147 #define dhd_bus_mem_dump(x)
148 #define dhd_bus_get_mem_dump(x)
149 #endif /* DHD_FW_COREDUMP && (BCMPCIE || BCMSDIO) */
150
151 #ifdef BCMPCIE
152 enum {
153 /* Scratch buffer confiuguration update */
154 D2H_DMA_SCRATCH_BUF,
155 D2H_DMA_SCRATCH_BUF_LEN,
156
157 /* DMA Indices array buffers for: H2D WR and RD, and D2H WR and RD */
158 H2D_DMA_INDX_WR_BUF, /* update H2D WR dma indices buf base addr to dongle */
159 H2D_DMA_INDX_RD_BUF, /* update H2D RD dma indices buf base addr to dongle */
160 D2H_DMA_INDX_WR_BUF, /* update D2H WR dma indices buf base addr to dongle */
161 D2H_DMA_INDX_RD_BUF, /* update D2H RD dma indices buf base addr to dongle */
162
163 /* DHD sets/gets WR or RD index, in host's H2D and D2H DMA indices buffer */
164 H2D_DMA_INDX_WR_UPD, /* update H2D WR index in H2D WR dma indices buf */
165 H2D_DMA_INDX_RD_UPD, /* update H2D RD index in H2D RD dma indices buf */
166 D2H_DMA_INDX_WR_UPD, /* update D2H WR index in D2H WR dma indices buf */
167 D2H_DMA_INDX_RD_UPD, /* update D2H RD index in D2H RD dma indices buf */
168
169 /* DHD Indices array buffers and update for: H2D flow ring WR */
170 H2D_IFRM_INDX_WR_BUF, /* update H2D WR dma indices buf base addr to dongle */
171 H2D_IFRM_INDX_WR_UPD, /* update H2D WR dma indices buf base addr to dongle */
172
173 /* H2D and D2H Mailbox data update */
174 H2D_MB_DATA,
175 D2H_MB_DATA,
176
177 /* (Common) MsgBuf Ring configuration update */
178 RING_BUF_ADDR, /* update ring base address to dongle */
179 RING_ITEM_LEN, /* update ring item size to dongle */
180 RING_MAX_ITEMS, /* update ring max items to dongle */
181
182 /* Update of WR or RD index, for a MsgBuf Ring */
183 RING_RD_UPD, /* update ring read index from/to dongle */
184 RING_WR_UPD, /* update ring write index from/to dongle */
185
186 TOTAL_LFRAG_PACKET_CNT,
187 MAX_HOST_RXBUFS,
188 HOST_API_VERSION,
189 DNGL_TO_HOST_TRAP_ADDR,
190 HOST_SCB_ADDR, /* update host scb base address to dongle */
191 };
192
193 typedef void (*dhd_mb_ring_t) (struct dhd_bus *, uint32);
194 typedef void (*dhd_mb_ring_2_t) (struct dhd_bus *, uint32, bool);
195 extern void dhd_bus_cmn_writeshared(struct dhd_bus *bus, void * data, uint32 len, uint8 type,
196 uint16 ringid);
197 extern void dhd_bus_ringbell(struct dhd_bus *bus, uint32 value);
198 extern void dhd_bus_ringbell_2(struct dhd_bus *bus, uint32 value, bool devwake);
199 extern void dhd_bus_cmn_readshared(struct dhd_bus *bus, void* data, uint8 type, uint16 ringid);
200 extern uint32 dhd_bus_get_sharedflags(struct dhd_bus *bus);
201 extern void dhd_bus_rx_frame(struct dhd_bus *bus, void* pkt, int ifidx, uint pkt_count);
202 extern void dhd_bus_start_queue(struct dhd_bus *bus);
203 extern void dhd_bus_stop_queue(struct dhd_bus *bus);
204 extern dhd_mb_ring_t dhd_bus_get_mbintr_fn(struct dhd_bus *bus);
205 extern dhd_mb_ring_2_t dhd_bus_get_mbintr_2_fn(struct dhd_bus *bus);
206 extern void dhd_bus_write_flow_ring_states(struct dhd_bus *bus,
207 void * data, uint16 flowid);
208 extern void dhd_bus_read_flow_ring_states(struct dhd_bus *bus,
209 void * data, uint8 flowid);
210 extern int dhd_bus_flow_ring_create_request(struct dhd_bus *bus, void *flow_ring_node);
211 extern void dhd_bus_clean_flow_ring(struct dhd_bus *bus, void *flow_ring_node);
212 extern void dhd_bus_flow_ring_create_response(struct dhd_bus *bus, uint16 flow_id, int32 status);
213 extern int dhd_bus_flow_ring_delete_request(struct dhd_bus *bus, void *flow_ring_node);
214 extern void dhd_bus_flow_ring_delete_response(struct dhd_bus *bus, uint16 flowid, uint32 status);
215 extern int dhd_bus_flow_ring_flush_request(struct dhd_bus *bus, void *flow_ring_node);
216 extern void dhd_bus_flow_ring_flush_response(struct dhd_bus *bus, uint16 flowid, uint32 status);
217 extern uint32 dhd_bus_max_h2d_queues(struct dhd_bus *bus);
218 extern int dhd_bus_schedule_queue(struct dhd_bus *bus, uint16 flow_id, bool txs);
219
220 #ifdef IDLE_TX_FLOW_MGMT
221 extern void dhd_bus_flow_ring_resume_response(struct dhd_bus *bus, uint16 flowid, int32 status);
222 #endif /* IDLE_TX_FLOW_MGMT */
223
224 extern int dhdpcie_bus_clock_start(struct dhd_bus *bus);
225 extern int dhdpcie_bus_clock_stop(struct dhd_bus *bus);
226 extern int dhdpcie_bus_enable_device(struct dhd_bus *bus);
227 extern int dhdpcie_bus_disable_device(struct dhd_bus *bus);
228 extern int dhdpcie_bus_alloc_resource(struct dhd_bus *bus);
229 extern void dhdpcie_bus_free_resource(struct dhd_bus *bus);
230 extern bool dhdpcie_bus_dongle_attach(struct dhd_bus *bus);
231 extern int dhd_bus_release_dongle(struct dhd_bus *bus);
232 extern int dhd_bus_request_irq(struct dhd_bus *bus);
233 extern int dhdpcie_get_pcieirq(struct dhd_bus *bus, unsigned int *irq);
234 extern void dhd_bus_aer_config(struct dhd_bus *bus);
235
236 extern struct device * dhd_bus_to_dev(struct dhd_bus *bus);
237
238 extern int dhdpcie_cto_init(struct dhd_bus *bus, bool enable);
239 extern int dhdpcie_cto_cfg_init(struct dhd_bus *bus, bool enable);
240
241 extern void dhdpcie_ssreset_dis_enum_rst(struct dhd_bus *bus);
242
243 #ifdef DHD_FW_COREDUMP
244 #ifdef BCMDHDX
245 extern int dhdx_dongle_mem_dump(void);
246 #else
247 extern int dhd_dongle_mem_dump(void);
248 #endif /* BCMDHDX */
249 #endif /* DHD_FW_COREDUMP */
250
251 #ifdef IDLE_TX_FLOW_MGMT
252 extern void dhd_bus_idle_tx_ring_suspend(dhd_pub_t *dhd, uint16 flow_ring_id);
253 #endif /* IDLE_TX_FLOW_MGMT */
254 extern void dhd_bus_handle_mb_data(struct dhd_bus *bus, uint32 d2h_mb_data);
255 #endif /* BCMPCIE */
256
257 /* dump the device trap informtation */
258 extern void dhd_bus_dump_trap_info(struct dhd_bus *bus, struct bcmstrbuf *b);
259 extern void dhd_bus_copy_trap_sig(struct dhd_bus *bus, trap_t *tr);
260 #ifdef WL_CFGVENDOR_SEND_HANG_EVENT
261 void copy_ext_trap_sig(dhd_pub_t *dhd, trap_t *tr);
262 void copy_hang_info_trap(dhd_pub_t *dhd);
263 #endif /* WL_CFGVENDOR_SEND_HANG_EVENT */
264 /* Function to set default min res mask */
265 extern bool dhd_bus_set_default_min_res_mask(struct dhd_bus *bus);
266
267 /* Function to reset PMU registers */
268 extern void dhd_bus_pmu_reg_reset(dhd_pub_t *dhdp);
269
270 extern void dhd_bus_ucode_download(struct dhd_bus *bus);
271
272 #ifdef DHD_ULP
273 extern void dhd_bus_ulp_disable_console(dhd_pub_t *dhdp);
274 #endif /* DHD_ULP */
275 extern int dhd_bus_readwrite_bp_addr(dhd_pub_t *dhdp, uint addr, uint size, uint* data, bool read);
276 extern int dhd_get_idletime(dhd_pub_t *dhd);
277 #ifdef BCMPCIE
278 extern void dhd_bus_dump_console_buffer(struct dhd_bus *bus);
279 extern void dhd_bus_intr_count_dump(dhd_pub_t *dhdp);
280 extern void dhd_bus_set_dpc_sched_time(dhd_pub_t *dhdp);
281 extern bool dhd_bus_query_dpc_sched_errors(dhd_pub_t *dhdp);
282 extern int dhd_bus_dmaxfer_lpbk(dhd_pub_t *dhdp, uint32 type);
283 #ifndef BCMDHDX
284 extern bool dhd_bus_check_driver_up(void);
285 #else
286 extern bool dhdx_bus_check_driver_up(void);
287 #endif /* BCMDHDX */
288 extern int dhd_bus_get_cto(dhd_pub_t *dhdp);
289 extern void dhd_bus_set_linkdown(dhd_pub_t *dhdp, bool val);
290 extern int dhd_bus_get_linkdown(dhd_pub_t *dhdp);
291 #else
292 #define dhd_bus_dump_console_buffer(x)
dhd_bus_intr_count_dump(dhd_pub_t * dhdp)293 static INLINE void dhd_bus_intr_count_dump(dhd_pub_t *dhdp) { UNUSED_PARAMETER(dhdp); }
dhd_bus_set_dpc_sched_time(dhd_pub_t * dhdp)294 static INLINE void dhd_bus_set_dpc_sched_time(dhd_pub_t *dhdp) { }
dhd_bus_query_dpc_sched_errors(dhd_pub_t * dhdp)295 static INLINE bool dhd_bus_query_dpc_sched_errors(dhd_pub_t *dhdp) { return 0; }
dhd_bus_dmaxfer_lpbk(dhd_pub_t * dhdp,uint32 type)296 static INLINE int dhd_bus_dmaxfer_lpbk(dhd_pub_t *dhdp, uint32 type) { return 0; }
dhd_bus_check_driver_up(void)297 static INLINE bool dhd_bus_check_driver_up(void) { return FALSE; }
dhd_bus_set_linkdown(dhd_pub_t * dhdp,bool val)298 extern INLINE void dhd_bus_set_linkdown(dhd_pub_t *dhdp, bool val) { }
dhd_bus_get_linkdown(dhd_pub_t * dhdp)299 extern INLINE int dhd_bus_get_linkdown(dhd_pub_t *dhdp) { return 0; }
dhd_bus_get_cto(dhd_pub_t * dhdp)300 static INLINE int dhd_bus_get_cto(dhd_pub_t *dhdp) { return 0; }
301 #endif /* BCMPCIE */
302
303 #if defined(BCMPCIE) && defined(EWP_ETD_PRSRV_LOGS)
304 void dhdpcie_get_etd_preserve_logs(dhd_pub_t *dhd, uint8 *ext_trap_data,
305 void *event_decode_data);
306 #endif // endif
307
308 extern uint16 dhd_get_chipid(dhd_pub_t *dhd);
309
310 #ifdef DHD_WAKE_STATUS
311 extern wake_counts_t* dhd_bus_get_wakecount(dhd_pub_t *dhd);
312 extern int dhd_bus_get_bus_wake(dhd_pub_t * dhd);
313 #endif /* DHD_WAKE_STATUS */
314
315 #ifdef BT_OVER_SDIO
316 /*
317 * SDIO layer clock control functions exposed to be called from other layers.
318 * This is required especially in the case where the BUS is shared between
319 * BT and SDIO and we have to control the clock. The callers of this function
320 * are expected to hold the sdlock
321 */
322 int __dhdsdio_clk_enable(struct dhd_bus *bus, bus_owner_t owner, int can_wait);
323 int __dhdsdio_clk_disable(struct dhd_bus *bus, bus_owner_t owner, int can_wait);
324 void dhdsdio_reset_bt_use_count(struct dhd_bus *bus);
325 #endif /* BT_OVER_SDIO */
326
327 int dhd_bus_perform_flr(struct dhd_bus *bus, bool force_fail);
328 extern bool dhd_bus_get_flr_force_fail(struct dhd_bus *bus);
329
330 extern bool dhd_bus_aspm_enable_rc_ep(struct dhd_bus *bus, bool enable);
331 extern void dhd_bus_l1ss_enable_rc_ep(struct dhd_bus *bus, bool enable);
332
333 bool dhd_bus_is_multibp_capable(struct dhd_bus *bus);
334
335 #ifdef BCMPCIE
336 extern void dhdpcie_advertise_bus_cleanup(dhd_pub_t *dhdp);
337 extern void dhd_msgbuf_iovar_timeout_dump(dhd_pub_t *dhd);
338 #endif /* BCMPCIE */
339
340 extern bool dhd_bus_force_bt_quiesce_enabled(struct dhd_bus *bus);
341
342 #ifdef DHD_SSSR_DUMP
343 extern int dhd_bus_fis_trigger(dhd_pub_t *dhd);
344 extern int dhd_bus_fis_dump(dhd_pub_t *dhd);
345 #endif /* DHD_SSSR_DUMP */
346
347 #ifdef PCIE_FULL_DONGLE
348 extern int dhdpcie_set_dma_ring_indices(dhd_pub_t *dhd, int32 int_val);
349 #endif /* PCIE_FULL_DONGLE */
350
351 #ifdef DHD_USE_BP_RESET
352 extern int dhd_bus_perform_bp_reset(struct dhd_bus *bus);
353 #endif /* DHD_USE_BP_RESET */
354
355 extern void dhd_bwm_bt_quiesce(struct dhd_bus *bus);
356 extern void dhd_bwm_bt_resume(struct dhd_bus *bus);
357 #endif /* _dhd_bus_h_ */
358