1 /* 2 * HND SiliconBackplane PMU support. 3 * 4 * Copyright (C) 2020, Broadcom. 5 * 6 * Unless you and Broadcom execute a separate written software license 7 * agreement governing use of this software, this software is licensed to you 8 * under the terms of the GNU General Public License version 2 (the "GPL"), 9 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 10 * following added to such license: 11 * 12 * As a special exception, the copyright holders of this software give you 13 * permission to link this software with independent modules, and to copy and 14 * distribute the resulting executable under terms of your choice, provided that 15 * you also meet, for each linked independent module, the terms and conditions of 16 * the license of that module. An independent module is a module which is not 17 * derived from this software. The special exception does not apply to any 18 * modifications of the software. 19 * 20 * 21 * <<Broadcom-WL-IPTag/Dual:>> 22 */ 23 24 #ifndef _hndlhl_h_ 25 #define _hndlhl_h_ 26 27 enum { 28 LHL_MAC_TIMER = 0, 29 LHL_ARM_TIMER = 1 30 }; 31 32 typedef struct { 33 uint16 offset; 34 uint32 mask; 35 uint32 val; 36 } lhl_reg_set_t; 37 38 #define LHL_REG_OFF(reg) OFFSETOF(gciregs_t, reg) 39 40 extern void si_lhl_timer_config(si_t *sih, osl_t *osh, int timer_type); 41 extern void si_lhl_timer_enable(si_t *sih); 42 extern void si_lhl_timer_reset(si_t *sih, uint coreid, uint coreunit); 43 44 extern void si_lhl_setup(si_t *sih, osl_t *osh); 45 extern void si_lhl_enable(si_t *sih, osl_t *osh, bool enable); 46 extern void si_lhl_ilp_config(si_t *sih, osl_t *osh, uint32 ilp_period); 47 extern void si_lhl_enable_sdio_wakeup(si_t *sih, osl_t *osh); 48 extern void si_lhl_disable_sdio_wakeup(si_t *sih); 49 extern int si_lhl_set_lpoclk(si_t *sih, osl_t *osh, uint32 lpo_force); 50 extern void si_set_lv_sleep_mode_lhl_config_4369(si_t *sih); 51 extern void si_set_lv_sleep_mode_lhl_config_4362(si_t *sih); 52 extern void si_set_lv_sleep_mode_lhl_config_4378(si_t *sih); 53 extern void si_set_lv_sleep_mode_lhl_config_4387(si_t *sih); 54 extern void si_set_lv_sleep_mode_lhl_config_4389(si_t *sih); 55 56 #define HIB_EXT_WAKEUP_CAP(sih) (PMUREV(sih->pmurev) >= 33) 57 58 #ifdef WL_FWSIGN 59 #define LHL_IS_PSMODE_0(sih) (1) 60 #define LHL_IS_PSMODE_1(sih) (0) 61 #else 62 #define LHL_IS_PSMODE_0(sih) (si_lhl_ps_mode(sih) == LHL_PS_MODE_0) 63 #define LHL_IS_PSMODE_1(sih) (si_lhl_ps_mode(sih) == LHL_PS_MODE_1) 64 #endif /* WL_FWSIGN */ 65 66 /* LHL revid in capabilities register */ 67 #define LHL_CAP_REV_MASK 0x000000ff 68 69 /* LHL rev 6 requires this bit to be set first */ 70 #define LHL_PWRSEQCTL_WL_FLLPU_EN (1 << 7) 71 72 #define LHL_CBUCK_VOLT_SLEEP_SHIFT 12u 73 #define LHL_CBUCK_VOLT_SLEEP_MASK 0x0000F000 74 75 #define LHL_ABUCK_VOLT_SLEEP_SHIFT 0u 76 #define LHL_ABUCK_VOLT_SLEEP_MASK 0x0000000F 77 78 extern void si_lhl_mactim0_set(si_t *sih, uint32 val); 79 80 /* LHL Chip Control 1 Register */ 81 #define LHL_1MHZ_FLL_DAC_EXT_SHIFT (9u) 82 #define LHL_1MHZ_FLL_DAC_EXT_MASK (0xffu << 9u) 83 #define LHL_1MHZ_FLL_PRELOAD_MASK (1u << 17u) 84 85 /* LHL Top Level Power Sequence Control Register */ 86 #define LHL_TOP_PWRSEQ_SLEEP_ENAB_MASK (1u << 0) 87 #define LHL_TOP_PWRSEQ_TOP_ISO_EN_MASK (1u << 3u) 88 #define LHL_TOP_PWRSEQ_TOP_SLB_EN_MASK (1u << 4u) 89 #define LHL_TOP_PWRSEQ_TOP_PWRSW_EN_MASK (1u << 5u) 90 #define LHL_TOP_PWRSEQ_MISCLDO_PU_EN_MASK (1u << 6u) 91 #define LHL_TOP_PWRSEQ_SERDES_SLB_EN_MASK (1u << 9u) 92 #define LHL_TOP_PWRSEQ_SERDES_CLK_DIS_EN_MASK (1u << 10u) 93 94 #endif /* _hndlhl_h_ */ 95