1 /* 2 * HND arm trap handling. 3 * 4 * Copyright (C) 2020, Broadcom. 5 * 6 * Unless you and Broadcom execute a separate written software license 7 * agreement governing use of this software, this software is licensed to you 8 * under the terms of the GNU General Public License version 2 (the "GPL"), 9 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 10 * following added to such license: 11 * 12 * As a special exception, the copyright holders of this software give you 13 * permission to link this software with independent modules, and to copy and 14 * distribute the resulting executable under terms of your choice, provided that 15 * you also meet, for each linked independent module, the terms and conditions of 16 * the license of that module. An independent module is a module which is not 17 * derived from this software. The special exception does not apply to any 18 * modifications of the software. 19 * 20 * 21 * <<Broadcom-WL-IPTag/Dual:>> 22 */ 23 24 #ifndef _hnd_armtrap_h_ 25 #define _hnd_armtrap_h_ 26 27 /* ARM trap handling */ 28 29 /* Trap types defined by ARM (see arminc.h) */ 30 31 /* Trap locations in lo memory */ 32 #define TRAP_STRIDE 4 33 #define FIRST_TRAP TR_RST 34 #define LAST_TRAP (TR_FIQ * TRAP_STRIDE) 35 36 #if defined(__ARM_ARCH_7M__) 37 #define MAX_TRAP_TYPE (TR_ISR + ARMCM3_NUMINTS) 38 #endif /* __ARM_ARCH_7M__ */ 39 40 /* The trap structure is defined here as offsets for assembly */ 41 #define TR_TYPE 0x00 42 #define TR_EPC 0x04 43 #define TR_CPSR 0x08 44 #define TR_SPSR 0x0c 45 #define TR_REGS 0x10 46 #define TR_REG(n) (TR_REGS + (n) * 4) 47 #define TR_SP TR_REG(13) 48 #define TR_LR TR_REG(14) 49 #define TR_PC TR_REG(15) 50 51 /* Number of core ARM registers. */ 52 #define TR_REGS_NUM 16u 53 54 #define TRAP_T_SIZE 80 55 #define ASSERT_TRAP_SVC_NUMBER 255 56 57 #ifndef _LANGUAGE_ASSEMBLY 58 59 #include <typedefs.h> 60 61 typedef struct _trap_struct { 62 uint32 type; 63 uint32 epc; 64 uint32 cpsr; 65 uint32 spsr; 66 uint32 r0; /* a1 */ 67 uint32 r1; /* a2 */ 68 uint32 r2; /* a3 */ 69 uint32 r3; /* a4 */ 70 uint32 r4; /* v1 */ 71 uint32 r5; /* v2 */ 72 uint32 r6; /* v3 */ 73 uint32 r7; /* v4 */ 74 uint32 r8; /* v5 */ 75 uint32 r9; /* sb/v6 */ 76 uint32 r10; /* sl/v7 */ 77 uint32 r11; /* fp/v8 */ 78 uint32 r12; /* ip */ 79 uint32 r13; /* sp */ 80 uint32 r14; /* lr */ 81 uint32 pc; /* r15 */ 82 } trap_t; 83 84 #endif /* !_LANGUAGE_ASSEMBLY */ 85 86 #endif /* _hnd_armtrap_h_ */ 87