1 /* 2 * Copyright 2015 Rockchip Electronics Co. LTD 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef __VPU_API_H__ 18 #define __VPU_API_H__ 19 20 #include "rk_type.h" 21 #include "mpp_err.h" 22 23 /** 24 * @brief rockchip media process interface 25 */ 26 27 #define VPU_API_NOPTS_VALUE (0x8000000000000000LL) 28 29 /* 30 * bit definition of ColorType in structure VPU_FRAME 31 */ 32 #define VPU_OUTPUT_FORMAT_TYPE_MASK (0x0000ffff) 33 #define VPU_OUTPUT_FORMAT_ARGB8888 (0x00000000) 34 #define VPU_OUTPUT_FORMAT_ABGR8888 (0x00000001) 35 #define VPU_OUTPUT_FORMAT_RGB888 (0x00000002) 36 #define VPU_OUTPUT_FORMAT_RGB565 (0x00000003) 37 #define VPU_OUTPUT_FORMAT_RGB555 (0x00000004) 38 #define VPU_OUTPUT_FORMAT_YUV420_SEMIPLANAR (0x00000005) 39 #define VPU_OUTPUT_FORMAT_YUV420_PLANAR (0x00000006) 40 #define VPU_OUTPUT_FORMAT_YUV422 (0x00000007) 41 #define VPU_OUTPUT_FORMAT_YUV444 (0x00000008) 42 #define VPU_OUTPUT_FORMAT_YCH420 (0x00000009) 43 #define VPU_OUTPUT_FORMAT_BIT_MASK (0x000f0000) 44 #define VPU_OUTPUT_FORMAT_BIT_8 (0x00000000) 45 #define VPU_OUTPUT_FORMAT_BIT_10 (0x00010000) 46 #define VPU_OUTPUT_FORMAT_BIT_12 (0x00020000) 47 #define VPU_OUTPUT_FORMAT_BIT_14 (0x00030000) 48 #define VPU_OUTPUT_FORMAT_BIT_16 (0x00040000) 49 #define VPU_OUTPUT_FORMAT_FBC_MASK (0x00f00000) 50 #define VPU_OUTPUT_FORMAT_FBC_AFBC_V1 (0x00100000) 51 #define VPU_OUTPUT_FORMAT_FBC_AFBC_V2 (0x00200000) 52 #define VPU_OUTPUT_FORMAT_DYNCRANGE_MASK (0x0f000000) 53 #define VPU_OUTPUT_FORMAT_DYNCRANGE_SDR (0x00000000) 54 #define VPU_OUTPUT_FORMAT_DYNCRANGE_HDR10 (0x01000000) 55 #define VPU_OUTPUT_FORMAT_DYNCRANGE_HDR_HLG (0x02000000) 56 #define VPU_OUTPUT_FORMAT_DYNCRANGE_HDR_DOLBY (0x03000000) 57 58 /** 59 * @brief input picture type 60 */ 61 typedef enum { 62 ENC_INPUT_YUV420_PLANAR = 0, /**< YYYY... UUUU... VVVV */ 63 ENC_INPUT_YUV420_SEMIPLANAR = 1, /**< YYYY... UVUVUV... */ 64 ENC_INPUT_YUV422_INTERLEAVED_YUYV = 2, /**< YUYVYUYV... */ 65 ENC_INPUT_YUV422_INTERLEAVED_UYVY = 3, /**< UYVYUYVY... */ 66 ENC_INPUT_RGB565 = 4, /**< 16-bit RGB */ 67 ENC_INPUT_BGR565 = 5, /**< 16-bit RGB */ 68 ENC_INPUT_RGB555 = 6, /**< 15-bit RGB */ 69 ENC_INPUT_BGR555 = 7, /**< 15-bit RGB */ 70 ENC_INPUT_RGB444 = 8, /**< 12-bit RGB */ 71 ENC_INPUT_BGR444 = 9, /**< 12-bit RGB */ 72 ENC_INPUT_RGB888 = 10, /**< 24-bit RGB */ 73 ENC_INPUT_BGR888 = 11, /**< 24-bit RGB */ 74 ENC_INPUT_RGB101010 = 12, /**< 30-bit RGB */ 75 ENC_INPUT_BGR101010 = 13 /**< 30-bit RGB */ 76 } EncInputPictureType; 77 78 typedef enum VPU_API_CMD { 79 VPU_API_ENC_SETCFG, 80 VPU_API_ENC_GETCFG, 81 VPU_API_ENC_SETFORMAT, 82 VPU_API_ENC_SETIDRFRAME, 83 84 VPU_API_ENABLE_DEINTERLACE, 85 VPU_API_SET_VPUMEM_CONTEXT, 86 VPU_API_USE_PRESENT_TIME_ORDER, 87 VPU_API_SET_DEFAULT_WIDTH_HEIGH, 88 VPU_API_SET_INFO_CHANGE, 89 VPU_API_USE_FAST_MODE, 90 VPU_API_DEC_GET_STREAM_COUNT, 91 VPU_API_GET_VPUMEM_USED_COUNT, 92 VPU_API_GET_FRAME_INFO, 93 VPU_API_SET_OUTPUT_BLOCK, 94 VPU_API_GET_EOS_STATUS, 95 VPU_API_SET_OUTPUT_MODE, 96 97 /* get sps/pps header */ 98 VPU_API_GET_EXTRA_INFO = 0x200, 99 100 VPU_API_SET_IMMEDIATE_OUT = 0x1000, 101 VPU_API_SET_PARSER_SPLIT_MODE, /* NOTE: should control before init */ 102 VPU_API_DEC_OUT_FRM_STRUCT_TYPE, 103 VPU_API_DEC_EN_THUMBNAIL, 104 VPU_API_DEC_EN_HDR_META, 105 VPU_API_DEC_EN_MVC, 106 VPU_API_DEC_EN_FBC_HDR_256_ODD, 107 108 VPU_API_ENC_VEPU22_START = 0x2000, 109 VPU_API_ENC_SET_VEPU22_CFG, 110 VPU_API_ENC_GET_VEPU22_CFG, 111 VPU_API_ENC_SET_VEPU22_CTU_QP, 112 VPU_API_ENC_SET_VEPU22_ROI, 113 114 VPU_API_ENC_MPP = 0x3000, 115 VPU_API_ENC_MPP_SETCFG, 116 VPU_API_ENC_MPP_GETCFG, 117 118 /* mlvec dynamic configure */ 119 VPU_API_ENC_MLVEC_CFG = 0x4000, 120 VPU_API_ENC_SET_MAX_TID, 121 VPU_API_ENC_SET_MARK_LTR, 122 VPU_API_ENC_SET_USE_LTR, 123 VPU_API_ENC_SET_FRAME_QP, 124 VPU_API_ENC_SET_BASE_LAYER_PID, 125 } VPU_API_CMD; 126 127 typedef struct { 128 RK_U32 TimeLow; 129 RK_U32 TimeHigh; 130 } TIME_STAMP; 131 132 typedef struct { 133 RK_U32 CodecType; 134 RK_U32 ImgWidth; 135 RK_U32 ImgHeight; 136 RK_U32 ImgHorStride; 137 RK_U32 ImgVerStride; 138 RK_U32 BufSize; 139 } VPU_GENERIC; 140 141 typedef struct VPUMem { 142 RK_U32 phy_addr; 143 RK_U32 *vir_addr; 144 RK_U32 size; 145 RK_U32 *offset; 146 } VPUMemLinear_t; 147 148 typedef struct tVPU_FRAME { 149 RK_U32 FrameBusAddr[2]; // 0: Y address; 1: UV address; 150 RK_U32 FrameWidth; // buffer horizontal stride 151 RK_U32 FrameHeight; // buffer vertical stride 152 RK_U32 OutputWidth; // deprecated 153 RK_U32 OutputHeight; // deprecated 154 RK_U32 DisplayWidth; // valid width for display 155 RK_U32 DisplayHeight; // valid height for display 156 RK_U32 CodingType; 157 RK_U32 FrameType; // frame; top_field_first; bot_field_first 158 RK_U32 ColorType; 159 RK_U32 DecodeFrmNum; 160 TIME_STAMP ShowTime; 161 RK_U32 ErrorInfo; // error information 162 RK_U32 employ_cnt; 163 VPUMemLinear_t vpumem; 164 struct tVPU_FRAME *next_frame; 165 union { 166 struct { 167 RK_U32 Res0[2]; 168 struct { 169 RK_U32 ColorPrimaries : 8; 170 RK_U32 ColorTransfer : 8; 171 RK_U32 ColorCoeffs : 8; 172 RK_U32 ColorRange : 1; 173 RK_U32 Res1 : 7; 174 }; 175 176 RK_U32 Res2; 177 }; 178 179 RK_U32 Res[4]; 180 }; 181 } VPU_FRAME; 182 183 typedef struct FrameThumbInfo { 184 RK_U32 enable; 185 RK_U32 yOffset; 186 RK_U32 uvOffset; 187 } FrameThumbInfo_t; 188 189 typedef struct FrameHdrInfo { 190 RK_U32 isHdr; 191 RK_U32 offset; 192 RK_U32 size; 193 } FrameHdrInfo_t; 194 195 typedef struct VideoFrame { 196 VPU_FRAME vpuFrame; 197 FrameThumbInfo_t thumbInfo; 198 FrameHdrInfo_t hdrInfo; 199 RK_U32 viewId; 200 RK_U32 reserved[16]; 201 } VideoFrame_t; 202 203 typedef struct VideoPacket { 204 RK_S64 pts; /* with unit of us*/ 205 RK_S64 dts; /* with unit of us*/ 206 RK_U8 *data; 207 RK_S32 size; 208 RK_U32 capability; 209 RK_U32 nFlags; 210 } VideoPacket_t; 211 212 typedef struct DecoderOut { 213 RK_U8 *data; 214 RK_U32 size; 215 RK_S64 timeUs; 216 RK_S32 nFlags; 217 } DecoderOut_t; 218 219 typedef struct ParserOut { 220 RK_U8 *data; 221 RK_U32 size; 222 RK_S64 timeUs; 223 RK_U32 nFlags; 224 RK_U32 width; 225 RK_U32 height; 226 } ParserOut_t; 227 228 typedef struct EncInputStream { 229 RK_U8 *buf; 230 RK_S32 size; 231 RK_U32 bufPhyAddr; 232 RK_S64 timeUs; 233 RK_U32 nFlags; 234 } EncInputStream_t; 235 236 typedef struct EncoderOut { 237 RK_U8 *data; 238 RK_S32 size; 239 RK_S64 timeUs; 240 RK_S32 keyFrame; 241 242 } EncoderOut_t; 243 244 /* 245 * @brief Enumeration used to define the possible video compression codings. 246 * @note This essentially refers to file extensions. If the coding is 247 * being used to specify the ENCODE type, then additional work 248 * must be done to configure the exact flavor of the compression 249 * to be used. For decode cases where the user application can 250 * not differentiate between MPEG-4 and H.264 bit streams, it is 251 * up to the codec to handle this. 252 * 253 * sync with the omx_video.h 254 */ 255 typedef enum OMX_RK_VIDEO_CODINGTYPE { 256 OMX_RK_VIDEO_CodingUnused, /**< Value when coding is N/A */ 257 OMX_RK_VIDEO_CodingAutoDetect, /**< Autodetection of coding type */ 258 OMX_RK_VIDEO_CodingMPEG2, /**< AKA: H.262 */ 259 OMX_RK_VIDEO_CodingH263, /**< H.263 */ 260 OMX_RK_VIDEO_CodingMPEG4, /**< MPEG-4 */ 261 OMX_RK_VIDEO_CodingWMV, /**< Windows Media Video (WMV1,WMV2,WMV3)*/ 262 OMX_RK_VIDEO_CodingRV, /**< all versions of Real Video */ 263 OMX_RK_VIDEO_CodingAVC, /**< H.264/AVC */ 264 OMX_RK_VIDEO_CodingMJPEG, /**< Motion JPEG */ 265 OMX_RK_VIDEO_CodingVP8, /**< VP8 */ 266 OMX_RK_VIDEO_CodingVP9, /**< VP9 */ 267 OMX_RK_VIDEO_CodingVC1 = 0x01000000, /**< Windows Media Video (WMV1,WMV2,WMV3)*/ 268 OMX_RK_VIDEO_CodingFLV1, /**< Sorenson H.263 */ 269 OMX_RK_VIDEO_CodingDIVX3, /**< DIVX3 */ 270 OMX_RK_VIDEO_CodingVP6, 271 OMX_RK_VIDEO_CodingHEVC, /**< H.265/HEVC */ 272 OMX_RK_VIDEO_CodingAVSPLUS, /**< AVS+ profile 0x48 */ 273 OMX_RK_VIDEO_CodingAVS, /**< AVS profile 0x20 */ 274 OMX_RK_VIDEO_CodingAVS2, /**< AVS2 */ 275 OMX_RK_VIDEO_CodingAV1, /**< av1 */ 276 OMX_RK_VIDEO_CodingKhronosExtensions = 0x6F000000, /**< Reserved region for introducing Khronos Standard Extensions */ 277 OMX_RK_VIDEO_CodingVendorStartUnused = 0x7F000000, /**< Reserved region for introducing Vendor Extensions */ 278 OMX_RK_VIDEO_CodingMax = 0x7FFFFFFF 279 } OMX_RK_VIDEO_CODINGTYPE; 280 281 typedef enum CODEC_TYPE { 282 CODEC_NONE, 283 CODEC_DECODER, 284 CODEC_ENCODER, 285 CODEC_BUTT, 286 } CODEC_TYPE; 287 288 typedef enum VPU_API_ERR { 289 VPU_API_OK = 0, 290 VPU_API_ERR_UNKNOW = -1, 291 VPU_API_ERR_BASE = -1000, 292 VPU_API_ERR_LIST_STREAM = VPU_API_ERR_BASE - 1, 293 VPU_API_ERR_INIT = VPU_API_ERR_BASE - 2, 294 VPU_API_ERR_VPU_CODEC_INIT = VPU_API_ERR_BASE - 3, 295 VPU_API_ERR_STREAM = VPU_API_ERR_BASE - 4, 296 VPU_API_ERR_FATAL_THREAD = VPU_API_ERR_BASE - 5, 297 VPU_API_EOS_STREAM_REACHED = VPU_API_ERR_BASE - 11, 298 299 VPU_API_ERR_BUTT, 300 } VPU_API_ERR; 301 302 typedef enum VPU_FRAME_ERR { 303 VPU_FRAME_ERR_UNKNOW = 0x0001, 304 VPU_FRAME_ERR_UNSUPPORT = 0x0002, 305 306 } VPU_FRAME_ERR; 307 308 typedef struct EncParameter { 309 RK_S32 width; 310 RK_S32 height; 311 RK_S32 rc_mode; /* 0 - CQP mode; 1 - CBR mode; 2 - FIXQP mode*/ 312 RK_S32 bitRate; /* target bitrate */ 313 RK_S32 framerate; 314 RK_S32 qp; 315 RK_S32 enableCabac; 316 RK_S32 cabacInitIdc; 317 RK_S32 format; 318 RK_S32 intraPicRate; 319 RK_S32 framerateout; 320 RK_S32 profileIdc; 321 RK_S32 levelIdc; 322 RK_S32 reserved[3]; 323 } EncParameter_t; 324 325 typedef struct EXtraCfg { 326 RK_S32 vc1extra_size; 327 RK_S32 vp6codeid; 328 RK_S32 tsformat; 329 RK_U32 ori_vpu; /* use origin vpu framework */ 330 /* below used in decode */ 331 RK_U32 mpp_mode; /* use mpp framework */ 332 RK_U32 bit_depth; /* 8 or 10 bit */ 333 RK_U32 yuv_format; /* 0:420 1:422 2:444 */ 334 RK_U32 reserved[16]; 335 } EXtraCfg_t; 336 337 /** 338 * @brief vpu function interface 339 */ 340 typedef struct VpuCodecContext { 341 void* vpuApiObj; 342 343 CODEC_TYPE codecType; 344 OMX_RK_VIDEO_CODINGTYPE videoCoding; 345 346 RK_U32 width; 347 RK_U32 height; 348 void *extradata; 349 RK_S32 extradata_size; 350 351 RK_U8 enableparsing; 352 353 RK_S32 no_thread; 354 EXtraCfg_t extra_cfg; 355 356 void* private_data; 357 358 /* 359 ** 1: error state(not working) 0: working 360 */ 361 RK_S32 decoder_err; 362 363 364 /** 365 * Allocate and initialize an VpuCodecContext. 366 * 367 * @param ctx The context of vpu api, allocated in this function. 368 * @param extraData The extra data of codec, some codecs need / can 369 * use extradata like Huffman tables, also live VC1 codec can 370 * use extradata to initialize itself. 371 * @param extra_size The size of extra data. 372 * 373 * @return 0 for init success, others for failure. 374 * @note check whether ctx has been allocated success after you do init. 375 */ 376 RK_S32 (*init)(struct VpuCodecContext *ctx, RK_U8 *extraData, RK_U32 extra_size); 377 /** 378 * @brief both send video stream packet to decoder and get video frame from 379 * decoder at the same time 380 * @param ctx The context of vpu codec 381 * @param pkt[in] Stream to be decoded 382 * @param aDecOut[out] Decoding frame 383 * @return 0 for decode success, others for failure. 384 */ 385 RK_S32 (*decode)(struct VpuCodecContext *ctx, VideoPacket_t *pkt, DecoderOut_t *aDecOut); 386 /** 387 * @brief both send video frame to encoder and get encoded video stream from 388 * encoder at the same time. 389 * @param ctx The context of vpu codec 390 * @param aEncInStrm[in] Frame to be encoded 391 * @param aEncOut[out] Encoding stream 392 * @return 0 for encode success, others for failure. 393 */ 394 RK_S32 (*encode)(struct VpuCodecContext *ctx, EncInputStream_t *aEncInStrm, EncoderOut_t *aEncOut); 395 /** 396 * @brief flush codec while do fast forward playing. 397 * @param ctx The context of vpu codec 398 * @return 0 for flush success, others for failure. 399 */ 400 RK_S32 (*flush)(struct VpuCodecContext *ctx); 401 RK_S32 (*control)(struct VpuCodecContext *ctx, VPU_API_CMD cmdType, void* param); 402 /** 403 * @brief send video stream packet to decoder only, async interface 404 * @param ctx The context of vpu codec 405 * @param pkt Stream to be decoded 406 * @return 0 for success, others for failure. 407 */ 408 RK_S32 (*decode_sendstream)(struct VpuCodecContext *ctx, VideoPacket_t *pkt); 409 /** 410 * @brief get video frame from decoder only, async interface 411 * @param ctx The context of vpu codec 412 * @param aDecOut Decoding frame 413 * @return 0 for success, others for failure. 414 */ 415 RK_S32 (*decode_getframe)(struct VpuCodecContext *ctx, DecoderOut_t *aDecOut); 416 /** 417 * @brief send video frame to encoder only, async interface 418 * @param ctx The context of vpu codec 419 * @param aEncInStrm Frame to be encoded 420 * @return 0 for success, others for failure. 421 */ 422 RK_S32 (*encoder_sendframe)(struct VpuCodecContext *ctx, EncInputStream_t *aEncInStrm); 423 /** 424 * @brief get encoded video packet from encoder only, async interface 425 * @param ctx The context of vpu codec 426 * @param aEncOut Encoding stream 427 * @return 0 for success, others for failure. 428 */ 429 RK_S32 (*encoder_getstream)(struct VpuCodecContext *ctx, EncoderOut_t *aEncOut); 430 } VpuCodecContext_t; 431 432 /* allocated vpu codec context */ 433 #ifdef __cplusplus 434 extern "C" 435 { 436 #endif 437 438 /** 439 * @brief open context of vpu 440 * @param ctx pointer of vpu codec context 441 */ 442 RK_S32 vpu_open_context(struct VpuCodecContext **ctx); 443 /** 444 * @brief close context of vpu 445 * @param ctx pointer of vpu codec context 446 */ 447 RK_S32 vpu_close_context(struct VpuCodecContext **ctx); 448 449 #ifdef __cplusplus 450 } 451 #endif 452 453 /* 454 * vpu_mem api 455 */ 456 #define vpu_display_mem_pool_FIELDS \ 457 RK_S32 (*commit_hdl)(vpu_display_mem_pool *p, RK_S32 hdl, RK_S32 size); \ 458 void* (*get_free)(vpu_display_mem_pool *p); \ 459 RK_S32 (*inc_used)(vpu_display_mem_pool *p, void *hdl); \ 460 RK_S32 (*put_used)(vpu_display_mem_pool *p, void *hdl); \ 461 RK_S32 (*reset)(vpu_display_mem_pool *p); \ 462 RK_S32 (*get_unused_num)(vpu_display_mem_pool *p); \ 463 RK_S32 buff_size;\ 464 float version; \ 465 RK_S32 res[18]; 466 467 typedef struct vpu_display_mem_pool vpu_display_mem_pool; 468 469 struct vpu_display_mem_pool { 470 vpu_display_mem_pool_FIELDS 471 }; 472 473 #ifdef __cplusplus 474 extern "C" 475 { 476 #endif 477 478 /* 479 * vpu memory handle interface 480 */ 481 RK_S32 VPUMemJudgeIommu(void); 482 RK_S32 VPUMallocLinear(VPUMemLinear_t *p, RK_U32 size); 483 RK_S32 VPUFreeLinear(VPUMemLinear_t *p); 484 RK_S32 VPUMemDuplicate(VPUMemLinear_t *dst, VPUMemLinear_t *src); 485 RK_S32 VPUMemLink(VPUMemLinear_t *p); 486 RK_S32 VPUMemFlush(VPUMemLinear_t *p); 487 RK_S32 VPUMemClean(VPUMemLinear_t *p); 488 RK_S32 VPUMemInvalidate(VPUMemLinear_t *p); 489 RK_S32 VPUMemGetFD(VPUMemLinear_t *p); 490 RK_S32 VPUMallocLinearFromRender(VPUMemLinear_t *p, RK_U32 size, void *ctx); 491 492 /* 493 * vpu memory allocator and manager interface 494 */ 495 vpu_display_mem_pool* open_vpu_memory_pool(void); 496 void close_vpu_memory_pool(vpu_display_mem_pool *p); 497 int create_vpu_memory_pool_allocator(vpu_display_mem_pool **ipool, int num, int size); 498 void release_vpu_memory_pool_allocator(vpu_display_mem_pool *ipool); 499 500 #ifdef __cplusplus 501 } 502 #endif 503 504 #endif /*__VPU_API_H__*/ 505