1 /* 2 * Copyright 2016 Rockchip Electronics Co. LTD 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef __MPP_RC_DEFS_H__ 18 #define __MPP_RC_DEFS_H__ 19 20 #include "rk_venc_ref.h" 21 22 #define MAX_CPB_REFS (8) 23 24 typedef enum EncFrmType_e { 25 INTER_P_FRAME = 0, 26 INTER_B_FRAME = 1, 27 INTRA_FRAME = 2, 28 INTER_VI_FRAME = 3, 29 INTRA_RFH_FRAME = 4, 30 } EncFrmType; 31 32 /* 33 * EncFrmStatus controls record the encoding frame status and also control 34 * work flow of encoder. It is the communicat channel between encoder implement 35 * module, rate control module and hardware module. 36 * 37 * bit 0 ~ 31 frame status 38 * 0 ~ 15 current frame status 39 * 16 ~ 31 reference frame status 40 * bit 32 ~ 63 encoding flow control 41 */ 42 typedef union EncFrmStatus_u { 43 struct { 44 /* 45 * bit 0 ~ 31 frame status 46 */ 47 /* status flag */ 48 RK_U32 valid : 1; 49 /* 50 * 0 - write the reconstructed frame pixel to memory 51 * 1 - do not write the reconstructed frame pixel to memory 52 */ 53 RK_U32 non_recn : 1; 54 55 /* 56 * 0 - normal frame and normal dpb management 57 * 1 - save recon frame as first pass extra frame. Used in two pass mode 58 */ 59 RK_U32 save_pass1 : 1; 60 61 /* 62 * 0 - use normal input source frame as input 63 * 1 - use the previously stored first pass recon frame as input frame 64 */ 65 RK_U32 use_pass1 : 1; 66 67 /* reference status flag */ 68 /* 69 * 0 - inter frame 70 * 1 - intra frame 71 */ 72 RK_U32 is_intra : 1; 73 74 /* 75 * Valid when is_intra is true 76 * 0 - normal intra frame 77 * 1 - IDR frame 78 */ 79 RK_U32 is_idr : 1; 80 81 /* 82 * 0 - mark as reference frame 83 * 1 - mark as non-refernce frame 84 */ 85 RK_U32 is_non_ref : 1; 86 87 /* 88 * Valid when is_non_ref is false 89 * 0 - mark as short-term reference frame 90 * 1 - mark as long-term refernce frame 91 */ 92 RK_U32 is_lt_ref : 1; 93 94 /* bit 8 - 15 */ 95 RK_U32 lt_idx : 4; 96 RK_U32 temporal_id : 4; 97 98 /* distance between current frame and reference frame */ 99 MppEncRefMode ref_mode : 6; 100 RK_S32 ref_arg : 8; 101 RK_S32 ref_dist : 2; 102 103 /* 104 * bit 32 ~ 63 encoder flow control flags 105 */ 106 /* 107 * 0 - normal frame encoding 108 * 1 - current frame will be dropped 109 */ 110 RK_U32 drop : 1; 111 112 /* 113 * 0 - rate control module does not change frame type parameter 114 * 1 - rate control module changes frame type parameter reencode is needed 115 * to reprocess the dpb process. Also this means dpb module will follow 116 * the frame status parameter provided by rate control module. 117 */ 118 RK_U32 re_dpb_proc : 1; 119 120 /* 121 * 0 - current frame encoding is in normal flow 122 * 1 - current frame encoding is in reencode flow 123 */ 124 RK_U32 reencode : 1; 125 126 /* 127 * When true current frame size is super large then the frame should be reencoded. 128 */ 129 RK_U32 super_frame : 1; 130 131 /* 132 * When true currnet frame is force to encoded as software skip frame 133 */ 134 RK_U32 force_pskip : 1; 135 136 /* 137 * Current frame is intra refresh frame 138 */ 139 RK_U32 is_i_refresh : 1; 140 /* 141 * Current frame needs add recovery point prefix 142 */ 143 RK_U32 is_i_recovery : 1; 144 RK_U32 reserved1 : 1; 145 146 /* reencode times */ 147 RK_U32 reencode_times : 8; 148 149 /* sequential index for each frame */ 150 RK_U32 seq_idx : 16; 151 }; 152 RK_U64 val; 153 } EncFrmStatus; 154 155 typedef struct EncCpbStatus_t { 156 RK_S32 seq_idx; 157 158 EncFrmStatus curr; 159 EncFrmStatus refr; 160 161 /* initial cpb status for current frame encoding */ 162 EncFrmStatus init[MAX_CPB_REFS]; 163 /* final cpb status after current frame encoding */ 164 EncFrmStatus final[MAX_CPB_REFS]; 165 } EncCpbStatus; 166 167 #define ENC_RC_FORCE_QP (0x00000001) 168 169 typedef struct EncRcForceCfg_t { 170 RK_U32 force_flag; 171 RK_S32 force_qp; 172 RK_U32 reserve[6]; 173 } EncRcForceCfg; 174 175 /* 176 * communication channel between rc / hal / hardware 177 * 178 * rc -> hal bit_target / bit_max / bit_min 179 * hal -> hw quality_target / quality_max / quality_min 180 * hw -> rc / hal bit_real / quality_real / madi / madp 181 */ 182 typedef struct EncRcCommonInfo_t { 183 EncFrmType frame_type; 184 185 /* rc to hal */ 186 RK_S32 bit_target; 187 RK_S32 bit_max; 188 RK_S32 bit_min; 189 190 RK_S32 quality_target; 191 RK_S32 quality_max; 192 RK_S32 quality_min; 193 194 /* rc from hardware */ 195 RK_S32 bit_real; 196 RK_S32 quality_real; 197 RK_S32 madi; 198 RK_S32 madp; 199 200 RK_U32 iblk4_prop; // scale 256 201 RK_S32 reserve[15]; 202 } EncRcTaskInfo; 203 204 typedef struct EncRcTask_s { 205 EncCpbStatus cpb; 206 EncFrmStatus frm; 207 EncRcTaskInfo info; 208 EncRcForceCfg force; 209 MppFrame frame; 210 } EncRcTask; 211 212 #endif /* __MPP_RC_DEFS_H__ */ 213