1 /*
2 * Copyright 2021 Rockchip Electronics Co. LTD
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #define MODULE_TAG "hal_av1d_api"
18
19 #include <stdio.h>
20 #include <stdlib.h>
21 #include <string.h>
22 #include <dlfcn.h>
23 #include <unistd.h>
24
25 #include "mpp_mem.h"
26 #include "mpp_env.h"
27 #include "mpp_platform.h"
28 #include "mpp_common.h"
29
30 #include "dxva_syntax.h"
31
32 #include "hal_av1d_vdpu_reg.h"
33 #include "hal_av1d_vdpu.h"
34 #include "hal_av1d_common.h"
35
36 RK_U32 hal_av1d_debug = 0;
37
hal_av1d_init(void * hal,MppHalCfg * cfg)38 MPP_RET hal_av1d_init(void *hal, MppHalCfg *cfg)
39 {
40 MPP_RET ret = MPP_OK;
41 Av1dHalCtx *p_hal = (Av1dHalCtx *)hal;
42 RK_U32 vcodec_type = mpp_get_vcodec_type();
43 MppClientType type = VPU_CLIENT_AV1DEC;
44
45 INP_CHECK(ret, NULL == p_hal);
46 memset(p_hal, 0, sizeof(Av1dHalCtx));
47 mpp_env_get_u32("hal_av1d_debug", &hal_av1d_debug, 0);
48
49 // check codec_type first
50 if (!(vcodec_type & (HAVE_RKVDEC | HAVE_VDPU1 | HAVE_VDPU2))) {
51 mpp_err_f("can not found av1 decoder hardware on platform %x\n", vcodec_type);
52 return ret;
53 }
54
55 p_hal->api = &hal_av1d_vdpu;
56
57 //!< callback function to parser module
58 p_hal->dec_cb = cfg->dec_cb;
59
60 ret = mpp_dev_init(&cfg->dev, type);
61 if (ret) {
62 mpp_err("mpp_dev_init failed ret: %d\n", ret);
63 goto __FAILED;
64 }
65
66 //< get buffer group
67 if (p_hal->buf_group == NULL) {
68 FUN_CHECK(ret = mpp_buffer_group_get_internal
69 (&p_hal->buf_group, MPP_BUFFER_TYPE_ION));
70 }
71
72 cfg->support_fast_mode = 0;
73 p_hal->dev = cfg->dev;
74 p_hal->cfg = cfg->cfg;
75 p_hal->slots = cfg->frame_slots;
76 p_hal->packet_slots = cfg->packet_slots;
77 p_hal->fast_mode = cfg->cfg->base.fast_parse && cfg->support_fast_mode;
78
79 if (p_hal->buf_group == NULL) {
80 FUN_CHECK(ret = mpp_buffer_group_get_internal
81 (&p_hal->buf_group, MPP_BUFFER_TYPE_ION));
82 }
83 //!< run init funtion
84 FUN_CHECK(ret = p_hal->api->init(hal, cfg));
85
86 __RETURN:
87 return MPP_OK;
88 __FAILED:
89 return ret;
90 }
91
hal_av1d_deinit(void * hal)92 MPP_RET hal_av1d_deinit(void *hal)
93 {
94 MPP_RET ret = MPP_ERR_UNKNOW;
95 Av1dHalCtx *p_hal = (Av1dHalCtx *)hal;
96
97 FUN_CHECK(ret = p_hal->api->deinit(hal));
98
99 if (p_hal->dev) {
100 mpp_dev_deinit(p_hal->dev);
101 p_hal->dev = NULL;
102 }
103
104 if (p_hal->buf_group) {
105 FUN_CHECK(ret = mpp_buffer_group_put(p_hal->buf_group));
106 }
107
108 return MPP_OK;
109 __FAILED:
110 return ret;
111 }
112
hal_av1d_gen_regs(void * hal,HalTaskInfo * task)113 MPP_RET hal_av1d_gen_regs(void *hal, HalTaskInfo *task)
114 {
115 Av1dHalCtx *p_hal = (Av1dHalCtx *)hal;
116 MPP_RET ret = MPP_NOK;
117
118 if (p_hal && p_hal->api && p_hal->api->reg_gen)
119 ret = p_hal->api->reg_gen(hal, task);
120 return ret;
121 }
122
hal_av1d_start(void * hal,HalTaskInfo * task)123 MPP_RET hal_av1d_start(void *hal, HalTaskInfo *task)
124 {
125 Av1dHalCtx *p_hal = (Av1dHalCtx *)hal;
126 MPP_RET ret = MPP_NOK;
127
128 if (p_hal && p_hal->api && p_hal->api->start)
129 ret = p_hal->api->start(hal, task);
130 return ret;
131 }
132
hal_av1d_wait(void * hal,HalTaskInfo * task)133 MPP_RET hal_av1d_wait(void *hal, HalTaskInfo *task)
134 {
135 Av1dHalCtx *p_hal = (Av1dHalCtx *)hal;
136 MPP_RET ret = MPP_NOK;
137
138 if (p_hal && p_hal->api && p_hal->api->wait)
139 ret = p_hal->api->wait(hal, task);
140 return ret;
141 }
142
hal_av1d_reset(void * hal)143 MPP_RET hal_av1d_reset(void *hal)
144 {
145 Av1dHalCtx *p_hal = (Av1dHalCtx *)hal;
146 MPP_RET ret = MPP_NOK;
147
148 if (p_hal && p_hal->api && p_hal->api->reset)
149 ret = p_hal->api->reset(hal);
150 return ret;
151 }
152
hal_av1d_flush(void * hal)153 MPP_RET hal_av1d_flush(void *hal)
154 {
155 Av1dHalCtx *p_hal = (Av1dHalCtx *)hal;
156 MPP_RET ret = MPP_NOK;
157
158 if (p_hal && p_hal->api && p_hal->api->flush)
159 ret = p_hal->api->flush(hal);
160 return ret;
161 }
162
hal_av1d_control(void * hal,MpiCmd cmd_type,void * param)163 MPP_RET hal_av1d_control(void *hal, MpiCmd cmd_type, void *param)
164 {
165 Av1dHalCtx *p_hal = (Av1dHalCtx *)hal;
166 MPP_RET ret = MPP_NOK;
167
168 if (p_hal && p_hal->api && p_hal->api->control)
169 ret = p_hal->api->control(hal, cmd_type, param);
170 return ret;
171 }
172
173 const MppHalApi hal_api_av1d = {
174 .name = "av1d_vdpu",
175 .type = MPP_CTX_DEC,
176 .coding = MPP_VIDEO_CodingAV1,
177 .ctx_size = sizeof(Av1dHalCtx),
178 .flag = 0,
179 .init = hal_av1d_init,
180 .deinit = hal_av1d_deinit,
181 .reg_gen = hal_av1d_gen_regs,
182 .start = hal_av1d_start,
183 .wait = hal_av1d_wait,
184 .reset = hal_av1d_reset,
185 .flush = hal_av1d_flush,
186 .control = hal_av1d_control,
187 };
188