1 /* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR MIT) */ 2 /* 3 * Rockchip module information 4 * Copyright (C) 2018-2019 Rockchip Electronics Co., Ltd. 5 */ 6 7 #ifndef _UAPI_RKMODULE_CAMERA_H 8 #define _UAPI_RKMODULE_CAMERA_H 9 10 #include <linux/types.h> 11 12 #include "rk_isp20_hw.h" 13 14 #define RKMODULE_API_VERSION KERNEL_VERSION(0, 1, 0x2) 15 16 /* using for rk3588 dual isp unite */ 17 #define RKMOUDLE_UNITE_EXTEND_PIXEL 128 18 /* using for rv1109 and rv1126 */ 19 #define RKMODULE_EXTEND_LINE 24 20 21 #define RKMODULE_NAME_LEN 32 22 #define RKMODULE_LSCDATA_LEN 289 23 24 #define RKMODULE_MAX_VC_CH 4 25 26 #define RKMODULE_PADF_GAINMAP_LEN 1024 27 #define RKMODULE_PDAF_DCCMAP_LEN 256 28 #define RKMODULE_AF_OTP_MAX_LEN 3 29 30 #define RKMODULE_MAX_SENSOR_NUM 8 31 32 #define RKMODULE_CAMERA_MODULE_INDEX "rockchip,camera-module-index" 33 #define RKMODULE_CAMERA_MODULE_FACING "rockchip,camera-module-facing" 34 #define RKMODULE_CAMERA_MODULE_NAME "rockchip,camera-module-name" 35 #define RKMODULE_CAMERA_LENS_NAME "rockchip,camera-module-lens-name" 36 37 #define RKMODULE_CAMERA_SYNC_MODE "rockchip,camera-module-sync-mode" 38 #define RKMODULE_INTERNAL_MASTER_MODE "internal_master" 39 #define RKMODULE_EXTERNAL_MASTER_MODE "external_master" 40 #define RKMODULE_SLAVE_MODE "slave" 41 42 /* BT.656 & BT.1120 multi channel 43 * On which channels it can send video data 44 * related with struct rkmodule_bt656_mbus_info 45 */ 46 #define RKMODULE_CAMERA_BT656_ID_EN_BITS_1 (0x1) 47 #define RKMODULE_CAMERA_BT656_ID_EN_BITS_2 (0x3) 48 #define RKMODULE_CAMERA_BT656_ID_EN_BITS_3 (0x7) 49 #define RKMODULE_CAMERA_BT656_ID_EN_BITS_4 (0xf) 50 #define RKMODULE_CAMERA_BT656_PARSE_ID_LSB BIT(0) 51 #define RKMODULE_CAMERA_BT656_PARSE_ID_MSB BIT(1) 52 #define RKMODULE_CAMERA_BT656_CHANNEL_0 BIT(2) 53 #define RKMODULE_CAMERA_BT656_CHANNEL_1 BIT(3) 54 #define RKMODULE_CAMERA_BT656_CHANNEL_2 BIT(4) 55 #define RKMODULE_CAMERA_BT656_CHANNEL_3 BIT(5) 56 #define RKMODULE_CAMERA_BT656_CHANNELS (RKMODULE_CAMERA_BT656_CHANNEL_0 | \ 57 RKMODULE_CAMERA_BT656_CHANNEL_1 | \ 58 RKMODULE_CAMERA_BT656_CHANNEL_2 | \ 59 RKMODULE_CAMERA_BT656_CHANNEL_3) 60 61 #define DPHY_MAX_LANE 4 62 63 #define RKMODULE_GET_MODULE_INFO \ 64 _IOR('V', BASE_VIDIOC_PRIVATE + 0, struct rkmodule_inf) 65 66 #define RKMODULE_AWB_CFG \ 67 _IOW('V', BASE_VIDIOC_PRIVATE + 1, struct rkmodule_awb_cfg) 68 69 #define RKMODULE_AF_CFG \ 70 _IOW('V', BASE_VIDIOC_PRIVATE + 2, struct rkmodule_af_cfg) 71 72 #define RKMODULE_LSC_CFG \ 73 _IOW('V', BASE_VIDIOC_PRIVATE + 3, struct rkmodule_lsc_cfg) 74 75 #define RKMODULE_GET_HDR_CFG \ 76 _IOR('V', BASE_VIDIOC_PRIVATE + 4, struct rkmodule_hdr_cfg) 77 78 #define RKMODULE_SET_HDR_CFG \ 79 _IOW('V', BASE_VIDIOC_PRIVATE + 5, struct rkmodule_hdr_cfg) 80 81 #define RKMODULE_SET_CONVERSION_GAIN \ 82 _IOW('V', BASE_VIDIOC_PRIVATE + 6, __u32) 83 84 #define RKMODULE_GET_LVDS_CFG \ 85 _IOR('V', BASE_VIDIOC_PRIVATE + 7, struct rkmodule_lvds_cfg) 86 87 #define RKMODULE_SET_DPCC_CFG \ 88 _IOW('V', BASE_VIDIOC_PRIVATE + 8, struct rkmodule_dpcc_cfg) 89 90 #define RKMODULE_GET_NR_SWITCH_THRESHOLD \ 91 _IOR('V', BASE_VIDIOC_PRIVATE + 9, struct rkmodule_nr_switch_threshold) 92 93 #define RKMODULE_SET_QUICK_STREAM \ 94 _IOW('V', BASE_VIDIOC_PRIVATE + 10, __u32) 95 96 #define RKMODULE_GET_BT656_INTF_TYPE \ 97 _IOR('V', BASE_VIDIOC_PRIVATE + 11, __u32) 98 99 #define RKMODULE_GET_VC_FMT_INFO \ 100 _IOR('V', BASE_VIDIOC_PRIVATE + 12, struct rkmodule_vc_fmt_info) 101 102 #define RKMODULE_GET_VC_HOTPLUG_INFO \ 103 _IOR('V', BASE_VIDIOC_PRIVATE + 13, struct rkmodule_vc_hotplug_info) 104 105 #define RKMODULE_GET_START_STREAM_SEQ \ 106 _IOR('V', BASE_VIDIOC_PRIVATE + 14, __u32) 107 108 #define RKMODULE_GET_VICAP_RST_INFO \ 109 _IOR('V', BASE_VIDIOC_PRIVATE + 15, struct rkmodule_vicap_reset_info) 110 111 #define RKMODULE_SET_VICAP_RST_INFO \ 112 _IOW('V', BASE_VIDIOC_PRIVATE + 16, struct rkmodule_vicap_reset_info) 113 114 #define RKMODULE_GET_BT656_MBUS_INFO \ 115 _IOR('V', BASE_VIDIOC_PRIVATE + 17, struct rkmodule_bt656_mbus_info) 116 117 #define RKMODULE_GET_DCG_RATIO \ 118 _IOR('V', BASE_VIDIOC_PRIVATE + 18, struct rkmodule_dcg_ratio) 119 120 #define RKMODULE_GET_SONY_BRL \ 121 _IOR('V', BASE_VIDIOC_PRIVATE + 19, __u32) 122 123 #define RKMODULE_GET_CHANNEL_INFO \ 124 _IOWR('V', BASE_VIDIOC_PRIVATE + 20, struct rkmodule_channel_info) 125 126 #define RKMODULE_GET_SYNC_MODE \ 127 _IOR('V', BASE_VIDIOC_PRIVATE + 21, __u32) 128 129 #define RKMODULE_SET_SYNC_MODE \ 130 _IOW('V', BASE_VIDIOC_PRIVATE + 22, __u32) 131 132 #define RKMODULE_SET_MCLK \ 133 _IOW('V', BASE_VIDIOC_PRIVATE + 23, struct rkmodule_mclk_data) 134 135 #define RKMODULE_SET_LINK_FREQ \ 136 _IOW('V', BASE_VIDIOC_PRIVATE + 24, __s64) 137 138 #define RKMODULE_SET_BUS_CONFIG \ 139 _IOW('V', BASE_VIDIOC_PRIVATE + 25, struct rkmodule_bus_config) 140 141 #define RKMODULE_GET_BUS_CONFIG \ 142 _IOR('V', BASE_VIDIOC_PRIVATE + 26, struct rkmodule_bus_config) 143 144 #define RKMODULE_SET_REGISTER \ 145 _IOW('V', BASE_VIDIOC_PRIVATE + 27, struct rkmodule_reg) 146 147 #define RKMODULE_SYNC_I2CDEV \ 148 _IOW('V', BASE_VIDIOC_PRIVATE + 28, __u8) 149 150 #define RKMODULE_SYNC_I2CDEV_COMPLETE \ 151 _IOW('V', BASE_VIDIOC_PRIVATE + 29, __u8) 152 153 #define RKMODULE_SET_DEV_INFO \ 154 _IOW('V', BASE_VIDIOC_PRIVATE + 30, struct rkmodule_dev_info) 155 156 #define RKMODULE_SET_CSI_DPHY_PARAM \ 157 _IOW('V', BASE_VIDIOC_PRIVATE + 31, struct rkmodule_csi_dphy_param) 158 159 #define RKMODULE_GET_CSI_DPHY_PARAM \ 160 _IOWR('V', BASE_VIDIOC_PRIVATE + 32, struct rkmodule_csi_dphy_param) 161 162 #define RKMODULE_GET_CSI_DSI_INFO \ 163 _IOWR('V', BASE_VIDIOC_PRIVATE + 33, __u32) 164 165 #define RKMODULE_GET_HDMI_MODE \ 166 _IOR('V', BASE_VIDIOC_PRIVATE + 34, __u32) 167 168 #define RKMODULE_SET_SENSOR_INFOS \ 169 _IOWR('V', BASE_VIDIOC_PRIVATE + 35, struct rkmodule_sensor_infos) 170 171 #define RKMODULE_GET_READOUT_LINE_CNT_PER_LINE \ 172 _IOR('V', BASE_VIDIOC_PRIVATE + 36, __u32) 173 174 struct rkmodule_i2cdev_info { 175 u8 slave_addr; 176 } __attribute__ ((packed)); 177 178 struct rkmodule_dev_info { 179 union { 180 struct rkmodule_i2cdev_info i2c_dev; 181 u32 reserved[8]; 182 }; 183 } __attribute__ ((packed)); 184 185 /* csi0/csi1 phy support full/split mode */ 186 enum rkmodule_phy_mode { 187 PHY_FULL_MODE, 188 PHY_SPLIT_01, 189 PHY_SPLIT_23, 190 }; 191 192 struct rkmodule_mipi_lvds_bus { 193 __u32 bus_type; 194 __u32 lanes; 195 __u32 phy_mode; /* data type enum rkmodule_phy_mode */ 196 }; 197 198 struct rkmodule_bus_config { 199 union { 200 struct rkmodule_mipi_lvds_bus bus; 201 __u32 reserved[32]; 202 }; 203 } __attribute__ ((packed)); 204 205 struct rkmodule_reg { 206 __u64 num_regs; 207 __u64 preg_addr; 208 __u64 preg_value; 209 __u64 preg_addr_bytes; 210 __u64 preg_value_bytes; 211 } __attribute__ ((packed)); 212 213 /** 214 * struct rkmodule_base_inf - module base information 215 * 216 */ 217 struct rkmodule_base_inf { 218 char sensor[RKMODULE_NAME_LEN]; 219 char module[RKMODULE_NAME_LEN]; 220 char lens[RKMODULE_NAME_LEN]; 221 } __attribute__ ((packed)); 222 223 /** 224 * struct rkmodule_fac_inf - module factory information 225 * 226 */ 227 struct rkmodule_fac_inf { 228 __u32 flag; 229 230 char module[RKMODULE_NAME_LEN]; 231 char lens[RKMODULE_NAME_LEN]; 232 __u32 year; 233 __u32 month; 234 __u32 day; 235 } __attribute__ ((packed)); 236 237 /** 238 * struct rkmodule_awb_inf - module awb information 239 * 240 */ 241 struct rkmodule_awb_inf { 242 __u32 flag; 243 244 __u32 r_value; 245 __u32 b_value; 246 __u32 gr_value; 247 __u32 gb_value; 248 249 __u32 golden_r_value; 250 __u32 golden_b_value; 251 __u32 golden_gr_value; 252 __u32 golden_gb_value; 253 } __attribute__ ((packed)); 254 255 /** 256 * struct rkmodule_lsc_inf - module lsc information 257 * 258 */ 259 struct rkmodule_lsc_inf { 260 __u32 flag; 261 262 __u16 lsc_w; 263 __u16 lsc_h; 264 __u16 decimal_bits; 265 266 __u16 lsc_r[RKMODULE_LSCDATA_LEN]; 267 __u16 lsc_b[RKMODULE_LSCDATA_LEN]; 268 __u16 lsc_gr[RKMODULE_LSCDATA_LEN]; 269 __u16 lsc_gb[RKMODULE_LSCDATA_LEN]; 270 271 __u16 width; 272 __u16 height; 273 __u16 table_size; 274 } __attribute__ ((packed)); 275 276 /** 277 * enum rkmodule_af_dir - enum of module af otp direction 278 */ 279 enum rkmodele_af_otp_dir { 280 AF_OTP_DIR_HORIZONTAL = 0, 281 AF_OTP_DIR_UP = 1, 282 AF_OTP_DIR_DOWN = 2, 283 }; 284 285 /** 286 * struct rkmodule_af_otp - module af otp in one direction 287 */ 288 struct rkmodule_af_otp { 289 __u32 vcm_start; 290 __u32 vcm_end; 291 __u32 vcm_dir; 292 }; 293 294 /** 295 * struct rkmodule_af_inf - module af information 296 * 297 */ 298 struct rkmodule_af_inf { 299 __u32 flag; 300 __u32 dir_cnt; 301 struct rkmodule_af_otp af_otp[RKMODULE_AF_OTP_MAX_LEN]; 302 } __attribute__ ((packed)); 303 304 /** 305 * struct rkmodule_pdaf_inf - module pdaf information 306 * 307 */ 308 struct rkmodule_pdaf_inf { 309 __u32 flag; 310 311 __u32 gainmap_width; 312 __u32 gainmap_height; 313 __u32 dccmap_width; 314 __u32 dccmap_height; 315 __u32 dcc_mode; 316 __u32 dcc_dir; 317 __u16 gainmap[RKMODULE_PADF_GAINMAP_LEN]; 318 __u16 dccmap[RKMODULE_PDAF_DCCMAP_LEN]; 319 } __attribute__ ((packed)); 320 321 /** 322 * struct rkmodule_otp_module_inf - otp module info 323 * 324 */ 325 struct rkmodule_otp_module_inf { 326 __u32 flag; 327 __u8 vendor[8]; 328 __u32 module_id; 329 __u16 version; 330 __u16 full_width; 331 __u16 full_height; 332 __u8 supplier_id; 333 __u8 year; 334 __u8 mouth; 335 __u8 day; 336 __u8 sensor_id; 337 __u8 lens_id; 338 __u8 vcm_id; 339 __u8 drv_id; 340 __u8 flip; 341 } __attribute__ ((packed)); 342 343 /** 344 * struct rkmodule_inf - module information 345 * 346 */ 347 struct rkmodule_inf { 348 struct rkmodule_base_inf base; 349 struct rkmodule_fac_inf fac; 350 struct rkmodule_awb_inf awb; 351 struct rkmodule_lsc_inf lsc; 352 struct rkmodule_af_inf af; 353 struct rkmodule_pdaf_inf pdaf; 354 struct rkmodule_otp_module_inf module_inf; 355 } __attribute__ ((packed)); 356 357 /** 358 * struct rkmodule_awb_inf - module awb information 359 * 360 */ 361 struct rkmodule_awb_cfg { 362 __u32 enable; 363 __u32 golden_r_value; 364 __u32 golden_b_value; 365 __u32 golden_gr_value; 366 __u32 golden_gb_value; 367 } __attribute__ ((packed)); 368 369 /** 370 * struct rkmodule_af_cfg 371 * 372 */ 373 struct rkmodule_af_cfg { 374 __u32 enable; 375 __u32 vcm_start; 376 __u32 vcm_end; 377 __u32 vcm_dir; 378 } __attribute__ ((packed)); 379 380 /** 381 * struct rkmodule_lsc_cfg 382 * 383 */ 384 struct rkmodule_lsc_cfg { 385 __u32 enable; 386 } __attribute__ ((packed)); 387 388 /** 389 * NO_HDR: linear mode 390 * HDR_X2: hdr two frame or line mode 391 * HDR_X3: hdr three or line mode 392 * HDR_COMPR: linearised and compressed data for hdr 393 */ 394 enum rkmodule_hdr_mode { 395 NO_HDR = 0, 396 HDR_X2 = 5, 397 HDR_X3 = 6, 398 HDR_COMPR, 399 }; 400 401 enum rkmodule_hdr_compr_segment { 402 HDR_COMPR_SEGMENT_4 = 4, 403 HDR_COMPR_SEGMENT_12 = 12, 404 HDR_COMPR_SEGMENT_16 = 16, 405 }; 406 407 /* rkmodule_hdr_compr 408 * linearised and compressed data for hdr: data_src = K * data_compr + XX 409 * 410 * bit: bit of src data, max 20 bit. 411 * segment: linear segment, support 4, 6 or 16. 412 * k_shift: left shift bit of slop amplification factor, 2^k_shift, [0 15]. 413 * slope_k: K * 2^k_shift. 414 * data_src_shitf: left shift bit of source data, data_src = 2^data_src_shitf 415 * data_compr: compressed data. 416 */ 417 struct rkmodule_hdr_compr { 418 enum rkmodule_hdr_compr_segment segment; 419 __u8 bit; 420 __u8 k_shift; 421 __u8 data_src_shitf[HDR_COMPR_SEGMENT_16]; 422 __u16 data_compr[HDR_COMPR_SEGMENT_16]; 423 __u32 slope_k[HDR_COMPR_SEGMENT_16]; 424 }; 425 426 /** 427 * HDR_NORMAL_VC: hdr frame with diff virtual channels 428 * HDR_LINE_CNT: hdr frame with line counter 429 * HDR_ID_CODE: hdr frame with identification code 430 */ 431 enum hdr_esp_mode { 432 HDR_NORMAL_VC = 0, 433 HDR_LINE_CNT, 434 HDR_ID_CODE, 435 }; 436 437 /* 438 * CSI/DSI input select IOCTL 439 */ 440 enum rkmodule_csi_dsi_seq { 441 RKMODULE_CSI_INPUT = 0, 442 RKMODULE_DSI_INPUT, 443 }; 444 445 /** 446 * lcnt: line counter 447 * padnum: the pixels of padding row 448 * padpix: the payload of padding 449 * idcd: identification code 450 * efpix: identification code of Effective line 451 * obpix: identification code of OB line 452 */ 453 struct rkmodule_hdr_esp { 454 enum hdr_esp_mode mode; 455 union { 456 struct { 457 __u32 padnum; 458 __u32 padpix; 459 } lcnt; 460 struct { 461 __u32 efpix; 462 __u32 obpix; 463 } idcd; 464 } val; 465 }; 466 467 struct rkmodule_hdr_cfg { 468 __u32 hdr_mode; 469 struct rkmodule_hdr_esp esp; 470 struct rkmodule_hdr_compr compr; 471 } __attribute__ ((packed)); 472 473 /* sensor lvds sync code 474 * sav: start of active video codes 475 * eav: end of active video codes 476 */ 477 struct rkmodule_sync_code { 478 __u16 sav; 479 __u16 eav; 480 }; 481 482 /* sensor lvds difference sync code mode 483 * LS_FIRST: valid line ls-le or sav-eav 484 * invalid line fs-fe or sav-eav 485 * FS_FIRST: valid line fs-le 486 * invalid line ls-fe 487 * ls: line start 488 * le: line end 489 * fs: frame start 490 * fe: frame end 491 * SONY_DOL_HDR_1: sony dol hdr pattern 1 492 * SONY_DOL_HDR_2: sony dol hdr pattern 2 493 */ 494 enum rkmodule_lvds_mode { 495 LS_FIRST = 0, 496 FS_FIRST, 497 SONY_DOL_HDR_1, 498 SONY_DOL_HDR_2 499 }; 500 501 /* sync code of different frame type (hdr or linear) for lvds 502 * act: valid line sync code 503 * blk: invalid line sync code 504 */ 505 struct rkmodule_lvds_frm_sync_code { 506 struct rkmodule_sync_code act; 507 struct rkmodule_sync_code blk; 508 }; 509 510 /* sync code for lvds of sensor 511 * odd_sync_code: sync code of odd frame id for lvds of sony sensor 512 * even_sync_code: sync code of even frame id for lvds of sony sensor 513 */ 514 struct rkmodule_lvds_frame_sync_code { 515 struct rkmodule_lvds_frm_sync_code odd_sync_code; 516 struct rkmodule_lvds_frm_sync_code even_sync_code; 517 }; 518 519 /* lvds sync code category of sensor for different operation */ 520 enum rkmodule_lvds_sync_code_group { 521 LVDS_CODE_GRP_LINEAR = 0x0, 522 LVDS_CODE_GRP_LONG, 523 LVDS_CODE_GRP_MEDIUM, 524 LVDS_CODE_GRP_SHORT, 525 LVDS_CODE_GRP_MAX 526 }; 527 528 /* struct rkmodule_lvds_cfg 529 * frm_sync_code[index]: 530 * index == LVDS_CODE_GRP_LONG: 531 * sync code for frame of linear mode or for long frame of hdr mode 532 * index == LVDS_CODE_GRP_MEDIUM: 533 * sync code for medium long frame of hdr mode 534 * index == LVDS_CODE_GRP_SHOR: 535 * sync code for short long frame of hdr mode 536 */ 537 struct rkmodule_lvds_cfg { 538 enum rkmodule_lvds_mode mode; 539 struct rkmodule_lvds_frame_sync_code frm_sync_code[LVDS_CODE_GRP_MAX]; 540 } __attribute__ ((packed)); 541 542 /** 543 * struct rkmodule_dpcc_cfg 544 * enable: 0 -> disable dpcc, 1 -> enable multiple, 545 * 2 -> enable single, 3 -> enable all; 546 * cur_single_dpcc: the strength of single dpcc; 547 * cur_multiple_dpcc: the strength of multiple dpcc; 548 * total_dpcc: the max strength; 549 */ 550 struct rkmodule_dpcc_cfg { 551 __u32 enable; 552 __u32 cur_single_dpcc; 553 __u32 cur_multiple_dpcc; 554 __u32 total_dpcc; 555 } __attribute__ ((packed)); 556 557 /** 558 * nr switch by gain 559 * direct: 0 -> up_thres LSNR to HSNR, 1 -> up_thres HSNR to LSNR 560 * up_thres: threshold of nr change from low gain to high gain 561 * down_thres: threshold of nr change from high gain to low gain; 562 * div_coeff: Coefficients converted from float to int 563 */ 564 struct rkmodule_nr_switch_threshold { 565 __u32 direct; 566 __u32 up_thres; 567 __u32 down_thres; 568 __u32 div_coeff; 569 } __attribute__ ((packed)); 570 571 /** 572 * enum rkmodule_bt656_intf_type 573 * to support sony bt656 raw 574 */ 575 enum rkmodule_bt656_intf_type { 576 BT656_STD_RAW = 0, 577 BT656_SONY_RAW, 578 }; 579 580 /** 581 * struct rkmodule_vc_fmt_info - virtual channels fmt info 582 * 583 */ 584 struct rkmodule_vc_fmt_info { 585 __u32 width[RKMODULE_MAX_VC_CH]; 586 __u32 height[RKMODULE_MAX_VC_CH]; 587 __u32 fps[RKMODULE_MAX_VC_CH]; 588 } __attribute__ ((packed)); 589 590 /** 591 * struct rkmodule_vc_hotplug_info - virtual channels hotplug status info 592 * detect_status: hotplug status 593 * bit 0~3 means channels id, value : 0 -> plug out, 1 -> plug in. 594 */ 595 struct rkmodule_vc_hotplug_info { 596 __u8 detect_status; 597 } __attribute__ ((packed)); 598 599 600 /* sensor start stream sequence 601 * RKMODULE_START_STREAM_DEFAULT: by default 602 * RKMODULE_START_STREAM_BEHIND : sensor start stream should be behind the controller 603 * RKMODULE_START_STREAM_FRONT : sensor start stream should be in front of the controller 604 */ 605 enum rkmodule_start_stream_seq { 606 RKMODULE_START_STREAM_DEFAULT = 0, 607 RKMODULE_START_STREAM_BEHIND, 608 RKMODULE_START_STREAM_FRONT, 609 }; 610 611 /* 612 * HDMI to MIPI-CSI MODE IOCTL 613 */ 614 enum rkmodule_hdmiin_mode_seq { 615 RKMODULE_HDMIIN_DEFAULT = 0, 616 RKMODULE_HDMIIN_MODE, 617 }; 618 /* 619 * the causation to do cif reset work 620 */ 621 enum rkmodule_reset_src { 622 RKCIF_RESET_SRC_NON = 0x0, 623 RKCIF_RESET_SRC_ERR_CSI2, 624 RKCIF_RESET_SRC_ERR_LVDS, 625 RKICF_RESET_SRC_ERR_CUTOFF, 626 RKCIF_RESET_SRC_ERR_HOTPLUG, 627 RKCIF_RESET_SRC_ERR_APP, 628 }; 629 630 struct rkmodule_vicap_reset_info { 631 __u32 is_reset; 632 enum rkmodule_reset_src src; 633 } __attribute__ ((packed)); 634 635 struct rkmodule_bt656_mbus_info { 636 __u32 flags; 637 __u32 id_en_bits; 638 } __attribute__ ((packed)); 639 640 /* DCG ratio (float) = integer + decimal / div_coeff */ 641 struct rkmodule_dcg_ratio { 642 __u32 integer; 643 __u32 decimal; 644 __u32 div_coeff; 645 }; 646 647 struct rkmodule_channel_info { 648 __u32 index; 649 __u32 vc; 650 __u32 width; 651 __u32 height; 652 __u32 bus_fmt; 653 __u32 data_type; 654 __u32 data_bit; 655 } __attribute__ ((packed)); 656 657 /* 658 * link to vicap 659 * linear mode: pad0~pad3 for id0~id3; 660 * 661 * HDR_X2: id0 fiexd to vc0 for long frame 662 * id1 fixed to vc1 for short frame; 663 * id2~id3 reserved, can config by PAD2~PAD3 664 * 665 * HDR_X3: id0 fiexd to vc0 for long frame 666 * id1 fixed to vc1 for middle frame 667 * id2 fixed to vc2 for short frame; 668 * id3 reserved, can config by PAD3 669 * 670 * link to isp, the connection relationship is as follows 671 */ 672 enum rkmodule_max_pad { 673 PAD0, /* link to isp */ 674 PAD1, /* link to csi wr0 | hdr x2:L x3:M */ 675 PAD2, /* link to csi wr1 | hdr x3:L */ 676 PAD3, /* link to csi wr2 | hdr x2:M x3:S */ 677 PAD_MAX, 678 }; 679 680 /* 681 * sensor exposure sync mode 682 */ 683 enum rkmodule_sync_mode { 684 NO_SYNC_MODE = 0, 685 EXTERNAL_MASTER_MODE, 686 INTERNAL_MASTER_MODE, 687 SLAVE_MODE, 688 }; 689 690 struct rkmodule_mclk_data { 691 u32 enable; 692 u32 mclk_index; 693 u32 mclk_rate; 694 u32 reserved[8]; 695 }; 696 697 /* 698 * csi dphy param 699 * lp_vol_ref -> Reference voltage-645mV for LP Function control pin 700 * for rk3588 dcphy 701 * 3'b000 : 605mV 702 * 3'b001 : 625mV 703 * 3'b010 : 635mV 704 * 3'b011 : 645mV 705 * 3'b100 : 655mV 706 * 3'b101 : 665mV 707 * 3'b110 : 685mV 708 * 3'b111 : 725mV 709 * 710 * lp_hys_sw -> LP-RX Hysteresis Level Control 711 * for rk3588 dcphy 712 * 2'b00=45mV 713 * 2'b01=65mV 714 * 2'b10=85mV 715 * 2'b11=100mV 716 * 717 * lp_escclk_pol_sel -> LP ESCCLK Polarity sel 718 * for rk3588 dcphy 719 * 1'b0: normal 720 * 1'b1: swap ,Increase 1ns delay 721 * 722 * skew_data_cal_clk -> Skew Calibration Manual Data Fine Delay Control Register 723 * for rk3588 dcphy 724 * BIT[4:0] 30ps a step 725 * 726 * clk_hs_term_sel/data_hs_term_sel -> HS-RX Termination Impedance Control 727 * for rk3588 dcphy 728 * 3b'000 : 102Ω 729 * 3b'001 : 99.1Ω 730 * 3b'010 : 96.6Ω (default) 731 * 3b'011 : 94.1Ω 732 * 3b'100 : 113Ω 733 * 3b'101 : 110Ω 734 * 3b'110 : 107Ω 735 * 3b'111 : 104Ω 736 */ 737 738 enum csi2_dphy_vendor { 739 PHY_VENDOR_INNO = 0x0, 740 PHY_VENDOR_SAMSUNG = 0x01, 741 }; 742 743 struct rkmodule_csi_dphy_param { 744 u32 vendor; 745 u32 lp_vol_ref; 746 u32 lp_hys_sw[DPHY_MAX_LANE]; 747 u32 lp_escclk_pol_sel[DPHY_MAX_LANE]; 748 u32 skew_data_cal_clk[DPHY_MAX_LANE]; 749 u32 clk_hs_term_sel; 750 u32 data_hs_term_sel[DPHY_MAX_LANE]; 751 u32 reserved[32]; 752 }; 753 754 struct rkmodule_sensor_fmt { 755 __u32 sensor_index; 756 __u32 sensor_width; 757 __u32 sensor_height; 758 }; 759 760 struct rkmodule_sensor_infos { 761 struct rkmodule_sensor_fmt sensor_fmt[RKMODULE_MAX_SENSOR_NUM]; 762 }; 763 764 #endif /* _UAPI_RKMODULE_CAMERA_H */ 765