1 /*
2 * Copyright (c) 2021-2022 Rockchip Eletronics Co., Ltd.
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16 #include "Isp32Params.h"
17
18 namespace RkCam {
19
20 #define ISP2X_WBGAIN_FIXSCALE_BIT 8
21 #define ISP3X_WBGAIN_INTSCALE_BIT 8
22
23
convertAiqAwbGainToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,const rk_aiq_wb_gain_v32_t & awb_gain,bool awb_gain_update)24 void Isp32Params::convertAiqAwbGainToIsp32Params(struct isp32_isp_params_cfg& isp_cfg,
25 const rk_aiq_wb_gain_v32_t& awb_gain, bool awb_gain_update)
26 {
27 #if RKAIQ_HAVE_AWB_V32
28 if(awb_gain_update) {
29 isp_cfg.module_ens |= 1LL << RK_ISP2X_AWB_GAIN_ID;
30 isp_cfg.module_cfg_update |= 1LL << RK_ISP2X_AWB_GAIN_ID;
31 isp_cfg.module_en_update |= 1LL << RK_ISP2X_AWB_GAIN_ID;
32 } else {
33 return;
34 }
35
36 struct isp32_awb_gain_cfg * cfg = &isp_cfg.others.awb_gain_cfg;
37 uint16_t max_wb_gain = (1 << (ISP2X_WBGAIN_FIXSCALE_BIT + 3)) - 1;
38 rk_aiq_wb_gain_v32_t awb_gain1 = awb_gain;
39 #if 0 //to do
40 if(blc != nullptr && blc->v0.enable) {
41 awb_gain1.bgain *= (float)((1 << ISP2X_BLC_BIT_MAX) - 1) / ((1 << ISP2X_BLC_BIT_MAX) - 1 - blc->v0.blc_b);
42 awb_gain1.gbgain *= (float)((1 << ISP2X_BLC_BIT_MAX) - 1) / ((1 << ISP2X_BLC_BIT_MAX) - 1 - blc->v0.blc_gb);
43 awb_gain1.rgain *= (float)((1 << ISP2X_BLC_BIT_MAX) - 1) / ((1 << ISP2X_BLC_BIT_MAX) - 1 - blc->v0.blc_r);
44 awb_gain1.grgain *= (float)((1 << ISP2X_BLC_BIT_MAX) - 1) / ((1 << ISP2X_BLC_BIT_MAX) - 1 - blc->v0.blc_gr);
45 }
46 #endif
47 uint16_t R = (uint16_t)(0.5 + awb_gain1.rgain * (1 << ISP2X_WBGAIN_FIXSCALE_BIT));
48 uint16_t B = (uint16_t)(0.5 + awb_gain1.bgain * (1 << ISP2X_WBGAIN_FIXSCALE_BIT));
49 uint16_t Gr = (uint16_t)(0.5 + awb_gain1.grgain * (1 << ISP2X_WBGAIN_FIXSCALE_BIT));
50 uint16_t Gb = (uint16_t)(0.5 + awb_gain1.gbgain * (1 << ISP2X_WBGAIN_FIXSCALE_BIT));
51 if(awb_gain.applyPosition == IN_AWBGAIN0) {
52 cfg->gain0_red = R > max_wb_gain ? max_wb_gain : R;
53 cfg->gain0_blue = B > max_wb_gain ? max_wb_gain : B;
54 cfg->gain0_green_r = Gr > max_wb_gain ? max_wb_gain : Gr ;
55 cfg->gain0_green_b = Gb > max_wb_gain ? max_wb_gain : Gb;
56 cfg->gain1_red = R > max_wb_gain ? max_wb_gain : R;
57 cfg->gain1_blue = B > max_wb_gain ? max_wb_gain : B;
58 cfg->gain1_green_r = Gr > max_wb_gain ? max_wb_gain : Gr ;
59 cfg->gain1_green_b = Gb > max_wb_gain ? max_wb_gain : Gb;
60 cfg->gain2_red = R > max_wb_gain ? max_wb_gain : R;
61 cfg->gain2_blue = B > max_wb_gain ? max_wb_gain : B;
62 cfg->gain2_green_r = Gr > max_wb_gain ? max_wb_gain : Gr ;
63 cfg->gain2_green_b = Gb > max_wb_gain ? max_wb_gain : Gb;
64 cfg->awb1_gain_r = (1 << ISP2X_WBGAIN_FIXSCALE_BIT);
65 cfg->awb1_gain_b = (1 << ISP2X_WBGAIN_FIXSCALE_BIT);
66 cfg->awb1_gain_gr = (1 << ISP2X_WBGAIN_FIXSCALE_BIT);
67 cfg->awb1_gain_gb = (1 << ISP2X_WBGAIN_FIXSCALE_BIT);
68 } else {
69 cfg->gain0_red = (1 << ISP2X_WBGAIN_FIXSCALE_BIT);
70 cfg->gain0_blue = (1 << ISP2X_WBGAIN_FIXSCALE_BIT);
71 cfg->gain0_green_r = (1 << ISP2X_WBGAIN_FIXSCALE_BIT);
72 cfg->gain0_green_b = (1 << ISP2X_WBGAIN_FIXSCALE_BIT);
73 cfg->gain1_red = (1 << ISP2X_WBGAIN_FIXSCALE_BIT);
74 cfg->gain1_blue = (1 << ISP2X_WBGAIN_FIXSCALE_BIT);
75 cfg->gain1_green_r = (1 << ISP2X_WBGAIN_FIXSCALE_BIT);
76 cfg->gain1_green_b = (1 << ISP2X_WBGAIN_FIXSCALE_BIT);
77 cfg->gain2_red = (1 << ISP2X_WBGAIN_FIXSCALE_BIT);
78 cfg->gain2_blue = (1 << ISP2X_WBGAIN_FIXSCALE_BIT);
79 cfg->gain2_green_r = (1 << ISP2X_WBGAIN_FIXSCALE_BIT);
80 cfg->gain2_green_b = (1 << ISP2X_WBGAIN_FIXSCALE_BIT);
81 cfg->awb1_gain_r = R > max_wb_gain ? max_wb_gain : R;
82 cfg->awb1_gain_b = B > max_wb_gain ? max_wb_gain : B;
83 cfg->awb1_gain_gr = Gr > max_wb_gain ? max_wb_gain : Gr;
84 cfg->awb1_gain_gb = Gb > max_wb_gain ? max_wb_gain : Gb;
85 }
86 #endif
87 #if RKAIQ_HAVE_AWB_V32
88 mLatestWbGainCfg = *cfg;
89 #endif
90 }
91
92 #if RKAIQ_HAVE_AWB_V32
WriteAwbReg(struct isp32_rawawb_meas_cfg * awb_cfg_v32)93 static void WriteAwbReg(struct isp32_rawawb_meas_cfg* awb_cfg_v32)
94 {
95 #if 0
96 char fName[100];
97 sprintf(fName, "./tmp/awb_reg.txt");
98 LOGE_AWB( "%s", fName);
99
100 FILE* fp = fopen(fName, "wb");
101 if(fp == NULL){
102 return;
103 }
104 //fprintf(fp, "\t\tsw_rawawb_en = 0x%0x (%d)\n", awb_cfg_v32->en ,awb_cfg_v32->en);
105 fprintf(fp, "\t\tsw_rawawb_uv_en0 = 0x%0x (%d)\n", awb_cfg_v32->uv_en0 ,awb_cfg_v32->uv_en0);
106 fprintf(fp, "\t\tsw_rawawb_xy_en0 = 0x%0x (%d)\n", awb_cfg_v32->xy_en0 ,awb_cfg_v32->xy_en0);
107 fprintf(fp, "\t\tsw_rawawb_yuv3d_en0 = 0x%0x (%d)\n", awb_cfg_v32->yuv3d_en0 ,awb_cfg_v32->yuv3d_en0);
108 fprintf(fp, "\t\tsw_rawawb_yuv3d_ls_idx0 = 0x%0x (%d)\n", awb_cfg_v32->yuv3d_ls_idx0 ,awb_cfg_v32->yuv3d_ls_idx0);
109 fprintf(fp, "\t\tsw_rawawb_yuv3d_ls_idx1 = 0x%0x (%d)\n", awb_cfg_v32->yuv3d_ls_idx1 ,awb_cfg_v32->yuv3d_ls_idx1);
110 fprintf(fp, "\t\tsw_rawawb_yuv3d_ls_idx2 = 0x%0x (%d)\n", awb_cfg_v32->yuv3d_ls_idx2 ,awb_cfg_v32->yuv3d_ls_idx2);
111 fprintf(fp, "\t\tsw_rawawb_yuv3d_ls_idx3 = 0x%0x (%d)\n", awb_cfg_v32->yuv3d_ls_idx3 ,awb_cfg_v32->yuv3d_ls_idx3);
112 fprintf(fp, "\t\tsw_rawawb_in_rshift_to_12bit_en = 0x%0x (%d)\n", awb_cfg_v32->in_rshift_to_12bit_en ,awb_cfg_v32->in_rshift_to_12bit_en);
113 fprintf(fp, "\t\tsw_rawawb_in_overexposure_check_en = 0x%0x (%d)\n", awb_cfg_v32->in_overexposure_check_en ,awb_cfg_v32->in_overexposure_check_en);
114 fprintf(fp, "\t\tsw_rawawb_wind_size = 0x%0x (%d)\n", awb_cfg_v32->wind_size ,awb_cfg_v32->wind_size);
115 fprintf(fp, "\t\tsw_rawlsc_bypass_en = 0x%0x (%d)\n", awb_cfg_v32->rawlsc_bypass_en ,awb_cfg_v32->rawlsc_bypass_en);
116 fprintf(fp, "\t\tsw_rawawb_light_num = 0x%0x (%d)\n", awb_cfg_v32->light_num ,awb_cfg_v32->light_num);
117 //fprintf(fp, "\t\tsw_rawawb_2ddr_path_en = 0x%0x (%d)\n", awb_cfg_v32->2ddr_path_en ,awb_cfg_v32->2ddr_path_en);
118 fprintf(fp, "\t\tsw_rawawb_uv_en1 = 0x%0x (%d)\n", awb_cfg_v32->uv_en1 ,awb_cfg_v32->uv_en1);
119 fprintf(fp, "\t\tsw_rawawb_xy_en1 = 0x%0x (%d)\n", awb_cfg_v32->xy_en1 ,awb_cfg_v32->xy_en1);
120 fprintf(fp, "\t\tsw_rawawb_yuv3d_en1 = 0x%0x (%d)\n", awb_cfg_v32->yuv3d_en1 ,awb_cfg_v32->yuv3d_en1);
121 //fprintf(fp, "\t\tsw_rawawb_2ddr_path_sel = 0x%0x (%d)\n", awb_cfg_v32->2ddr_path_sel ,awb_cfg_v32->2ddr_path_sel);
122 fprintf(fp, "\t\tsw_rawawbin_low12bit_val = 0x%0x (%d)\n", awb_cfg_v32->low12bit_val ,awb_cfg_v32->low12bit_val);
123 fprintf(fp, "\t\tsw_rawawb_blk_measure_en = 0x%0x (%d)\n", awb_cfg_v32->blk_measure_enable ,awb_cfg_v32->blk_measure_enable);
124 fprintf(fp, "\t\tsw_rawawb_blk_measure_mode = 0x%0x (%d)\n", awb_cfg_v32->blk_measure_mode ,awb_cfg_v32->blk_measure_mode);
125 fprintf(fp, "\t\tsw_rawawb_blk_measure_xytype = 0x%0x (%d)\n", awb_cfg_v32->blk_measure_xytype ,awb_cfg_v32->blk_measure_xytype);
126 fprintf(fp, "\t\tsw_rawawb_blk_rtdw_measure_en = 0x%0x (%d)\n", awb_cfg_v32->blk_rtdw_measure_en ,awb_cfg_v32->blk_rtdw_measure_en);
127 fprintf(fp, "\t\tsw_rawawb_blk_measure_illu_idx = 0x%0x (%d)\n", awb_cfg_v32->blk_measure_illu_idx ,awb_cfg_v32->blk_measure_illu_idx);
128 fprintf(fp, "\t\tsw_rawawb_ds16x8_mode_en = 0x%0x (%d)\n", awb_cfg_v32->ds16x8_mode_en ,awb_cfg_v32->ds16x8_mode_en);
129 fprintf(fp, "\t\tsw_rawawb_blk_with_luma_wei_en = 0x%0x (%d)\n", awb_cfg_v32->blk_with_luma_wei_en ,awb_cfg_v32->blk_with_luma_wei_en);
130 fprintf(fp, "\t\tsw_rawawb_in_overexposure_threshold = 0x%0x (%d)\n", awb_cfg_v32->in_overexposure_threshold ,awb_cfg_v32->in_overexposure_threshold);
131 fprintf(fp, "\t\tsw_rawawb_h_offs = 0x%0x (%d)\n", awb_cfg_v32->h_offs ,awb_cfg_v32->h_offs);
132 fprintf(fp, "\t\tsw_rawawb_v_offs = 0x%0x (%d)\n", awb_cfg_v32->v_offs ,awb_cfg_v32->v_offs);
133 fprintf(fp, "\t\tsw_rawawb_h_size = 0x%0x (%d)\n", awb_cfg_v32->h_size ,awb_cfg_v32->h_size);
134 fprintf(fp, "\t\tsw_rawawb_v_size = 0x%0x (%d)\n", awb_cfg_v32->v_size ,awb_cfg_v32->v_size);
135 fprintf(fp, "\t\tsw_rawawb_r_max = 0x%0x (%d)\n", awb_cfg_v32->r_max ,awb_cfg_v32->r_max);
136 fprintf(fp, "\t\tsw_rawawb_g_max = 0x%0x (%d)\n", awb_cfg_v32->g_max ,awb_cfg_v32->g_max);
137 fprintf(fp, "\t\tsw_rawawb_b_max = 0x%0x (%d)\n", awb_cfg_v32->b_max ,awb_cfg_v32->b_max);
138 fprintf(fp, "\t\tsw_rawawb_y_max = 0x%0x (%d)\n", awb_cfg_v32->y_max ,awb_cfg_v32->y_max);
139 fprintf(fp, "\t\tsw_rawawb_r_min = 0x%0x (%d)\n", awb_cfg_v32->r_min ,awb_cfg_v32->r_min);
140 fprintf(fp, "\t\tsw_rawawb_g_min = 0x%0x (%d)\n", awb_cfg_v32->g_min ,awb_cfg_v32->g_min);
141 fprintf(fp, "\t\tsw_rawawb_b_min = 0x%0x (%d)\n", awb_cfg_v32->b_min ,awb_cfg_v32->b_min);
142 fprintf(fp, "\t\tsw_rawawb_y_min = 0x%0x (%d)\n", awb_cfg_v32->y_min ,awb_cfg_v32->y_min);
143 fprintf(fp, "\t\tsw_rawawb_wp_luma_wei_en0 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_wei_en0 ,awb_cfg_v32->wp_luma_wei_en0);
144 fprintf(fp, "\t\tsw_rawawb_wp_luma_wei_en1 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_wei_en1 ,awb_cfg_v32->wp_luma_wei_en1);
145 fprintf(fp, "\t\tsw_rawawb_wp_blk_wei_en0 = 0x%0x (%d)\n", awb_cfg_v32->wp_blk_wei_en0 ,awb_cfg_v32->wp_blk_wei_en0);
146 fprintf(fp, "\t\tsw_rawawb_wp_blk_wei_en1 = 0x%0x (%d)\n", awb_cfg_v32->wp_blk_wei_en1 ,awb_cfg_v32->wp_blk_wei_en1);
147 fprintf(fp, "\t\tsw_rawawb_wp_hist_xytype = 0x%0x (%d)\n", awb_cfg_v32->wp_hist_xytype ,awb_cfg_v32->wp_hist_xytype);
148 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_y0 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_y0 ,awb_cfg_v32->wp_luma_weicurve_y0);
149 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_y1 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_y1 ,awb_cfg_v32->wp_luma_weicurve_y1);
150 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_y2 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_y2 ,awb_cfg_v32->wp_luma_weicurve_y2);
151 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_y3 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_y3 ,awb_cfg_v32->wp_luma_weicurve_y3);
152 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_y4 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_y4 ,awb_cfg_v32->wp_luma_weicurve_y4);
153 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_y5 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_y5 ,awb_cfg_v32->wp_luma_weicurve_y5);
154 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_y6 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_y6 ,awb_cfg_v32->wp_luma_weicurve_y6);
155 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_y7 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_y7 ,awb_cfg_v32->wp_luma_weicurve_y7);
156 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_y8 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_y8 ,awb_cfg_v32->wp_luma_weicurve_y8);
157 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_w0 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_w0 ,awb_cfg_v32->wp_luma_weicurve_w0);
158 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_w1 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_w1 ,awb_cfg_v32->wp_luma_weicurve_w1);
159 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_w2 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_w2 ,awb_cfg_v32->wp_luma_weicurve_w2);
160 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_w3 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_w3 ,awb_cfg_v32->wp_luma_weicurve_w3);
161 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_w4 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_w4 ,awb_cfg_v32->wp_luma_weicurve_w4);
162 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_w5 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_w5 ,awb_cfg_v32->wp_luma_weicurve_w5);
163 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_w6 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_w6 ,awb_cfg_v32->wp_luma_weicurve_w6);
164 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_w7 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_w7 ,awb_cfg_v32->wp_luma_weicurve_w7);
165 fprintf(fp, "\t\tsw_rawawb_wp_luma_weicurve_w8 = 0x%0x (%d)\n", awb_cfg_v32->wp_luma_weicurve_w8 ,awb_cfg_v32->wp_luma_weicurve_w8);
166 fprintf(fp, "\t\tsw_rawawb_pre_wbgain_inv_r = 0x%0x (%d)\n", awb_cfg_v32->pre_wbgain_inv_r ,awb_cfg_v32->pre_wbgain_inv_r);
167 fprintf(fp, "\t\tsw_rawawb_pre_wbgain_inv_g = 0x%0x (%d)\n", awb_cfg_v32->pre_wbgain_inv_g ,awb_cfg_v32->pre_wbgain_inv_g);
168 fprintf(fp, "\t\tsw_rawawb_pre_wbgain_inv_b = 0x%0x (%d)\n", awb_cfg_v32->pre_wbgain_inv_b ,awb_cfg_v32->pre_wbgain_inv_b);
169 fprintf(fp, "\t\tsw_rawawb_vertex0_u_0 = 0x%0x (%d)\n", awb_cfg_v32->vertex0_u_0 ,awb_cfg_v32->vertex0_u_0);
170 fprintf(fp, "\t\tsw_rawawb_vertex0_v_0 = 0x%0x (%d)\n", awb_cfg_v32->vertex0_v_0 ,awb_cfg_v32->vertex0_v_0);
171 fprintf(fp, "\t\tsw_rawawb_vertex1_u_0 = 0x%0x (%d)\n", awb_cfg_v32->vertex1_u_0 ,awb_cfg_v32->vertex1_u_0);
172 fprintf(fp, "\t\tsw_rawawb_vertex1_v_0 = 0x%0x (%d)\n", awb_cfg_v32->vertex1_v_0 ,awb_cfg_v32->vertex1_v_0);
173 fprintf(fp, "\t\tsw_rawawb_vertex2_u_0 = 0x%0x (%d)\n", awb_cfg_v32->vertex2_u_0 ,awb_cfg_v32->vertex2_u_0);
174 fprintf(fp, "\t\tsw_rawawb_vertex2_v_0 = 0x%0x (%d)\n", awb_cfg_v32->vertex2_v_0 ,awb_cfg_v32->vertex2_v_0);
175 fprintf(fp, "\t\tsw_rawawb_vertex3_u_0 = 0x%0x (%d)\n", awb_cfg_v32->vertex3_u_0 ,awb_cfg_v32->vertex3_u_0);
176 fprintf(fp, "\t\tsw_rawawb_vertex3_v_0 = 0x%0x (%d)\n", awb_cfg_v32->vertex3_v_0 ,awb_cfg_v32->vertex3_v_0);
177 fprintf(fp, "\t\tsw_rawawb_islope01_0 = 0x%0x (%d)\n", awb_cfg_v32->islope01_0 ,awb_cfg_v32->islope01_0);
178 fprintf(fp, "\t\tsw_rawawb_islope12_0 = 0x%0x (%d)\n", awb_cfg_v32->islope12_0 ,awb_cfg_v32->islope12_0);
179 fprintf(fp, "\t\tsw_rawawb_islope23_0 = 0x%0x (%d)\n", awb_cfg_v32->islope23_0 ,awb_cfg_v32->islope23_0);
180 fprintf(fp, "\t\tsw_rawawb_islope30_0 = 0x%0x (%d)\n", awb_cfg_v32->islope30_0 ,awb_cfg_v32->islope30_0);
181 fprintf(fp, "\t\tsw_rawawb_vertex0_u_1 = 0x%0x (%d)\n", awb_cfg_v32->vertex0_u_1 ,awb_cfg_v32->vertex0_u_1);
182 fprintf(fp, "\t\tsw_rawawb_vertex0_v_1 = 0x%0x (%d)\n", awb_cfg_v32->vertex0_v_1 ,awb_cfg_v32->vertex0_v_1);
183 fprintf(fp, "\t\tsw_rawawb_vertex1_u_1 = 0x%0x (%d)\n", awb_cfg_v32->vertex1_u_1 ,awb_cfg_v32->vertex1_u_1);
184 fprintf(fp, "\t\tsw_rawawb_vertex1_v_1 = 0x%0x (%d)\n", awb_cfg_v32->vertex1_v_1 ,awb_cfg_v32->vertex1_v_1);
185 fprintf(fp, "\t\tsw_rawawb_vertex2_u_1 = 0x%0x (%d)\n", awb_cfg_v32->vertex2_u_1 ,awb_cfg_v32->vertex2_u_1);
186 fprintf(fp, "\t\tsw_rawawb_vertex2_v_1 = 0x%0x (%d)\n", awb_cfg_v32->vertex2_v_1 ,awb_cfg_v32->vertex2_v_1);
187 fprintf(fp, "\t\tsw_rawawb_vertex3_u_1 = 0x%0x (%d)\n", awb_cfg_v32->vertex3_u_1 ,awb_cfg_v32->vertex3_u_1);
188 fprintf(fp, "\t\tsw_rawawb_vertex3_v_1 = 0x%0x (%d)\n", awb_cfg_v32->vertex3_v_1 ,awb_cfg_v32->vertex3_v_1);
189 fprintf(fp, "\t\tsw_rawawb_islope01_1 = 0x%0x (%d)\n", awb_cfg_v32->islope01_1 ,awb_cfg_v32->islope01_1);
190 fprintf(fp, "\t\tsw_rawawb_islope12_1 = 0x%0x (%d)\n", awb_cfg_v32->islope12_1 ,awb_cfg_v32->islope12_1);
191 fprintf(fp, "\t\tsw_rawawb_islope23_1 = 0x%0x (%d)\n", awb_cfg_v32->islope23_1 ,awb_cfg_v32->islope23_1);
192 fprintf(fp, "\t\tsw_rawawb_islope30_1 = 0x%0x (%d)\n", awb_cfg_v32->islope30_1 ,awb_cfg_v32->islope30_1);
193 fprintf(fp, "\t\tsw_rawawb_vertex0_u_2 = 0x%0x (%d)\n", awb_cfg_v32->vertex0_u_2 ,awb_cfg_v32->vertex0_u_2);
194 fprintf(fp, "\t\tsw_rawawb_vertex0_v_2 = 0x%0x (%d)\n", awb_cfg_v32->vertex0_v_2 ,awb_cfg_v32->vertex0_v_2);
195 fprintf(fp, "\t\tsw_rawawb_vertex1_u_2 = 0x%0x (%d)\n", awb_cfg_v32->vertex1_u_2 ,awb_cfg_v32->vertex1_u_2);
196 fprintf(fp, "\t\tsw_rawawb_vertex1_v_2 = 0x%0x (%d)\n", awb_cfg_v32->vertex1_v_2 ,awb_cfg_v32->vertex1_v_2);
197 fprintf(fp, "\t\tsw_rawawb_vertex2_u_2 = 0x%0x (%d)\n", awb_cfg_v32->vertex2_u_2 ,awb_cfg_v32->vertex2_u_2);
198 fprintf(fp, "\t\tsw_rawawb_vertex2_v_2 = 0x%0x (%d)\n", awb_cfg_v32->vertex2_v_2 ,awb_cfg_v32->vertex2_v_2);
199 fprintf(fp, "\t\tsw_rawawb_vertex3_u_2 = 0x%0x (%d)\n", awb_cfg_v32->vertex3_u_2 ,awb_cfg_v32->vertex3_u_2);
200 fprintf(fp, "\t\tsw_rawawb_vertex3_v_2 = 0x%0x (%d)\n", awb_cfg_v32->vertex3_v_2 ,awb_cfg_v32->vertex3_v_2);
201 fprintf(fp, "\t\tsw_rawawb_islope01_2 = 0x%0x (%d)\n", awb_cfg_v32->islope01_2 ,awb_cfg_v32->islope01_2);
202 fprintf(fp, "\t\tsw_rawawb_islope12_2 = 0x%0x (%d)\n", awb_cfg_v32->islope12_2 ,awb_cfg_v32->islope12_2);
203 fprintf(fp, "\t\tsw_rawawb_islope23_2 = 0x%0x (%d)\n", awb_cfg_v32->islope23_2 ,awb_cfg_v32->islope23_2);
204 fprintf(fp, "\t\tsw_rawawb_islope30_2 = 0x%0x (%d)\n", awb_cfg_v32->islope30_2 ,awb_cfg_v32->islope30_2);
205 fprintf(fp, "\t\tsw_rawawb_vertex0_u_3 = 0x%0x (%d)\n", awb_cfg_v32->vertex0_u_3 ,awb_cfg_v32->vertex0_u_3);
206 fprintf(fp, "\t\tsw_rawawb_vertex0_v_3 = 0x%0x (%d)\n", awb_cfg_v32->vertex0_v_3 ,awb_cfg_v32->vertex0_v_3);
207 fprintf(fp, "\t\tsw_rawawb_vertex1_u_3 = 0x%0x (%d)\n", awb_cfg_v32->vertex1_u_3 ,awb_cfg_v32->vertex1_u_3);
208 fprintf(fp, "\t\tsw_rawawb_vertex1_v_3 = 0x%0x (%d)\n", awb_cfg_v32->vertex1_v_3 ,awb_cfg_v32->vertex1_v_3);
209 fprintf(fp, "\t\tsw_rawawb_vertex2_u_3 = 0x%0x (%d)\n", awb_cfg_v32->vertex2_u_3 ,awb_cfg_v32->vertex2_u_3);
210 fprintf(fp, "\t\tsw_rawawb_vertex2_v_3 = 0x%0x (%d)\n", awb_cfg_v32->vertex2_v_3 ,awb_cfg_v32->vertex2_v_3);
211 fprintf(fp, "\t\tsw_rawawb_vertex3_u_3 = 0x%0x (%d)\n", awb_cfg_v32->vertex3_u_3 ,awb_cfg_v32->vertex3_u_3);
212 fprintf(fp, "\t\tsw_rawawb_vertex3_v_3 = 0x%0x (%d)\n", awb_cfg_v32->vertex3_v_3 ,awb_cfg_v32->vertex3_v_3);
213 fprintf(fp, "\t\tsw_rawawb_islope01_3 = 0x%0x (%d)\n", awb_cfg_v32->islope01_3 ,awb_cfg_v32->islope01_3);
214 fprintf(fp, "\t\tsw_rawawb_islope12_3 = 0x%0x (%d)\n", awb_cfg_v32->islope12_3 ,awb_cfg_v32->islope12_3);
215 fprintf(fp, "\t\tsw_rawawb_islope23_3 = 0x%0x (%d)\n", awb_cfg_v32->islope23_3 ,awb_cfg_v32->islope23_3);
216 fprintf(fp, "\t\tsw_rawawb_islope30_3 = 0x%0x (%d)\n", awb_cfg_v32->islope30_3 ,awb_cfg_v32->islope30_3);
217 fprintf(fp, "\t\tsw_rawawb_rgb2ryuvmat0_y = 0x%0x (%d)\n", awb_cfg_v32->rgb2ryuvmat0_y ,awb_cfg_v32->rgb2ryuvmat0_y);
218 fprintf(fp, "\t\tsw_rawawb_rgb2ryuvmat1_y = 0x%0x (%d)\n", awb_cfg_v32->rgb2ryuvmat1_y ,awb_cfg_v32->rgb2ryuvmat1_y);
219 fprintf(fp, "\t\tsw_rawawb_rgb2ryuvmat2_y = 0x%0x (%d)\n", awb_cfg_v32->rgb2ryuvmat2_y ,awb_cfg_v32->rgb2ryuvmat2_y);
220 fprintf(fp, "\t\tsw_rawawb_rgb2ryuvofs_y = 0x%0x (%d)\n", awb_cfg_v32->rgb2ryuvofs_y ,awb_cfg_v32->rgb2ryuvofs_y);
221 fprintf(fp, "\t\tsw_rawawb_rgb2ryuvmat0_u = 0x%0x (%d)\n", awb_cfg_v32->rgb2ryuvmat0_u ,awb_cfg_v32->rgb2ryuvmat0_u);
222 fprintf(fp, "\t\tsw_rawawb_rgb2ryuvmat1_u = 0x%0x (%d)\n", awb_cfg_v32->rgb2ryuvmat1_u ,awb_cfg_v32->rgb2ryuvmat1_u);
223 fprintf(fp, "\t\tsw_rawawb_rgb2ryuvmat2_u = 0x%0x (%d)\n", awb_cfg_v32->rgb2ryuvmat2_u ,awb_cfg_v32->rgb2ryuvmat2_u);
224 fprintf(fp, "\t\tsw_rawawb_rgb2ryuvofs_u = 0x%0x (%d)\n", awb_cfg_v32->rgb2ryuvofs_u ,awb_cfg_v32->rgb2ryuvofs_u);
225 fprintf(fp, "\t\tsw_rawawb_rgb2ryuvmat0_v = 0x%0x (%d)\n", awb_cfg_v32->rgb2ryuvmat0_v ,awb_cfg_v32->rgb2ryuvmat0_v);
226 fprintf(fp, "\t\tsw_rawawb_rgb2ryuvmat1_v = 0x%0x (%d)\n", awb_cfg_v32->rgb2ryuvmat1_v ,awb_cfg_v32->rgb2ryuvmat1_v);
227 fprintf(fp, "\t\tsw_rawawb_rgb2ryuvmat2_v = 0x%0x (%d)\n", awb_cfg_v32->rgb2ryuvmat2_v ,awb_cfg_v32->rgb2ryuvmat2_v);
228 fprintf(fp, "\t\tsw_rawawb_rgb2ryuvofs_v = 0x%0x (%d)\n", awb_cfg_v32->rgb2ryuvofs_v ,awb_cfg_v32->rgb2ryuvofs_v);
229 fprintf(fp, "\t\tsw_rawawb_coor_x1_ls0_y = 0x%0x (%d)\n", awb_cfg_v32->coor_x1_ls0_y ,awb_cfg_v32->coor_x1_ls0_y);
230 fprintf(fp, "\t\tsw_rawawb_vec_x21_ls0_y = 0x%0x (%d)\n", awb_cfg_v32->vec_x21_ls0_y ,awb_cfg_v32->vec_x21_ls0_y);
231 fprintf(fp, "\t\tsw_rawawb_coor_x1_ls0_u = 0x%0x (%d)\n", awb_cfg_v32->coor_x1_ls0_u ,awb_cfg_v32->coor_x1_ls0_u);
232 fprintf(fp, "\t\tsw_rawawb_vec_x21_ls0_u = 0x%0x (%d)\n", awb_cfg_v32->vec_x21_ls0_u ,awb_cfg_v32->vec_x21_ls0_u);
233 fprintf(fp, "\t\tsw_rawawb_coor_x1_ls0_v = 0x%0x (%d)\n", awb_cfg_v32->coor_x1_ls0_v ,awb_cfg_v32->coor_x1_ls0_v);
234 fprintf(fp, "\t\tsw_rawawb_vec_x21_ls0_v = 0x%0x (%d)\n", awb_cfg_v32->vec_x21_ls0_v ,awb_cfg_v32->vec_x21_ls0_v);
235 fprintf(fp, "\t\tsw_rawawb_dis_x1x2_ls0 = 0x%0x (%d)\n", awb_cfg_v32->dis_x1x2_ls0 ,awb_cfg_v32->dis_x1x2_ls0);
236 fprintf(fp, "\t\tsw_rawawb_rotu0_ls0 = 0x%0x (%d)\n", awb_cfg_v32->rotu0_ls0 ,awb_cfg_v32->rotu0_ls0);
237 fprintf(fp, "\t\tsw_rawawb_rotu1_ls0 = 0x%0x (%d)\n", awb_cfg_v32->rotu1_ls0 ,awb_cfg_v32->rotu1_ls0);
238 fprintf(fp, "\t\tsw_rawawb_rotu2_ls0 = 0x%0x (%d)\n", awb_cfg_v32->rotu2_ls0 ,awb_cfg_v32->rotu2_ls0);
239 fprintf(fp, "\t\tsw_rawawb_rotu3_ls0 = 0x%0x (%d)\n", awb_cfg_v32->rotu3_ls0 ,awb_cfg_v32->rotu3_ls0);
240 fprintf(fp, "\t\tsw_rawawb_rotu4_ls0 = 0x%0x (%d)\n", awb_cfg_v32->rotu4_ls0 ,awb_cfg_v32->rotu4_ls0);
241 fprintf(fp, "\t\tsw_rawawb_rotu5_ls0 = 0x%0x (%d)\n", awb_cfg_v32->rotu5_ls0 ,awb_cfg_v32->rotu5_ls0);
242 fprintf(fp, "\t\tsw_rawawb_th0_ls0 = 0x%0x (%d)\n", awb_cfg_v32->th0_ls0 ,awb_cfg_v32->th0_ls0);
243 fprintf(fp, "\t\tsw_rawawb_th1_ls0 = 0x%0x (%d)\n", awb_cfg_v32->th1_ls0 ,awb_cfg_v32->th1_ls0);
244 fprintf(fp, "\t\tsw_rawawb_th2_ls0 = 0x%0x (%d)\n", awb_cfg_v32->th2_ls0 ,awb_cfg_v32->th2_ls0);
245 fprintf(fp, "\t\tsw_rawawb_th3_ls0 = 0x%0x (%d)\n", awb_cfg_v32->th3_ls0 ,awb_cfg_v32->th3_ls0);
246 fprintf(fp, "\t\tsw_rawawb_th4_ls0 = 0x%0x (%d)\n", awb_cfg_v32->th4_ls0 ,awb_cfg_v32->th4_ls0);
247 fprintf(fp, "\t\tsw_rawawb_th5_ls0 = 0x%0x (%d)\n", awb_cfg_v32->th5_ls0 ,awb_cfg_v32->th5_ls0);
248 fprintf(fp, "\t\tsw_rawawb_coor_x1_ls1_y = 0x%0x (%d)\n", awb_cfg_v32->coor_x1_ls1_y ,awb_cfg_v32->coor_x1_ls1_y);
249 fprintf(fp, "\t\tsw_rawawb_vec_x21_ls1_y = 0x%0x (%d)\n", awb_cfg_v32->vec_x21_ls1_y ,awb_cfg_v32->vec_x21_ls1_y);
250 fprintf(fp, "\t\tsw_rawawb_coor_x1_ls1_u = 0x%0x (%d)\n", awb_cfg_v32->coor_x1_ls1_u ,awb_cfg_v32->coor_x1_ls1_u);
251 fprintf(fp, "\t\tsw_rawawb_vec_x21_ls1_u = 0x%0x (%d)\n", awb_cfg_v32->vec_x21_ls1_u ,awb_cfg_v32->vec_x21_ls1_u);
252 fprintf(fp, "\t\tsw_rawawb_coor_x1_ls1_v = 0x%0x (%d)\n", awb_cfg_v32->coor_x1_ls1_v ,awb_cfg_v32->coor_x1_ls1_v);
253 fprintf(fp, "\t\tsw_rawawb_vec_x21_ls1_v = 0x%0x (%d)\n", awb_cfg_v32->vec_x21_ls1_v ,awb_cfg_v32->vec_x21_ls1_v);
254 fprintf(fp, "\t\tsw_rawawb_dis_x1x2_ls1 = 0x%0x (%d)\n", awb_cfg_v32->dis_x1x2_ls1 ,awb_cfg_v32->dis_x1x2_ls1);
255 fprintf(fp, "\t\tsw_rawawb_rotu0_ls1 = 0x%0x (%d)\n", awb_cfg_v32->rotu0_ls1 ,awb_cfg_v32->rotu0_ls1);
256 fprintf(fp, "\t\tsw_rawawb_rotu1_ls1 = 0x%0x (%d)\n", awb_cfg_v32->rotu1_ls1 ,awb_cfg_v32->rotu1_ls1);
257 fprintf(fp, "\t\tsw_rawawb_rotu2_ls1 = 0x%0x (%d)\n", awb_cfg_v32->rotu2_ls1 ,awb_cfg_v32->rotu2_ls1);
258 fprintf(fp, "\t\tsw_rawawb_rotu3_ls1 = 0x%0x (%d)\n", awb_cfg_v32->rotu3_ls1 ,awb_cfg_v32->rotu3_ls1);
259 fprintf(fp, "\t\tsw_rawawb_rotu4_ls1 = 0x%0x (%d)\n", awb_cfg_v32->rotu4_ls1 ,awb_cfg_v32->rotu4_ls1);
260 fprintf(fp, "\t\tsw_rawawb_rotu5_ls1 = 0x%0x (%d)\n", awb_cfg_v32->rotu5_ls1 ,awb_cfg_v32->rotu5_ls1);
261 fprintf(fp, "\t\tsw_rawawb_th0_ls1 = 0x%0x (%d)\n", awb_cfg_v32->th0_ls1 ,awb_cfg_v32->th0_ls1);
262 fprintf(fp, "\t\tsw_rawawb_th1_ls1 = 0x%0x (%d)\n", awb_cfg_v32->th1_ls1 ,awb_cfg_v32->th1_ls1);
263 fprintf(fp, "\t\tsw_rawawb_th2_ls1 = 0x%0x (%d)\n", awb_cfg_v32->th2_ls1 ,awb_cfg_v32->th2_ls1);
264 fprintf(fp, "\t\tsw_rawawb_th3_ls1 = 0x%0x (%d)\n", awb_cfg_v32->th3_ls1 ,awb_cfg_v32->th3_ls1);
265 fprintf(fp, "\t\tsw_rawawb_th4_ls1 = 0x%0x (%d)\n", awb_cfg_v32->th4_ls1 ,awb_cfg_v32->th4_ls1);
266 fprintf(fp, "\t\tsw_rawawb_th5_ls1 = 0x%0x (%d)\n", awb_cfg_v32->th5_ls1 ,awb_cfg_v32->th5_ls1);
267 fprintf(fp, "\t\tsw_rawawb_coor_x1_ls2_y = 0x%0x (%d)\n", awb_cfg_v32->coor_x1_ls2_y ,awb_cfg_v32->coor_x1_ls2_y);
268 fprintf(fp, "\t\tsw_rawawb_vec_x21_ls2_y = 0x%0x (%d)\n", awb_cfg_v32->vec_x21_ls2_y ,awb_cfg_v32->vec_x21_ls2_y);
269 fprintf(fp, "\t\tsw_rawawb_coor_x1_ls2_u = 0x%0x (%d)\n", awb_cfg_v32->coor_x1_ls2_u ,awb_cfg_v32->coor_x1_ls2_u);
270 fprintf(fp, "\t\tsw_rawawb_vec_x21_ls2_u = 0x%0x (%d)\n", awb_cfg_v32->vec_x21_ls2_u ,awb_cfg_v32->vec_x21_ls2_u);
271 fprintf(fp, "\t\tsw_rawawb_coor_x1_ls2_v = 0x%0x (%d)\n", awb_cfg_v32->coor_x1_ls2_v ,awb_cfg_v32->coor_x1_ls2_v);
272 fprintf(fp, "\t\tsw_rawawb_vec_x21_ls2_v = 0x%0x (%d)\n", awb_cfg_v32->vec_x21_ls2_v ,awb_cfg_v32->vec_x21_ls2_v);
273 fprintf(fp, "\t\tsw_rawawb_dis_x1x2_ls2 = 0x%0x (%d)\n", awb_cfg_v32->dis_x1x2_ls2 ,awb_cfg_v32->dis_x1x2_ls2);
274 fprintf(fp, "\t\tsw_rawawb_rotu0_ls2 = 0x%0x (%d)\n", awb_cfg_v32->rotu0_ls2 ,awb_cfg_v32->rotu0_ls2);
275 fprintf(fp, "\t\tsw_rawawb_rotu1_ls2 = 0x%0x (%d)\n", awb_cfg_v32->rotu1_ls2 ,awb_cfg_v32->rotu1_ls2);
276 fprintf(fp, "\t\tsw_rawawb_rotu2_ls2 = 0x%0x (%d)\n", awb_cfg_v32->rotu2_ls2 ,awb_cfg_v32->rotu2_ls2);
277 fprintf(fp, "\t\tsw_rawawb_rotu3_ls2 = 0x%0x (%d)\n", awb_cfg_v32->rotu3_ls2 ,awb_cfg_v32->rotu3_ls2);
278 fprintf(fp, "\t\tsw_rawawb_rotu4_ls2 = 0x%0x (%d)\n", awb_cfg_v32->rotu4_ls2 ,awb_cfg_v32->rotu4_ls2);
279 fprintf(fp, "\t\tsw_rawawb_rotu5_ls2 = 0x%0x (%d)\n", awb_cfg_v32->rotu5_ls2 ,awb_cfg_v32->rotu5_ls2);
280 fprintf(fp, "\t\tsw_rawawb_th0_ls2 = 0x%0x (%d)\n", awb_cfg_v32->th0_ls2 ,awb_cfg_v32->th0_ls2);
281 fprintf(fp, "\t\tsw_rawawb_th1_ls2 = 0x%0x (%d)\n", awb_cfg_v32->th1_ls2 ,awb_cfg_v32->th1_ls2);
282 fprintf(fp, "\t\tsw_rawawb_th2_ls2 = 0x%0x (%d)\n", awb_cfg_v32->th2_ls2 ,awb_cfg_v32->th2_ls2);
283 fprintf(fp, "\t\tsw_rawawb_th3_ls2 = 0x%0x (%d)\n", awb_cfg_v32->th3_ls2 ,awb_cfg_v32->th3_ls2);
284 fprintf(fp, "\t\tsw_rawawb_th4_ls2 = 0x%0x (%d)\n", awb_cfg_v32->th4_ls2 ,awb_cfg_v32->th4_ls2);
285 fprintf(fp, "\t\tsw_rawawb_th5_ls2 = 0x%0x (%d)\n", awb_cfg_v32->th5_ls2 ,awb_cfg_v32->th5_ls2);
286 fprintf(fp, "\t\tsw_rawawb_coor_x1_ls3_y = 0x%0x (%d)\n", awb_cfg_v32->coor_x1_ls3_y ,awb_cfg_v32->coor_x1_ls3_y);
287 fprintf(fp, "\t\tsw_rawawb_vec_x21_ls3_y = 0x%0x (%d)\n", awb_cfg_v32->vec_x21_ls3_y ,awb_cfg_v32->vec_x21_ls3_y);
288 fprintf(fp, "\t\tsw_rawawb_coor_x1_ls3_u = 0x%0x (%d)\n", awb_cfg_v32->coor_x1_ls3_u ,awb_cfg_v32->coor_x1_ls3_u);
289 fprintf(fp, "\t\tsw_rawawb_vec_x21_ls3_u = 0x%0x (%d)\n", awb_cfg_v32->vec_x21_ls3_u ,awb_cfg_v32->vec_x21_ls3_u);
290 fprintf(fp, "\t\tsw_rawawb_coor_x1_ls3_v = 0x%0x (%d)\n", awb_cfg_v32->coor_x1_ls3_v ,awb_cfg_v32->coor_x1_ls3_v);
291 fprintf(fp, "\t\tsw_rawawb_vec_x21_ls3_v = 0x%0x (%d)\n", awb_cfg_v32->vec_x21_ls3_v ,awb_cfg_v32->vec_x21_ls3_v);
292 fprintf(fp, "\t\tsw_rawawb_dis_x1x2_ls3 = 0x%0x (%d)\n", awb_cfg_v32->dis_x1x2_ls3 ,awb_cfg_v32->dis_x1x2_ls3);
293 fprintf(fp, "\t\tsw_rawawb_rotu0_ls3 = 0x%0x (%d)\n", awb_cfg_v32->rotu0_ls3 ,awb_cfg_v32->rotu0_ls3);
294 fprintf(fp, "\t\tsw_rawawb_rotu1_ls3 = 0x%0x (%d)\n", awb_cfg_v32->rotu1_ls3 ,awb_cfg_v32->rotu1_ls3);
295 fprintf(fp, "\t\tsw_rawawb_rotu2_ls3 = 0x%0x (%d)\n", awb_cfg_v32->rotu2_ls3 ,awb_cfg_v32->rotu2_ls3);
296 fprintf(fp, "\t\tsw_rawawb_rotu3_ls3 = 0x%0x (%d)\n", awb_cfg_v32->rotu3_ls3 ,awb_cfg_v32->rotu3_ls3);
297 fprintf(fp, "\t\tsw_rawawb_rotu4_ls3 = 0x%0x (%d)\n", awb_cfg_v32->rotu4_ls3 ,awb_cfg_v32->rotu4_ls3);
298 fprintf(fp, "\t\tsw_rawawb_rotu5_ls3 = 0x%0x (%d)\n", awb_cfg_v32->rotu5_ls3 ,awb_cfg_v32->rotu5_ls3);
299 fprintf(fp, "\t\tsw_rawawb_th0_ls3 = 0x%0x (%d)\n", awb_cfg_v32->th0_ls3 ,awb_cfg_v32->th0_ls3);
300 fprintf(fp, "\t\tsw_rawawb_th1_ls3 = 0x%0x (%d)\n", awb_cfg_v32->th1_ls3 ,awb_cfg_v32->th1_ls3);
301 fprintf(fp, "\t\tsw_rawawb_th2_ls3 = 0x%0x (%d)\n", awb_cfg_v32->th2_ls3 ,awb_cfg_v32->th2_ls3);
302 fprintf(fp, "\t\tsw_rawawb_th3_ls3 = 0x%0x (%d)\n", awb_cfg_v32->th3_ls3 ,awb_cfg_v32->th3_ls3);
303 fprintf(fp, "\t\tsw_rawawb_th4_ls3 = 0x%0x (%d)\n", awb_cfg_v32->th4_ls3 ,awb_cfg_v32->th4_ls3);
304 fprintf(fp, "\t\tsw_rawawb_th5_ls3 = 0x%0x (%d)\n", awb_cfg_v32->th5_ls3 ,awb_cfg_v32->th5_ls3);
305 fprintf(fp, "\t\tsw_rawawb_wt0 = 0x%0x (%d)\n", awb_cfg_v32->wt0 ,awb_cfg_v32->wt0);
306 fprintf(fp, "\t\tsw_rawawb_wt1 = 0x%0x (%d)\n", awb_cfg_v32->wt1 ,awb_cfg_v32->wt1);
307 fprintf(fp, "\t\tsw_rawawb_wt2 = 0x%0x (%d)\n", awb_cfg_v32->wt2 ,awb_cfg_v32->wt2);
308 fprintf(fp, "\t\tsw_rawawb_mat0_x = 0x%0x (%d)\n", awb_cfg_v32->mat0_x ,awb_cfg_v32->mat0_x);
309 fprintf(fp, "\t\tsw_rawawb_mat0_y = 0x%0x (%d)\n", awb_cfg_v32->mat0_y ,awb_cfg_v32->mat0_y);
310 fprintf(fp, "\t\tsw_rawawb_mat1_x = 0x%0x (%d)\n", awb_cfg_v32->mat1_x ,awb_cfg_v32->mat1_x);
311 fprintf(fp, "\t\tsw_rawawb_mat1_y = 0x%0x (%d)\n", awb_cfg_v32->mat1_y ,awb_cfg_v32->mat1_y);
312 fprintf(fp, "\t\tsw_rawawb_mat2_x = 0x%0x (%d)\n", awb_cfg_v32->mat2_x ,awb_cfg_v32->mat2_x);
313 fprintf(fp, "\t\tsw_rawawb_mat2_y = 0x%0x (%d)\n", awb_cfg_v32->mat2_y ,awb_cfg_v32->mat2_y);
314 fprintf(fp, "\t\tsw_rawawb_nor_x0_0 = 0x%0x (%d)\n", awb_cfg_v32->nor_x0_0 ,awb_cfg_v32->nor_x0_0);
315 fprintf(fp, "\t\tsw_rawawb_nor_x1_0 = 0x%0x (%d)\n", awb_cfg_v32->nor_x1_0 ,awb_cfg_v32->nor_x1_0);
316 fprintf(fp, "\t\tsw_rawawb_nor_y0_0 = 0x%0x (%d)\n", awb_cfg_v32->nor_y0_0 ,awb_cfg_v32->nor_y0_0);
317 fprintf(fp, "\t\tsw_rawawb_nor_y1_0 = 0x%0x (%d)\n", awb_cfg_v32->nor_y1_0 ,awb_cfg_v32->nor_y1_0);
318 fprintf(fp, "\t\tsw_rawawb_big_x0_0 = 0x%0x (%d)\n", awb_cfg_v32->big_x0_0 ,awb_cfg_v32->big_x0_0);
319 fprintf(fp, "\t\tsw_rawawb_big_x1_0 = 0x%0x (%d)\n", awb_cfg_v32->big_x1_0 ,awb_cfg_v32->big_x1_0);
320 fprintf(fp, "\t\tsw_rawawb_big_y0_0 = 0x%0x (%d)\n", awb_cfg_v32->big_y0_0 ,awb_cfg_v32->big_y0_0);
321 fprintf(fp, "\t\tsw_rawawb_big_y1_0 = 0x%0x (%d)\n", awb_cfg_v32->big_y1_0 ,awb_cfg_v32->big_y1_0);
322 fprintf(fp, "\t\tsw_rawawb_nor_x0_1 = 0x%0x (%d)\n", awb_cfg_v32->nor_x0_1 ,awb_cfg_v32->nor_x0_1);
323 fprintf(fp, "\t\tsw_rawawb_nor_x1_1 = 0x%0x (%d)\n", awb_cfg_v32->nor_x1_1 ,awb_cfg_v32->nor_x1_1);
324 fprintf(fp, "\t\tsw_rawawb_nor_y0_1 = 0x%0x (%d)\n", awb_cfg_v32->nor_y0_1 ,awb_cfg_v32->nor_y0_1);
325 fprintf(fp, "\t\tsw_rawawb_nor_y1_1 = 0x%0x (%d)\n", awb_cfg_v32->nor_y1_1 ,awb_cfg_v32->nor_y1_1);
326 fprintf(fp, "\t\tsw_rawawb_big_x0_1 = 0x%0x (%d)\n", awb_cfg_v32->big_x0_1 ,awb_cfg_v32->big_x0_1);
327 fprintf(fp, "\t\tsw_rawawb_big_x1_1 = 0x%0x (%d)\n", awb_cfg_v32->big_x1_1 ,awb_cfg_v32->big_x1_1);
328 fprintf(fp, "\t\tsw_rawawb_big_y0_1 = 0x%0x (%d)\n", awb_cfg_v32->big_y0_1 ,awb_cfg_v32->big_y0_1);
329 fprintf(fp, "\t\tsw_rawawb_big_y1_1 = 0x%0x (%d)\n", awb_cfg_v32->big_y1_1 ,awb_cfg_v32->big_y1_1);
330 fprintf(fp, "\t\tsw_rawawb_nor_x0_2 = 0x%0x (%d)\n", awb_cfg_v32->nor_x0_2 ,awb_cfg_v32->nor_x0_2);
331 fprintf(fp, "\t\tsw_rawawb_nor_x1_2 = 0x%0x (%d)\n", awb_cfg_v32->nor_x1_2 ,awb_cfg_v32->nor_x1_2);
332 fprintf(fp, "\t\tsw_rawawb_nor_y0_2 = 0x%0x (%d)\n", awb_cfg_v32->nor_y0_2 ,awb_cfg_v32->nor_y0_2);
333 fprintf(fp, "\t\tsw_rawawb_nor_y1_2 = 0x%0x (%d)\n", awb_cfg_v32->nor_y1_2 ,awb_cfg_v32->nor_y1_2);
334 fprintf(fp, "\t\tsw_rawawb_big_x0_2 = 0x%0x (%d)\n", awb_cfg_v32->big_x0_2 ,awb_cfg_v32->big_x0_2);
335 fprintf(fp, "\t\tsw_rawawb_big_x1_2 = 0x%0x (%d)\n", awb_cfg_v32->big_x1_2 ,awb_cfg_v32->big_x1_2);
336 fprintf(fp, "\t\tsw_rawawb_big_y0_2 = 0x%0x (%d)\n", awb_cfg_v32->big_y0_2 ,awb_cfg_v32->big_y0_2);
337 fprintf(fp, "\t\tsw_rawawb_big_y1_2 = 0x%0x (%d)\n", awb_cfg_v32->big_y1_2 ,awb_cfg_v32->big_y1_2);
338 fprintf(fp, "\t\tsw_rawawb_nor_x0_3 = 0x%0x (%d)\n", awb_cfg_v32->nor_x0_3 ,awb_cfg_v32->nor_x0_3);
339 fprintf(fp, "\t\tsw_rawawb_nor_x1_3 = 0x%0x (%d)\n", awb_cfg_v32->nor_x1_3 ,awb_cfg_v32->nor_x1_3);
340 fprintf(fp, "\t\tsw_rawawb_nor_y0_3 = 0x%0x (%d)\n", awb_cfg_v32->nor_y0_3 ,awb_cfg_v32->nor_y0_3);
341 fprintf(fp, "\t\tsw_rawawb_nor_y1_3 = 0x%0x (%d)\n", awb_cfg_v32->nor_y1_3 ,awb_cfg_v32->nor_y1_3);
342 fprintf(fp, "\t\tsw_rawawb_big_x0_3 = 0x%0x (%d)\n", awb_cfg_v32->big_x0_3 ,awb_cfg_v32->big_x0_3);
343 fprintf(fp, "\t\tsw_rawawb_big_x1_3 = 0x%0x (%d)\n", awb_cfg_v32->big_x1_3 ,awb_cfg_v32->big_x1_3);
344 fprintf(fp, "\t\tsw_rawawb_big_y0_3 = 0x%0x (%d)\n", awb_cfg_v32->big_y0_3 ,awb_cfg_v32->big_y0_3);
345 fprintf(fp, "\t\tsw_rawawb_big_y1_3 = 0x%0x (%d)\n", awb_cfg_v32->big_y1_3 ,awb_cfg_v32->big_y1_3);
346 fprintf(fp, "\t\tsw_rawawb_exc_wp_region0_excen = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region0_excen ,awb_cfg_v32->exc_wp_region0_excen);
347 fprintf(fp, "\t\tsw_rawawb_exc_wp_region0_measen = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region0_measen ,awb_cfg_v32->exc_wp_region0_measen);
348 fprintf(fp, "\t\tsw_rawawb_exc_wp_region0_domain = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region0_domain ,awb_cfg_v32->exc_wp_region0_domain);
349 fprintf(fp, "\t\tsw_rawawb_exc_wp_region1_excen = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region1_excen ,awb_cfg_v32->exc_wp_region1_excen);
350 fprintf(fp, "\t\tsw_rawawb_exc_wp_region1_measen = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region1_measen ,awb_cfg_v32->exc_wp_region1_measen);
351 fprintf(fp, "\t\tsw_rawawb_exc_wp_region1_domain = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region1_domain ,awb_cfg_v32->exc_wp_region1_domain);
352 fprintf(fp, "\t\tsw_rawawb_exc_wp_region2_excen = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region2_excen ,awb_cfg_v32->exc_wp_region2_excen);
353 fprintf(fp, "\t\tsw_rawawb_exc_wp_region2_measen = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region2_measen ,awb_cfg_v32->exc_wp_region2_measen);
354 fprintf(fp, "\t\tsw_rawawb_exc_wp_region2_domain = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region2_domain ,awb_cfg_v32->exc_wp_region2_domain);
355 fprintf(fp, "\t\tsw_rawawb_exc_wp_region3_excen = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region3_excen ,awb_cfg_v32->exc_wp_region3_excen);
356 fprintf(fp, "\t\tsw_rawawb_exc_wp_region3_measen = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region3_measen ,awb_cfg_v32->exc_wp_region3_measen);
357 fprintf(fp, "\t\tsw_rawawb_exc_wp_region3_domain = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region3_domain ,awb_cfg_v32->exc_wp_region3_domain);
358 fprintf(fp, "\t\tsw_rawawb_exc_wp_region4_excen = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region4_excen ,awb_cfg_v32->exc_wp_region4_excen);
359 fprintf(fp, "\t\tsw_rawawb_exc_wp_region4_domain = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region4_domain ,awb_cfg_v32->exc_wp_region4_domain);
360 fprintf(fp, "\t\tsw_rawawb_exc_wp_region5_excen = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region5_excen ,awb_cfg_v32->exc_wp_region5_excen);
361 fprintf(fp, "\t\tsw_rawawb_exc_wp_region5_domain = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region5_domain ,awb_cfg_v32->exc_wp_region5_domain);
362 fprintf(fp, "\t\tsw_rawawb_exc_wp_region6_excen = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region6_excen ,awb_cfg_v32->exc_wp_region6_excen);
363 fprintf(fp, "\t\tsw_rawawb_exc_wp_region6_domain = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region6_domain ,awb_cfg_v32->exc_wp_region6_domain);
364 fprintf(fp, "\t\tsw_rawawb_multiwindow_en = 0x%0x (%d)\n", awb_cfg_v32->multiwindow_en ,awb_cfg_v32->multiwindow_en);
365 fprintf(fp, "\t\tsw_rawawb_multiwindow0_h_offs = 0x%0x (%d)\n", awb_cfg_v32->multiwindow0_h_offs ,awb_cfg_v32->multiwindow0_h_offs);
366 fprintf(fp, "\t\tsw_rawawb_multiwindow0_v_offs = 0x%0x (%d)\n", awb_cfg_v32->multiwindow0_v_offs ,awb_cfg_v32->multiwindow0_v_offs);
367 fprintf(fp, "\t\tsw_rawawb_multiwindow0_h_size = 0x%0x (%d)\n", awb_cfg_v32->multiwindow0_h_size ,awb_cfg_v32->multiwindow0_h_size);
368 fprintf(fp, "\t\tsw_rawawb_multiwindow1_v_size = 0x%0x (%d)\n", awb_cfg_v32->multiwindow1_v_size ,awb_cfg_v32->multiwindow1_v_size);
369 fprintf(fp, "\t\tsw_rawawb_multiwindow1_h_offs = 0x%0x (%d)\n", awb_cfg_v32->multiwindow1_h_offs ,awb_cfg_v32->multiwindow1_h_offs);
370 fprintf(fp, "\t\tsw_rawawb_multiwindow1_v_offs = 0x%0x (%d)\n", awb_cfg_v32->multiwindow1_v_offs ,awb_cfg_v32->multiwindow1_v_offs);
371 fprintf(fp, "\t\tsw_rawawb_multiwindow1_h_size = 0x%0x (%d)\n", awb_cfg_v32->multiwindow1_h_size ,awb_cfg_v32->multiwindow1_h_size);
372 fprintf(fp, "\t\tsw_rawawb_multiwindow1_v_size = 0x%0x (%d)\n", awb_cfg_v32->multiwindow1_v_size ,awb_cfg_v32->multiwindow1_v_size);
373 fprintf(fp, "\t\tsw_rawawb_multiwindow2_h_offs = 0x%0x (%d)\n", awb_cfg_v32->multiwindow2_h_offs ,awb_cfg_v32->multiwindow2_h_offs);
374 fprintf(fp, "\t\tsw_rawawb_multiwindow2_v_offs = 0x%0x (%d)\n", awb_cfg_v32->multiwindow2_v_offs ,awb_cfg_v32->multiwindow2_v_offs);
375 fprintf(fp, "\t\tsw_rawawb_multiwindow2_h_size = 0x%0x (%d)\n", awb_cfg_v32->multiwindow2_h_size ,awb_cfg_v32->multiwindow2_h_size);
376 fprintf(fp, "\t\tsw_rawawb_multiwindow2_v_size = 0x%0x (%d)\n", awb_cfg_v32->multiwindow2_v_size ,awb_cfg_v32->multiwindow2_v_size);
377 fprintf(fp, "\t\tsw_rawawb_multiwindow3_h_offs = 0x%0x (%d)\n", awb_cfg_v32->multiwindow3_h_offs ,awb_cfg_v32->multiwindow3_h_offs);
378 fprintf(fp, "\t\tsw_rawawb_multiwindow3_v_offs = 0x%0x (%d)\n", awb_cfg_v32->multiwindow3_v_offs ,awb_cfg_v32->multiwindow3_v_offs);
379 fprintf(fp, "\t\tsw_rawawb_multiwindow3_h_size = 0x%0x (%d)\n", awb_cfg_v32->multiwindow3_h_size ,awb_cfg_v32->multiwindow3_h_size);
380 fprintf(fp, "\t\tsw_rawawb_multiwindow3_v_size = 0x%0x (%d)\n", awb_cfg_v32->multiwindow3_v_size ,awb_cfg_v32->multiwindow3_v_size);
381 fprintf(fp, "\t\tsw_rawawb_exc_wp_region0_xu0 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region0_xu0 ,awb_cfg_v32->exc_wp_region0_xu0);
382 fprintf(fp, "\t\tsw_rawawb_exc_wp_region0_xu1 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region0_xu1 ,awb_cfg_v32->exc_wp_region0_xu1);
383 fprintf(fp, "\t\tsw_rawawb_exc_wp_region0_yv0 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region0_yv0 ,awb_cfg_v32->exc_wp_region0_yv0);
384 fprintf(fp, "\t\tsw_rawawb_exc_wp_region0_yv1 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region0_yv1 ,awb_cfg_v32->exc_wp_region0_yv1);
385 fprintf(fp, "\t\tsw_rawawb_exc_wp_region1_xu0 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region1_xu0 ,awb_cfg_v32->exc_wp_region1_xu0);
386 fprintf(fp, "\t\tsw_rawawb_exc_wp_region1_xu1 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region1_xu1 ,awb_cfg_v32->exc_wp_region1_xu1);
387 fprintf(fp, "\t\tsw_rawawb_exc_wp_region1_yv0 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region1_yv0 ,awb_cfg_v32->exc_wp_region1_yv0);
388 fprintf(fp, "\t\tsw_rawawb_exc_wp_region1_yv1 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region1_yv1 ,awb_cfg_v32->exc_wp_region1_yv1);
389 fprintf(fp, "\t\tsw_rawawb_exc_wp_region2_xu0 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region2_xu0 ,awb_cfg_v32->exc_wp_region2_xu0);
390 fprintf(fp, "\t\tsw_rawawb_exc_wp_region2_xu1 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region2_xu1 ,awb_cfg_v32->exc_wp_region2_xu1);
391 fprintf(fp, "\t\tsw_rawawb_exc_wp_region2_yv0 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region2_yv0 ,awb_cfg_v32->exc_wp_region2_yv0);
392 fprintf(fp, "\t\tsw_rawawb_exc_wp_region2_yv1 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region2_yv1 ,awb_cfg_v32->exc_wp_region2_yv1);
393 fprintf(fp, "\t\tsw_rawawb_exc_wp_region3_xu0 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region3_xu0 ,awb_cfg_v32->exc_wp_region3_xu0);
394 fprintf(fp, "\t\tsw_rawawb_exc_wp_region3_xu1 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region3_xu1 ,awb_cfg_v32->exc_wp_region3_xu1);
395 fprintf(fp, "\t\tsw_rawawb_exc_wp_region3_yv0 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region3_yv0 ,awb_cfg_v32->exc_wp_region3_yv0);
396 fprintf(fp, "\t\tsw_rawawb_exc_wp_region3_yv1 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region3_yv1 ,awb_cfg_v32->exc_wp_region3_yv1);
397 fprintf(fp, "\t\tsw_rawawb_exc_wp_region4_xu0 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region4_xu0 ,awb_cfg_v32->exc_wp_region4_xu0);
398 fprintf(fp, "\t\tsw_rawawb_exc_wp_region4_xu1 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region4_xu1 ,awb_cfg_v32->exc_wp_region4_xu1);
399 fprintf(fp, "\t\tsw_rawawb_exc_wp_region4_yv0 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region4_yv0 ,awb_cfg_v32->exc_wp_region4_yv0);
400 fprintf(fp, "\t\tsw_rawawb_exc_wp_region4_yv1 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region4_yv1 ,awb_cfg_v32->exc_wp_region4_yv1);
401 fprintf(fp, "\t\tsw_rawawb_exc_wp_region5_xu0 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region5_xu0 ,awb_cfg_v32->exc_wp_region5_xu0);
402 fprintf(fp, "\t\tsw_rawawb_exc_wp_region5_xu1 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region5_xu1 ,awb_cfg_v32->exc_wp_region5_xu1);
403 fprintf(fp, "\t\tsw_rawawb_exc_wp_region5_yv0 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region5_yv0 ,awb_cfg_v32->exc_wp_region5_yv0);
404 fprintf(fp, "\t\tsw_rawawb_exc_wp_region5_yv1 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region5_yv1 ,awb_cfg_v32->exc_wp_region5_yv1);
405 fprintf(fp, "\t\tsw_rawawb_exc_wp_region6_xu0 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region6_xu0 ,awb_cfg_v32->exc_wp_region6_xu0);
406 fprintf(fp, "\t\tsw_rawawb_exc_wp_region6_xu1 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region6_xu1 ,awb_cfg_v32->exc_wp_region6_xu1);
407 fprintf(fp, "\t\tsw_rawawb_exc_wp_region6_yv0 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region6_yv0 ,awb_cfg_v32->exc_wp_region6_yv0);
408 fprintf(fp, "\t\tsw_rawawb_exc_wp_region6_yv1 = 0x%0x (%d)\n", awb_cfg_v32->exc_wp_region6_yv1 ,awb_cfg_v32->exc_wp_region6_yv1);
409
410
411 fclose(fp);
412 #endif
413 }
convertAiqAwbToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,const rk_aiq_isp_awb_meas_cfg_v32_t & awb_meas,bool awb_cfg_udpate)414 void Isp32Params::convertAiqAwbToIsp32Params(struct isp32_isp_params_cfg& isp_cfg,
415 const rk_aiq_isp_awb_meas_cfg_v32_t& awb_meas,
416 bool awb_cfg_udpate) {
417 if (awb_cfg_udpate) {
418 if (awb_meas.awbEnable) {
419 isp_cfg.module_ens |= ISP2X_MODULE_RAWAWB;
420 isp_cfg.module_cfg_update |= ISP2X_MODULE_RAWAWB;
421 isp_cfg.module_en_update |= ISP2X_MODULE_RAWAWB;
422 }
423 } else {
424 return;
425 }
426 //to do :
427 //config blc2 important
428 //isp_cfg.module_ens |= ISP2X_MODULE_BLS;
429 //isp_cfg.module_cfg_update |= ISP2X_MODULE_BLS;
430 //isp_cfg.module_en_update |= ISP2X_MODULE_BLS;
431
432 struct isp32_rawawb_meas_cfg* awb_cfg_v32 = &isp_cfg.meas.rawawb;
433 awb_cfg_v32->bls2_en = awb_meas.blc.enable;
434 awb_cfg_v32->bls2_val.r = awb_meas.blc.blc[0];
435 awb_cfg_v32->bls2_val.gr = awb_meas.blc.blc[1];
436 awb_cfg_v32->bls2_val.gb = awb_meas.blc.blc[2];
437 awb_cfg_v32->bls2_val.b = awb_meas.blc.blc[3];
438 LOGV_AWB("blc2_cfg %d %d,%d,%d,%d", awb_cfg_v32->bls2_en, awb_cfg_v32->bls2_val.r, awb_cfg_v32->bls2_val.gr,
439 awb_cfg_v32->bls2_val.gb, awb_cfg_v32->bls2_val.b);
440
441 awb_cfg_v32->rawawb_sel = 0;
442 if (awb_meas.frameChoose == CALIB_AWB_INPUT_DRC) {
443 awb_cfg_v32->drc2awb_sel = 1;
444 //awb_cfg_v32->rawawb_sel need check
445 } else {
446 awb_cfg_v32->drc2awb_sel = 0;
447 if (awb_meas.frameChoose == CALIB_AWB_INPUT_BAYERNR) {
448 awb_cfg_v32->bnr2awb_sel = 1;
449 //awb_cfg_v32->rawawb_sel need check
450 }
451 else {
452 awb_cfg_v32->bnr2awb_sel = 0;
453 awb_cfg_v32->rawawb_sel = awb_meas.frameChoose;
454 }
455 }
456 awb_cfg_v32->low12bit_val = awb_meas.inputBitIs12Bit;
457 //awb_cfg_v32->ddr_path_en = awb_meas.write2ddrEnable;
458 //awb_cfg_v32->ddr_path_sel = awb_meas.write2ddrSelc;
459 awb_cfg_v32->in_rshift_to_12bit_en = awb_meas.inputShiftEnable;
460 awb_cfg_v32->in_overexposure_check_en = true;
461 awb_cfg_v32->in_overexposure_threshold = awb_meas.overexposure_value;
462 if(awb_cfg_v32->in_overexposure_threshold == 0) {
463 awb_cfg_v32->in_overexposure_check_en = false;
464 }
465 awb_cfg_v32->xy_en0 = awb_meas.xyDetectionEnable[RK_AIQ_AWB_XY_TYPE_NORMAL_V201];
466 awb_cfg_v32->uv_en0 = awb_meas.uvDetectionEnable[RK_AIQ_AWB_XY_TYPE_NORMAL_V201];
467 awb_cfg_v32->yuv3d_en0 = awb_meas.threeDyuvEnable[RK_AIQ_AWB_XY_TYPE_NORMAL_V201];
468 awb_cfg_v32->xy_en1 = awb_meas.xyDetectionEnable[RK_AIQ_AWB_XY_TYPE_BIG_V201];
469 awb_cfg_v32->uv_en1 = awb_meas.uvDetectionEnable[RK_AIQ_AWB_XY_TYPE_BIG_V201];
470 awb_cfg_v32->yuv3d_en1 = awb_meas.threeDyuvEnable[RK_AIQ_AWB_XY_TYPE_BIG_V201];
471 awb_cfg_v32->wp_blk_wei_en0 =
472 awb_meas.blkWeightEnable[RK_AIQ_AWB_XY_TYPE_NORMAL_V201];
473 awb_cfg_v32->wp_blk_wei_en1 = awb_meas.blkWeightEnable[RK_AIQ_AWB_XY_TYPE_BIG_V201];
474 awb_cfg_v32->rawlsc_bypass_en = awb_meas.lscBypEnable;
475 awb_cfg_v32->blk_measure_enable = awb_meas.blkStatisticsEnable;
476 awb_cfg_v32->blk_measure_mode = awb_meas.blkMeasureMode;
477 awb_cfg_v32->blk_measure_xytype = awb_meas.xyRangeTypeForBlkStatistics;
478 awb_cfg_v32->blk_measure_illu_idx = awb_meas.illIdxForBlkStatistics;
479 awb_cfg_v32->blk_with_luma_wei_en = awb_meas.blkStatisticsWithLumaWeightEn;
480 awb_cfg_v32->wp_luma_wei_en0 =
481 awb_meas.wpDiffWeiEnable[RK_AIQ_AWB_XY_TYPE_NORMAL_V201];
482 awb_cfg_v32->wp_luma_wei_en1 = awb_meas.wpDiffWeiEnable[RK_AIQ_AWB_XY_TYPE_BIG_V201];
483 awb_cfg_v32->wp_hist_xytype = awb_meas.xyRangeTypeForWpHist;
484 awb_cfg_v32->yuv3d_ls_idx0 = awb_meas.threeDyuvIllu[0];
485 awb_cfg_v32->yuv3d_ls_idx1 = awb_meas.threeDyuvIllu[1];
486 awb_cfg_v32->yuv3d_ls_idx2 = awb_meas.threeDyuvIllu[2];
487 awb_cfg_v32->yuv3d_ls_idx3 = awb_meas.threeDyuvIllu[3];
488 awb_cfg_v32->light_num = awb_meas.lightNum;
489 awb_cfg_v32->h_offs = awb_meas.windowSet[0];
490 awb_cfg_v32->v_offs = awb_meas.windowSet[1];
491 awb_cfg_v32->h_size = awb_meas.windowSet[2];
492 awb_cfg_v32->v_size = awb_meas.windowSet[3];
493 #if RKAIQ_HAVE_AWB_V32LT
494 if(awb_meas.dsMode ==RK_AIQ_AWB_DS_4X4 || awb_meas.dsMode ==RK_AIQ_AWB_DS_8X8){
495 awb_cfg_v32->wind_size = awb_meas.dsMode;
496 awb_cfg_v32->ds16x8_mode_en = 0;
497 }else if(awb_meas.dsMode ==RK_AIQ_AWB_DS_16X8){
498 awb_cfg_v32->ds16x8_mode_en = 1;
499 awb_cfg_v32->wind_size = RK_AIQ_AWB_DS_8X8;
500 }
501 #else
502 awb_cfg_v32->wind_size = awb_meas.dsMode;
503 #endif
504 awb_cfg_v32->r_max = awb_meas.maxR;
505 awb_cfg_v32->g_max = awb_meas.maxG;
506 awb_cfg_v32->b_max = awb_meas.maxB;
507 awb_cfg_v32->y_max = awb_meas.maxY;
508 awb_cfg_v32->r_min = awb_meas.minR;
509 awb_cfg_v32->g_min = awb_meas.minG;
510 awb_cfg_v32->b_min = awb_meas.minB;
511 awb_cfg_v32->y_min = awb_meas.minY;
512 awb_cfg_v32->vertex0_u_0 = awb_meas.uvRange_param[0].pu_region[0];
513 awb_cfg_v32->vertex0_v_0 = awb_meas.uvRange_param[0].pv_region[0];
514 awb_cfg_v32->vertex1_u_0 = awb_meas.uvRange_param[0].pu_region[1];
515 awb_cfg_v32->vertex1_v_0 = awb_meas.uvRange_param[0].pv_region[1];
516 awb_cfg_v32->vertex2_u_0 = awb_meas.uvRange_param[0].pu_region[2];
517 awb_cfg_v32->vertex2_v_0 = awb_meas.uvRange_param[0].pv_region[2];
518 awb_cfg_v32->vertex3_u_0 = awb_meas.uvRange_param[0].pu_region[3];
519 awb_cfg_v32->vertex3_v_0 = awb_meas.uvRange_param[0].pv_region[3];
520 awb_cfg_v32->islope01_0 = awb_meas.uvRange_param[0].slope_inv[0];
521 awb_cfg_v32->islope12_0 = awb_meas.uvRange_param[0].slope_inv[1];
522 awb_cfg_v32->islope23_0 = awb_meas.uvRange_param[0].slope_inv[2];
523 awb_cfg_v32->islope30_0 = awb_meas.uvRange_param[0].slope_inv[3];
524 awb_cfg_v32->vertex0_u_1 = awb_meas.uvRange_param[1].pu_region[0];
525 awb_cfg_v32->vertex0_v_1 = awb_meas.uvRange_param[1].pv_region[0];
526 awb_cfg_v32->vertex1_u_1 = awb_meas.uvRange_param[1].pu_region[1];
527 awb_cfg_v32->vertex1_v_1 = awb_meas.uvRange_param[1].pv_region[1];
528 awb_cfg_v32->vertex2_u_1 = awb_meas.uvRange_param[1].pu_region[2];
529 awb_cfg_v32->vertex2_v_1 = awb_meas.uvRange_param[1].pv_region[2];
530 awb_cfg_v32->vertex3_u_1 = awb_meas.uvRange_param[1].pu_region[3];
531 awb_cfg_v32->vertex3_v_1 = awb_meas.uvRange_param[1].pv_region[3];
532 awb_cfg_v32->islope01_1 = awb_meas.uvRange_param[1].slope_inv[0];
533 awb_cfg_v32->islope12_1 = awb_meas.uvRange_param[1].slope_inv[1];
534 awb_cfg_v32->islope23_1 = awb_meas.uvRange_param[1].slope_inv[2];
535 awb_cfg_v32->islope30_1 = awb_meas.uvRange_param[1].slope_inv[3];
536 awb_cfg_v32->vertex0_u_2 = awb_meas.uvRange_param[2].pu_region[0];
537 awb_cfg_v32->vertex0_v_2 = awb_meas.uvRange_param[2].pv_region[0];
538 awb_cfg_v32->vertex1_u_2 = awb_meas.uvRange_param[2].pu_region[1];
539 awb_cfg_v32->vertex1_v_2 = awb_meas.uvRange_param[2].pv_region[1];
540 awb_cfg_v32->vertex2_u_2 = awb_meas.uvRange_param[2].pu_region[2];
541 awb_cfg_v32->vertex2_v_2 = awb_meas.uvRange_param[2].pv_region[2];
542 awb_cfg_v32->vertex3_u_2 = awb_meas.uvRange_param[2].pu_region[3];
543 awb_cfg_v32->vertex3_v_2 = awb_meas.uvRange_param[2].pv_region[3];
544 awb_cfg_v32->islope01_2 = awb_meas.uvRange_param[2].slope_inv[0];
545 awb_cfg_v32->islope12_2 = awb_meas.uvRange_param[2].slope_inv[1];
546 awb_cfg_v32->islope23_2 = awb_meas.uvRange_param[2].slope_inv[2];
547 awb_cfg_v32->islope30_2 = awb_meas.uvRange_param[2].slope_inv[3];
548 awb_cfg_v32->vertex0_u_3 = awb_meas.uvRange_param[3].pu_region[0];
549 awb_cfg_v32->vertex0_v_3 = awb_meas.uvRange_param[3].pv_region[0];
550 awb_cfg_v32->vertex1_u_3 = awb_meas.uvRange_param[3].pu_region[1];
551 awb_cfg_v32->vertex1_v_3 = awb_meas.uvRange_param[3].pv_region[1];
552 awb_cfg_v32->vertex2_u_3 = awb_meas.uvRange_param[3].pu_region[2];
553 awb_cfg_v32->vertex2_v_3 = awb_meas.uvRange_param[3].pv_region[2];
554 awb_cfg_v32->vertex3_u_3 = awb_meas.uvRange_param[3].pu_region[3];
555 awb_cfg_v32->vertex3_v_3 = awb_meas.uvRange_param[3].pv_region[3];
556 awb_cfg_v32->islope01_3 = awb_meas.uvRange_param[3].slope_inv[0];
557 awb_cfg_v32->islope12_3 = awb_meas.uvRange_param[3].slope_inv[1];
558 awb_cfg_v32->islope23_3 = awb_meas.uvRange_param[3].slope_inv[2];
559 awb_cfg_v32->islope30_3 = awb_meas.uvRange_param[3].slope_inv[3];
560 awb_cfg_v32->rgb2ryuvmat0_u = awb_meas.icrgb2RYuv_matrix[0];
561 awb_cfg_v32->rgb2ryuvmat1_u = awb_meas.icrgb2RYuv_matrix[1];
562 awb_cfg_v32->rgb2ryuvmat2_u = awb_meas.icrgb2RYuv_matrix[2];
563 awb_cfg_v32->rgb2ryuvofs_u = awb_meas.icrgb2RYuv_matrix[3];
564 awb_cfg_v32->rgb2ryuvmat0_v = awb_meas.icrgb2RYuv_matrix[4];
565 awb_cfg_v32->rgb2ryuvmat1_v = awb_meas.icrgb2RYuv_matrix[5];
566 awb_cfg_v32->rgb2ryuvmat2_v = awb_meas.icrgb2RYuv_matrix[6];
567 awb_cfg_v32->rgb2ryuvofs_v = awb_meas.icrgb2RYuv_matrix[7];
568 awb_cfg_v32->rgb2ryuvmat0_y = awb_meas.icrgb2RYuv_matrix[8];
569 awb_cfg_v32->rgb2ryuvmat1_y = awb_meas.icrgb2RYuv_matrix[9];
570 awb_cfg_v32->rgb2ryuvmat2_y = awb_meas.icrgb2RYuv_matrix[10];
571 awb_cfg_v32->rgb2ryuvofs_y = awb_meas.icrgb2RYuv_matrix[11];
572 awb_cfg_v32->rotu0_ls0 = awb_meas.ic3Dyuv2Range_param[0].thcurve_u[0];
573 awb_cfg_v32->rotu1_ls0 = awb_meas.ic3Dyuv2Range_param[0].thcurve_u[1];
574 awb_cfg_v32->rotu2_ls0 = awb_meas.ic3Dyuv2Range_param[0].thcurve_u[2];
575 awb_cfg_v32->rotu3_ls0 = awb_meas.ic3Dyuv2Range_param[0].thcurve_u[3];
576 awb_cfg_v32->rotu4_ls0 = awb_meas.ic3Dyuv2Range_param[0].thcurve_u[4];
577 awb_cfg_v32->rotu5_ls0 = awb_meas.ic3Dyuv2Range_param[0].thcurve_u[5];
578 awb_cfg_v32->th0_ls0 = awb_meas.ic3Dyuv2Range_param[0].thcure_th[0];
579 awb_cfg_v32->th1_ls0 = awb_meas.ic3Dyuv2Range_param[0].thcure_th[1];
580 awb_cfg_v32->th2_ls0 = awb_meas.ic3Dyuv2Range_param[0].thcure_th[2];
581 awb_cfg_v32->th3_ls0 = awb_meas.ic3Dyuv2Range_param[0].thcure_th[3];
582 awb_cfg_v32->th4_ls0 = awb_meas.ic3Dyuv2Range_param[0].thcure_th[4];
583 awb_cfg_v32->th5_ls0 = awb_meas.ic3Dyuv2Range_param[0].thcure_th[5];
584 awb_cfg_v32->coor_x1_ls0_u = awb_meas.ic3Dyuv2Range_param[0].lineP1[0];
585 awb_cfg_v32->coor_x1_ls0_v = awb_meas.ic3Dyuv2Range_param[0].lineP1[1];
586 awb_cfg_v32->coor_x1_ls0_y = awb_meas.ic3Dyuv2Range_param[0].lineP1[2];
587 awb_cfg_v32->vec_x21_ls0_u = awb_meas.ic3Dyuv2Range_param[0].vP1P2[0];
588 awb_cfg_v32->vec_x21_ls0_v = awb_meas.ic3Dyuv2Range_param[0].vP1P2[1];
589 awb_cfg_v32->vec_x21_ls0_y = awb_meas.ic3Dyuv2Range_param[0].vP1P2[2];
590 awb_cfg_v32->dis_x1x2_ls0 = awb_meas.ic3Dyuv2Range_param[0].disP1P2;
591 awb_cfg_v32->rotu0_ls1 = awb_meas.ic3Dyuv2Range_param[1].thcurve_u[0];
592 awb_cfg_v32->rotu1_ls1 = awb_meas.ic3Dyuv2Range_param[1].thcurve_u[1];
593 awb_cfg_v32->rotu2_ls1 = awb_meas.ic3Dyuv2Range_param[1].thcurve_u[2];
594 awb_cfg_v32->rotu3_ls1 = awb_meas.ic3Dyuv2Range_param[1].thcurve_u[3];
595 awb_cfg_v32->rotu4_ls1 = awb_meas.ic3Dyuv2Range_param[1].thcurve_u[4];
596 awb_cfg_v32->rotu5_ls1 = awb_meas.ic3Dyuv2Range_param[1].thcurve_u[5];
597 awb_cfg_v32->th0_ls1 = awb_meas.ic3Dyuv2Range_param[1].thcure_th[0];
598 awb_cfg_v32->th1_ls1 = awb_meas.ic3Dyuv2Range_param[1].thcure_th[1];
599 awb_cfg_v32->th2_ls1 = awb_meas.ic3Dyuv2Range_param[1].thcure_th[2];
600 awb_cfg_v32->th3_ls1 = awb_meas.ic3Dyuv2Range_param[1].thcure_th[3];
601 awb_cfg_v32->th4_ls1 = awb_meas.ic3Dyuv2Range_param[1].thcure_th[4];
602 awb_cfg_v32->th5_ls1 = awb_meas.ic3Dyuv2Range_param[1].thcure_th[5];
603 awb_cfg_v32->coor_x1_ls1_u = awb_meas.ic3Dyuv2Range_param[1].lineP1[0];
604 awb_cfg_v32->coor_x1_ls1_v = awb_meas.ic3Dyuv2Range_param[1].lineP1[1];
605 awb_cfg_v32->coor_x1_ls1_y = awb_meas.ic3Dyuv2Range_param[1].lineP1[2];
606 awb_cfg_v32->vec_x21_ls1_u = awb_meas.ic3Dyuv2Range_param[1].vP1P2[0];
607 awb_cfg_v32->vec_x21_ls1_v = awb_meas.ic3Dyuv2Range_param[1].vP1P2[1];
608 awb_cfg_v32->vec_x21_ls1_y = awb_meas.ic3Dyuv2Range_param[1].vP1P2[2];
609 awb_cfg_v32->dis_x1x2_ls1 = awb_meas.ic3Dyuv2Range_param[1].disP1P2;
610 awb_cfg_v32->rotu0_ls2 = awb_meas.ic3Dyuv2Range_param[2].thcurve_u[0];
611 awb_cfg_v32->rotu1_ls2 = awb_meas.ic3Dyuv2Range_param[2].thcurve_u[1];
612 awb_cfg_v32->rotu2_ls2 = awb_meas.ic3Dyuv2Range_param[2].thcurve_u[2];
613 awb_cfg_v32->rotu3_ls2 = awb_meas.ic3Dyuv2Range_param[2].thcurve_u[3];
614 awb_cfg_v32->rotu4_ls2 = awb_meas.ic3Dyuv2Range_param[2].thcurve_u[4];
615 awb_cfg_v32->rotu5_ls2 = awb_meas.ic3Dyuv2Range_param[2].thcurve_u[5];
616 awb_cfg_v32->th0_ls2 = awb_meas.ic3Dyuv2Range_param[2].thcure_th[0];
617 awb_cfg_v32->th1_ls2 = awb_meas.ic3Dyuv2Range_param[2].thcure_th[1];
618 awb_cfg_v32->th2_ls2 = awb_meas.ic3Dyuv2Range_param[2].thcure_th[2];
619 awb_cfg_v32->th3_ls2 = awb_meas.ic3Dyuv2Range_param[2].thcure_th[3];
620 awb_cfg_v32->th4_ls2 = awb_meas.ic3Dyuv2Range_param[2].thcure_th[4];
621 awb_cfg_v32->th5_ls2 = awb_meas.ic3Dyuv2Range_param[2].thcure_th[5];
622 awb_cfg_v32->coor_x1_ls2_u = awb_meas.ic3Dyuv2Range_param[2].lineP1[0];
623 awb_cfg_v32->coor_x1_ls2_v = awb_meas.ic3Dyuv2Range_param[2].lineP1[1];
624 awb_cfg_v32->coor_x1_ls2_y = awb_meas.ic3Dyuv2Range_param[2].lineP1[2];
625 awb_cfg_v32->vec_x21_ls2_u = awb_meas.ic3Dyuv2Range_param[2].vP1P2[0];
626 awb_cfg_v32->vec_x21_ls2_v = awb_meas.ic3Dyuv2Range_param[2].vP1P2[1];
627 awb_cfg_v32->vec_x21_ls2_y = awb_meas.ic3Dyuv2Range_param[2].vP1P2[2];
628 awb_cfg_v32->dis_x1x2_ls2 = awb_meas.ic3Dyuv2Range_param[2].disP1P2;
629
630 awb_cfg_v32->rotu0_ls3 = awb_meas.ic3Dyuv2Range_param[3].thcurve_u[0];
631 awb_cfg_v32->rotu1_ls3 = awb_meas.ic3Dyuv2Range_param[3].thcurve_u[1];
632 awb_cfg_v32->rotu2_ls3 = awb_meas.ic3Dyuv2Range_param[3].thcurve_u[2];
633 awb_cfg_v32->rotu3_ls3 = awb_meas.ic3Dyuv2Range_param[3].thcurve_u[3];
634 awb_cfg_v32->rotu4_ls3 = awb_meas.ic3Dyuv2Range_param[3].thcurve_u[4];
635 awb_cfg_v32->rotu5_ls3 = awb_meas.ic3Dyuv2Range_param[3].thcurve_u[5];
636 awb_cfg_v32->th0_ls3 = awb_meas.ic3Dyuv2Range_param[3].thcure_th[0];
637 awb_cfg_v32->th1_ls3 = awb_meas.ic3Dyuv2Range_param[3].thcure_th[1];
638 awb_cfg_v32->th2_ls3 = awb_meas.ic3Dyuv2Range_param[3].thcure_th[2];
639 awb_cfg_v32->th3_ls3 = awb_meas.ic3Dyuv2Range_param[3].thcure_th[3];
640 awb_cfg_v32->th4_ls3 = awb_meas.ic3Dyuv2Range_param[3].thcure_th[4];
641 awb_cfg_v32->th5_ls3 = awb_meas.ic3Dyuv2Range_param[3].thcure_th[5];
642 awb_cfg_v32->coor_x1_ls3_u = awb_meas.ic3Dyuv2Range_param[3].lineP1[0];
643 awb_cfg_v32->coor_x1_ls3_v = awb_meas.ic3Dyuv2Range_param[3].lineP1[1];
644 awb_cfg_v32->coor_x1_ls3_y = awb_meas.ic3Dyuv2Range_param[3].lineP1[2];
645 awb_cfg_v32->vec_x21_ls3_u = awb_meas.ic3Dyuv2Range_param[3].vP1P2[0];
646 awb_cfg_v32->vec_x21_ls3_v = awb_meas.ic3Dyuv2Range_param[3].vP1P2[1];
647 awb_cfg_v32->vec_x21_ls3_y = awb_meas.ic3Dyuv2Range_param[3].vP1P2[2];
648 awb_cfg_v32->dis_x1x2_ls3 = awb_meas.ic3Dyuv2Range_param[3].disP1P2;
649 awb_cfg_v32->wt0 = awb_meas.rgb2xy_param.pseudoLuminanceWeight[0];
650 awb_cfg_v32->wt1 = awb_meas.rgb2xy_param.pseudoLuminanceWeight[1];
651 awb_cfg_v32->wt2 = awb_meas.rgb2xy_param.pseudoLuminanceWeight[2];
652 awb_cfg_v32->mat0_x = awb_meas.rgb2xy_param.rotationMat[0];
653 awb_cfg_v32->mat1_x = awb_meas.rgb2xy_param.rotationMat[1];
654 awb_cfg_v32->mat2_x = awb_meas.rgb2xy_param.rotationMat[2];
655 awb_cfg_v32->mat0_y = awb_meas.rgb2xy_param.rotationMat[3];
656 awb_cfg_v32->mat1_y = awb_meas.rgb2xy_param.rotationMat[4];
657 awb_cfg_v32->mat2_y = awb_meas.rgb2xy_param.rotationMat[5];
658 awb_cfg_v32->nor_x0_0 = awb_meas.xyRange_param[0].NorrangeX[0];
659 awb_cfg_v32->nor_x1_0 = awb_meas.xyRange_param[0].NorrangeX[1];
660 awb_cfg_v32->nor_y0_0 = awb_meas.xyRange_param[0].NorrangeY[0];
661 awb_cfg_v32->nor_y1_0 = awb_meas.xyRange_param[0].NorrangeY[1];
662 awb_cfg_v32->big_x0_0 = awb_meas.xyRange_param[0].SperangeX[0];
663 awb_cfg_v32->big_x1_0 = awb_meas.xyRange_param[0].SperangeX[1];
664 awb_cfg_v32->big_y0_0 = awb_meas.xyRange_param[0].SperangeY[0];
665 awb_cfg_v32->big_y1_0 = awb_meas.xyRange_param[0].SperangeY[1];
666 awb_cfg_v32->nor_x0_1 = awb_meas.xyRange_param[1].NorrangeX[0];
667 awb_cfg_v32->nor_x1_1 = awb_meas.xyRange_param[1].NorrangeX[1];
668 awb_cfg_v32->nor_y0_1 = awb_meas.xyRange_param[1].NorrangeY[0];
669 awb_cfg_v32->nor_y1_1 = awb_meas.xyRange_param[1].NorrangeY[1];
670 awb_cfg_v32->big_x0_1 = awb_meas.xyRange_param[1].SperangeX[0];
671 awb_cfg_v32->big_x1_1 = awb_meas.xyRange_param[1].SperangeX[1];
672 awb_cfg_v32->big_y0_1 = awb_meas.xyRange_param[1].SperangeY[0];
673 awb_cfg_v32->big_y1_1 = awb_meas.xyRange_param[1].SperangeY[1];
674 awb_cfg_v32->nor_x0_2 = awb_meas.xyRange_param[2].NorrangeX[0];
675 awb_cfg_v32->nor_x1_2 = awb_meas.xyRange_param[2].NorrangeX[1];
676 awb_cfg_v32->nor_y0_2 = awb_meas.xyRange_param[2].NorrangeY[0];
677 awb_cfg_v32->nor_y1_2 = awb_meas.xyRange_param[2].NorrangeY[1];
678 awb_cfg_v32->big_x0_2 = awb_meas.xyRange_param[2].SperangeX[0];
679 awb_cfg_v32->big_x1_2 = awb_meas.xyRange_param[2].SperangeX[1];
680 awb_cfg_v32->big_y0_2 = awb_meas.xyRange_param[2].SperangeY[0];
681 awb_cfg_v32->big_y1_2 = awb_meas.xyRange_param[2].SperangeY[1];
682 awb_cfg_v32->nor_x0_3 = awb_meas.xyRange_param[3].NorrangeX[0];
683 awb_cfg_v32->nor_x1_3 = awb_meas.xyRange_param[3].NorrangeX[1];
684 awb_cfg_v32->nor_y0_3 = awb_meas.xyRange_param[3].NorrangeY[0];
685 awb_cfg_v32->nor_y1_3 = awb_meas.xyRange_param[3].NorrangeY[1];
686 awb_cfg_v32->big_x0_3 = awb_meas.xyRange_param[3].SperangeX[0];
687 awb_cfg_v32->big_x1_3 = awb_meas.xyRange_param[3].SperangeX[1];
688 awb_cfg_v32->big_y0_3 = awb_meas.xyRange_param[3].SperangeY[0];
689 awb_cfg_v32->big_y1_3 = awb_meas.xyRange_param[3].SperangeY[1];
690 awb_cfg_v32->pre_wbgain_inv_r = awb_meas.pre_wbgain_inv_r;
691 awb_cfg_v32->pre_wbgain_inv_g = awb_meas.pre_wbgain_inv_g;
692 awb_cfg_v32->pre_wbgain_inv_b = awb_meas.pre_wbgain_inv_b;
693 awb_cfg_v32->multiwindow_en = awb_meas.multiwindow_en;
694 awb_cfg_v32->multiwindow0_h_offs = awb_meas.multiwindow[0][0];
695 awb_cfg_v32->multiwindow0_v_offs = awb_meas.multiwindow[0][1];
696 awb_cfg_v32->multiwindow0_h_size =
697 awb_meas.multiwindow[0][0] + awb_meas.multiwindow[0][2];
698 awb_cfg_v32->multiwindow0_v_size =
699 awb_meas.multiwindow[0][1] + awb_meas.multiwindow[0][3];
700 awb_cfg_v32->multiwindow1_h_offs = awb_meas.multiwindow[1][0];
701 awb_cfg_v32->multiwindow1_v_offs = awb_meas.multiwindow[1][1];
702 awb_cfg_v32->multiwindow1_h_size =
703 awb_meas.multiwindow[1][0] + awb_meas.multiwindow[1][2];
704 awb_cfg_v32->multiwindow1_v_size =
705 awb_meas.multiwindow[1][1] + awb_meas.multiwindow[1][3];
706 awb_cfg_v32->multiwindow2_h_offs = awb_meas.multiwindow[2][0];
707 awb_cfg_v32->multiwindow2_v_offs = awb_meas.multiwindow[2][1];
708 awb_cfg_v32->multiwindow2_h_size =
709 awb_meas.multiwindow[2][0] + awb_meas.multiwindow[2][2];
710 awb_cfg_v32->multiwindow2_v_size =
711 awb_meas.multiwindow[2][1] + awb_meas.multiwindow[2][3];
712 awb_cfg_v32->multiwindow3_h_offs = awb_meas.multiwindow[3][0];
713 awb_cfg_v32->multiwindow3_v_offs = awb_meas.multiwindow[3][1];
714 awb_cfg_v32->multiwindow3_h_size =
715 awb_meas.multiwindow[3][0] + awb_meas.multiwindow[3][2];
716 awb_cfg_v32->multiwindow3_v_size =
717 awb_meas.multiwindow[3][1] + awb_meas.multiwindow[3][3];
718 int exc_wp_region0_excen0 =
719 awb_meas.excludeWpRange[0].excludeEnable[RK_AIQ_AWB_XY_TYPE_NORMAL_V201];
720 int exc_wp_region0_excen1 =
721 awb_meas.excludeWpRange[0].excludeEnable[RK_AIQ_AWB_XY_TYPE_BIG_V201];
722 awb_cfg_v32->exc_wp_region0_excen = ((exc_wp_region0_excen1 << 1) + exc_wp_region0_excen0) & 0x3;
723 awb_cfg_v32->exc_wp_region0_measen = awb_meas.excludeWpRange[0].measureEnable;
724 awb_cfg_v32->exc_wp_region0_domain = awb_meas.excludeWpRange[0].domain;
725 awb_cfg_v32->exc_wp_region0_xu0 = awb_meas.excludeWpRange[0].xu[0];
726 awb_cfg_v32->exc_wp_region0_xu1 = awb_meas.excludeWpRange[0].xu[1];
727 awb_cfg_v32->exc_wp_region0_yv0 = awb_meas.excludeWpRange[0].yv[0];
728 awb_cfg_v32->exc_wp_region0_yv1 = awb_meas.excludeWpRange[0].yv[1];
729 awb_cfg_v32->exc_wp_region0_weight = awb_meas.excludeWpRange[0].weightInculde;
730 int exc_wp_region1_excen0 =
731 awb_meas.excludeWpRange[1].excludeEnable[RK_AIQ_AWB_XY_TYPE_NORMAL_V201];
732 int exc_wp_region1_excen1 =
733 awb_meas.excludeWpRange[1].excludeEnable[RK_AIQ_AWB_XY_TYPE_BIG_V201];
734 awb_cfg_v32->exc_wp_region1_excen = ((exc_wp_region1_excen1 << 1) + exc_wp_region1_excen0) & 0x3;
735 awb_cfg_v32->exc_wp_region1_measen = awb_meas.excludeWpRange[1].measureEnable;
736 awb_cfg_v32->exc_wp_region1_domain = awb_meas.excludeWpRange[1].domain;
737 awb_cfg_v32->exc_wp_region1_xu0 = awb_meas.excludeWpRange[1].xu[0];
738 awb_cfg_v32->exc_wp_region1_xu1 = awb_meas.excludeWpRange[1].xu[1];
739 awb_cfg_v32->exc_wp_region1_yv0 = awb_meas.excludeWpRange[1].yv[0];
740 awb_cfg_v32->exc_wp_region1_yv1 = awb_meas.excludeWpRange[1].yv[1];
741 awb_cfg_v32->exc_wp_region1_weight = awb_meas.excludeWpRange[1].weightInculde;
742 int exc_wp_region2_excen0 =
743 awb_meas.excludeWpRange[2].excludeEnable[RK_AIQ_AWB_XY_TYPE_NORMAL_V201];
744 int exc_wp_region2_excen1 =
745 awb_meas.excludeWpRange[2].excludeEnable[RK_AIQ_AWB_XY_TYPE_BIG_V201];
746 awb_cfg_v32->exc_wp_region2_excen = ((exc_wp_region2_excen1 << 1) + exc_wp_region2_excen0) & 0x3;
747 awb_cfg_v32->exc_wp_region2_measen = awb_meas.excludeWpRange[2].measureEnable;
748 awb_cfg_v32->exc_wp_region2_domain = awb_meas.excludeWpRange[2].domain;
749 awb_cfg_v32->exc_wp_region2_xu0 = awb_meas.excludeWpRange[2].xu[0];
750 awb_cfg_v32->exc_wp_region2_xu1 = awb_meas.excludeWpRange[2].xu[1];
751 awb_cfg_v32->exc_wp_region2_yv0 = awb_meas.excludeWpRange[2].yv[0];
752 awb_cfg_v32->exc_wp_region2_yv1 = awb_meas.excludeWpRange[2].yv[1];
753 awb_cfg_v32->exc_wp_region2_weight = awb_meas.excludeWpRange[2].weightInculde;
754 int exc_wp_region3_excen0 =
755 awb_meas.excludeWpRange[3].excludeEnable[RK_AIQ_AWB_XY_TYPE_NORMAL_V201];
756 int exc_wp_region3_excen1 =
757 awb_meas.excludeWpRange[3].excludeEnable[RK_AIQ_AWB_XY_TYPE_BIG_V201];
758 awb_cfg_v32->exc_wp_region3_excen = ((exc_wp_region3_excen1 << 1) + exc_wp_region3_excen0) & 0x3;
759 awb_cfg_v32->exc_wp_region3_measen = awb_meas.excludeWpRange[3].measureEnable;
760 awb_cfg_v32->exc_wp_region3_domain = awb_meas.excludeWpRange[3].domain;
761 awb_cfg_v32->exc_wp_region3_xu0 = awb_meas.excludeWpRange[3].xu[0];
762 awb_cfg_v32->exc_wp_region3_xu1 = awb_meas.excludeWpRange[3].xu[1];
763 awb_cfg_v32->exc_wp_region3_yv0 = awb_meas.excludeWpRange[3].yv[0];
764 awb_cfg_v32->exc_wp_region3_yv1 = awb_meas.excludeWpRange[3].yv[1];
765 awb_cfg_v32->exc_wp_region3_weight = awb_meas.excludeWpRange[3].weightInculde;
766 int exc_wp_region4_excen0 =
767 awb_meas.excludeWpRange[4].excludeEnable[RK_AIQ_AWB_XY_TYPE_NORMAL_V201];
768 int exc_wp_region4_excen1 =
769 awb_meas.excludeWpRange[4].excludeEnable[RK_AIQ_AWB_XY_TYPE_BIG_V201];
770 awb_cfg_v32->exc_wp_region4_excen = ((exc_wp_region4_excen1 << 1) + exc_wp_region4_excen0) & 0x3;
771 awb_cfg_v32->exc_wp_region4_domain = awb_meas.excludeWpRange[4].domain;
772 awb_cfg_v32->exc_wp_region4_xu0 = awb_meas.excludeWpRange[4].xu[0];
773 awb_cfg_v32->exc_wp_region4_xu1 = awb_meas.excludeWpRange[4].xu[1];
774 awb_cfg_v32->exc_wp_region4_yv0 = awb_meas.excludeWpRange[4].yv[0];
775 awb_cfg_v32->exc_wp_region4_yv1 = awb_meas.excludeWpRange[4].yv[1];
776 awb_cfg_v32->exc_wp_region4_weight = awb_meas.excludeWpRange[4].weightInculde;
777 int exc_wp_region5_excen0 =
778 awb_meas.excludeWpRange[5].excludeEnable[RK_AIQ_AWB_XY_TYPE_NORMAL_V201];
779 int exc_wp_region5_excen1 =
780 awb_meas.excludeWpRange[5].excludeEnable[RK_AIQ_AWB_XY_TYPE_BIG_V201];
781 awb_cfg_v32->exc_wp_region5_excen = ((exc_wp_region5_excen1 << 1) + exc_wp_region5_excen0) & 0x3;
782 awb_cfg_v32->exc_wp_region5_domain = awb_meas.excludeWpRange[5].domain;
783 awb_cfg_v32->exc_wp_region5_xu0 = awb_meas.excludeWpRange[5].xu[0];
784 awb_cfg_v32->exc_wp_region5_xu1 = awb_meas.excludeWpRange[5].xu[1];
785 awb_cfg_v32->exc_wp_region5_yv0 = awb_meas.excludeWpRange[5].yv[0];
786 awb_cfg_v32->exc_wp_region5_yv1 = awb_meas.excludeWpRange[5].yv[1];
787 awb_cfg_v32->exc_wp_region5_weight = awb_meas.excludeWpRange[5].weightInculde;
788 int exc_wp_region6_excen0 =
789 awb_meas.excludeWpRange[6].excludeEnable[RK_AIQ_AWB_XY_TYPE_NORMAL_V201];
790 int exc_wp_region6_excen1 =
791 awb_meas.excludeWpRange[6].excludeEnable[RK_AIQ_AWB_XY_TYPE_BIG_V201];
792 awb_cfg_v32->exc_wp_region6_excen = ((exc_wp_region6_excen1 << 1) + exc_wp_region6_excen0) & 0x3;
793 awb_cfg_v32->exc_wp_region6_domain = awb_meas.excludeWpRange[6].domain;
794 awb_cfg_v32->exc_wp_region6_xu0 = awb_meas.excludeWpRange[6].xu[0];
795 awb_cfg_v32->exc_wp_region6_xu1 = awb_meas.excludeWpRange[6].xu[1];
796 awb_cfg_v32->exc_wp_region6_yv0 = awb_meas.excludeWpRange[6].yv[0];
797 awb_cfg_v32->exc_wp_region6_yv1 = awb_meas.excludeWpRange[6].yv[1];
798 awb_cfg_v32->exc_wp_region6_weight = awb_meas.excludeWpRange[6].weightInculde;
799 awb_cfg_v32->wp_luma_weicurve_y0 = awb_meas.wpDiffwei_y[0];
800 awb_cfg_v32->wp_luma_weicurve_y1 = awb_meas.wpDiffwei_y[1];
801 awb_cfg_v32->wp_luma_weicurve_y2 = awb_meas.wpDiffwei_y[2];
802 awb_cfg_v32->wp_luma_weicurve_y3 = awb_meas.wpDiffwei_y[3];
803 awb_cfg_v32->wp_luma_weicurve_y4 = awb_meas.wpDiffwei_y[4];
804 awb_cfg_v32->wp_luma_weicurve_y5 = awb_meas.wpDiffwei_y[5];
805 awb_cfg_v32->wp_luma_weicurve_y6 = awb_meas.wpDiffwei_y[6];
806 awb_cfg_v32->wp_luma_weicurve_y7 = awb_meas.wpDiffwei_y[7];
807 awb_cfg_v32->wp_luma_weicurve_y8 = awb_meas.wpDiffwei_y[8];
808 awb_cfg_v32->wp_luma_weicurve_w0 = awb_meas.wpDiffwei_w[0];
809 awb_cfg_v32->wp_luma_weicurve_w1 = awb_meas.wpDiffwei_w[1];
810 awb_cfg_v32->wp_luma_weicurve_w2 = awb_meas.wpDiffwei_w[2];
811 awb_cfg_v32->wp_luma_weicurve_w3 = awb_meas.wpDiffwei_w[3];
812 awb_cfg_v32->wp_luma_weicurve_w4 = awb_meas.wpDiffwei_w[4];
813 awb_cfg_v32->wp_luma_weicurve_w5 = awb_meas.wpDiffwei_w[5];
814 awb_cfg_v32->wp_luma_weicurve_w6 = awb_meas.wpDiffwei_w[6];
815 awb_cfg_v32->wp_luma_weicurve_w7 = awb_meas.wpDiffwei_w[7];
816 awb_cfg_v32->wp_luma_weicurve_w8 = awb_meas.wpDiffwei_w[8];
817 #if RKAIQ_HAVE_AWB_V32LT
818 for (int i = 0; i < ISP32L_RAWAWB_WEIGHT_NUM; i++) {
819 awb_cfg_v32->win_weight[i] = awb_meas.blkWeight[i*5]|
820 (awb_meas.blkWeight[i*5+1]<<6)|
821 (awb_meas.blkWeight[i*5+2]<<12)|
822 (awb_meas.blkWeight[i*5+3]<<18)|
823 (awb_meas.blkWeight[i*5+4]<<24);
824 }
825 #else
826 for (int i = 0; i < RK_AIQ_AWB_GRID_NUM_TOTAL; i++) {
827 awb_cfg_v32->wp_blk_wei_w[i] = awb_meas.blkWeight[i];
828 }
829 #endif
830 awb_cfg_v32->blk_rtdw_measure_en = awb_meas.blk_rtdw_measure_en;
831
832 WriteAwbReg(awb_cfg_v32);
833
834 }
835 #endif
836 #if RKAIQ_HAVE_AF_V31 || RKAIQ_ONLY_AF_STATS_V31
convertAiqAfToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,const rk_aiq_isp_af_v31_t & af_data,bool af_cfg_udpate)837 void Isp32Params::convertAiqAfToIsp32Params(struct isp32_isp_params_cfg& isp_cfg,
838 const rk_aiq_isp_af_v31_t& af_data,
839 bool af_cfg_udpate) {
840 int i;
841
842 if (!af_cfg_udpate) return;
843
844 if (af_data.af_en) isp_cfg.module_ens |= ISP2X_MODULE_RAWAF;
845 isp_cfg.module_en_update |= ISP2X_MODULE_RAWAF;
846 isp_cfg.module_cfg_update |= ISP2X_MODULE_RAWAF;
847
848 isp_cfg.meas.rawaf.rawaf_sel = af_data.rawaf_sel;
849 isp_cfg.meas.rawaf.gamma_en = af_data.gamma_en;
850 isp_cfg.meas.rawaf.gaus_en = af_data.gaus_en;
851 isp_cfg.meas.rawaf.v1_fir_sel = af_data.v1_fir_sel;
852 isp_cfg.meas.rawaf.hiir_en = af_data.hiir_en;
853 isp_cfg.meas.rawaf.viir_en = af_data.viir_en;
854 isp_cfg.meas.rawaf.v1_fv_mode = af_data.v1_fv_outmode;
855 isp_cfg.meas.rawaf.v2_fv_mode = af_data.v2_fv_outmode;
856 isp_cfg.meas.rawaf.h1_fv_mode = af_data.h1_fv_outmode;
857 isp_cfg.meas.rawaf.h2_fv_mode = af_data.h2_fv_outmode;
858 isp_cfg.meas.rawaf.ldg_en = af_data.ldg_en;
859 isp_cfg.meas.rawaf.accu_8bit_mode = af_data.accu_8bit_mode;
860 isp_cfg.meas.rawaf.y_mode = af_data.y_mode;
861 isp_cfg.meas.rawaf.vldg_sel = af_data.vldg_sel;
862 isp_cfg.meas.rawaf.sobel_sel = af_data.sobel_sel;
863 isp_cfg.meas.rawaf.v_dnscl_mode = af_data.v_dnscl_mode;
864 isp_cfg.meas.rawaf.from_awb = af_data.from_awb;
865 isp_cfg.meas.rawaf.from_ynr = af_data.from_ynr;
866 if (af_data.af_en) {
867 isp_cfg.meas.rawaf.ae_mode = af_data.ae_mode;
868 isp_cfg.meas.rawaf.ae_config_use = af_data.ae_config_use;
869 } else {
870 isp_cfg.meas.rawaf.ae_mode = 0;
871 isp_cfg.meas.rawaf.ae_config_use = 1;
872 }
873
874 memcpy(isp_cfg.meas.rawaf.line_en, af_data.line_en,
875 ISP32_RAWAF_LINE_NUM * sizeof(unsigned char));
876 memcpy(isp_cfg.meas.rawaf.line_num, af_data.line_num,
877 ISP32_RAWAF_LINE_NUM * sizeof(unsigned char));
878
879 isp_cfg.meas.rawaf.num_afm_win = af_data.window_num;
880 isp_cfg.meas.rawaf.win[0].h_offs = af_data.wina_h_offs;
881 isp_cfg.meas.rawaf.win[0].v_offs = af_data.wina_v_offs;
882 isp_cfg.meas.rawaf.win[0].h_size = af_data.wina_h_size;
883 isp_cfg.meas.rawaf.win[0].v_size = af_data.wina_v_size;
884 isp_cfg.meas.rawaf.win[1].h_offs = af_data.winb_h_offs;
885 isp_cfg.meas.rawaf.win[1].v_offs = af_data.winb_v_offs;
886 isp_cfg.meas.rawaf.win[1].h_size = af_data.winb_h_size;
887 isp_cfg.meas.rawaf.win[1].v_size = af_data.winb_v_size;
888
889 memcpy(isp_cfg.meas.rawaf.gamma_y, af_data.gamma_y,
890 ISP32_RAWAF_GAMMA_NUM * sizeof(unsigned short));
891
892 /* THRES */
893 isp_cfg.meas.rawaf.afm_thres = af_data.thres;
894 /* VAR_SHIFT */
895 isp_cfg.meas.rawaf.afm_var_shift[0] = af_data.shift_sum_a;
896 isp_cfg.meas.rawaf.lum_var_shift[0] = af_data.shift_y_a;
897 isp_cfg.meas.rawaf.afm_var_shift[1] = af_data.shift_sum_b;
898 isp_cfg.meas.rawaf.lum_var_shift[1] = af_data.shift_y_b;
899 /* HVIIR_VAR_SHIFT */
900 isp_cfg.meas.rawaf.h1iir_var_shift = af_data.h1_fv_shift;
901 isp_cfg.meas.rawaf.h2iir_var_shift = af_data.h2_fv_shift;
902 isp_cfg.meas.rawaf.v1iir_var_shift = af_data.v1_fv_shift;
903 isp_cfg.meas.rawaf.v2iir_var_shift = af_data.v2_fv_shift;
904
905 /* HIIR_THRESH */
906 isp_cfg.meas.rawaf.h_fv_thresh = af_data.h_fv_thresh;
907 isp_cfg.meas.rawaf.v_fv_thresh = af_data.v_fv_thresh;
908
909 for (i = 0; i < ISP32_RAWAF_CURVE_NUM; i++) {
910 isp_cfg.meas.rawaf.curve_h[i].ldg_lumth = af_data.h_ldg_lumth[i];
911 isp_cfg.meas.rawaf.curve_h[i].ldg_gain = af_data.h_ldg_gain[i];
912 isp_cfg.meas.rawaf.curve_h[i].ldg_gslp = af_data.h_ldg_gslp[i];
913 isp_cfg.meas.rawaf.curve_v[i].ldg_lumth = af_data.v_ldg_lumth[i];
914 isp_cfg.meas.rawaf.curve_v[i].ldg_gain = af_data.v_ldg_gain[i];
915 isp_cfg.meas.rawaf.curve_v[i].ldg_gslp = af_data.v_ldg_gslp[i];
916 }
917
918 for (i = 0; i < ISP32_RAWAF_HIIR_COE_NUM; i++) {
919 isp_cfg.meas.rawaf.h1iir1_coe[i] = af_data.h1_iir1_coe[i];
920 isp_cfg.meas.rawaf.h1iir2_coe[i] = af_data.h1_iir2_coe[i];
921 isp_cfg.meas.rawaf.h2iir1_coe[i] = af_data.h2_iir1_coe[i];
922 isp_cfg.meas.rawaf.h2iir2_coe[i] = af_data.h2_iir2_coe[i];
923 }
924 for (i = 0; i < ISP32_RAWAF_GAUS_COE_NUM; i++) {
925 isp_cfg.meas.rawaf.gaus_coe[i] = af_data.gaus_coe[i];
926 }
927 for (i = 0; i < ISP32_RAWAF_VIIR_COE_NUM; i++) {
928 isp_cfg.meas.rawaf.v1iir_coe[i] = af_data.v1_iir_coe[i];
929 isp_cfg.meas.rawaf.v2iir_coe[i] = af_data.v2_iir_coe[i];
930 }
931 for (i = 0; i < ISP32_RAWAF_VFIR_COE_NUM; i++) {
932 isp_cfg.meas.rawaf.v1fir_coe[i] = af_data.v1_fir_coe[i];
933 isp_cfg.meas.rawaf.v2fir_coe[i] = af_data.v2_fir_coe[i];
934 }
935 isp_cfg.meas.rawaf.highlit_thresh = af_data.highlit_thresh;
936
937 // rawae3 is used by af now!!!
938 if (af_data.af_en && af_data.ae_mode) {
939 isp_cfg.module_ens |= ISP2X_MODULE_RAWAE3;
940 isp_cfg.module_en_update |= ISP2X_MODULE_RAWAE3;
941 isp_cfg.module_cfg_update |= ISP2X_MODULE_RAWAE3;
942
943 isp_cfg.meas.rawae3.win.h_offs = af_data.wina_h_offs;
944 isp_cfg.meas.rawae3.win.v_offs = af_data.wina_v_offs;
945 isp_cfg.meas.rawae3.win.h_size = af_data.wina_h_size;
946 isp_cfg.meas.rawae3.win.v_size = af_data.wina_v_size;
947 }
948 mLatestMeasCfg.rawaf = isp_cfg.meas.rawaf;
949 mLatestMeasCfg.rawae3 = isp_cfg.meas.rawae3;
950 }
951 #endif
952 #if RKAIQ_HAVE_AF_V32_LITE || RKAIQ_ONLY_AF_STATS_V32_LITE
convertAiqAfLiteToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,const rk_aiq_isp_af_v32_t & af_data,bool af_cfg_udpate)953 void Isp32Params::convertAiqAfLiteToIsp32Params(struct isp32_isp_params_cfg& isp_cfg,
954 const rk_aiq_isp_af_v32_t& af_data,
955 bool af_cfg_udpate) {
956 int i;
957
958 if (!af_cfg_udpate) return;
959
960 if (af_data.af_en) isp_cfg.module_ens |= ISP2X_MODULE_RAWAF;
961 isp_cfg.module_en_update |= ISP2X_MODULE_RAWAF;
962 isp_cfg.module_cfg_update |= ISP2X_MODULE_RAWAF;
963
964 isp_cfg.meas.rawaf.rawaf_sel = af_data.rawaf_sel;
965 isp_cfg.meas.rawaf.gamma_en = af_data.gamma_en;
966 isp_cfg.meas.rawaf.gaus_en = af_data.gaus_en;
967 isp_cfg.meas.rawaf.v1_fir_sel = af_data.v1_fir_sel;
968 isp_cfg.meas.rawaf.hiir_en = af_data.hiir_en;
969 isp_cfg.meas.rawaf.viir_en = af_data.viir_en;
970 isp_cfg.meas.rawaf.v1_fv_mode = af_data.v1_fv_outmode;
971 isp_cfg.meas.rawaf.v2_fv_mode = af_data.v2_fv_outmode;
972 isp_cfg.meas.rawaf.h1_fv_mode = af_data.h1_fv_outmode;
973 isp_cfg.meas.rawaf.h2_fv_mode = af_data.h2_fv_outmode;
974 isp_cfg.meas.rawaf.ldg_en = af_data.ldg_en;
975 isp_cfg.meas.rawaf.accu_8bit_mode = af_data.accu_8bit_mode;
976 isp_cfg.meas.rawaf.y_mode = af_data.y_mode;
977 isp_cfg.meas.rawaf.vldg_sel = af_data.vldg_sel;
978 isp_cfg.meas.rawaf.sobel_sel = af_data.sobel_sel;
979 isp_cfg.meas.rawaf.v_dnscl_mode = af_data.v_dnscl_mode;
980 isp_cfg.meas.rawaf.from_awb = af_data.from_awb;
981 isp_cfg.meas.rawaf.from_ynr = af_data.from_ynr;
982 if (af_data.af_en) {
983 isp_cfg.meas.rawaf.ae_mode = af_data.ae_mode;
984 isp_cfg.meas.rawaf.ae_config_use = af_data.ae_config_use;
985 isp_cfg.meas.rawaf.ae_sel = af_data.ae_sel;
986 } else {
987 isp_cfg.meas.rawaf.ae_mode = 0;
988 isp_cfg.meas.rawaf.ae_config_use = 1;
989 isp_cfg.meas.rawaf.ae_sel = 1;
990 }
991
992 memcpy(isp_cfg.meas.rawaf.line_en, af_data.line_en,
993 ISP32_RAWAF_LINE_NUM * sizeof(unsigned char));
994 memcpy(isp_cfg.meas.rawaf.line_num, af_data.line_num,
995 ISP32_RAWAF_LINE_NUM * sizeof(unsigned char));
996
997 isp_cfg.meas.rawaf.num_afm_win = af_data.window_num;
998 isp_cfg.meas.rawaf.win[0].h_offs = af_data.wina_h_offs;
999 isp_cfg.meas.rawaf.win[0].v_offs = af_data.wina_v_offs;
1000 isp_cfg.meas.rawaf.win[0].h_size = af_data.wina_h_size;
1001 isp_cfg.meas.rawaf.win[0].v_size = af_data.wina_v_size;
1002 isp_cfg.meas.rawaf.win[1].h_offs = af_data.winb_h_offs;
1003 isp_cfg.meas.rawaf.win[1].v_offs = af_data.winb_v_offs;
1004 isp_cfg.meas.rawaf.win[1].h_size = af_data.winb_h_size;
1005 isp_cfg.meas.rawaf.win[1].v_size = af_data.winb_v_size;
1006
1007 memcpy(isp_cfg.meas.rawaf.gamma_y, af_data.gamma_y,
1008 ISP32_RAWAF_GAMMA_NUM * sizeof(unsigned short));
1009
1010 /* THRES */
1011 isp_cfg.meas.rawaf.afm_thres = af_data.thres;
1012 /* VAR_SHIFT */
1013 isp_cfg.meas.rawaf.afm_var_shift[0] = af_data.shift_sum_a;
1014 isp_cfg.meas.rawaf.lum_var_shift[0] = af_data.shift_y_a;
1015 isp_cfg.meas.rawaf.afm_var_shift[1] = af_data.shift_sum_b;
1016 isp_cfg.meas.rawaf.lum_var_shift[1] = af_data.shift_y_b;
1017 /* HVIIR_VAR_SHIFT */
1018 isp_cfg.meas.rawaf.h1iir_var_shift = af_data.h1_fv_shift;
1019 isp_cfg.meas.rawaf.h2iir_var_shift = af_data.h2_fv_shift;
1020 isp_cfg.meas.rawaf.v1iir_var_shift = af_data.v1_fv_shift;
1021 isp_cfg.meas.rawaf.v2iir_var_shift = af_data.v2_fv_shift;
1022
1023 /* HIIR_THRESH */
1024 isp_cfg.meas.rawaf.h_fv_thresh = af_data.h_fv_thresh;
1025 isp_cfg.meas.rawaf.h_fv_limit = af_data.h_fv_limit;
1026 isp_cfg.meas.rawaf.h_fv_slope = af_data.h_fv_slope;
1027 isp_cfg.meas.rawaf.v_fv_thresh = af_data.v_fv_thresh;
1028 isp_cfg.meas.rawaf.v_fv_limit = af_data.v_fv_limit;
1029 isp_cfg.meas.rawaf.v_fv_slope = af_data.v_fv_slope;
1030
1031 for (i = 0; i < ISP32_RAWAF_CURVE_NUM; i++) {
1032 isp_cfg.meas.rawaf.curve_h[i].ldg_lumth = af_data.h_ldg_lumth[i];
1033 isp_cfg.meas.rawaf.curve_h[i].ldg_gain = af_data.h_ldg_gain[i];
1034 isp_cfg.meas.rawaf.curve_h[i].ldg_gslp = af_data.h_ldg_gslp[i];
1035 isp_cfg.meas.rawaf.curve_v[i].ldg_lumth = af_data.v_ldg_lumth[i];
1036 isp_cfg.meas.rawaf.curve_v[i].ldg_gain = af_data.v_ldg_gain[i];
1037 isp_cfg.meas.rawaf.curve_v[i].ldg_gslp = af_data.v_ldg_gslp[i];
1038 }
1039
1040 for (i = 0; i < ISP32_RAWAF_HIIR_COE_NUM; i++) {
1041 isp_cfg.meas.rawaf.h1iir1_coe[i] = af_data.h1_iir1_coe[i];
1042 isp_cfg.meas.rawaf.h1iir2_coe[i] = af_data.h1_iir2_coe[i];
1043 isp_cfg.meas.rawaf.h2iir1_coe[i] = af_data.h2_iir1_coe[i];
1044 isp_cfg.meas.rawaf.h2iir2_coe[i] = af_data.h2_iir2_coe[i];
1045 }
1046 for (i = 0; i < ISP32_RAWAF_GAUS_COE_NUM; i++) {
1047 isp_cfg.meas.rawaf.gaus_coe[i] = af_data.gaus_coe[i];
1048 }
1049 for (i = 0; i < ISP32_RAWAF_VIIR_COE_NUM; i++) {
1050 isp_cfg.meas.rawaf.v1iir_coe[i] = af_data.v1_iir_coe[i];
1051 isp_cfg.meas.rawaf.v2iir_coe[i] = af_data.v2_iir_coe[i];
1052 }
1053 for (i = 0; i < ISP32_RAWAF_VFIR_COE_NUM; i++) {
1054 isp_cfg.meas.rawaf.v1fir_coe[i] = af_data.v1_fir_coe[i];
1055 isp_cfg.meas.rawaf.v2fir_coe[i] = af_data.v2_fir_coe[i];
1056 }
1057 isp_cfg.meas.rawaf.highlit_thresh = af_data.highlit_thresh;
1058
1059 /* af32 add */
1060 isp_cfg.meas.rawaf.bnr2af_sel = af_data.from_bnr;
1061 isp_cfg.meas.rawaf.tnrin_shift = af_data.bnrin_shift;
1062 isp_cfg.meas.rawaf.hldg_dilate_num = af_data.hldg_dilate_num;
1063 isp_cfg.meas.rawaf.hiir_left_border_mode = af_data.hiir_left_border_mode;
1064 isp_cfg.meas.rawaf.avg_ds_en = af_data.avg_ds_en;
1065 isp_cfg.meas.rawaf.avg_ds_mode = af_data.avg_ds_mode;
1066 isp_cfg.meas.rawaf.h1_acc_mode = af_data.h1_acc_mode;
1067 isp_cfg.meas.rawaf.h2_acc_mode = af_data.h2_acc_mode;
1068 isp_cfg.meas.rawaf.v1_acc_mode = af_data.v1_acc_mode;
1069 isp_cfg.meas.rawaf.v2_acc_mode = af_data.v2_acc_mode;
1070 isp_cfg.meas.rawaf.h_fv_limit = af_data.h_fv_limit;
1071 isp_cfg.meas.rawaf.h_fv_slope = af_data.h_fv_slope;
1072 isp_cfg.meas.rawaf.v_fv_limit = af_data.v_fv_limit;
1073 isp_cfg.meas.rawaf.v_fv_slope = af_data.v_fv_slope;
1074 isp_cfg.meas.rawaf.bls_en = af_data.bls_en;
1075 isp_cfg.meas.rawaf.bls_offset = af_data.bls_offset;
1076
1077 // rawae0 is used by af now!!!
1078 if (af_data.af_en && af_data.ae_mode) {
1079 isp_cfg.module_ens |= ISP2X_MODULE_RAWAE0;
1080 isp_cfg.module_en_update |= ISP2X_MODULE_RAWAE0;
1081 isp_cfg.module_cfg_update |= ISP2X_MODULE_RAWAE0;
1082
1083 isp_cfg.meas.rawae0.win.h_offs = af_data.wina_h_offs;
1084 isp_cfg.meas.rawae0.win.v_offs = af_data.wina_v_offs;
1085 isp_cfg.meas.rawae0.win.h_size = af_data.wina_h_size;
1086 isp_cfg.meas.rawae0.win.v_size = af_data.wina_v_size;
1087 }
1088 mLatestMeasCfg.rawaf = isp_cfg.meas.rawaf;
1089 mLatestMeasCfg.rawae3 = isp_cfg.meas.rawae3;
1090 }
1091 #endif
1092 #if RKAIQ_HAVE_CAC_V11
convertAiqCacToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,const rk_aiq_isp_cac_v32_t & cac_cfg)1093 void Isp32Params::convertAiqCacToIsp32Params(struct isp32_isp_params_cfg& isp_cfg,
1094 const rk_aiq_isp_cac_v32_t& cac_cfg) {
1095
1096 LOGD_ACAC("convert CAC params enable %d", cac_cfg.enable);
1097
1098 if (cac_cfg.enable) {
1099 isp_cfg.module_en_update |= ISP3X_MODULE_CAC;
1100 isp_cfg.module_ens |= ISP3X_MODULE_CAC;
1101 isp_cfg.module_cfg_update |= ISP3X_MODULE_CAC;
1102 } else {
1103 isp_cfg.module_en_update |= (ISP3X_MODULE_CAC);
1104 isp_cfg.module_ens &= ~(ISP3X_MODULE_CAC);
1105 isp_cfg.module_cfg_update &= ~(ISP3X_MODULE_CAC);
1106 }
1107
1108 struct isp32_cac_cfg* cfg = &isp_cfg.others.cac_cfg;
1109 memcpy(cfg, &cac_cfg.cfg, sizeof(*cfg));
1110
1111 #if 1
1112 LOGD_ACAC("Dump CAC config: ");
1113 LOGD_ACAC("current enable: %d", cac_cfg.enable);
1114 LOGD_ACAC("by en: %d", cfg->bypass_en);
1115 LOGD_ACAC("center en: %d", cfg->center_en);
1116 LOGD_ACAC("center x: %d", cfg->center_width);
1117 LOGD_ACAC("center y: %d", cfg->center_height);
1118 LOGD_ACAC("psf shift bits: %d", cfg->psf_sft_bit);
1119 LOGD_ACAC("psf cfg num: %d", cfg->cfg_num);
1120 LOGD_ACAC("psf buf fd: %d", cfg->buf_fd);
1121 LOGD_ACAC("psf hwsize: %d", cfg->hsize);
1122 LOGD_ACAC("psf vsize: %d", cfg->vsize);
1123 for (int i = 0; i < RKCAC_STRENGTH_TABLE_LEN; i++) {
1124 LOGD_ACAC("strength %d: %d", i, cfg->strength[i]);
1125 }
1126 LOGD_ACAC("clip_g_mode : %d", cfg->clip_g_mode);
1127 LOGD_ACAC("edge_detect_en : %d", cfg->edge_detect_en);
1128 LOGD_ACAC("neg_clip0_en : %d", cfg->neg_clip0_en);
1129 LOGD_ACAC("flat_thed_b : %d", cfg->flat_thed_b);
1130 LOGD_ACAC("flat_thed_r : %d", cfg->flat_thed_r);
1131 LOGD_ACAC("offset_b : %d", cfg->offset_b);
1132 LOGD_ACAC("offset_r : %d", cfg->offset_r);
1133 LOGD_ACAC("expo_thed_b : %d", cfg->expo_thed_b);
1134 LOGD_ACAC("expo_thed_r : %d", cfg->expo_thed_r);
1135 LOGD_ACAC("expo_adj_b : %d", cfg->expo_adj_b);
1136 LOGD_ACAC("expo_adj_r : %d", cfg->expo_adj_r);
1137 #endif
1138 }
1139 #endif
1140
1141 #if RKAIQ_HAVE_BAYER2DNR_V23
convertAiqRawnrToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,rk_aiq_isp_baynr_v32_t & rawnr)1142 void Isp32Params::convertAiqRawnrToIsp32Params(struct isp32_isp_params_cfg& isp_cfg,
1143 rk_aiq_isp_baynr_v32_t& rawnr) {
1144 LOGD_ANR("%s:%d enter! enable:%d \n", __FUNCTION__, __LINE__, rawnr.bayer_en);
1145 bool enable = rawnr.bayer_en;
1146 if (enable) {
1147 isp_cfg.module_ens |= ISP3X_MODULE_BAYNR;
1148 } else {
1149 isp_cfg.module_ens &= ~(ISP3X_MODULE_BAYNR);
1150 }
1151
1152 isp_cfg.module_en_update |= ISP3X_MODULE_BAYNR;
1153
1154 #if 1
1155 isp_cfg.module_cfg_update |= ISP3X_MODULE_BAYNR;
1156
1157 struct isp32_baynr_cfg* pBayernr = &isp_cfg.others.baynr_cfg;
1158 pBayernr->bay3d_gain_en = rawnr.bay3d_gain_en;
1159 pBayernr->lg2_mode = rawnr.lg2_mode;
1160 pBayernr->gauss_en = rawnr.gauss_en;
1161 pBayernr->log_bypass = rawnr.log_bypass;
1162
1163 pBayernr->dgain0 = rawnr.dgain[0];
1164 pBayernr->dgain1 = rawnr.dgain[1];
1165 pBayernr->dgain2 = rawnr.dgain[2];
1166
1167 pBayernr->pix_diff = rawnr.pix_diff;
1168
1169 pBayernr->diff_thld = rawnr.diff_thld;
1170 pBayernr->softthld = rawnr.softthld;
1171
1172 pBayernr->bltflt_streng = rawnr.bltflt_streng;
1173 pBayernr->reg_w1 = rawnr.reg_w1;
1174
1175 for (int i = 0; i < ISP3X_BAYNR_XY_NUM; i++) {
1176 pBayernr->sigma_x[i] = rawnr.sigma_x[i];
1177 pBayernr->sigma_y[i] = rawnr.sigma_y[i];
1178 }
1179
1180 pBayernr->weit_d2 = rawnr.weit_d[2];
1181 pBayernr->weit_d1 = rawnr.weit_d[1];
1182 pBayernr->weit_d0 = rawnr.weit_d[0];
1183
1184 pBayernr->lg2_lgoff = rawnr.lg2_lgoff;
1185 pBayernr->lg2_off = rawnr.lg2_off;
1186
1187 pBayernr->dat_max = rawnr.dat_max;
1188
1189 pBayernr->rgain_off = rawnr.rgain_off;
1190 pBayernr->bgain_off = rawnr.bgain_off;
1191
1192 for (int i = 0; i < ISP32_BAYNR_GAIN_NUM; i++) {
1193 pBayernr->gain_x[i] = rawnr.gain_x[i];
1194 pBayernr->gain_y[i] = rawnr.gain_y[i];
1195 }
1196 #endif
1197 LOGD_ANR("%s:%d exit!\n", __FUNCTION__, __LINE__);
1198 }
1199 #endif
1200 #if (RKAIQ_HAVE_BAYERTNR_V23 || RKAIQ_HAVE_BAYERTNR_V23_LITE)
convertAiqTnrToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,rk_aiq_isp_tnr_v32_t & tnr)1201 void Isp32Params::convertAiqTnrToIsp32Params(struct isp32_isp_params_cfg& isp_cfg,
1202 rk_aiq_isp_tnr_v32_t& tnr) {
1203 LOGD_ANR("%s:%d enter! enable:%d\n", __FUNCTION__, __LINE__, tnr.bay3d_en);
1204 bool enable = tnr.bay3d_en;
1205 if (enable) {
1206 isp_cfg.module_ens |= ISP3X_MODULE_BAY3D;
1207 // bayer3dnr enable bayer2dnr must enable at the same time
1208 isp_cfg.module_ens |= ISP3X_MODULE_BAYNR;
1209 isp_cfg.module_en_update |= ISP3X_MODULE_BAYNR;
1210 } else {
1211 // isp_cfg.module_ens &= ~(ISP3X_MODULE_BAY3D);
1212 isp_cfg.module_ens |= ISP3X_MODULE_BAY3D;
1213 }
1214
1215 isp_cfg.module_en_update |= ISP3X_MODULE_BAY3D;
1216
1217 #if 1
1218 isp_cfg.module_cfg_update |= ISP3X_MODULE_BAY3D;
1219
1220 struct isp32_bay3d_cfg* pBayertnr = &isp_cfg.others.bay3d_cfg;
1221
1222 pBayertnr->bwsaving_en = tnr.bwsaving_en;
1223 pBayertnr->bypass_en = tnr.bypass_en;
1224 pBayertnr->hibypass_en = tnr.hibypass_en;
1225 pBayertnr->lobypass_en = tnr.lobypass_en;
1226 pBayertnr->himed_bypass_en = tnr.himed_bypass_en;
1227 pBayertnr->higaus_bypass_en = tnr.higaus_bypass_en;
1228 pBayertnr->hiabs_possel = tnr.hiabs_possel;
1229 pBayertnr->hichnsplit_en = tnr.hichnsplit_en;
1230 pBayertnr->lomed_bypass_en = tnr.lomed_bypass_en;
1231 pBayertnr->logaus5_bypass_en = tnr.logaus5_bypass_en;
1232 pBayertnr->logaus3_bypass_en = tnr.logaus3_bypass_en;
1233 pBayertnr->glbpk_en = tnr.glbpk_en;
1234 pBayertnr->loswitch_protect = tnr.loswitch_protect;
1235
1236 pBayertnr->softwgt = tnr.softwgt;
1237 pBayertnr->hidif_th = tnr.hidif_th;
1238
1239 pBayertnr->glbpk2 = tnr.glbpk2;
1240
1241 /* BAY3D_CTRL1 */
1242 pBayertnr->hiwgt_opt_en = tnr.hiwgt_opt_en;
1243 pBayertnr->hichncor_en = tnr.hichncor_en;
1244 pBayertnr->bwopt_gain_dis = tnr.bwopt_gain_dis;
1245 pBayertnr->lo4x8_en = tnr.lo4x8_en;
1246 pBayertnr->lo4x4_en = tnr.lo4x4_en;
1247 pBayertnr->hisig_ind_sel = tnr.hisig_ind_sel;
1248 pBayertnr->pksig_ind_sel = tnr.pksig_ind_sel;
1249 pBayertnr->iirwr_rnd_en = tnr.iirwr_rnd_en;
1250 pBayertnr->curds_high_en = tnr.curds_high_en;
1251 pBayertnr->higaus3_mode = tnr.higaus3_mode;
1252 pBayertnr->higaus5x5_en = tnr.higaus5x5_en;
1253 pBayertnr->wgtmix_opt_en = tnr.wgtmix_opt_en;
1254
1255 pBayertnr->wgtmm_opt_en = tnr.wgtmm_opt_en;
1256 pBayertnr->wgtmm_sel_en = tnr.wgtmm_sel_en;
1257
1258 pBayertnr->wgtlmt = tnr.wgtlmt;
1259 pBayertnr->wgtratio = tnr.wgtratio;
1260
1261 for (int i = 0; i < ISP3X_BAY3D_XY_NUM; i++) {
1262 pBayertnr->sig0_x[i] = tnr.sig0_x[i];
1263 pBayertnr->sig0_y[i] = tnr.sig0_y[i];
1264
1265 pBayertnr->sig1_x[i] = tnr.sig1_x[i];
1266 pBayertnr->sig1_y[i] = tnr.sig1_y[i];
1267
1268 // pBayertnr->sig2_x[i] = tnr.bay3d_sig1_x[i];
1269 pBayertnr->sig2_y[i] = tnr.sig2_y[i];
1270 }
1271
1272 pBayertnr->wgtmin = tnr.wgtmin;
1273
1274 pBayertnr->hisigrat0 = tnr.hisigrat0;
1275 pBayertnr->hisigrat1 = tnr.hisigrat1;
1276
1277 pBayertnr->hisigoff0 = tnr.hisigoff0;
1278 pBayertnr->hisigoff1 = tnr.hisigoff1;
1279
1280 pBayertnr->losigoff = tnr.losigoff;
1281 pBayertnr->losigrat = tnr.losigrat;
1282
1283 pBayertnr->rgain_off = tnr.rgain_off;
1284 pBayertnr->bgain_off = tnr.bgain_off;
1285
1286 pBayertnr->siggaus0 = tnr.siggaus0;
1287 pBayertnr->siggaus1 = tnr.siggaus1;
1288 pBayertnr->siggaus2 = tnr.siggaus2;
1289 pBayertnr->siggaus3 = tnr.siggaus3;
1290 #endif
1291 LOGD_ANR("%s:%d exit!\n", __FUNCTION__, __LINE__);
1292 }
1293 #endif
1294
1295 #if RKAIQ_HAVE_YNR_V22
convertAiqYnrToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,rk_aiq_isp_ynr_v32_t & ynr)1296 void Isp32Params::convertAiqYnrToIsp32Params(struct isp32_isp_params_cfg& isp_cfg,
1297 rk_aiq_isp_ynr_v32_t& ynr) {
1298 LOGD_ANR("%s:%d enter! enable:%d \n", __FUNCTION__, __LINE__, ynr.ynr_en);
1299
1300 bool enable = ynr.ynr_en;
1301
1302 isp_cfg.module_en_update |= ISP3X_MODULE_YNR;
1303 isp_cfg.module_ens |= ISP3X_MODULE_YNR;
1304
1305 #if 1
1306
1307 isp_cfg.module_cfg_update |= ISP3X_MODULE_YNR;
1308
1309 struct isp32_ynr_cfg* pYnr = &isp_cfg.others.ynr_cfg;
1310
1311 pYnr->rnr_en = ynr.rnr_en;
1312 pYnr->thumb_mix_cur_en = ynr.thumb_mix_cur_en;
1313 pYnr->global_gain_alpha = ynr.global_gain_alpha;
1314 pYnr->global_gain = ynr.global_gain;
1315 pYnr->flt1x1_bypass_sel = ynr.flt1x1_bypass_sel;
1316 pYnr->nlm11x11_bypass = ynr.nlm11x11_bypass;
1317 pYnr->flt1x1_bypass_sel = ynr.flt1x1_bypass_sel;
1318 pYnr->flt1x1_bypass = ynr.flt1x1_bypass;
1319 pYnr->lgft3x3_bypass = ynr.lgft3x3_bypass;
1320 pYnr->lbft5x5_bypass = ynr.lbft5x5_bypass;
1321 pYnr->bft3x3_bypass = ynr.bft3x3_bypass;
1322 if (!enable) {
1323 pYnr->nlm11x11_bypass = 0x01;
1324 pYnr->flt1x1_bypass = 0x01;
1325 pYnr->lgft3x3_bypass = 0x01;
1326 pYnr->lbft5x5_bypass = 0x01;
1327 pYnr->bft3x3_bypass = 0x01;
1328 }
1329
1330 pYnr->rnr_max_r = ynr.rnr_max_r;
1331 pYnr->local_gainscale = ynr.local_gainscale;
1332
1333 pYnr->rnr_center_coorh = ynr.rnr_center_coorh;
1334 pYnr->rnr_center_coorv = ynr.rnr_center_coorv;
1335
1336 pYnr->loclagain_adj_thresh = ynr.localgain_adj_thresh;
1337 pYnr->localgain_adj = ynr.localgain_adj;
1338
1339 pYnr->low_bf_inv1 = ynr.low_bf_inv1;
1340 pYnr->low_bf_inv0 = ynr.low_bf_inv0;
1341
1342 pYnr->low_peak_supress = ynr.low_peak_supress;
1343 pYnr->low_thred_adj = ynr.low_thred_adj;
1344
1345 pYnr->low_dist_adj = ynr.low_dist_adj;
1346 pYnr->low_edge_adj_thresh = ynr.low_edge_adj_thresh;
1347
1348 pYnr->low_bi_weight = ynr.low_bi_weight;
1349 pYnr->low_weight = ynr.low_weight;
1350 pYnr->low_center_weight = ynr.low_center_weight;
1351
1352 pYnr->frame_full_size = ynr.frame_full_size;
1353 pYnr->lbf_weight_thres = ynr.lbf_weight_thres;
1354
1355 pYnr->low_gauss1_coeff2 = ynr.low_gauss1_coeff2;
1356 pYnr->low_gauss1_coeff1 = ynr.low_gauss1_coeff1;
1357 pYnr->low_gauss1_coeff0 = ynr.low_gauss1_coeff0;
1358
1359 pYnr->low_gauss2_coeff2 = ynr.low_gauss2_coeff2;
1360 pYnr->low_gauss2_coeff1 = ynr.low_gauss2_coeff1;
1361 pYnr->low_gauss2_coeff0 = ynr.low_gauss2_coeff0;
1362
1363 for (int i = 0; i < ISP3X_YNR_XY_NUM; i++) {
1364 pYnr->luma_points_x[i] = ynr.luma_points_x[i];
1365 pYnr->lsgm_y[i] = ynr.lsgm_y[i];
1366 //pYnr->hsgm_y[i] = ynr.ynr_hsgm_y[i];
1367 pYnr->rnr_strength3[i] = ynr.rnr_strength[i];
1368 }
1369
1370 pYnr->nlm_min_sigma = ynr.nlm_min_sigma;
1371 pYnr->nlm_hi_gain_alpha = ynr.nlm_hi_gain_alpha;
1372 pYnr->nlm_hi_bf_scale = ynr.nlm_hi_bf_scale;
1373
1374 pYnr->nlm_coe[0] = ynr.nlm_coe_0;
1375 pYnr->nlm_coe[1] = ynr.nlm_coe_1;
1376 pYnr->nlm_coe[2] = ynr.nlm_coe_2;
1377 pYnr->nlm_coe[3] = ynr.nlm_coe_3;
1378 pYnr->nlm_coe[4] = ynr.nlm_coe_4;
1379 pYnr->nlm_coe[5] = ynr.nlm_coe_5;
1380
1381 pYnr->nlm_center_weight = ynr.nlm_center_weight;
1382 pYnr->nlm_weight_offset = ynr.nlm_weight_offset;
1383
1384 pYnr->nlm_nr_weight = ynr.nlm_nr_weight;
1385 #endif
1386 LOGD_ANR("%s:%d exit!\n", __FUNCTION__, __LINE__);
1387 }
1388 #endif
1389 #if (RKAIQ_HAVE_CNR_V30 || RKAIQ_HAVE_CNR_V30_LITE)
convertAiqUvnrToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,rk_aiq_isp_cnr_v32_t & uvnr)1390 void Isp32Params::convertAiqUvnrToIsp32Params(struct isp32_isp_params_cfg& isp_cfg,
1391 rk_aiq_isp_cnr_v32_t& uvnr) {
1392 LOGD_ANR("%s:%d enter! enable:%d \n", __FUNCTION__, __LINE__, uvnr.cnr_en);
1393
1394 bool enable = uvnr.cnr_en;
1395
1396 isp_cfg.module_en_update |= ISP3X_MODULE_CNR;
1397 isp_cfg.module_ens |= ISP3X_MODULE_CNR;
1398
1399
1400 #if 1
1401
1402 isp_cfg.module_cfg_update |= ISP3X_MODULE_CNR;
1403 struct isp32_cnr_cfg* pCnr = &isp_cfg.others.cnr_cfg;
1404
1405 pCnr->exgain_bypass = uvnr.exgain_bypass;
1406 pCnr->yuv422_mode = uvnr.yuv422_mode;
1407 pCnr->thumb_mode = uvnr.thumb_mode;
1408 pCnr->bf3x3_wgt0_sel = uvnr.bf3x3_wgt0_sel;
1409
1410 pCnr->gain_iso = uvnr.gain_iso;
1411 pCnr->global_gain_alpha = uvnr.global_gain_alpha;
1412 pCnr->global_gain = uvnr.global_gain;
1413
1414 pCnr->thumb_sigma_c = uvnr.thumb_sigma_c;
1415 pCnr->thumb_sigma_y = uvnr.thumb_sigma_y;
1416
1417 pCnr->thumb_bf_ratio = uvnr.thumb_bf_ratio;
1418
1419 pCnr->lbf1x7_weit_d0 = uvnr.lbf1x7_weit_d[0];
1420 pCnr->lbf1x7_weit_d1 = uvnr.lbf1x7_weit_d[1];
1421 pCnr->lbf1x7_weit_d2 = uvnr.lbf1x7_weit_d[2];
1422 pCnr->lbf1x7_weit_d3 = uvnr.lbf1x7_weit_d[3];
1423
1424 pCnr->iir_uvgain = uvnr.iir_uvgain;
1425 pCnr->iir_strength = uvnr.iir_strength;
1426 pCnr->exp_shift = uvnr.exp_shift;
1427 pCnr->wgt_slope = uvnr.wgt_slope;
1428
1429 pCnr->chroma_ghost = uvnr.chroma_ghost;
1430 pCnr->iir_uv_clip = uvnr.iir_uv_clip;
1431
1432 for (int i = 0; i < 6; i++) {
1433 pCnr->gaus_coe[i] = uvnr.gaus_coe[i];
1434 }
1435
1436 pCnr->gaus_ratio = uvnr.gaus_ratio;
1437 pCnr->bf_wgt_clip = uvnr.bf_wgt_clip;
1438 pCnr->global_alpha = uvnr.global_alpha;
1439 if (!enable) {
1440 pCnr->global_alpha = 0x000;
1441 LOGD_ANR("0x0024 global_alpha:0x%x 0x%x\n", uvnr.global_alpha, pCnr->global_alpha);
1442 }
1443
1444 pCnr->uv_gain = uvnr.uv_gain;
1445 pCnr->sigma_r = uvnr.sigma_r;
1446 pCnr->bf_ratio = uvnr.bf_ratio;
1447
1448 pCnr->adj_offset = uvnr.adj_offset;
1449 pCnr->adj_ratio = uvnr.adj_ratio;
1450
1451 for (int i = 0; i < ISP32_CNR_SIGMA_Y_NUM; i++) {
1452 pCnr->sigma_y[i] = uvnr.sigma_y[i];
1453 }
1454
1455 pCnr->iir_gain_alpha = uvnr.iir_gain_alpha;
1456 pCnr->iir_global_gain = uvnr.iir_global_gain;
1457 #endif
1458 LOGD_ANR("%s:%d exit!\n", __FUNCTION__, __LINE__);
1459 }
1460 #endif
1461
1462 #if RKAIQ_HAVE_DEBAYER_V2 || RKAIQ_HAVE_DEBAYER_V2_LITE
convertAiqAdebayerToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,rk_aiq_isp_debayer_v32_t & debayer)1463 void Isp32Params::convertAiqAdebayerToIsp32Params(struct isp32_isp_params_cfg& isp_cfg,
1464 rk_aiq_isp_debayer_v32_t & debayer)
1465 {
1466
1467 if (debayer.updatecfg) {
1468 if (debayer.enable) {
1469 isp_cfg.module_ens |= ISP2X_MODULE_DEBAYER;
1470 isp_cfg.module_en_update |= ISP2X_MODULE_DEBAYER;
1471 isp_cfg.module_cfg_update |= ISP2X_MODULE_DEBAYER;
1472 } else {
1473 isp_cfg.module_ens &= ~ISP2X_MODULE_DEBAYER;
1474 isp_cfg.module_en_update |= ISP2X_MODULE_DEBAYER;
1475 }
1476 } else {
1477 return;
1478 }
1479 /* CONTROL */
1480 isp_cfg.others.debayer_cfg.filter_c_en = debayer.filter_c_en;
1481 isp_cfg.others.debayer_cfg.filter_g_en = debayer.filter_g_en;
1482
1483 /* G_INTERP */
1484 isp_cfg.others.debayer_cfg.clip_en = debayer.clip_en;
1485 isp_cfg.others.debayer_cfg.dist_scale = debayer.dist_scale;
1486 isp_cfg.others.debayer_cfg.thed0 = debayer.thed0;
1487 isp_cfg.others.debayer_cfg.thed1 = debayer.thed1;
1488 isp_cfg.others.debayer_cfg.select_thed = debayer.select_thed;
1489 isp_cfg.others.debayer_cfg.max_ratio = debayer.max_ratio;
1490
1491 /* G_INTERP_FILTER1 */
1492 isp_cfg.others.debayer_cfg.filter1_coe1 = debayer.filter1_coe[0];
1493 isp_cfg.others.debayer_cfg.filter1_coe2 = debayer.filter1_coe[1];
1494 isp_cfg.others.debayer_cfg.filter1_coe3 = debayer.filter1_coe[2];
1495 isp_cfg.others.debayer_cfg.filter1_coe4 = debayer.filter1_coe[3];
1496
1497 /* G_INTERP_FILTER2 */
1498 isp_cfg.others.debayer_cfg.filter2_coe1 = debayer.filter2_coe[0];
1499 isp_cfg.others.debayer_cfg.filter2_coe2 = debayer.filter2_coe[1];
1500 isp_cfg.others.debayer_cfg.filter2_coe3 = debayer.filter2_coe[2];
1501 isp_cfg.others.debayer_cfg.filter2_coe4 = debayer.filter2_coe[3];
1502
1503 /* G_INTERP_OFFSET */
1504 isp_cfg.others.debayer_cfg.hf_offset = debayer.hf_offset;
1505 isp_cfg.others.debayer_cfg.gain_offset = debayer.gain_offset;
1506
1507 /* G_FILTER_OFFSET */
1508 isp_cfg.others.debayer_cfg.offset = debayer.offset;
1509
1510 #if RKAIQ_HAVE_DEBAYER_V2
1511 /* C_FILTER_GUIDE_GAUS */
1512 isp_cfg.others.debayer_cfg.guid_gaus_coe0 = debayer.guid_gaus_coe[0];
1513 isp_cfg.others.debayer_cfg.guid_gaus_coe1 = debayer.guid_gaus_coe[1];
1514 isp_cfg.others.debayer_cfg.guid_gaus_coe2 = debayer.guid_gaus_coe[2];
1515
1516 /* C_FILTER_CE_GAUS */
1517 isp_cfg.others.debayer_cfg.ce_gaus_coe0 = debayer.ce_gaus_coe[0];
1518 isp_cfg.others.debayer_cfg.ce_gaus_coe1 = debayer.ce_gaus_coe[1];
1519 isp_cfg.others.debayer_cfg.ce_gaus_coe2 = debayer.ce_gaus_coe[2];
1520
1521 /* C_FILTER_ALPHA_GAUS */
1522 isp_cfg.others.debayer_cfg.alpha_gaus_coe0 = debayer.alpha_gaus_coe[0];
1523 isp_cfg.others.debayer_cfg.alpha_gaus_coe1 = debayer.alpha_gaus_coe[1];
1524 isp_cfg.others.debayer_cfg.alpha_gaus_coe2 = debayer.alpha_gaus_coe[2];
1525
1526 /* C_FILTER_IIR */
1527 isp_cfg.others.debayer_cfg.ce_sgm = debayer.ce_sgm;
1528 isp_cfg.others.debayer_cfg.exp_shift = debayer.exp_shift;
1529 isp_cfg.others.debayer_cfg.wgtslope = debayer.wgtslope;
1530 isp_cfg.others.debayer_cfg.wet_clip = debayer.wet_clip;
1531 isp_cfg.others.debayer_cfg.wet_ghost = debayer.wet_ghost;
1532
1533 /* C_FILTER_BF */
1534 isp_cfg.others.debayer_cfg.bf_clip = debayer.bf_clip;
1535 isp_cfg.others.debayer_cfg.bf_curwgt = debayer.bf_curwgt;
1536 isp_cfg.others.debayer_cfg.bf_sgm = debayer.bf_sgm;
1537
1538 /* C_FILTER_LOG_OFFSET */
1539 isp_cfg.others.debayer_cfg.loghf_offset = debayer.loghf_offset;
1540 isp_cfg.others.debayer_cfg.loggd_offset = debayer.loggd_offset;
1541
1542 /* C_FILTER_ALPHA */
1543 isp_cfg.others.debayer_cfg.alpha_offset = debayer.alpha_offset;
1544 isp_cfg.others.debayer_cfg.alpha_scale = debayer.alpha_scale;
1545
1546 /* C_FILTER_EDGE */
1547 isp_cfg.others.debayer_cfg.edge_offset = debayer.edge_offset;
1548 isp_cfg.others.debayer_cfg.edge_scale = debayer.edge_scale;
1549 #endif
1550 }
1551 #endif
1552
1553 #if RKAIQ_HAVE_MERGE_V12
convertAiqMergeToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,const rk_aiq_isp_merge_v32_t & amerge_data)1554 void Isp32Params::convertAiqMergeToIsp32Params(struct isp32_isp_params_cfg& isp_cfg,
1555 const rk_aiq_isp_merge_v32_t& amerge_data) {
1556 isp_cfg.module_en_update |= 1LL << RK_ISP2X_HDRMGE_ID;
1557 isp_cfg.module_ens |= 1LL << RK_ISP2X_HDRMGE_ID;
1558 isp_cfg.module_cfg_update |= 1LL << RK_ISP2X_HDRMGE_ID;
1559
1560 isp_cfg.others.hdrmge_cfg.mode = amerge_data.Merge_v12.mode;
1561 isp_cfg.others.hdrmge_cfg.gain0_inv = amerge_data.Merge_v12.gain0_inv;
1562 isp_cfg.others.hdrmge_cfg.gain0 = amerge_data.Merge_v12.gain0;
1563 isp_cfg.others.hdrmge_cfg.gain1_inv = amerge_data.Merge_v12.gain1_inv;
1564 isp_cfg.others.hdrmge_cfg.gain1 = amerge_data.Merge_v12.gain1;
1565 isp_cfg.others.hdrmge_cfg.gain2 = amerge_data.Merge_v12.gain2;
1566 isp_cfg.others.hdrmge_cfg.lm_dif_0p15 = amerge_data.Merge_v12.lm_dif_0p15;
1567 isp_cfg.others.hdrmge_cfg.lm_dif_0p9 = amerge_data.Merge_v12.lm_dif_0p9;
1568 isp_cfg.others.hdrmge_cfg.ms_diff_0p15 = amerge_data.Merge_v12.ms_dif_0p15;
1569 isp_cfg.others.hdrmge_cfg.ms_dif_0p8 = amerge_data.Merge_v12.ms_dif_0p8;
1570 for (int i = 0; i < ISP3X_HDRMGE_L_CURVE_NUM; i++) {
1571 isp_cfg.others.hdrmge_cfg.curve.curve_0[i] = amerge_data.Merge_v12.l0_y[i];
1572 isp_cfg.others.hdrmge_cfg.curve.curve_1[i] = amerge_data.Merge_v12.l1_y[i];
1573 }
1574 for (int i = 0; i < ISP3X_HDRMGE_E_CURVE_NUM; i++)
1575 isp_cfg.others.hdrmge_cfg.e_y[i] = amerge_data.Merge_v12.e_y[i];
1576
1577 // merge v11 add
1578 isp_cfg.others.hdrmge_cfg.s_base = amerge_data.Merge_v12.s_base;
1579 isp_cfg.others.hdrmge_cfg.ms_thd0 = amerge_data.Merge_v12.ms_thd0;
1580 isp_cfg.others.hdrmge_cfg.ms_thd1 = amerge_data.Merge_v12.ms_thd1;
1581 isp_cfg.others.hdrmge_cfg.ms_scl = amerge_data.Merge_v12.ms_scl;
1582 isp_cfg.others.hdrmge_cfg.lm_thd0 = amerge_data.Merge_v12.lm_thd0;
1583 isp_cfg.others.hdrmge_cfg.lm_thd1 = amerge_data.Merge_v12.lm_thd1;
1584 isp_cfg.others.hdrmge_cfg.lm_scl = amerge_data.Merge_v12.lm_scl;
1585
1586 // merge v12 add
1587 isp_cfg.others.hdrmge_cfg.each_raw_en = amerge_data.Merge_v12.each_raw_en;
1588 isp_cfg.others.hdrmge_cfg.each_raw_gain0 = amerge_data.Merge_v12.each_raw_gain0;
1589 isp_cfg.others.hdrmge_cfg.each_raw_gain1 = amerge_data.Merge_v12.each_raw_gain1;
1590 for (int i = 0; i < ISP3X_HDRMGE_E_CURVE_NUM; i++) {
1591 isp_cfg.others.hdrmge_cfg.l_raw0[i] = amerge_data.Merge_v12.l_raw0[i];
1592 isp_cfg.others.hdrmge_cfg.l_raw1[i] = amerge_data.Merge_v12.l_raw1[i];
1593 }
1594
1595 #if 0
1596 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: gain0_inv %d", __LINE__, isp_cfg.others.hdrmge_cfg.gain0_inv);
1597 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: gain0 %d", __LINE__, isp_cfg.others.hdrmge_cfg.gain0);
1598 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: gain1_inv %d", __LINE__, isp_cfg.others.hdrmge_cfg.gain1_inv);
1599 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: gain1 %d", __LINE__, isp_cfg.others.hdrmge_cfg.gain1);
1600 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: gain2 %d", __LINE__, isp_cfg.others.hdrmge_cfg.gain2);
1601 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: lm_dif_0p15 %d", __LINE__, isp_cfg.others.hdrmge_cfg.lm_dif_0p15);
1602 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: lm_dif_0p9 %d", __LINE__, isp_cfg.others.hdrmge_cfg.lm_dif_0p9);
1603 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: ms_diff_0p15 %d", __LINE__, isp_cfg.others.hdrmge_cfg.ms_diff_0p15);
1604 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: ms_dif_0p8 %d", __LINE__, isp_cfg.others.hdrmge_cfg.ms_dif_0p8);
1605 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: s_base %d", __LINE__, isp_cfg.others.hdrmge_cfg.s_base);
1606 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: sw_hdrmge_ms_thd0 %d", __LINE__, isp_cfg.others.hdrmge_cfg.ms_thd0);
1607 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: ms_thd0 %d", __LINE__, isp_cfg.others.hdrmge_cfg.ms_thd0);
1608 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: ms_thd1 %d", __LINE__, isp_cfg.others.hdrmge_cfg.ms_thd1);
1609 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: ms_scl %d", __LINE__, isp_cfg.others.hdrmge_cfg.ms_scl);
1610 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: lm_thd0 %d", __LINE__, isp_cfg.others.hdrmge_cfg.lm_thd0);
1611 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: lm_thd1 %d", __LINE__, isp_cfg.others.hdrmge_cfg.lm_thd1);
1612 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: lm_scl %d", __LINE__, isp_cfg.others.hdrmge_cfg.lm_scl);
1613 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: each_raw_en 0x%x each_raw_gain0 0x%x each_raw_gain1 0x%x\n", __LINE__, isp_cfg.others.hdrmge_cfg.each_raw_en,
1614 isp_cfg.others.hdrmge_cfg.each_raw_gain0, isp_cfg.others.hdrmge_cfg.each_raw_gain1);
1615 for(int i = 0 ; i < 17; i++)
1616 {
1617 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: curve_0[%d] %d", __LINE__, i, isp_cfg.others.hdrmge_cfg.curve.curve_0[i]);
1618 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: curve_1[%d] %d", __LINE__, i, isp_cfg.others.hdrmge_cfg.curve.curve_1[i]);
1619 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: e_y[%d] %d", __LINE__, i, isp_cfg.others.hdrmge_cfg.e_y[i]);
1620 }
1621 #endif
1622 }
1623 #endif
1624
1625 #if RKAIQ_HAVE_DEHAZE_V12
convertAiqAdehazeToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,const rk_aiq_isp_dehaze_v32_t & dhaze)1626 void Isp32Params::convertAiqAdehazeToIsp32Params(struct isp32_isp_params_cfg& isp_cfg,
1627 const rk_aiq_isp_dehaze_v32_t& dhaze) {
1628 if (dhaze.enable) {
1629 isp_cfg.module_en_update |= ISP2X_MODULE_DHAZ;
1630 isp_cfg.module_ens |= ISP2X_MODULE_DHAZ;
1631 isp_cfg.module_cfg_update |= ISP2X_MODULE_DHAZ;
1632 } else {
1633 isp_cfg.module_en_update |= ISP2X_MODULE_DHAZ;
1634 isp_cfg.module_ens &= ~(ISP2X_MODULE_DHAZ);
1635 isp_cfg.module_cfg_update &= ~(ISP2X_MODULE_DHAZ);
1636 return;
1637 }
1638
1639 struct isp32_dhaz_cfg* cfg = &isp_cfg.others.dhaz_cfg;
1640
1641 cfg->round_en = dhaze.ProcResV12.round_en;
1642 cfg->soft_wr_en = dhaze.ProcResV12.soft_wr_en;
1643 cfg->enhance_en = dhaze.ProcResV12.enhance_en;
1644 cfg->air_lc_en = dhaze.ProcResV12.air_lc_en;
1645 cfg->hpara_en = dhaze.ProcResV12.hpara_en;
1646 cfg->hist_en = dhaze.ProcResV12.hist_en;
1647 cfg->dc_en = dhaze.ProcResV12.dc_en;
1648 cfg->yblk_th = dhaze.ProcResV12.yblk_th;
1649 cfg->yhist_th = dhaze.ProcResV12.yhist_th;
1650 cfg->dc_max_th = dhaze.ProcResV12.dc_max_th;
1651 cfg->dc_min_th = dhaze.ProcResV12.dc_min_th;
1652 cfg->wt_max = dhaze.ProcResV12.wt_max;
1653 cfg->bright_max = dhaze.ProcResV12.bright_max;
1654 cfg->bright_min = dhaze.ProcResV12.bright_min;
1655 cfg->tmax_base = dhaze.ProcResV12.tmax_base;
1656 cfg->dark_th = dhaze.ProcResV12.dark_th;
1657 cfg->air_max = dhaze.ProcResV12.air_max;
1658 cfg->air_min = dhaze.ProcResV12.air_min;
1659 cfg->tmax_max = dhaze.ProcResV12.tmax_max;
1660 cfg->tmax_off = dhaze.ProcResV12.tmax_off;
1661 cfg->hist_k = dhaze.ProcResV12.hist_k;
1662 cfg->hist_th_off = dhaze.ProcResV12.hist_th_off;
1663 cfg->hist_min = dhaze.ProcResV12.hist_min;
1664 cfg->hist_gratio = dhaze.ProcResV12.hist_gratio;
1665 cfg->hist_scale = dhaze.ProcResV12.hist_scale;
1666 cfg->enhance_value = dhaze.ProcResV12.enhance_value;
1667 cfg->enhance_chroma = dhaze.ProcResV12.enhance_chroma;
1668 cfg->iir_wt_sigma = dhaze.ProcResV12.iir_wt_sigma;
1669 cfg->iir_sigma = dhaze.ProcResV12.iir_sigma;
1670 cfg->stab_fnum = dhaze.ProcResV12.stab_fnum;
1671 cfg->iir_tmax_sigma = dhaze.ProcResV12.iir_tmax_sigma;
1672 cfg->iir_air_sigma = dhaze.ProcResV12.iir_air_sigma;
1673 cfg->iir_pre_wet = dhaze.ProcResV12.iir_pre_wet;
1674 cfg->cfg_wt = dhaze.ProcResV12.cfg_wt;
1675 cfg->cfg_air = dhaze.ProcResV12.cfg_air;
1676 cfg->cfg_alpha = dhaze.ProcResV12.cfg_alpha;
1677 cfg->cfg_gratio = dhaze.ProcResV12.cfg_gratio;
1678 cfg->cfg_tmax = dhaze.ProcResV12.cfg_tmax;
1679 cfg->range_sima = dhaze.ProcResV12.range_sima;
1680 cfg->space_sigma_cur = dhaze.ProcResV12.space_sigma_cur;
1681 cfg->space_sigma_pre = dhaze.ProcResV12.space_sigma_pre;
1682 cfg->dc_weitcur = dhaze.ProcResV12.dc_weitcur;
1683 cfg->bf_weight = dhaze.ProcResV12.bf_weight;
1684 cfg->gaus_h0 = dhaze.ProcResV12.gaus_h0;
1685 cfg->gaus_h1 = dhaze.ProcResV12.gaus_h1;
1686 cfg->gaus_h2 = dhaze.ProcResV12.gaus_h2;
1687
1688 for (int i = 0; i < ISP32_DHAZ_SIGMA_IDX_NUM; i++)
1689 cfg->sigma_idx[i] = dhaze.ProcResV12.sigma_idx[i];
1690
1691 for (int i = 0; i < ISP32_DHAZ_ENH_CURVE_NUM; i++)
1692 cfg->enh_curve[i] = dhaze.ProcResV12.enh_curve[i];
1693
1694 for (int i = 0; i < ISP32_DHAZ_SIGMA_LUT_NUM; i++)
1695 cfg->sigma_lut[i] = dhaze.ProcResV12.sigma_lut[i];
1696
1697 for (int i = 0; i < ISP32_DHAZ_HIST_WR_NUM; i++) cfg->hist_wr[i] = dhaze.ProcResV12.hist_wr[i];
1698
1699 // dehaze v12 add
1700 cfg->enh_luma_en = dhaze.ProcResV12.enh_luma_en;
1701 cfg->color_deviate_en = dhaze.ProcResV12.color_deviate_en;
1702 for (int i = 0; i < ISP32_DHAZ_ENH_LUMA_NUM; i++)
1703 cfg->enh_luma[i] = dhaze.ProcResV12.enh_luma[i];
1704
1705 #if 0
1706 LOGE_ADEHAZE("%s(%d) dehaze local gain IDX(0~5): 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", __func__, __LINE__, cfg->sigma_idx[0], cfg->sigma_idx[1],
1707 cfg->sigma_idx[2], cfg->sigma_idx[3], cfg->sigma_idx[4], cfg->sigma_idx[5]);
1708 LOGE_ADEHAZE("%s(%d) dehaze local gain LUT(0~5): 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", __func__, __LINE__, cfg->sigma_lut[0], cfg->sigma_lut[1],
1709 cfg->sigma_lut[2], cfg->sigma_lut[3], cfg->sigma_lut[4], cfg->sigma_lut[5]);
1710 LOGE_ADEHAZE("%s(%d) enh_luma(0~5): 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", __func__, __LINE__, cfg->enh_luma[0], cfg->enh_luma[1],
1711 cfg->enh_luma[2], cfg->enh_luma[3], cfg->enh_luma[4], cfg->enh_luma[5]);
1712 #endif
1713 }
1714 #endif
1715
1716 #if RKAIQ_HAVE_DRC_V12 || RKAIQ_HAVE_DRC_V12_LITE
convertAiqDrcToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,rk_aiq_isp_drc_v32_t & adrc_data)1717 void Isp32Params::convertAiqDrcToIsp32Params(struct isp32_isp_params_cfg& isp_cfg,
1718 rk_aiq_isp_drc_v32_t& adrc_data) {
1719 if (adrc_data.bDrcEn) {
1720 isp_cfg.module_en_update |= 1LL << Rk_ISP21_DRC_ID;
1721 isp_cfg.module_ens |= 1LL << Rk_ISP21_DRC_ID;
1722 isp_cfg.module_cfg_update |= 1LL << Rk_ISP21_DRC_ID;
1723 } else {
1724 isp_cfg.module_en_update |= 1LL << Rk_ISP21_DRC_ID;
1725 isp_cfg.module_ens &= ~(1LL << Rk_ISP21_DRC_ID);
1726 isp_cfg.module_cfg_update &= ~(1LL << Rk_ISP21_DRC_ID);
1727 return;
1728 }
1729
1730 isp_cfg.others.drc_cfg.bypass_en = adrc_data.DrcProcRes.Drc_v12.bypass_en;
1731 isp_cfg.others.drc_cfg.offset_pow2 = adrc_data.DrcProcRes.Drc_v12.offset_pow2;
1732 isp_cfg.others.drc_cfg.compres_scl = adrc_data.DrcProcRes.Drc_v12.compres_scl;
1733 isp_cfg.others.drc_cfg.position = adrc_data.DrcProcRes.Drc_v12.position;
1734 isp_cfg.others.drc_cfg.delta_scalein = adrc_data.DrcProcRes.Drc_v12.delta_scalein;
1735 isp_cfg.others.drc_cfg.hpdetail_ratio = adrc_data.DrcProcRes.Drc_v12.hpdetail_ratio;
1736 isp_cfg.others.drc_cfg.lpdetail_ratio = adrc_data.DrcProcRes.Drc_v12.lpdetail_ratio;
1737 isp_cfg.others.drc_cfg.weicur_pix = adrc_data.DrcProcRes.Drc_v12.weicur_pix;
1738 isp_cfg.others.drc_cfg.weipre_frame = adrc_data.DrcProcRes.Drc_v12.weipre_frame;
1739 isp_cfg.others.drc_cfg.bilat_wt_off = adrc_data.DrcProcRes.Drc_v12.bilat_wt_off;
1740 isp_cfg.others.drc_cfg.force_sgm_inv0 = adrc_data.DrcProcRes.Drc_v12.force_sgm_inv0;
1741 isp_cfg.others.drc_cfg.motion_scl = adrc_data.DrcProcRes.Drc_v12.motion_scl;
1742 isp_cfg.others.drc_cfg.edge_scl = adrc_data.DrcProcRes.Drc_v12.edge_scl;
1743 isp_cfg.others.drc_cfg.space_sgm_inv1 = adrc_data.DrcProcRes.Drc_v12.space_sgm_inv1;
1744 isp_cfg.others.drc_cfg.space_sgm_inv0 = adrc_data.DrcProcRes.Drc_v12.space_sgm_inv0;
1745 isp_cfg.others.drc_cfg.range_sgm_inv1 = adrc_data.DrcProcRes.Drc_v12.range_sgm_inv1;
1746 isp_cfg.others.drc_cfg.range_sgm_inv0 = adrc_data.DrcProcRes.Drc_v12.range_sgm_inv0;
1747 isp_cfg.others.drc_cfg.weig_maxl = adrc_data.DrcProcRes.Drc_v12.weig_maxl;
1748 isp_cfg.others.drc_cfg.weig_bilat = adrc_data.DrcProcRes.Drc_v12.weig_bilat;
1749 isp_cfg.others.drc_cfg.enable_soft_thd = adrc_data.DrcProcRes.Drc_v12.enable_soft_thd;
1750 isp_cfg.others.drc_cfg.bilat_soft_thd = adrc_data.DrcProcRes.Drc_v12.bilat_soft_thd;
1751 isp_cfg.others.drc_cfg.iir_weight = adrc_data.DrcProcRes.Drc_v12.iir_weight;
1752 isp_cfg.others.drc_cfg.min_ogain = adrc_data.DrcProcRes.Drc_v12.min_ogain;
1753
1754 for (int i = 0; i < ISP32_DRC_Y_NUM; i++) {
1755 isp_cfg.others.drc_cfg.gain_y[i] = adrc_data.DrcProcRes.Drc_v12.gain_y[i];
1756 isp_cfg.others.drc_cfg.compres_y[i] = adrc_data.DrcProcRes.Drc_v12.compres_y[i];
1757 isp_cfg.others.drc_cfg.scale_y[i] = adrc_data.DrcProcRes.Drc_v12.scale_y[i];
1758 }
1759
1760 // drc v12 add
1761 isp_cfg.others.drc_cfg.gas_t = adrc_data.DrcProcRes.Drc_v12.gas_t;
1762 isp_cfg.others.drc_cfg.gas_l0 = adrc_data.DrcProcRes.Drc_v12.gas_l0;
1763 isp_cfg.others.drc_cfg.gas_l1 = adrc_data.DrcProcRes.Drc_v12.gas_l1;
1764 isp_cfg.others.drc_cfg.gas_l2 = adrc_data.DrcProcRes.Drc_v12.gas_l2;
1765 isp_cfg.others.drc_cfg.gas_l3 = adrc_data.DrcProcRes.Drc_v12.gas_l3;
1766
1767 #if 0
1768 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%d: sw_drc_offset_pow2 %d", __LINE__, isp_cfg.others.drc_cfg.offset_pow2);
1769 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "sw_drc_offset_pow2 %d", isp_cfg.others.drc_cfg.offset_pow2);
1770 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "sw_drc_compres_scl %d", isp_cfg.others.drc_cfg.compres_scl);
1771 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "sw_drc_position %d", isp_cfg.others.drc_cfg.position);
1772 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "sw_drc_delta_scalein %d", isp_cfg.others.drc_cfg.delta_scalein);
1773 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "sw_drc_hpdetail_ratio %d", isp_cfg.others.drc_cfg.hpdetail_ratio);
1774 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "sw_drc_lpdetail_ratio %d", isp_cfg.others.drc_cfg.lpdetail_ratio);
1775 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "sw_drc_weicur_pix %d", isp_cfg.others.drc_cfg.weicur_pix);
1776 #endif
1777 }
1778 #endif
1779
1780 #if RKAIQ_HAVE_CCM_V2
convertAiqCcmToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,const rk_aiq_ccm_cfg_v2_t & ccm)1781 void Isp32Params::convertAiqCcmToIsp32Params(struct isp32_isp_params_cfg& isp_cfg,
1782 const rk_aiq_ccm_cfg_v2_t& ccm) {
1783 if (ccm.ccmEnable) {
1784 isp_cfg.module_ens |= ISP2X_MODULE_CCM;
1785 }
1786 isp_cfg.module_en_update |= ISP2X_MODULE_CCM;
1787 isp_cfg.module_cfg_update |= ISP2X_MODULE_CCM;
1788
1789 struct isp32_ccm_cfg* cfg = &isp_cfg.others.ccm_cfg;
1790 const float* coeff = ccm.matrix;
1791 const float* offset = ccm.offs;
1792
1793 cfg->coeff0_r = (coeff[0] - 1) > 0 ? (short)((coeff[0] - 1) * 128 + 0.5)
1794 : (short)((coeff[0] - 1) * 128 - 0.5); // check -128?
1795 cfg->coeff1_r = coeff[1] > 0 ? (short)(coeff[1] * 128 + 0.5) : (short)(coeff[1] * 128 - 0.5);
1796 cfg->coeff2_r = coeff[2] > 0 ? (short)(coeff[2] * 128 + 0.5) : (short)(coeff[2] * 128 - 0.5);
1797 cfg->coeff0_g = coeff[3] > 0 ? (short)(coeff[3] * 128 + 0.5) : (short)(coeff[3] * 128 - 0.5);
1798 cfg->coeff1_g = (coeff[4] - 1) > 0 ? (short)((coeff[4] - 1) * 128 + 0.5)
1799 : (short)((coeff[4] - 1) * 128 - 0.5);
1800 cfg->coeff2_g = coeff[5] > 0 ? (short)(coeff[5] * 128 + 0.5) : (short)(coeff[5] * 128 - 0.5);
1801 cfg->coeff0_b = coeff[6] > 0 ? (short)(coeff[6] * 128 + 0.5) : (short)(coeff[6] * 128 - 0.5);
1802 cfg->coeff1_b = coeff[7] > 0 ? (short)(coeff[7] * 128 + 0.5) : (short)(coeff[7] * 128 - 0.5);
1803 cfg->coeff2_b = (coeff[8] - 1) > 0 ? (short)((coeff[8] - 1) * 128 + 0.5)
1804 : (short)((coeff[8] - 1) * 128 - 0.5);
1805
1806 cfg->offset_r =
1807 offset[0] > 0 ? (short)(offset[0] + 0.5) : (short)(offset[0] - 0.5); // for 12bit
1808 cfg->offset_g = offset[1] > 0 ? (short)(offset[1] + 0.5) : (int)(offset[1] - 0.5);
1809 cfg->offset_b = offset[2] > 0 ? (short)(offset[2] + 0.5) : (short)(offset[2] - 0.5);
1810
1811 cfg->coeff0_y = (u16)ccm.rgb2y_para[0];
1812 cfg->coeff1_y = (u16)ccm.rgb2y_para[1];
1813 cfg->coeff2_y = (u16)ccm.rgb2y_para[2];
1814 cfg->bound_bit = (u8)ccm.bound_bit; // check
1815 cfg->right_bit = (u8)ccm.right_bit;
1816 cfg->highy_adjust_dis = (u8)(ccm.highy_adj_en ? 0 : 1);
1817 for (int i = 0; i < ISP32_CCM_CURVE_NUM; i++) {
1818 cfg->alp_y[i] = (u16)(ccm.alp_y[i]);
1819 }
1820 cfg->enh_adj_en = (u8)(ccm.enh_adj_en);
1821 cfg->asym_adj_en = (u8)(ccm.asym_adj_en ? 1 : 0);
1822
1823 cfg->color_coef0_r2y = (u16)ccm.enh_rgb2y_para[0];
1824 cfg->color_coef1_g2y = (u16)ccm.enh_rgb2y_para[1];
1825 cfg->color_coef2_b2y = (u16)ccm.enh_rgb2y_para[2];
1826 cfg->color_enh_rat_max = (u16)(ccm.enh_rat_max * 1024);
1827 }
1828 #endif
1829
1830 #if (RKAIQ_HAVE_SHARP_V33 || RKAIQ_HAVE_SHARP_V33_LITE)
convertAiqSharpenToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,rk_aiq_isp_sharp_v32_t & sharp)1831 void Isp32Params::convertAiqSharpenToIsp32Params(struct isp32_isp_params_cfg& isp_cfg,
1832 rk_aiq_isp_sharp_v32_t& sharp) {
1833 LOGD_ASHARP("%s:%d enter! enable:%d\n", __FUNCTION__, __LINE__, sharp.sharp_en);
1834 bool enable = sharp.sharp_en;
1835
1836 isp_cfg.module_en_update |= ISP3X_MODULE_SHARP;
1837 isp_cfg.module_ens |= ISP3X_MODULE_SHARP;
1838
1839 #if 1
1840
1841 isp_cfg.module_cfg_update |= ISP3X_MODULE_SHARP;
1842 struct isp32_sharp_cfg* pSharp = &isp_cfg.others.sharp_cfg;
1843
1844 pSharp->radius_ds_mode = sharp.sharp_radius_ds_mode;
1845 pSharp->noiseclip_mode = sharp.sharp_noiseclip_mode;
1846 pSharp->exgain_bypass = sharp.sharp_exgain_bypass;
1847 pSharp->center_mode = sharp.sharp_center_mode;
1848 pSharp->bypass = sharp.sharp_bypass;
1849 if (!enable) {
1850 pSharp->bypass = 0x01;
1851 }
1852
1853 pSharp->clip_hf_mode = sharp.sharp_clip_hf_mode;
1854 pSharp->add_mode = sharp.sharp_add_mode;
1855
1856 pSharp->sharp_ratio = sharp.sharp_sharp_ratio;
1857 pSharp->bf_ratio = sharp.sharp_bf_ratio;
1858 pSharp->gaus_ratio = sharp.sharp_gaus_ratio;
1859 pSharp->pbf_ratio = sharp.sharp_pbf_ratio;
1860
1861 for (int i = 0; i < ISP3X_SHARP_X_NUM; i++) {
1862 pSharp->luma_dx[i] = sharp.sharp_luma_dx[i];
1863 LOGD_ASHARP("%s:%d luma_dx[%d]:0x%x \n", __FUNCTION__, __LINE__, i, pSharp->luma_dx[i]);
1864 }
1865
1866 for (int i = 0; i < ISP3X_SHARP_Y_NUM; i++) {
1867 pSharp->pbf_sigma_inv[i] = sharp.sharp_pbf_sigma_inv[i];
1868 pSharp->bf_sigma_inv[i] = sharp.sharp_bf_sigma_inv[i];
1869 LOGD_ASHARP("%s:%d pbf_sigma_inv[%d]:0x%x \n", __FUNCTION__, __LINE__, i,
1870 pSharp->pbf_sigma_inv[i]);
1871 LOGD_ASHARP("%s:%d bf_sigma_inv[%d]:0x%x \n", __FUNCTION__, __LINE__, i,
1872 pSharp->bf_sigma_inv[i]);
1873 }
1874
1875 pSharp->bf_sigma_shift = sharp.sharp_bf_sigma_shift;
1876 pSharp->pbf_sigma_shift = sharp.sharp_pbf_sigma_shift;
1877 LOGD_ASHARP("%s:%d bf_sigma_shift:0x%x \n", __FUNCTION__, __LINE__, pSharp->bf_sigma_shift);
1878 LOGD_ASHARP("%s:%d pbf_sigma_shift:0x%x \n", __FUNCTION__, __LINE__, pSharp->pbf_sigma_shift);
1879 for (int i = 0; i < ISP3X_SHARP_Y_NUM; i++) {
1880 pSharp->clip_hf[i] = sharp.sharp_clip_hf[i];
1881 LOGD_ASHARP("%s:%d clip_hf[%d]:0x%x \n", __FUNCTION__, __LINE__, i, pSharp->clip_hf[i]);
1882 }
1883
1884 pSharp->pbf_coef2 = sharp.sharp_pbf_coef[2];
1885 pSharp->pbf_coef1 = sharp.sharp_pbf_coef[1];
1886 pSharp->pbf_coef0 = sharp.sharp_pbf_coef[0];
1887 LOGD_ASHARP("%s:%d pbf_coef2:0x%x \n", __FUNCTION__, __LINE__, pSharp->pbf_coef2);
1888 LOGD_ASHARP("%s:%d pbf_coef1:0x%x \n", __FUNCTION__, __LINE__, pSharp->pbf_coef1);
1889 LOGD_ASHARP("%s:%d pbf_coef0:0x%x \n", __FUNCTION__, __LINE__, pSharp->pbf_coef0);
1890
1891 pSharp->bf_coef2 = sharp.sharp_bf_coef[2];
1892 pSharp->bf_coef1 = sharp.sharp_bf_coef[1];
1893 pSharp->bf_coef0 = sharp.sharp_bf_coef[0];
1894 LOGD_ASHARP("%s:%d bf_coef2:0x%x \n", __FUNCTION__, __LINE__, pSharp->bf_coef2);
1895 LOGD_ASHARP("%s:%d bf_coef1:0x%x \n", __FUNCTION__, __LINE__, pSharp->bf_coef1);
1896 LOGD_ASHARP("%s:%d bf_coef0:0x%x \n", __FUNCTION__, __LINE__, pSharp->bf_coef0);
1897 for (int i = 0; i < ISP3X_SHARP_GAUS_COEF_NUM; i++) {
1898 pSharp->gaus_coef[i] = sharp.sharp_gaus_coef[i];
1899 LOGD_ASHARP("%s:%d gaus_coef[%d]:0x%x \n", __FUNCTION__, __LINE__, i,
1900 pSharp->gaus_coef[i]);
1901 }
1902
1903 pSharp->global_gain = sharp.sharp_global_gain;
1904 pSharp->global_gain_alpha = sharp.sharp_global_gain_alpha;
1905 pSharp->local_gainscale = sharp.sharp_local_gainscale;
1906 LOGD_ASHARP("%s:%d gloable_gain:0x%x \n", __FUNCTION__, __LINE__, pSharp->global_gain);
1907 LOGD_ASHARP("%s:%d gloable_gain_alpha:0x%x \n", __FUNCTION__, __LINE__,
1908 pSharp->global_gain_alpha);
1909 LOGD_ASHARP("%s:%d local_gainscale:0x%x \n", __FUNCTION__, __LINE__, pSharp->local_gainscale);
1910
1911 for (int i = 0; i < 14; i++) {
1912 pSharp->gain_adj[i] = sharp.sharp_gain_adj[i];
1913 LOGD_ASHARP("%s:%d sharp_gain_adj:0x%x \n", __FUNCTION__, __LINE__, pSharp->gain_adj[i]);
1914 }
1915 pSharp->center_wid = sharp.sharp_center_wid;
1916 pSharp->center_het = sharp.sharp_center_het;
1917 LOGD_ASHARP("%s:%d center_wid:0x%x \n", __FUNCTION__, __LINE__, pSharp->center_wid);
1918 LOGD_ASHARP("%s:%d center_het:0x%x \n", __FUNCTION__, __LINE__, pSharp->center_het);
1919
1920 for (int i = 0; i < 22; i++) {
1921 pSharp->strength[i] = sharp.sharp_strength[i];
1922 LOGD_ASHARP("%s:%d strength[%d]:0x%x \n", __FUNCTION__, __LINE__, i, pSharp->strength[i]);
1923 }
1924 pSharp->noise_sigma = sharp.sharp_noise_sigma;
1925 pSharp->enhance_bit = sharp.sharp_enhance_bit;
1926 pSharp->noise_strength = sharp.sharp_noise_strength;
1927 LOGD_ASHARP("%s:%d noise_sigma:0x%x \n", __FUNCTION__, __LINE__, pSharp->noise_sigma);
1928 LOGD_ASHARP("%s:%d enhance_bit:0x%x \n", __FUNCTION__, __LINE__, pSharp->enhance_bit);
1929 LOGD_ASHARP("%s:%d noise_strength:0x%x \n", __FUNCTION__, __LINE__, pSharp->noise_strength);
1930
1931 for (int i = 0; i < 8; i++) {
1932 pSharp->ehf_th[i] = sharp.sharp_ehf_th[i];
1933 pSharp->clip_neg[i] = sharp.sharp_clip_neg[i];
1934 LOGD_ASHARP("%s:%d ehf_th[%d]:0x%x clip_neg[%d]:0x%x\n", __FUNCTION__, __LINE__, i,
1935 pSharp->ehf_th[i], i, pSharp->clip_neg[i]);
1936 }
1937 #endif
1938 LOGD_ASHARP("%s:%d exit!\n", __FUNCTION__, __LINE__);
1939 }
1940 #endif
convertAiqBlcToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,rk_aiq_isp_blc_v32_t & blc)1941 void Isp32Params::convertAiqBlcToIsp32Params(struct isp32_isp_params_cfg& isp_cfg,
1942 rk_aiq_isp_blc_v32_t& blc) {
1943 LOGD_ABLC("%s:(%d) enter enable:%d\n", __FUNCTION__, __LINE__, blc.enable);
1944
1945 if (blc.enable) {
1946 isp_cfg.module_ens |= ISP3X_MODULE_BLS;
1947 }
1948 isp_cfg.module_en_update |= ISP3X_MODULE_BLS;
1949 isp_cfg.module_cfg_update |= ISP3X_MODULE_BLS;
1950
1951 #if 1
1952 isp_cfg.others.bls_cfg.enable_auto = 0;
1953 isp_cfg.others.bls_cfg.en_windows = 0;
1954
1955 isp_cfg.others.bls_cfg.bls_window1.h_offs = 0;
1956 isp_cfg.others.bls_cfg.bls_window1.v_offs = 0;
1957 isp_cfg.others.bls_cfg.bls_window1.h_size = 0;
1958 isp_cfg.others.bls_cfg.bls_window1.v_size = 0;
1959
1960 isp_cfg.others.bls_cfg.bls_window2.h_offs = 0;
1961 isp_cfg.others.bls_cfg.bls_window2.v_offs = 0;
1962 isp_cfg.others.bls_cfg.bls_window2.h_size = 0;
1963 isp_cfg.others.bls_cfg.bls_window2.v_size = 0;
1964
1965 isp_cfg.others.bls_cfg.bls_samples = 0;
1966
1967 // blc0
1968 isp_cfg.others.bls_cfg.fixed_val.r = blc.blc_r;
1969 isp_cfg.others.bls_cfg.fixed_val.gr = blc.blc_gr;
1970 isp_cfg.others.bls_cfg.fixed_val.gb = blc.blc_gb;
1971 isp_cfg.others.bls_cfg.fixed_val.b = blc.blc_b;
1972
1973 if (blc.isp_ob_predgain != 0 ) {
1974 isp_cfg.others.bls_cfg.bls1_val.r = CLIP((int)(blc.blc1_r * blc.isp_ob_predgain), 0, 32767);
1975 isp_cfg.others.bls_cfg.bls1_val.gr = CLIP((int)(blc.blc1_gr * blc.isp_ob_predgain), 0, 32767);
1976 isp_cfg.others.bls_cfg.bls1_val.gb = CLIP((int)(blc.blc1_gb * blc.isp_ob_predgain), 0, 32767);
1977 isp_cfg.others.bls_cfg.bls1_val.b = CLIP((int)(blc.blc1_b * blc.isp_ob_predgain), 0, 32767);
1978 } else {
1979 isp_cfg.others.bls_cfg.bls1_val.r = (int)blc.blc1_r;
1980 isp_cfg.others.bls_cfg.bls1_val.gr = (int)blc.blc1_gr;
1981 isp_cfg.others.bls_cfg.bls1_val.gb = (int)blc.blc1_gb;
1982 isp_cfg.others.bls_cfg.bls1_val.b = (int)blc.blc1_b;
1983 }
1984
1985 // TODO bls1 params
1986 isp_cfg.others.bls_cfg.bls1_en = blc.blc1_enable;
1987
1988 // blc_ob
1989
1990 isp_cfg.others.bls_cfg.isp_ob_offset = CLIP((int)blc.isp_ob_offset, 0, 511);
1991 isp_cfg.others.bls_cfg.isp_ob_predgain = CLIP((int)(blc.isp_ob_predgain * (1 << 8)), 0, 65535);
1992 isp_cfg.others.bls_cfg.isp_ob_max = CLIP(blc.isp_ob_max, 0, 1048575);
1993
1994 #if defined(ISP_HW_V32) || defined(ISP_HW_V32_LITE)
1995 mLatestBlsCfg = isp_cfg.others.bls_cfg;
1996 #endif
1997
1998 LOGD_ABLC("isp_ob_offset = 0x%x ,isp_ob_predgain = 0x%x, isp_ob_max = %x \n",
1999 isp_cfg.others.bls_cfg.isp_ob_offset, isp_cfg.others.bls_cfg.isp_ob_predgain,
2000 isp_cfg.others.bls_cfg.isp_ob_max);
2001
2002 #endif
2003 LOGD_ABLC("%s:(%d) exit \n", __FUNCTION__, __LINE__);
2004 }
2005
convertAiqAldchToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,const rk_aiq_isp_ldch_v21_t & ldch_cfg)2006 void Isp32Params::convertAiqAldchToIsp32Params(struct isp32_isp_params_cfg& isp_cfg,
2007 const rk_aiq_isp_ldch_v21_t& ldch_cfg)
2008 {
2009 struct isp32_ldch_cfg *pLdchCfg = &isp_cfg.others.ldch_cfg;
2010
2011 if (ldch_cfg.base.sw_ldch_en) {
2012 isp_cfg.module_ens |= ISP32_MODULE_LDCH;
2013 isp_cfg.module_en_update |= ISP32_MODULE_LDCH;
2014 isp_cfg.module_cfg_update |= ISP32_MODULE_LDCH;
2015
2016 pLdchCfg->hsize = ldch_cfg.base.lut_h_size;
2017 pLdchCfg->vsize = ldch_cfg.base.lut_v_size;
2018 pLdchCfg->buf_fd = ldch_cfg.base.lut_mapxy_buf_fd;
2019
2020 pLdchCfg->frm_end_dis = ldch_cfg.frm_end_dis;
2021 pLdchCfg->zero_interp_en = ldch_cfg.zero_interp_en;
2022 pLdchCfg->sample_avr_en = ldch_cfg.sample_avr_en;
2023 pLdchCfg->bic_mode_en = ldch_cfg.bic_mode_en;
2024 pLdchCfg->force_map_en = ldch_cfg.force_map_en;
2025 pLdchCfg->map13p3_en = ldch_cfg.map13p3_en;
2026 memcpy(pLdchCfg->bicubic, ldch_cfg.bicubic, sizeof(ldch_cfg.bicubic));
2027
2028 LOGV_CAMHW_SUBM(ISP20PARAM_SUBM, "enable ldch h/v size: %dx%d, buf_fd: %d",
2029 pLdchCfg->hsize, pLdchCfg->vsize, pLdchCfg->buf_fd);
2030
2031 } else {
2032 isp_cfg.module_ens &= ~ISP32_MODULE_LDCH;
2033 isp_cfg.module_en_update |= ISP32_MODULE_LDCH;
2034 }
2035 }
2036
convertAiqExpIspDgainToIsp32Params(struct isp32_isp_params_cfg & isp_cfg,RKAiqAecExpInfo_t ae_exp)2037 void Isp32Params::convertAiqExpIspDgainToIsp32Params(struct isp32_isp_params_cfg& isp_cfg, RKAiqAecExpInfo_t ae_exp)
2038 {
2039 // TODO
2040 struct isp32_awb_gain_cfg * cfg = &isp_cfg.others.awb_gain_cfg;
2041 uint16_t max_wb_gain = (1 << (ISP2X_WBGAIN_FIXSCALE_BIT + ISP3X_WBGAIN_INTSCALE_BIT)) - 1;
2042
2043 if(_working_mode == RK_AIQ_WORKING_MODE_NORMAL) {
2044
2045 float isp_dgain = MAX(1.0f, ae_exp.LinearExp.exp_real_params.isp_dgain);
2046 if (isp_dgain < 1.0000001f)
2047 return;
2048 cfg->gain0_red = MIN(cfg->gain0_red * isp_dgain + 0.5, max_wb_gain);
2049 cfg->gain0_green_r = MIN(cfg->gain0_green_r * isp_dgain + 0.5, max_wb_gain);
2050 cfg->gain0_green_b = MIN(cfg->gain0_green_b * isp_dgain + 0.5, max_wb_gain);
2051 cfg->gain0_blue = MIN(cfg->gain0_blue * isp_dgain + 0.5, max_wb_gain);
2052
2053 cfg->gain1_red = MIN(cfg->gain1_red * isp_dgain + 0.5, max_wb_gain);
2054 cfg->gain1_green_r = MIN(cfg->gain1_green_r * isp_dgain + 0.5, max_wb_gain);
2055 cfg->gain1_green_b = MIN(cfg->gain1_green_b * isp_dgain + 0.5, max_wb_gain);
2056 cfg->gain1_blue = MIN(cfg->gain1_blue * isp_dgain + 0.5, max_wb_gain);
2057
2058 cfg->gain2_red = MIN(cfg->gain2_red * isp_dgain + 0.5, max_wb_gain);
2059 cfg->gain2_green_r = MIN(cfg->gain2_green_r * isp_dgain + 0.5, max_wb_gain);
2060 cfg->gain2_green_b = MIN(cfg->gain2_green_b * isp_dgain + 0.5, max_wb_gain);
2061 cfg->gain2_blue = MIN(cfg->gain2_blue * isp_dgain + 0.5, max_wb_gain);
2062
2063
2064 } else {
2065
2066 float isp_dgain0 = MAX(1.0f, ae_exp.HdrExp[0].exp_real_params.isp_dgain);
2067 float isp_dgain1 = MAX(1.0f, ae_exp.HdrExp[1].exp_real_params.isp_dgain);
2068 float isp_dgain2 = MAX(1.0f, ae_exp.HdrExp[2].exp_real_params.isp_dgain);
2069 if (isp_dgain0 < 1.0000001f &&
2070 isp_dgain1 < 1.0000001f &&
2071 isp_dgain2 < 1.0000001f )
2072 return;
2073
2074 cfg->gain0_red = MIN(cfg->gain0_red * isp_dgain0 + 0.5, max_wb_gain);
2075 cfg->gain0_green_r = MIN(cfg->gain0_green_r * isp_dgain0 + 0.5, max_wb_gain);
2076 cfg->gain0_green_b = MIN(cfg->gain0_green_b * isp_dgain0 + 0.5, max_wb_gain);
2077 cfg->gain0_blue = MIN(cfg->gain0_blue * isp_dgain0 + 0.5, max_wb_gain);
2078
2079 cfg->gain1_red = MIN(cfg->gain1_red * isp_dgain1 + 0.5, max_wb_gain);
2080 cfg->gain1_green_r = MIN(cfg->gain1_green_r * isp_dgain1 + 0.5, max_wb_gain);
2081 cfg->gain1_green_b = MIN(cfg->gain1_green_b * isp_dgain1 + 0.5, max_wb_gain);
2082 cfg->gain1_blue = MIN(cfg->gain1_blue * isp_dgain1 + 0.5, max_wb_gain);
2083
2084 cfg->gain2_red = MIN(cfg->gain2_red * isp_dgain2 + 0.5, max_wb_gain);
2085 cfg->gain2_green_r = MIN(cfg->gain2_green_r * isp_dgain2 + 0.5, max_wb_gain);
2086 cfg->gain2_green_b = MIN(cfg->gain2_green_b * isp_dgain2 + 0.5, max_wb_gain);
2087 cfg->gain2_blue = MIN(cfg->gain2_blue * isp_dgain2 + 0.5, max_wb_gain);
2088
2089 }
2090
2091
2092 }
2093
convert3aResultsToIspCfg(SmartPtr<cam3aResult> & result,void * isp_cfg_p,bool is_multi_isp)2094 bool Isp32Params::convert3aResultsToIspCfg(SmartPtr<cam3aResult>& result, void* isp_cfg_p, bool is_multi_isp) {
2095 struct isp32_isp_params_cfg& isp_cfg = *(struct isp32_isp_params_cfg*)isp_cfg_p;
2096
2097 if (result.ptr() == NULL) {
2098 LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "3A result empty");
2099 return false;
2100 }
2101 int32_t type = result->getType();
2102 //LOGE_CAMHW_SUBM(ISP20PARAM_SUBM, "%s, module (0x%x) convert params!\n", __FUNCTION__, type);
2103 switch (type) {
2104 case RESULT_TYPE_EXPOSURE_PARAM:
2105 {
2106 RkAiqSensorExpParamsProxy* expParams =
2107 result.get_cast_ptr<RkAiqSensorExpParamsProxy>();
2108 if (expParams)
2109 convertAiqExpIspDgainToIsp32Params(isp_cfg,
2110 expParams->data()->aecExpInfo);
2111 }
2112 break;
2113 case RESULT_TYPE_AWBGAIN_PARAM: {
2114 RkAiqIspAwbGainParamsProxyV32* awb_gain =
2115 result.get_cast_ptr<RkAiqIspAwbGainParamsProxyV32>();
2116 if (awb_gain) {
2117 convertAiqAwbGainToIsp32Params(isp_cfg, awb_gain->data()->result, true);
2118 }
2119 }
2120 break;
2121 case RESULT_TYPE_AWB_PARAM: {
2122 #if RKAIQ_HAVE_AWB_V32
2123 mAwbParams = result.ptr();
2124 RkAiqIspAwbParamsProxyV32* params =
2125 result.get_cast_ptr<RkAiqIspAwbParamsProxyV32>();
2126
2127 if (params) convertAiqAwbToIsp32Params(isp_cfg, params->data()->result, true);
2128 #endif
2129 }
2130 break;
2131 case RESULT_TYPE_GIC_PARAM: {
2132 #if RKAIQ_HAVE_GIC_V2
2133 RkAiqIspGicParamsProxy* params =
2134 result.get_cast_ptr<RkAiqIspGicParamsProxy>();
2135 if (params) convertAiqAgicToIsp21Params(isp_cfg, params->data()->result);
2136 #endif
2137 }
2138 break;
2139 case RESULT_TYPE_LSC_PARAM: {
2140 #if RKAIQ_HAVE_LSC_V3
2141 RkAiqIspLscParamsProxy* params =
2142 result.get_cast_ptr<RkAiqIspLscParamsProxy>();
2143 if (params) convertAiqLscToIsp20Params(isp_cfg, params->data()->result);
2144 #endif
2145 }
2146 break;
2147 case RESULT_TYPE_AF_PARAM: {
2148 #if RKAIQ_HAVE_AF_V31 || RKAIQ_ONLY_AF_STATS_V31
2149 RkAiqIspAfParamsProxyV32* params =
2150 result.get_cast_ptr<RkAiqIspAfParamsProxyV32>();
2151 if (params) convertAiqAfToIsp32Params(isp_cfg, params->data()->result, true);
2152 #endif
2153 #if RKAIQ_HAVE_AF_V32_LITE || RKAIQ_ONLY_AF_STATS_V32_LITE
2154 RkAiqIspAfParamsProxyV32Lite* params =
2155 result.get_cast_ptr<RkAiqIspAfParamsProxyV32Lite>();
2156 if (params) convertAiqAfLiteToIsp32Params(isp_cfg, params->data()->result, true);
2157 #endif
2158 }
2159 break;
2160 case RESULT_TYPE_CCM_PARAM: {
2161 #if RKAIQ_HAVE_CCM_V2
2162 RkAiqIspCcmParamsProxyV32* params =
2163 result.get_cast_ptr<RkAiqIspCcmParamsProxyV32>();
2164 if (params) convertAiqCcmToIsp32Params(isp_cfg, params->data()->result);
2165 #endif
2166 }
2167 break;
2168 case RESULT_TYPE_CAC_PARAM: {
2169 #if RKAIQ_HAVE_CAC_V11
2170 RkAiqIspCacParamsProxyV32* params =
2171 result.get_cast_ptr<RkAiqIspCacParamsProxyV32>();
2172 if (params)
2173 convertAiqCacToIsp32Params(isp_cfg, params->data()->result);
2174 #endif
2175 }
2176 break;
2177 case RESULT_TYPE_DEBAYER_PARAM: {
2178 #if RKAIQ_HAVE_DEBAYER_V2 || RKAIQ_HAVE_DEBAYER_V2_LITE
2179 RkAiqIspDebayerParamsProxyV32* params =
2180 result.get_cast_ptr<RkAiqIspDebayerParamsProxyV32>();
2181
2182 if (params) {
2183 convertAiqAdebayerToIsp32Params(isp_cfg, params->data()->result);
2184 }
2185 #endif
2186 }
2187 break;
2188 case RESULT_TYPE_AEC_PARAM: {
2189 RkAiqIspAecParamsProxy* params =
2190 result.get_cast_ptr<RkAiqIspAecParamsProxy>();
2191 if (params) {
2192 convertAiqAeToIsp20Params(isp_cfg, params->data()->result);
2193 }
2194 }
2195 break;
2196 case RESULT_TYPE_HIST_PARAM: {
2197 RkAiqIspHistParamsProxy* params =
2198 result.get_cast_ptr<RkAiqIspHistParamsProxy>();
2199 if (params) convertAiqHistToIsp20Params(isp_cfg, params->data()->result);
2200 }
2201 break;
2202 case RESULT_TYPE_AGAMMA_PARAM: {
2203 #if RKAIQ_HAVE_GAMMA_V11
2204 RkAiqIspAgammaParamsProxy* params =
2205 result.get_cast_ptr<RkAiqIspAgammaParamsProxy>();
2206 if (params) convertAiqAgammaToIsp3xParams(isp_cfg, params->data()->result);
2207 #endif
2208 }
2209 break;
2210 case RESULT_TYPE_MERGE_PARAM: {
2211 #if RKAIQ_HAVE_MERGE_V12
2212 RkAiqIspMergeParamsProxy* params =
2213 result.get_cast_ptr<RkAiqIspMergeParamsProxy>();
2214 if (params) convertAiqMergeToIsp32Params(isp_cfg, params->data()->result);
2215 #endif
2216 }
2217 break;
2218 case RESULT_TYPE_DEHAZE_PARAM: {
2219 #if RKAIQ_HAVE_DEHAZE_V12
2220 RkAiqIspDehazeParamsProxy* params =
2221 result.get_cast_ptr<RkAiqIspDehazeParamsProxy>();
2222 if (params) convertAiqAdehazeToIsp32Params(isp_cfg, params->data()->result);
2223 #endif
2224 }
2225 break;
2226 case RESULT_TYPE_DRC_PARAM: {
2227 #if RKAIQ_HAVE_DRC_V12 || RKAIQ_HAVE_DRC_V12_LITE
2228 RkAiqIspDrcParamsProxy* params = result.get_cast_ptr<RkAiqIspDrcParamsProxy>();
2229 if (params) convertAiqDrcToIsp32Params(isp_cfg, params->data()->result);
2230 #endif
2231 }
2232 break;
2233 case RESULT_TYPE_LUT3D_PARAM: {
2234 #if RKAIQ_HAVE_3DLUT_V1
2235 RkAiqIspLut3dParamsProxy* params =
2236 result.get_cast_ptr<RkAiqIspLut3dParamsProxy>();
2237 if (params) convertAiqA3dlutToIsp20Params(isp_cfg, params->data()->result);
2238 #endif
2239 }
2240 break;
2241 #if RKAIQ_HAVE_DPCC_V1
2242 case RESULT_TYPE_DPCC_PARAM: {
2243 RkAiqIspDpccParamsProxy* params =
2244 result.get_cast_ptr<RkAiqIspDpccParamsProxy>();
2245 if (params) convertAiqDpccToIsp20Params(isp_cfg, params->data()->result);
2246 }
2247 break;
2248 #endif
2249 case RESULT_TYPE_CSM_PARAM: {
2250 RkAiqIspCsmParamsProxy* params =
2251 result.get_cast_ptr<RkAiqIspCsmParamsProxy>();
2252 if (params) convertAiqCsmToIsp21Params(isp_cfg, params->data()->result);
2253 }
2254 break;
2255 case RESULT_TYPE_RAWNR_PARAM: {
2256 #if RKAIQ_HAVE_BAYER2DNR_V23
2257 RkAiqIspBaynrParamsProxyV32* params =
2258 result.get_cast_ptr<RkAiqIspBaynrParamsProxyV32>();
2259 if (params) convertAiqRawnrToIsp32Params(isp_cfg, params->data()->result);
2260 #endif
2261 }
2262 break;
2263 case RESULT_TYPE_TNR_PARAM: {
2264 #if (RKAIQ_HAVE_BAYERTNR_V23 || RKAIQ_HAVE_BAYERTNR_V23_LITE)
2265 RkAiqIspTnrParamsProxyV32* params =
2266 result.get_cast_ptr<RkAiqIspTnrParamsProxyV32>();
2267 if (params) convertAiqTnrToIsp32Params(isp_cfg, params->data()->result);
2268 #endif
2269 }
2270 break;
2271 case RESULT_TYPE_YNR_PARAM: {
2272 #if RKAIQ_HAVE_YNR_V22
2273 RkAiqIspYnrParamsProxyV32* params =
2274 result.get_cast_ptr<RkAiqIspYnrParamsProxyV32>();
2275 if (params) convertAiqYnrToIsp32Params(isp_cfg, params->data()->result);
2276 #endif
2277 }
2278 break;
2279 case RESULT_TYPE_UVNR_PARAM: {
2280 #if (RKAIQ_HAVE_CNR_V30 || RKAIQ_HAVE_CNR_V30_LITE)
2281 RkAiqIspCnrParamsProxyV32* params =
2282 result.get_cast_ptr<RkAiqIspCnrParamsProxyV32>();
2283 if (params) convertAiqUvnrToIsp32Params(isp_cfg, params->data()->result);
2284 #endif
2285 }
2286 break;
2287 case RESULT_TYPE_BLC_PARAM:
2288 {
2289 RkAiqIspBlcParamsProxyV32* params =
2290 result.get_cast_ptr<RkAiqIspBlcParamsProxyV32>();
2291 if (params) convertAiqBlcToIsp32Params(isp_cfg, params->data()->result);
2292 }
2293 break;
2294 case RESULT_TYPE_GAIN_PARAM: {
2295 RkAiqIspGainParamsProxyV3x* params =
2296 result.get_cast_ptr<RkAiqIspGainParamsProxyV3x>();
2297 if (params) convertAiqGainToIsp3xParams(isp_cfg, params->data()->result);
2298 }
2299 break;
2300 case RESULT_TYPE_SHARPEN_PARAM: {
2301 #if (RKAIQ_HAVE_SHARP_V33 || RKAIQ_HAVE_SHARP_V33_LITE)
2302 RkAiqIspSharpParamsProxyV32* params =
2303 result.get_cast_ptr<RkAiqIspSharpParamsProxyV32>();
2304 if (params) convertAiqSharpenToIsp32Params(isp_cfg, params->data()->result);
2305 #endif
2306 }
2307 break;
2308 case RESULT_TYPE_CGC_PARAM: {
2309 #if RKAIQ_HAVE_CGC_V1
2310 RkAiqIspCgcParamsProxy* params =
2311 result.get_cast_ptr<RkAiqIspCgcParamsProxy>();
2312 if (params) convertAiqCgcToIsp21Params(isp_cfg, params->data()->result);
2313 #endif
2314 }
2315 break;
2316 case RESULT_TYPE_CP_PARAM: {
2317 #if RKAIQ_HAVE_ACP_V10
2318 RkAiqIspCpParamsProxy* params =
2319 result.get_cast_ptr<RkAiqIspCpParamsProxy>();
2320 if (params) convertAiqCpToIsp20Params(isp_cfg, params->data()->result);
2321 #endif
2322 }
2323 break;
2324 case RESULT_TYPE_IE_PARAM: {
2325 #if RKAIQ_HAVE_AIE_V10
2326 RkAiqIspIeParamsProxy* params =
2327 result.get_cast_ptr<RkAiqIspIeParamsProxy>();
2328 if (params) convertAiqIeToIsp20Params(isp_cfg, params->data()->result);
2329 #endif
2330 }
2331 break;
2332 case RESULT_TYPE_LDCH_PARAM:
2333 {
2334 RkAiqIspLdchParamsProxyV32* params = result.get_cast_ptr<RkAiqIspLdchParamsProxyV32>();
2335 if (params)
2336 convertAiqAldchToIsp32Params(isp_cfg, params->data()->result);
2337 }
2338 break;
2339 default:
2340 LOGE("unknown param type: 0x%x!", type);
2341 return false;
2342 }
2343
2344 return true;
2345 }
2346
2347 } // namespace RkCam
2348