1 /* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR MIT) 2 * 3 * Copyright (C) 2019 Rockchip Electronics Co., Ltd. 4 */ 5 6 #ifndef _UAPI_RKISPP_CONFIG_H 7 #define _UAPI_RKISPP_CONFIG_H 8 9 #include <linux/types.h> 10 #include <linux/v4l2-controls.h> 11 12 #define ISPP_API_VERSION KERNEL_VERSION(1, 8, 0) 13 14 #ifndef BIT 15 #define BIT(x) (~0 & (1 << x)) 16 #endif 17 #ifndef s8 18 typedef signed char s8; 19 #endif 20 #ifndef u8 21 typedef unsigned char u8; 22 #endif 23 #ifndef s16 24 typedef signed short s16; 25 #endif 26 #ifndef u16 27 typedef unsigned short u16; 28 #endif 29 #ifndef s32 30 typedef signed int s32; 31 #endif 32 #ifndef u32 33 typedef unsigned int u32; 34 #endif 35 #ifndef s64 36 typedef signed long long s64; 37 #endif 38 #ifndef u64 39 typedef unsigned long long u64; 40 #endif 41 42 #define ISPP_ID_TNR (0) 43 #define ISPP_ID_NR (1) 44 #define ISPP_ID_SHP (2) 45 #define ISPP_ID_FEC (3) 46 #define ISPP_ID_ORB (4) 47 #define ISPP_ID_MAX (5) 48 49 #define ISPP_MODULE_TNR BIT(ISPP_ID_TNR)//2TO1 50 #define ISPP_MODULE_NR BIT(ISPP_ID_NR) 51 #define ISPP_MODULE_SHP BIT(ISPP_ID_SHP) 52 #define ISPP_MODULE_FEC BIT(ISPP_ID_FEC)//CALIBRATION 53 #define ISPP_MODULE_ORB BIT(ISPP_ID_ORB) 54 //extra function 55 #define ISPP_MODULE_TNR_3TO1 (BIT(16) | ISPP_MODULE_TNR) 56 #define ISPP_MODULE_FEC_ST (BIT(17) | ISPP_MODULE_FEC)//STABILIZATION 57 58 #define TNR_SIGMA_CURVE_SIZE 17 59 #define TNR_LUMA_CURVE_SIZE 6 60 #define TNR_GFCOEF6_SIZE 6 61 #define TNR_GFCOEF3_SIZE 3 62 #define TNR_SCALE_YG_SIZE 4 63 #define TNR_SCALE_YL_SIZE 3 64 #define TNR_SCALE_CG_SIZE 3 65 #define TNR_SCALE_Y2CG_SIZE 3 66 #define TNR_SCALE_CL_SIZE 2 67 #define TNR_SCALE_Y2CL_SIZE 3 68 #define TNR_WEIGHT_Y_SIZE 3 69 70 #define NR_UVNR_UVGAIN_SIZE 2 71 #define NR_UVNR_T1FLT_WTQ_SIZE 8 72 #define NR_UVNR_T2GEN_WTQ_SIZE 4 73 #define NR_UVNR_T2FLT_WT_SIZE 3 74 #define NR_YNR_SGM_DX_SIZE 16 75 #define NR_YNR_SGM_Y_SIZE 17 76 #define NR_YNR_HWEIT_D_SIZE 20 77 #define NR_YNR_HGRAD_Y_SIZE 24 78 #define NR_YNR_HSTV_Y_SIZE 17 79 #define NR_YNR_CI_SIZE 4 80 #define NR_YNR_LGAIN_MIN_SIZE 4 81 #define NR_YNR_LWEIT_FLT_SIZE 4 82 #define NR_YNR_HGAIN_SGM_SIZE 4 83 #define NR_YNR_HWEIT_SIZE 4 84 #define NR_YNR_LWEIT_CMP_SIZE 2 85 #define NR_YNR_ST_SCALE_SIZE 3 86 87 #define SHP_PBF_KERNEL_SIZE 3 88 #define SHP_MRF_KERNEL_SIZE 6 89 #define SHP_MBF_KERNEL_SIZE 12 90 #define SHP_HRF_KERNEL_SIZE 6 91 #define SHP_HBF_KERNEL_SIZE 3 92 #define SHP_EDGE_COEF_SIZE 3 93 #define SHP_EDGE_SMOTH_SIZE 3 94 #define SHP_EDGE_GAUS_SIZE 6 95 #define SHP_DOG_KERNEL_SIZE 6 96 #define SHP_LUM_POINT_SIZE 6 97 #define SHP_SIGMA_SIZE 8 98 #define SHP_LUM_CLP_SIZE 8 99 #define SHP_LUM_MIN_SIZE 8 100 #define SHP_EDGE_LUM_THED_SIZE 8 101 #define SHP_CLAMP_SIZE 8 102 #define SHP_DETAIL_ALPHA_SIZE 8 103 104 #define ORB_DATA_NUM 10000 105 #define ORB_BRIEF_NUM 15 106 #define ORB_DUMMY_NUM 13 107 108 #define FEC_MESH_BUF_MAX 7 109 #define FEC_MESH_XY_POINT_SIZE 6 110 #define FEC_MESH_XY_NUM 131072 111 #define FEC_MESH_BUF_NUM 2 112 113 #define MAX_BUF_IDXFD_NUM 64 114 115 /************VIDIOC_PRIVATE*************/ 116 #define RKISPP_CMD_SET_INIT_MODULE \ 117 _IOW('V', BASE_VIDIOC_PRIVATE + 0, int) 118 119 #define RKISPP_CMD_GET_FECBUF_INFO \ 120 _IOR('V', BASE_VIDIOC_PRIVATE + 1, struct rkispp_fecbuf_info) 121 122 #define RKISPP_CMD_SET_FECBUF_SIZE \ 123 _IOW('V', BASE_VIDIOC_PRIVATE + 2, struct rkispp_fecbuf_size) 124 125 #define RKISPP_CMD_TRIGGER_MODE \ 126 _IOW('V', BASE_VIDIOC_PRIVATE + 3, struct rkispp_trigger_mode) 127 128 #define RKISPP_CMD_GET_TNRBUF_FD \ 129 _IOR('V', BASE_VIDIOC_PRIVATE + 4, struct rkispp_buf_idxfd) 130 131 #define RKISPP_CMD_GET_NRBUF_FD \ 132 _IOR('V', BASE_VIDIOC_PRIVATE + 5, struct rkispp_buf_idxfd) 133 134 /**independent fec video**/ 135 #define RKISPP_CMD_FEC_IN_OUT \ 136 _IOW('V', BASE_VIDIOC_PRIVATE + 10, struct rkispp_fec_in_out) 137 #define RKISPP_CMD_FEC_BUF_ADD \ 138 _IOW('V', BASE_VIDIOC_PRIVATE + 11, int) 139 #define RKISPP_CMD_FEC_BUF_DEL \ 140 _IOW('V', BASE_VIDIOC_PRIVATE + 12, int) 141 142 /************EVENT_PRIVATE**************/ 143 #define RKISPP_V4L2_EVENT_TNR_COMPLETE \ 144 (V4L2_EVENT_PRIVATE_START + 3) 145 146 struct rkispp_fec_in_out { 147 int width; 148 int height; 149 int in_fourcc; 150 int out_fourcc; 151 int in_pic_fd; 152 int out_pic_fd; 153 int mesh_xint_fd; 154 int mesh_xfra_fd; 155 int mesh_yint_fd; 156 int mesh_yfra_fd; 157 }; 158 159 struct rkispp_buf_idxfd { 160 u32 buf_num; 161 u32 index[MAX_BUF_IDXFD_NUM]; 162 s32 dmafd[MAX_BUF_IDXFD_NUM]; 163 } __attribute__ ((packed)); 164 165 struct rkispp_trigger_mode { 166 u32 module; 167 u32 on; 168 } __attribute__ ((packed)); 169 170 struct rkispp_tnr_config { 171 u8 opty_en; 172 u8 optc_en; 173 u8 gain_en; 174 u8 pk0_y; 175 u8 pk1_y; 176 u8 pk0_c; 177 u8 pk1_c; 178 u8 glb_gain_cur_sqrt; 179 u8 sigma_x[TNR_SIGMA_CURVE_SIZE - 1]; 180 u8 gfcoef_y0[TNR_GFCOEF6_SIZE]; 181 u8 gfcoef_y1[TNR_GFCOEF3_SIZE]; 182 u8 gfcoef_y2[TNR_GFCOEF3_SIZE]; 183 u8 gfcoef_y3[TNR_GFCOEF3_SIZE]; 184 u8 gfcoef_yg0[TNR_GFCOEF6_SIZE]; 185 u8 gfcoef_yg1[TNR_GFCOEF3_SIZE]; 186 u8 gfcoef_yg2[TNR_GFCOEF3_SIZE]; 187 u8 gfcoef_yg3[TNR_GFCOEF3_SIZE]; 188 u8 gfcoef_yl0[TNR_GFCOEF6_SIZE]; 189 u8 gfcoef_yl1[TNR_GFCOEF3_SIZE]; 190 u8 gfcoef_yl2[TNR_GFCOEF3_SIZE]; 191 u8 gfcoef_cg0[TNR_GFCOEF6_SIZE]; 192 u8 gfcoef_cg1[TNR_GFCOEF3_SIZE]; 193 u8 gfcoef_cg2[TNR_GFCOEF3_SIZE]; 194 u8 gfcoef_cl0[TNR_GFCOEF6_SIZE]; 195 u8 gfcoef_cl1[TNR_GFCOEF3_SIZE]; 196 u8 weight_y[TNR_WEIGHT_Y_SIZE]; 197 198 u16 glb_gain_cur __attribute__((aligned(2))); 199 u16 glb_gain_nxt; 200 u16 glb_gain_cur_div; 201 u16 txt_th1_y; 202 u16 txt_th0_c; 203 u16 txt_th1_c; 204 u16 txt_thy_dlt; 205 u16 txt_thc_dlt; 206 u16 txt_th0_y; 207 u16 sigma_y[TNR_SIGMA_CURVE_SIZE]; 208 u16 luma_curve[TNR_LUMA_CURVE_SIZE]; 209 u16 scale_yg[TNR_SCALE_YG_SIZE]; 210 u16 scale_yl[TNR_SCALE_YL_SIZE]; 211 u16 scale_cg[TNR_SCALE_CG_SIZE]; 212 u16 scale_y2cg[TNR_SCALE_Y2CG_SIZE]; 213 u16 scale_cl[TNR_SCALE_CL_SIZE]; 214 u16 scale_y2cl[TNR_SCALE_Y2CL_SIZE]; 215 } __attribute__ ((packed)); 216 217 struct rkispp_nr_config { 218 u8 uvnr_step1_en; 219 u8 uvnr_step2_en; 220 u8 nr_gain_en; 221 u8 uvnr_sd32_self_en; 222 u8 uvnr_nobig_en; 223 u8 uvnr_big_en; 224 u8 uvnr_gain_1sigma; 225 u8 uvnr_gain_offset; 226 u8 uvnr_gain_t2gen; 227 u8 uvnr_gain_iso; 228 u8 uvnr_t1gen_m3alpha; 229 u8 uvnr_t1flt_mode; 230 u8 uvnr_t1flt_wtp; 231 u8 uvnr_t2gen_m3alpha; 232 u8 uvnr_t2gen_wtp; 233 u8 uvnr_gain_uvgain[NR_UVNR_UVGAIN_SIZE]; 234 u8 uvnr_t1flt_wtq[NR_UVNR_T1FLT_WTQ_SIZE]; 235 u8 uvnr_t2gen_wtq[NR_UVNR_T2GEN_WTQ_SIZE]; 236 u8 uvnr_t2flt_wtp; 237 u8 uvnr_t2flt_wt[NR_UVNR_T2FLT_WT_SIZE]; 238 u8 ynr_sgm_dx[NR_YNR_SGM_DX_SIZE]; 239 u8 ynr_lci[NR_YNR_CI_SIZE]; 240 u8 ynr_lgain_min[NR_YNR_LGAIN_MIN_SIZE]; 241 u8 ynr_lgain_max; 242 u8 ynr_lmerge_bound; 243 u8 ynr_lmerge_ratio; 244 u8 ynr_lweit_flt[NR_YNR_LWEIT_FLT_SIZE]; 245 u8 ynr_hlci[NR_YNR_CI_SIZE]; 246 u8 ynr_lhci[NR_YNR_CI_SIZE]; 247 u8 ynr_hhci[NR_YNR_CI_SIZE]; 248 u8 ynr_hgain_sgm[NR_YNR_HGAIN_SGM_SIZE]; 249 u8 ynr_hweit_d[NR_YNR_HWEIT_D_SIZE]; 250 u8 ynr_hgrad_y[NR_YNR_HGRAD_Y_SIZE]; 251 u8 ynr_hmax_adjust; 252 u8 ynr_hstrength; 253 u8 ynr_lweit_cmp[NR_YNR_LWEIT_CMP_SIZE]; 254 u8 ynr_lmaxgain_lv4; 255 256 u16 uvnr_t1flt_msigma __attribute__((aligned(2))); 257 u16 uvnr_t2gen_msigma; 258 u16 uvnr_t2flt_msigma; 259 u16 ynr_lsgm_y[NR_YNR_SGM_Y_SIZE]; 260 u16 ynr_hsgm_y[NR_YNR_SGM_Y_SIZE]; 261 u16 ynr_hweit[NR_YNR_HWEIT_SIZE]; 262 u16 ynr_hstv_y[NR_YNR_HSTV_Y_SIZE]; 263 u16 ynr_st_scale[NR_YNR_ST_SCALE_SIZE]; 264 } __attribute__ ((packed)); 265 266 struct rkispp_sharp_config { 267 u8 rotation; 268 u8 scl_down_v; 269 u8 scl_down_h; 270 u8 tile_ycnt; 271 u8 tile_xcnt; 272 u8 alpha_adp_en; 273 u8 yin_flt_en; 274 u8 edge_avg_en; 275 u8 ehf_th; 276 u8 pbf_ratio; 277 u8 edge_thed; 278 u8 dir_min; 279 u8 pbf_shf_bits; 280 u8 mbf_shf_bits; 281 u8 hbf_shf_bits; 282 u8 m_ratio; 283 u8 h_ratio; 284 u8 pbf_k[SHP_PBF_KERNEL_SIZE]; 285 u8 mrf_k[SHP_MRF_KERNEL_SIZE]; 286 u8 mbf_k[SHP_MBF_KERNEL_SIZE]; 287 u8 hrf_k[SHP_HRF_KERNEL_SIZE]; 288 u8 hbf_k[SHP_HBF_KERNEL_SIZE]; 289 s8 eg_coef[SHP_EDGE_COEF_SIZE]; 290 u8 eg_smoth[SHP_EDGE_SMOTH_SIZE]; 291 u8 eg_gaus[SHP_EDGE_GAUS_SIZE]; 292 s8 dog_k[SHP_DOG_KERNEL_SIZE]; 293 u8 lum_point[SHP_LUM_POINT_SIZE]; 294 u8 pbf_sigma[SHP_SIGMA_SIZE]; 295 u8 lum_clp_m[SHP_LUM_CLP_SIZE]; 296 s8 lum_min_m[SHP_LUM_MIN_SIZE]; 297 u8 mbf_sigma[SHP_SIGMA_SIZE]; 298 u8 lum_clp_h[SHP_LUM_CLP_SIZE]; 299 u8 hbf_sigma[SHP_SIGMA_SIZE]; 300 u8 edge_lum_thed[SHP_EDGE_LUM_THED_SIZE]; 301 u8 clamp_pos[SHP_CLAMP_SIZE]; 302 u8 clamp_neg[SHP_CLAMP_SIZE]; 303 u8 detail_alpha[SHP_DETAIL_ALPHA_SIZE]; 304 305 u16 hbf_ratio __attribute__((aligned(2))); 306 u16 smoth_th4; 307 u16 l_alpha; 308 u16 g_alpha; 309 u16 rfl_ratio; 310 u16 rfh_ratio; 311 } __attribute__ ((packed)); 312 313 enum rkispp_fecbuf_stat { 314 FEC_BUF_INIT = 0, 315 FEC_BUF_WAIT2CHIP, 316 FEC_BUF_CHIPINUSE, 317 }; 318 319 struct rkispp_fecbuf_info { 320 s32 buf_fd[FEC_MESH_BUF_MAX]; 321 u32 buf_size[FEC_MESH_BUF_MAX]; 322 } __attribute__ ((packed)); 323 324 struct rkispp_fecbuf_size { 325 u32 meas_width; 326 u32 meas_height; 327 u32 meas_mode; 328 int buf_cnt; 329 } __attribute__ ((packed)); 330 331 struct rkispp_fec_head { 332 enum rkispp_fecbuf_stat stat; 333 u32 meshxf_oft; 334 u32 meshyf_oft; 335 u32 meshxi_oft; 336 u32 meshyi_oft; 337 } __attribute__ ((packed)); 338 339 struct rkispp_fec_config { 340 u8 mesh_density; 341 u8 crop_en; 342 u16 crop_width __attribute__((aligned(2))); 343 u16 crop_height; 344 u32 mesh_size __attribute__((aligned(4))); 345 s32 buf_fd; 346 } __attribute__ ((packed)); 347 348 struct rkispp_orb_config { 349 u8 limit_value; 350 u32 max_feature __attribute__((aligned(4))); 351 } __attribute__ ((packed)); 352 353 struct rkispp_buf_info { 354 //s32 fd; 355 u32 index; 356 u32 size; 357 } __attribute__ ((packed)); 358 359 /** 360 * struct rkispp_params_cfghead - Rockchip ISPP Input Parameters Meta Data 361 * 362 * @module_en_update: mask the enable bits of which module should be updated 363 * @module_ens: mask the enable value of each module, only update the module 364 * which correspond bit was set in module_en_update 365 * @module_cfg_update: mask the config bits of which module should be updated 366 */ 367 struct rkispp_params_cfghead { 368 u32 module_en_update; 369 u32 module_ens; 370 u32 module_cfg_update; 371 372 u32 frame_id; 373 } __attribute__ ((packed)); 374 375 /** 376 * struct rkispp_params_tnrcfg - Rockchip ISPP Input Parameters Meta Data 377 */ 378 struct rkispp_params_tnrcfg { 379 struct rkispp_params_cfghead head; 380 381 struct rkispp_tnr_config tnr_cfg; 382 //struct rkispp_buf_info gain; 383 //struct rkispp_buf_info image; 384 } __attribute__ ((packed)); 385 386 /** 387 * struct rkispp_params_nrcfg - Rockchip ISPP Input Parameters Meta Data 388 */ 389 struct rkispp_params_nrcfg { 390 struct rkispp_params_cfghead head; 391 392 struct rkispp_nr_config nr_cfg; 393 struct rkispp_sharp_config shp_cfg; 394 struct rkispp_orb_config orb_cfg; 395 396 struct rkispp_buf_info gain; 397 //struct rkispp_buf_info image; 398 } __attribute__ ((packed)); 399 400 /** 401 * struct rkispp_params_feccfg - Rockchip ISPP Input Parameters Meta Data 402 */ 403 struct rkispp_params_feccfg { 404 struct rkispp_params_cfghead head; 405 406 struct rkispp_fec_config fec_cfg; 407 struct rkispp_buf_info image; 408 } __attribute__ ((packed)); 409 410 struct rkispp_orb_data { 411 u8 brief[ORB_BRIEF_NUM]; 412 u32 y : 13; 413 u32 x : 13; 414 u32 dmy1 : 6; 415 u8 dmy2[ORB_DUMMY_NUM]; 416 } __attribute__ ((packed)); 417 418 /** 419 * struct rkispp_stats_nrbuf - Rockchip ISPP Statistics 420 * 421 * @meas_type: measurement types 422 * @frame_id: frame ID for sync 423 * @data: statistics data 424 */ 425 struct rkispp_stats_nrbuf { 426 struct rkispp_orb_data data[ORB_DATA_NUM]; 427 428 u32 total_num __attribute__((aligned(4))); 429 u32 meas_type; 430 u32 frame_id; 431 432 struct rkispp_buf_info image; 433 } __attribute__ ((packed)); 434 435 /** 436 * struct rkispp_stats_tnrbuf - Rockchip ISPP Statistics 437 * 438 * @meas_type: measurement types 439 * @frame_id: frame ID for sync 440 */ 441 struct rkispp_stats_tnrbuf { 442 u32 meas_type; 443 u32 frame_id; 444 445 struct rkispp_buf_info gain; 446 struct rkispp_buf_info gainkg; 447 //struct rkispp_buf_info image; 448 } __attribute__ ((packed)); 449 450 451 struct rkispp_params_cfg { 452 u32 module_en_update; 453 u32 module_ens; 454 u32 module_cfg_update; 455 u32 module_init_ens; 456 457 u32 frame_id; 458 struct rkispp_tnr_config tnr_cfg; 459 struct rkispp_nr_config nr_cfg; 460 struct rkispp_sharp_config shp_cfg; 461 struct rkispp_fec_config fec_cfg; 462 struct rkispp_orb_config orb_cfg; 463 int fec_output_buf_index; 464 int fec_output_buf_size; 465 u32 fec_frame_id; 466 } __attribute__ ((packed)); 467 468 struct rkispp_stats_buffer { 469 struct rkispp_orb_data data[ORB_DATA_NUM]; 470 471 u32 total_num __attribute__((aligned(4))); 472 u32 meas_type; 473 u32 frame_id; 474 } __attribute__ ((packed)); 475 #endif 476