1 /* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR MIT) 2 * 3 * Copyright (C) 2019 Rockchip Electronics Co., Ltd. 4 */ 5 6 #ifndef _UAPI_RKISPP_CONFIG_H 7 #define _UAPI_RKISPP_CONFIG_H 8 9 #include <linux/types.h> 10 #include <linux/v4l2-controls.h> 11 12 #define ISPP_API_VERSION KERNEL_VERSION(1, 8, 0) 13 14 #ifndef BIT 15 #define BIT(x) (~0 & (1 << x)) 16 #endif 17 #ifndef s8 18 typedef signed char s8; 19 #endif 20 #ifndef u8 21 typedef unsigned char u8; 22 #endif 23 #ifndef s16 24 typedef signed short s16; 25 #endif 26 #ifndef u16 27 typedef unsigned short u16; 28 #endif 29 #ifndef s32 30 typedef signed int s32; 31 #endif 32 #ifndef u32 33 typedef unsigned int u32; 34 #endif 35 #ifndef s64 36 typedef signed long long s64; 37 #endif 38 #ifndef u64 39 typedef unsigned long long u64; 40 #endif 41 42 #define ISPP_ID_TNR (0) 43 #define ISPP_ID_NR (1) 44 #define ISPP_ID_SHP (2) 45 #define ISPP_ID_FEC (3) 46 #define ISPP_ID_ORB (4) 47 #define ISPP_ID_MAX (5) 48 49 #define ISPP_MODULE_TNR BIT(ISPP_ID_TNR)//2TO1 50 #define ISPP_MODULE_NR BIT(ISPP_ID_NR) 51 #define ISPP_MODULE_SHP BIT(ISPP_ID_SHP) 52 #define ISPP_MODULE_FEC BIT(ISPP_ID_FEC)//CALIBRATION 53 #define ISPP_MODULE_ORB BIT(ISPP_ID_ORB) 54 //extra function 55 #define ISPP_MODULE_TNR_3TO1 (BIT(16) | ISPP_MODULE_TNR) 56 #define ISPP_MODULE_FEC_ST (BIT(17) | ISPP_MODULE_FEC)//STABILIZATION 57 58 #define TNR_SIGMA_CURVE_SIZE 17 59 #define TNR_LUMA_CURVE_SIZE 6 60 #define TNR_GFCOEF6_SIZE 6 61 #define TNR_GFCOEF3_SIZE 3 62 #define TNR_SCALE_YG_SIZE 4 63 #define TNR_SCALE_YL_SIZE 3 64 #define TNR_SCALE_CG_SIZE 3 65 #define TNR_SCALE_Y2CG_SIZE 3 66 #define TNR_SCALE_CL_SIZE 2 67 #define TNR_SCALE_Y2CL_SIZE 3 68 #define TNR_WEIGHT_Y_SIZE 3 69 70 #define NR_UVNR_UVGAIN_SIZE 2 71 #define NR_UVNR_T1FLT_WTQ_SIZE 8 72 #define NR_UVNR_T2GEN_WTQ_SIZE 4 73 #define NR_UVNR_T2FLT_WT_SIZE 3 74 #define NR_YNR_SGM_DX_SIZE 16 75 #define NR_YNR_SGM_Y_SIZE 17 76 #define NR_YNR_HWEIT_D_SIZE 20 77 #define NR_YNR_HGRAD_Y_SIZE 24 78 #define NR_YNR_HSTV_Y_SIZE 17 79 #define NR_YNR_CI_SIZE 4 80 #define NR_YNR_LGAIN_MIN_SIZE 4 81 #define NR_YNR_LWEIT_FLT_SIZE 4 82 #define NR_YNR_HGAIN_SGM_SIZE 4 83 #define NR_YNR_HWEIT_SIZE 4 84 #define NR_YNR_LWEIT_CMP_SIZE 2 85 #define NR_YNR_ST_SCALE_SIZE 3 86 87 #define SHP_PBF_KERNEL_SIZE 3 88 #define SHP_MRF_KERNEL_SIZE 6 89 #define SHP_MBF_KERNEL_SIZE 12 90 #define SHP_HRF_KERNEL_SIZE 6 91 #define SHP_HBF_KERNEL_SIZE 3 92 #define SHP_EDGE_COEF_SIZE 3 93 #define SHP_EDGE_SMOTH_SIZE 3 94 #define SHP_EDGE_GAUS_SIZE 6 95 #define SHP_DOG_KERNEL_SIZE 6 96 #define SHP_LUM_POINT_SIZE 6 97 #define SHP_SIGMA_SIZE 8 98 #define SHP_LUM_CLP_SIZE 8 99 #define SHP_LUM_MIN_SIZE 8 100 #define SHP_EDGE_LUM_THED_SIZE 8 101 #define SHP_CLAMP_SIZE 8 102 #define SHP_DETAIL_ALPHA_SIZE 8 103 104 #define ORB_DATA_NUM 10000 105 #define ORB_BRIEF_NUM 15 106 #define ORB_DUMMY_NUM 13 107 108 #define FEC_MESH_XY_POINT_SIZE 6 109 #define FEC_MESH_XY_NUM 131072 110 #define FEC_MESH_BUF_NUM 2 111 112 #define TNR_BUF_IDXFD_NUM 64 113 114 /************VIDIOC_PRIVATE*************/ 115 #define RKISPP_CMD_GET_FECBUF_INFO \ 116 _IOR('V', BASE_VIDIOC_PRIVATE + 0, struct rkispp_fecbuf_info) 117 118 #define RKISPP_CMD_SET_FECBUF_SIZE \ 119 _IOW('V', BASE_VIDIOC_PRIVATE + 1, struct rkispp_fecbuf_size) 120 121 #define RKISPP_CMD_FEC_IN_OUT \ 122 _IOW('V', BASE_VIDIOC_PRIVATE + 10, struct rkispp_fec_in_out) 123 124 #define RKISPP_CMD_TRIGGER_YNRRUN \ 125 _IOW('V', BASE_VIDIOC_PRIVATE + 11, struct rkispp_tnr_inf) 126 127 #define RKISPP_CMD_GET_TNRBUF_FD \ 128 _IOR('V', BASE_VIDIOC_PRIVATE + 12, struct rkispp_buf_idxfd) 129 130 #define RKISPP_CMD_TRIGGER_MODE \ 131 _IOW('V', BASE_VIDIOC_PRIVATE + 13, struct rkispp_trigger_mode) 132 133 /************EVENT_PRIVATE**************/ 134 #define RKISPP_V4L2_EVENT_TNR_COMPLETE \ 135 (V4L2_EVENT_PRIVATE_START + 3) 136 137 struct rkispp_fec_in_out { 138 int in_width; 139 int in_height; 140 int out_width; 141 int out_height; 142 int in_fourcc; 143 int out_fourcc; 144 int in_pic_fd; 145 int out_pic_fd; 146 int mesh_xint_fd; 147 int mesh_xfra_fd; 148 int mesh_yint_fd; 149 int mesh_yfra_fd; 150 }; 151 152 struct rkispp_tnr_inf { 153 u32 dev_id; 154 u32 frame_id; 155 u32 gainkg_idx; 156 u32 gainwr_idx; 157 u32 gainkg_size; 158 u32 gainwr_size; 159 } __attribute__ ((packed)); 160 161 struct rkispp_buf_idxfd { 162 u32 buf_num; 163 u32 index[TNR_BUF_IDXFD_NUM]; 164 s32 dmafd[TNR_BUF_IDXFD_NUM]; 165 } __attribute__ ((packed)); 166 167 struct rkispp_trigger_mode { 168 u32 module; 169 u32 on; 170 } __attribute__ ((packed)); 171 172 struct rkispp_tnr_config { 173 u8 opty_en; 174 u8 optc_en; 175 u8 gain_en; 176 u8 pk0_y; 177 u8 pk1_y; 178 u8 pk0_c; 179 u8 pk1_c; 180 u8 glb_gain_cur_sqrt; 181 u8 sigma_x[TNR_SIGMA_CURVE_SIZE - 1]; 182 u8 gfcoef_y0[TNR_GFCOEF6_SIZE]; 183 u8 gfcoef_y1[TNR_GFCOEF3_SIZE]; 184 u8 gfcoef_y2[TNR_GFCOEF3_SIZE]; 185 u8 gfcoef_y3[TNR_GFCOEF3_SIZE]; 186 u8 gfcoef_yg0[TNR_GFCOEF6_SIZE]; 187 u8 gfcoef_yg1[TNR_GFCOEF3_SIZE]; 188 u8 gfcoef_yg2[TNR_GFCOEF3_SIZE]; 189 u8 gfcoef_yg3[TNR_GFCOEF3_SIZE]; 190 u8 gfcoef_yl0[TNR_GFCOEF6_SIZE]; 191 u8 gfcoef_yl1[TNR_GFCOEF3_SIZE]; 192 u8 gfcoef_yl2[TNR_GFCOEF3_SIZE]; 193 u8 gfcoef_cg0[TNR_GFCOEF6_SIZE]; 194 u8 gfcoef_cg1[TNR_GFCOEF3_SIZE]; 195 u8 gfcoef_cg2[TNR_GFCOEF3_SIZE]; 196 u8 gfcoef_cl0[TNR_GFCOEF6_SIZE]; 197 u8 gfcoef_cl1[TNR_GFCOEF3_SIZE]; 198 u8 weight_y[TNR_WEIGHT_Y_SIZE]; 199 200 u16 glb_gain_cur __attribute__((aligned(2))); 201 u16 glb_gain_nxt; 202 u16 glb_gain_cur_div; 203 u16 txt_th1_y; 204 u16 txt_th0_c; 205 u16 txt_th1_c; 206 u16 txt_thy_dlt; 207 u16 txt_thc_dlt; 208 u16 txt_th0_y; 209 u16 sigma_y[TNR_SIGMA_CURVE_SIZE]; 210 u16 luma_curve[TNR_LUMA_CURVE_SIZE]; 211 u16 scale_yg[TNR_SCALE_YG_SIZE]; 212 u16 scale_yl[TNR_SCALE_YL_SIZE]; 213 u16 scale_cg[TNR_SCALE_CG_SIZE]; 214 u16 scale_y2cg[TNR_SCALE_Y2CG_SIZE]; 215 u16 scale_cl[TNR_SCALE_CL_SIZE]; 216 u16 scale_y2cl[TNR_SCALE_Y2CL_SIZE]; 217 } __attribute__ ((packed)); 218 219 struct rkispp_nr_config { 220 u8 uvnr_step1_en; 221 u8 uvnr_step2_en; 222 u8 nr_gain_en; 223 u8 uvnr_sd32_self_en; 224 u8 uvnr_nobig_en; 225 u8 uvnr_big_en; 226 u8 uvnr_gain_1sigma; 227 u8 uvnr_gain_offset; 228 u8 uvnr_gain_t2gen; 229 u8 uvnr_gain_iso; 230 u8 uvnr_t1gen_m3alpha; 231 u8 uvnr_t1flt_mode; 232 u8 uvnr_t1flt_wtp; 233 u8 uvnr_t2gen_m3alpha; 234 u8 uvnr_t2gen_wtp; 235 u8 uvnr_gain_uvgain[NR_UVNR_UVGAIN_SIZE]; 236 u8 uvnr_t1flt_wtq[NR_UVNR_T1FLT_WTQ_SIZE]; 237 u8 uvnr_t2gen_wtq[NR_UVNR_T2GEN_WTQ_SIZE]; 238 u8 uvnr_t2flt_wtp; 239 u8 uvnr_t2flt_wt[NR_UVNR_T2FLT_WT_SIZE]; 240 u8 ynr_sgm_dx[NR_YNR_SGM_DX_SIZE]; 241 u8 ynr_lci[NR_YNR_CI_SIZE]; 242 u8 ynr_lgain_min[NR_YNR_LGAIN_MIN_SIZE]; 243 u8 ynr_lgain_max; 244 u8 ynr_lmerge_bound; 245 u8 ynr_lmerge_ratio; 246 u8 ynr_lweit_flt[NR_YNR_LWEIT_FLT_SIZE]; 247 u8 ynr_hlci[NR_YNR_CI_SIZE]; 248 u8 ynr_lhci[NR_YNR_CI_SIZE]; 249 u8 ynr_hhci[NR_YNR_CI_SIZE]; 250 u8 ynr_hgain_sgm[NR_YNR_HGAIN_SGM_SIZE]; 251 u8 ynr_hweit_d[NR_YNR_HWEIT_D_SIZE]; 252 u8 ynr_hgrad_y[NR_YNR_HGRAD_Y_SIZE]; 253 u8 ynr_hmax_adjust; 254 u8 ynr_hstrength; 255 u8 ynr_lweit_cmp[NR_YNR_LWEIT_CMP_SIZE]; 256 u8 ynr_lmaxgain_lv4; 257 258 u16 uvnr_t1flt_msigma __attribute__((aligned(2))); 259 u16 uvnr_t2gen_msigma; 260 u16 uvnr_t2flt_msigma; 261 u16 ynr_lsgm_y[NR_YNR_SGM_Y_SIZE]; 262 u16 ynr_hsgm_y[NR_YNR_SGM_Y_SIZE]; 263 u16 ynr_hweit[NR_YNR_HWEIT_SIZE]; 264 u16 ynr_hstv_y[NR_YNR_HSTV_Y_SIZE]; 265 u16 ynr_st_scale[NR_YNR_ST_SCALE_SIZE]; 266 } __attribute__ ((packed)); 267 268 struct rkispp_sharp_config { 269 u8 rotation; 270 u8 scl_down_v; 271 u8 scl_down_h; 272 u8 tile_ycnt; 273 u8 tile_xcnt; 274 u8 alpha_adp_en; 275 u8 yin_flt_en; 276 u8 edge_avg_en; 277 u8 ehf_th; 278 u8 pbf_ratio; 279 u8 edge_thed; 280 u8 dir_min; 281 u8 pbf_shf_bits; 282 u8 mbf_shf_bits; 283 u8 hbf_shf_bits; 284 u8 m_ratio; 285 u8 h_ratio; 286 u8 pbf_k[SHP_PBF_KERNEL_SIZE]; 287 u8 mrf_k[SHP_MRF_KERNEL_SIZE]; 288 u8 mbf_k[SHP_MBF_KERNEL_SIZE]; 289 u8 hrf_k[SHP_HRF_KERNEL_SIZE]; 290 u8 hbf_k[SHP_HBF_KERNEL_SIZE]; 291 s8 eg_coef[SHP_EDGE_COEF_SIZE]; 292 u8 eg_smoth[SHP_EDGE_SMOTH_SIZE]; 293 u8 eg_gaus[SHP_EDGE_GAUS_SIZE]; 294 s8 dog_k[SHP_DOG_KERNEL_SIZE]; 295 u8 lum_point[SHP_LUM_POINT_SIZE]; 296 u8 pbf_sigma[SHP_SIGMA_SIZE]; 297 u8 lum_clp_m[SHP_LUM_CLP_SIZE]; 298 s8 lum_min_m[SHP_LUM_MIN_SIZE]; 299 u8 mbf_sigma[SHP_SIGMA_SIZE]; 300 u8 lum_clp_h[SHP_LUM_CLP_SIZE]; 301 u8 hbf_sigma[SHP_SIGMA_SIZE]; 302 u8 edge_lum_thed[SHP_EDGE_LUM_THED_SIZE]; 303 u8 clamp_pos[SHP_CLAMP_SIZE]; 304 u8 clamp_neg[SHP_CLAMP_SIZE]; 305 u8 detail_alpha[SHP_DETAIL_ALPHA_SIZE]; 306 307 u16 hbf_ratio __attribute__((aligned(2))); 308 u16 smoth_th4; 309 u16 l_alpha; 310 u16 g_alpha; 311 u16 rfl_ratio; 312 u16 rfh_ratio; 313 } __attribute__ ((packed)); 314 315 enum rkispp_fecbuf_stat { 316 FEC_BUF_INIT = 0, 317 FEC_BUF_WAIT2CHIP, 318 FEC_BUF_CHIPINUSE, 319 }; 320 321 struct rkispp_fecbuf_info { 322 s32 buf_fd[FEC_MESH_BUF_NUM]; 323 u32 buf_size[FEC_MESH_BUF_NUM]; 324 } __attribute__ ((packed)); 325 326 struct rkispp_fecbuf_size { 327 u32 meas_width; 328 u32 meas_height; 329 u32 meas_mode; 330 } __attribute__ ((packed)); 331 332 struct rkispp_fec_head { 333 enum rkispp_fecbuf_stat stat; 334 u32 meshxf_oft; 335 u32 meshyf_oft; 336 u32 meshxi_oft; 337 u32 meshyi_oft; 338 } __attribute__ ((packed)); 339 340 struct rkispp_fec_config { 341 u8 mesh_density; 342 u8 crop_en; 343 u16 crop_width __attribute__((aligned(2))); 344 u16 crop_height; 345 u32 mesh_size __attribute__((aligned(4))); 346 s32 buf_fd; 347 } __attribute__ ((packed)); 348 349 struct rkispp_orb_config { 350 u8 limit_value; 351 u32 max_feature __attribute__((aligned(4))); 352 } __attribute__ ((packed)); 353 354 /** 355 * struct rkispp_params_cfg - Rockchip ISPP Input Parameters Meta Data 356 * 357 * @module_en_update: mask the enable bits of which module should be updated 358 * @module_ens: mask the enable value of each module, only update the module 359 * which correspond bit was set in module_en_update 360 * @module_cfg_update: mask the config bits of which module should be updated 361 * @module_init_en: initial enable module function 362 */ 363 struct rkispp_params_cfg { 364 u32 module_en_update; 365 u32 module_ens; 366 u32 module_cfg_update; 367 u32 module_init_ens; 368 369 u32 frame_id; 370 struct rkispp_tnr_config tnr_cfg; 371 struct rkispp_nr_config nr_cfg; 372 struct rkispp_sharp_config shp_cfg; 373 struct rkispp_fec_config fec_cfg; 374 struct rkispp_orb_config orb_cfg; 375 } __attribute__ ((packed)); 376 377 struct rkispp_orb_data { 378 u8 brief[ORB_BRIEF_NUM]; 379 u32 y : 13; 380 u32 x : 13; 381 u32 dmy1 : 6; 382 u8 dmy2[ORB_DUMMY_NUM]; 383 } __attribute__ ((packed)); 384 385 /** 386 * struct rkispp_stats_buffer - Rockchip ISPP Statistics 387 * 388 * @meas_type: measurement types 389 * @frame_id: frame ID for sync 390 * @data: statistics data 391 */ 392 struct rkispp_stats_buffer { 393 struct rkispp_orb_data data[ORB_DATA_NUM]; 394 395 u32 total_num __attribute__((aligned(4))); 396 u32 meas_type; 397 u32 frame_id; 398 } __attribute__ ((packed)); 399 400 #endif 401