1From d672b64ae257e789311dfd0aea947972af64b966 Mon Sep 17 00:00:00 2001
2From: Romain Naour <romain.naour@gmail.com>
3Date: Wed, 20 Jan 2021 23:26:29 +0100
4Subject: [PATCH] Revert "re PR target/92095 (internal error with -O1
5 -mcpu=niagara2 -fPIE)"
6
7This reverts commit 0a83f1a441d7aaadecb368c237b6ee70bd7b91d6.
8
9Building the Buildroot defconfig qemu_sparc_ss10_defconfig using
10gcc 8.4, 9.3 and 10 produce a broken rootfs that trigger illegal
11instruction messages.
12
13gcc 8.3, 9.2 are the latest working gcc version.
14git bisect between gcc 8.4 and 8.4 allowed to identify
15the commit that introcuce the regression.
16
17Reverting this patch allowed to produce a working rootfs.
18
19Reported to gcc:
20https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98784
21
22Signed-off-by: Romain Naour <romain.naour@gmail.com>
23Cc: Eric Botcazou <ebotcazou@gcc.gnu.org>
24---
25 gcc/config/sparc/sparc-protos.h               |   1 -
26 gcc/config/sparc/sparc.c                      | 121 +++++++-----------
27 gcc/config/sparc/sparc.md                     |   5 +-
28 .../gcc.c-torture/compile/20191108-1.c        |  14 --
29 gcc/testsuite/gcc.target/sparc/overflow-3.c   |   2 +-
30 gcc/testsuite/gcc.target/sparc/overflow-4.c   |   2 +-
31 gcc/testsuite/gcc.target/sparc/overflow-5.c   |   2 +-
32 7 files changed, 53 insertions(+), 94 deletions(-)
33 delete mode 100644 gcc/testsuite/gcc.c-torture/compile/20191108-1.c
34
35diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h
36index 5f9999a669c..37452b06415 100644
37--- a/gcc/config/sparc/sparc-protos.h
38+++ b/gcc/config/sparc/sparc-protos.h
39@@ -69,7 +69,6 @@ extern void sparc_split_reg_mem (rtx, rtx, machine_mode);
40 extern void sparc_split_mem_reg (rtx, rtx, machine_mode);
41 extern int sparc_split_reg_reg_legitimate (rtx, rtx);
42 extern void sparc_split_reg_reg (rtx, rtx, machine_mode);
43-extern const char *output_load_pcrel_sym (rtx *);
44 extern const char *output_ubranch (rtx, rtx_insn *);
45 extern const char *output_cbranch (rtx, rtx, int, int, int, rtx_insn *);
46 extern const char *output_return (rtx_insn *);
47diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
48index 7cfa9f80676..3a721f19eb5 100644
49--- a/gcc/config/sparc/sparc.c
50+++ b/gcc/config/sparc/sparc.c
51@@ -4243,6 +4243,13 @@ eligible_for_sibcall_delay (rtx_insn *trial)
52 static bool
53 sparc_cannot_force_const_mem (machine_mode mode, rtx x)
54 {
55+  /* After IRA has run in PIC mode, it is too late to put anything into the
56+     constant pool if the PIC register hasn't already been initialized.  */
57+  if ((lra_in_progress || reload_in_progress)
58+      && flag_pic
59+      && !crtl->uses_pic_offset_table)
60+    return true;
61+
62   switch (GET_CODE (x))
63     {
64     case CONST_INT:
65@@ -4278,11 +4285,9 @@ sparc_cannot_force_const_mem (machine_mode mode, rtx x)
66 }
67
68 /* Global Offset Table support.  */
69-static GTY(()) rtx got_symbol_rtx = NULL_RTX;
70-static GTY(()) rtx got_register_rtx = NULL_RTX;
71 static GTY(()) rtx got_helper_rtx = NULL_RTX;
72-
73-static GTY(()) bool got_helper_needed = false;
74+static GTY(()) rtx got_register_rtx = NULL_RTX;
75+static GTY(()) rtx got_symbol_rtx = NULL_RTX;
76
77 /* Return the SYMBOL_REF for the Global Offset Table.  */
78
79@@ -4295,6 +4300,27 @@ sparc_got (void)
80   return got_symbol_rtx;
81 }
82
83+#ifdef HAVE_GAS_HIDDEN
84+# define USE_HIDDEN_LINKONCE 1
85+#else
86+# define USE_HIDDEN_LINKONCE 0
87+#endif
88+
89+static void
90+get_pc_thunk_name (char name[32], unsigned int regno)
91+{
92+  const char *reg_name = reg_names[regno];
93+
94+  /* Skip the leading '%' as that cannot be used in a
95+     symbol name.  */
96+  reg_name += 1;
97+
98+  if (USE_HIDDEN_LINKONCE)
99+    sprintf (name, "__sparc_get_pc_thunk.%s", reg_name);
100+  else
101+    ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC", regno);
102+}
103+
104 /* Wrapper around the load_pcrel_sym{si,di} patterns.  */
105
106 static rtx
107@@ -4314,78 +4340,30 @@ gen_load_pcrel_sym (rtx op0, rtx op1, rtx op2)
108   return insn;
109 }
110
111-/* Output the load_pcrel_sym{si,di} patterns.  */
112-
113-const char *
114-output_load_pcrel_sym (rtx *operands)
115-{
116-  if (flag_delayed_branch)
117-    {
118-      output_asm_insn ("sethi\t%%hi(%a1-4), %0", operands);
119-      output_asm_insn ("call\t%a2", operands);
120-      output_asm_insn (" add\t%0, %%lo(%a1+4), %0", operands);
121-    }
122-  else
123-    {
124-      output_asm_insn ("sethi\t%%hi(%a1-8), %0", operands);
125-      output_asm_insn ("add\t%0, %%lo(%a1-4), %0", operands);
126-      output_asm_insn ("call\t%a2", operands);
127-      output_asm_insn (" nop", NULL);
128-    }
129-
130-  if (operands[2] == got_helper_rtx)
131-    got_helper_needed = true;
132-
133-  return "";
134-}
135-
136-#ifdef HAVE_GAS_HIDDEN
137-# define USE_HIDDEN_LINKONCE 1
138-#else
139-# define USE_HIDDEN_LINKONCE 0
140-#endif
141-
142 /* Emit code to load the GOT register.  */
143
144 void
145 load_got_register (void)
146 {
147-  rtx insn;
148+  if (!got_register_rtx)
149+    got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
150
151   if (TARGET_VXWORKS_RTP)
152-    {
153-      if (!got_register_rtx)
154-	got_register_rtx = pic_offset_table_rtx;
155-
156-      insn = gen_vxworks_load_got ();
157-    }
158+    emit_insn (gen_vxworks_load_got ());
159   else
160     {
161-      if (!got_register_rtx)
162-	got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
163-
164       /* The GOT symbol is subject to a PC-relative relocation so we need a
165 	 helper function to add the PC value and thus get the final value.  */
166       if (!got_helper_rtx)
167 	{
168 	  char name[32];
169-
170-	  /* Skip the leading '%' as that cannot be used in a symbol name.  */
171-	  if (USE_HIDDEN_LINKONCE)
172-	    sprintf (name, "__sparc_get_pc_thunk.%s",
173-		     reg_names[REGNO (got_register_rtx)] + 1);
174-	  else
175-	    ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC",
176-					 REGNO (got_register_rtx));
177-
178+	  get_pc_thunk_name (name, GLOBAL_OFFSET_TABLE_REGNUM);
179 	  got_helper_rtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (name));
180 	}
181
182-      insn
183-	= gen_load_pcrel_sym (got_register_rtx, sparc_got (), got_helper_rtx);
184+      emit_insn (gen_load_pcrel_sym (got_register_rtx, sparc_got (),
185+				     got_helper_rtx));
186     }
187-
188-  emit_insn (insn);
189 }
190
191 /* Ensure that we are not using patterns that are not OK with PIC.  */
192@@ -5550,7 +5528,7 @@ save_local_or_in_reg_p (unsigned int regno, int leaf_function)
193     return true;
194
195   /* GOT register (%l7) if needed.  */
196-  if (got_register_rtx && regno == REGNO (got_register_rtx))
197+  if (regno == GLOBAL_OFFSET_TABLE_REGNUM && got_register_rtx)
198     return true;
199
200   /* If the function accesses prior frames, the frame pointer and the return
201@@ -12658,9 +12636,10 @@ static void
202 sparc_file_end (void)
203 {
204   /* If we need to emit the special GOT helper function, do so now.  */
205-  if (got_helper_needed)
206+  if (got_helper_rtx)
207     {
208       const char *name = XSTR (got_helper_rtx, 0);
209+      const char *reg_name = reg_names[GLOBAL_OFFSET_TABLE_REGNUM];
210 #ifdef DWARF2_UNWIND_INFO
211       bool do_cfi;
212 #endif
213@@ -12697,22 +12676,17 @@ sparc_file_end (void)
214 #ifdef DWARF2_UNWIND_INFO
215       do_cfi = dwarf2out_do_cfi_asm ();
216       if (do_cfi)
217-	output_asm_insn (".cfi_startproc", NULL);
218+	fprintf (asm_out_file, "\t.cfi_startproc\n");
219 #endif
220       if (flag_delayed_branch)
221-	{
222-	  output_asm_insn ("jmp\t%%o7+8", NULL);
223-	  output_asm_insn (" add\t%%o7, %0, %0", &got_register_rtx);
224-	}
225+	fprintf (asm_out_file, "\tjmp\t%%o7+8\n\t add\t%%o7, %s, %s\n",
226+		 reg_name, reg_name);
227       else
228-	{
229-	  output_asm_insn ("add\t%%o7, %0, %0", &got_register_rtx);
230-	  output_asm_insn ("jmp\t%%o7+8", NULL);
231-	  output_asm_insn (" nop", NULL);
232-	}
233+	fprintf (asm_out_file, "\tadd\t%%o7, %s, %s\n\tjmp\t%%o7+8\n\t nop\n",
234+		 reg_name, reg_name);
235 #ifdef DWARF2_UNWIND_INFO
236       if (do_cfi)
237-	output_asm_insn (".cfi_endproc", NULL);
238+	fprintf (asm_out_file, "\t.cfi_endproc\n");
239 #endif
240     }
241
242@@ -13207,10 +13181,7 @@ sparc_init_pic_reg (void)
243   edge entry_edge;
244   rtx_insn *seq;
245
246-  /* In PIC mode, we need to always initialize the PIC register if optimization
247-     is enabled, because we are called from IRA and LRA may later force things
248-     to the constant pool for optimization purposes.  */
249-  if (!flag_pic || (!crtl->uses_pic_offset_table && !optimize))
250+  if (!crtl->uses_pic_offset_table)
251     return;
252
253   start_sequence ();
254diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
255index b242c4b4481..7d08f50705a 100644
256--- a/gcc/config/sparc/sparc.md
257+++ b/gcc/config/sparc/sparc.md
258@@ -1603,7 +1603,10 @@
259    (clobber (reg:P O7_REG))]
260   "REGNO (operands[0]) == INTVAL (operands[3])"
261 {
262-  return output_load_pcrel_sym (operands);
263+  if (flag_delayed_branch)
264+    return "sethi\t%%hi(%a1-4), %0\n\tcall\t%a2\n\t add\t%0, %%lo(%a1+4), %0";
265+  else
266+    return "sethi\t%%hi(%a1-8), %0\n\tadd\t%0, %%lo(%a1-4), %0\n\tcall\t%a2\n\t nop";
267 }
268   [(set (attr "type") (const_string "multi"))
269    (set (attr "length")
270diff --git a/gcc/testsuite/gcc.c-torture/compile/20191108-1.c b/gcc/testsuite/gcc.c-torture/compile/20191108-1.c
271deleted file mode 100644
272index 7929751bb06..00000000000
273--- a/gcc/testsuite/gcc.c-torture/compile/20191108-1.c
274+++ /dev/null
275@@ -1,14 +0,0 @@
276-/* PR target/92095 */
277-/* Testcase by Sergei Trofimovich <slyfox@inbox.ru> */
278-
279-typedef union {
280-  double a;
281-  int b[2];
282-} c;
283-
284-double d(int e)
285-{
286-  c f;
287-  (&f)->b[0] = 15728640;
288-  return e ? -(&f)->a : (&f)->a;
289-}
290diff --git a/gcc/testsuite/gcc.target/sparc/overflow-3.c b/gcc/testsuite/gcc.target/sparc/overflow-3.c
291index 52d6ab2b688..86dddfb09e6 100644
292--- a/gcc/testsuite/gcc.target/sparc/overflow-3.c
293+++ b/gcc/testsuite/gcc.target/sparc/overflow-3.c
294@@ -1,6 +1,6 @@
295 /* { dg-do compile } */
296 /* { dg-require-effective-target lp64 } */
297-/* { dg-options "-O -fno-pie" } */
298+/* { dg-options "-O" } */
299
300 #include <stdbool.h>
301 #include <stdint.h>
302diff --git a/gcc/testsuite/gcc.target/sparc/overflow-4.c b/gcc/testsuite/gcc.target/sparc/overflow-4.c
303index c6121b958c3..019feee335c 100644
304--- a/gcc/testsuite/gcc.target/sparc/overflow-4.c
305+++ b/gcc/testsuite/gcc.target/sparc/overflow-4.c
306@@ -1,6 +1,6 @@
307 /* { dg-do compile } */
308 /* { dg-require-effective-target lp64 } */
309-/* { dg-options "-O -fno-pie -mno-vis3 -mno-vis4" } */
310+/* { dg-options "-O -mno-vis3 -mno-vis4" } */
311
312 #include <stdbool.h>
313 #include <stdint.h>
314diff --git a/gcc/testsuite/gcc.target/sparc/overflow-5.c b/gcc/testsuite/gcc.target/sparc/overflow-5.c
315index f00283f6e7b..67d4ac38095 100644
316--- a/gcc/testsuite/gcc.target/sparc/overflow-5.c
317+++ b/gcc/testsuite/gcc.target/sparc/overflow-5.c
318@@ -1,6 +1,6 @@
319 /* { dg-do compile } */
320 /* { dg-require-effective-target lp64 } */
321-/* { dg-options "-O -fno-pie -mvis3" } */
322+/* { dg-options "-O -mvis3" } */
323
324 #include <stdbool.h>
325 #include <stdint.h>
326--
3272.34.3
328
329