1From 989c27c791a453550ff6c1440b41c55c6e70615d Mon Sep 17 00:00:00 2001 2From: Jason Kridner <jdk@ti.com> 3Date: Wed, 27 Mar 2019 14:06:24 -0400 4Subject: [PATCH] BeagleBone AI support 5 6Patch from: 7https://github.com/beagleboard/beaglebone-ai/blob/master/SW/buildroot/local/patches/uboot/0001-BeagleBone-AI-support.patch 8 9Signed-off-by: Peter Korsgaard <peter@korsgaard.com> 10--- 11 arch/arm/dts/Makefile | 1 + 12 arch/arm/dts/am5729-beagleboneai.dts | 494 +++++++++++++++++++++++++++ 13 arch/arm/mach-omap2/omap5/hw_data.c | 3 +- 14 board/ti/am57xx/board.c | 134 +++++++- 15 board/ti/am57xx/mux_data.h | 390 +++++++++++++++++++++ 16 configs/am57xx_evm_defconfig | 10 +- 17 include/configs/am57xx_evm.h | 2 +- 18 include/configs/ti_armv7_common.h | 357 +++++++++++++++++++ 19 include/configs/ti_omap5_common.h | 5 + 20 include/environment/ti/boot.h | 49 +-- 21 include/environment/ti/mmc.h | 45 ++- 22 11 files changed, 1447 insertions(+), 43 deletions(-) 23 create mode 100644 arch/arm/dts/am5729-beagleboneai.dts 24 25diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile 26index 2a040b20a5..6771d457a4 100644 27--- a/arch/arm/dts/Makefile 28+++ b/arch/arm/dts/Makefile 29@@ -232,6 +232,7 @@ dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb \ 30 dtb-$(CONFIG_TARGET_AM57XX_EVM) += am57xx-beagle-x15.dtb \ 31 am57xx-beagle-x15-revb1.dtb \ 32 am57xx-beagle-x15-revc.dtb \ 33+ am5729-beagleboneai.dtb \ 34 am574x-idk.dtb \ 35 am572x-idk.dtb \ 36 am571x-idk.dtb 37diff --git a/arch/arm/dts/am5729-beagleboneai.dts b/arch/arm/dts/am5729-beagleboneai.dts 38new file mode 100644 39index 0000000000..d1afe55751 40--- /dev/null 41+++ b/arch/arm/dts/am5729-beagleboneai.dts 42@@ -0,0 +1,494 @@ 43+/* 44+ * Copyright (C) 2014-2018 Texas Instruments Incorporated - http://www.ti.com/ 45+ * 46+ * This program is free software; you can redistribute it and/or modify 47+ * it under the terms of the GNU General Public License version 2 as 48+ * published by the Free Software Foundation. 49+ */ 50+/dts-v1/; 51+ 52+#include "dra74x.dtsi" 53+#include "am57xx-commercial-grade.dtsi" 54+#include "dra74x-mmc-iodelay.dtsi" 55+#include <dt-bindings/gpio/gpio.h> 56+#include <dt-bindings/interrupt-controller/irq.h> 57+#include <dt-bindings/pinctrl/dra.h> 58+ 59+/ { 60+ model = "BeagleBoard.org BeagleBone AI"; 61+ compatible = "beagleboard.org,am57xx-beagleboneai", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"; 62+ 63+ chosen { 64+ stdout-path = &uart1; 65+ }; 66+ 67+ memory@0 { 68+ device_type = "memory"; 69+ reg = <0x0 0x80000000 0x0 0x40000000>; 70+ }; 71+ 72+ vdd_5v: fixedregulator-vdd_5v { 73+ compatible = "regulator-fixed"; 74+ regulator-name = "vdd_5v"; 75+ regulator-min-microvolt = <5000000>; 76+ regulator-max-microvolt = <5000000>; 77+ regulator-always-on; 78+ regulator-boot-on; 79+ }; 80+ 81+ vtt_fixed: fixedregulator-vtt { 82+ /* TPS51200 */ 83+ compatible = "regulator-fixed"; 84+ regulator-name = "vtt_fixed"; 85+ vin-supply = <&vdd_3v3>; 86+ regulator-min-microvolt = <3300000>; 87+ regulator-max-microvolt = <3300000>; 88+ regulator-always-on; 89+ regulator-boot-on; 90+ }; 91+ 92+ src_clk_x1: src_clk_x1 { 93+ #clock-cells = <0>; 94+ compatible = "fixed-clock"; 95+ clock-frequency = <20000000>; 96+ }; 97+ 98+ src_clk_osc1: src_clk_osc1 { 99+ #clock-cells = <0>; 100+ compatible = "fixed-clock"; 101+ clock-frequency = <24000000>; 102+ }; 103+ 104+ src_clk_osc4: src_clk_osc4 { 105+ #clock-cells = <0>; 106+ compatible = "fixed-clock"; 107+ clock-frequency = <24000000>; 108+ }; 109+ 110+ leds { 111+ compatible = "gpio-leds"; 112+ 113+ led0 { 114+ label = "beaglebone:green:usr0"; 115+ gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; 116+ linux,default-trigger = "heartbeat"; 117+ default-state = "off"; 118+ }; 119+ 120+ led1 { 121+ label = "beaglebone:green:usr1"; 122+ gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>; 123+ linux,default-trigger = "mmc0"; 124+ default-state = "off"; 125+ }; 126+ 127+ led2 { 128+ label = "beaglebone:green:usr2"; 129+ gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>; 130+ linux,default-trigger = "cpu"; 131+ default-state = "off"; 132+ }; 133+ 134+ led3 { 135+ label = "beaglebone:green:usr3"; 136+ gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>; 137+ linux,default-trigger = "mmc1"; 138+ default-state = "off"; 139+ }; 140+ }; 141+}; 142+ 143+&i2c1 { 144+ status = "okay"; 145+ clock-frequency = <400000>; 146+ 147+ tps659038: tps659038@58 { 148+ compatible = "ti,tps659038"; 149+ reg = <0x58>; 150+ interrupts-extended = <&gpio6 16 IRQ_TYPE_LEVEL_HIGH 151+ &dra7_pmx_core 0x418>; 152+ 153+ #interrupt-cells = <2>; 154+ interrupt-controller; 155+ 156+ ti,system-power-controller; 157+ ti,palmas-override-powerhold; 158+ 159+ tps659038_pmic { 160+ compatible = "ti,tps659038-pmic"; 161+ 162+ smps12-in-supply = <&vdd_5v>; 163+ smps3-in-supply = <&vdd_5v>; 164+ smps45-in-supply = <&vdd_5v>; 165+ smps6-in-supply = <&vdd_5v>; 166+ smps7-in-supply = <&vdd_5v>; 167+ mps3-in-supply = <&vdd_5v>; 168+ smps8-in-supply = <&vdd_5v>; 169+ smps9-in-supply = <&vdd_5v>; 170+ ldo1-in-supply = <&vdd_5v>; 171+ ldo2-in-supply = <&vdd_5v>; 172+ ldo3-in-supply = <&vdd_5v>; 173+ ldo4-in-supply = <&vdd_5v>; 174+ ldo9-in-supply = <&vdd_5v>; 175+ ldoln-in-supply = <&vdd_5v>; 176+ ldousb-in-supply = <&vdd_5v>; 177+ ldortc-in-supply = <&vdd_5v>; 178+ 179+ regulators { 180+ vdd_mpu: smps12 { 181+ /* VDD_MPU */ 182+ regulator-name = "smps12"; 183+ regulator-min-microvolt = <850000>; 184+ regulator-max-microvolt = <1250000>; 185+ regulator-always-on; 186+ regulator-boot-on; 187+ }; 188+ 189+ vdd_ddr: smps3 { 190+ /* VDD_DDR EMIF1 EMIF2 */ 191+ regulator-name = "smps3"; 192+ regulator-min-microvolt = <1350000>; 193+ regulator-max-microvolt = <1350000>; 194+ regulator-always-on; 195+ regulator-boot-on; 196+ }; 197+ 198+ vdd_dspeve: smps45 { 199+ /* VDD_DSPEVE on AM572 */ 200+ /* VDD_IVA + VDD_DSP on AM571 */ 201+ regulator-name = "smps45"; 202+ regulator-min-microvolt = <850000>; 203+ regulator-max-microvolt = <1250000>; 204+ regulator-always-on; 205+ regulator-boot-on; 206+ }; 207+ 208+ vdd_gpu: smps6 { 209+ /* VDD_GPU */ 210+ regulator-name = "smps6"; 211+ regulator-min-microvolt = <850000>; 212+ regulator-max-microvolt = <1250000>; 213+ regulator-always-on; 214+ regulator-boot-on; 215+ }; 216+ 217+ vdd_core: smps7 { 218+ /* VDD_CORE */ 219+ regulator-name = "smps7"; 220+ regulator-min-microvolt = <850000>; /*** 1.15V */ 221+ regulator-max-microvolt = <1150000>; 222+ regulator-always-on; 223+ regulator-boot-on; 224+ }; 225+ 226+ vdd_iva: smps8 { 227+ /* 5728 - VDD_IVAHD */ /*** 1.06V */ 228+ /* 5718 - N.C. test point */ 229+ regulator-name = "smps8"; 230+ }; 231+ 232+ vdd_3v3: smps9 { 233+ /* VDD_3V3 */ 234+ regulator-name = "smps9"; 235+ regulator-min-microvolt = <3300000>; 236+ regulator-max-microvolt = <3300000>; 237+ regulator-always-on; 238+ regulator-boot-on; 239+ }; 240+ 241+ vdd_sd: ldo1 { 242+ /* VDDSHV8 - VSDMMC */ 243+ regulator-name = "ldo1"; 244+ regulator-min-microvolt = <1800000>; 245+ regulator-max-microvolt = <3300000>; 246+ regulator-boot-on; 247+ regulator-always-on; 248+ }; 249+ 250+ vdd_1v8: ldo2 { 251+ /* VDDSH18V */ 252+ regulator-name = "ldo2"; 253+ regulator-min-microvolt = <1800000>; 254+ regulator-max-microvolt = <1800000>; 255+ regulator-always-on; 256+ regulator-boot-on; 257+ }; 258+ 259+ vdd_1v8_phy_ldo3: ldo3 { 260+ /* R1.3a 572x V1_8PHY_LDO3: USB, SATA */ 261+ regulator-name = "ldo3"; 262+ regulator-min-microvolt = <1800000>; 263+ regulator-max-microvolt = <1800000>; 264+ regulator-always-on; 265+ regulator-boot-on; 266+ }; 267+ 268+ vdd_1v8_phy_ldo4: ldo4 { 269+ /* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/ 270+ regulator-name = "ldo4"; 271+ regulator-min-microvolt = <1800000>; 272+ regulator-max-microvolt = <1800000>; 273+ regulator-always-on; 274+ regulator-boot-on; 275+ }; 276+ 277+ /* LDO5-8 unused */ 278+ 279+ vdd_rtc: ldo9 { 280+ /* VDD_RTC */ 281+ regulator-name = "ldo9"; 282+ regulator-min-microvolt = <840000>; 283+ regulator-max-microvolt = <1160000>; 284+ regulator-always-on; 285+ regulator-boot-on; 286+ }; 287+ 288+ vdd_1v8_pll: ldoln { 289+ /* VDDA_1V8_PLL */ 290+ regulator-name = "ldoln"; 291+ regulator-min-microvolt = <1800000>; 292+ regulator-max-microvolt = <1800000>; 293+ regulator-always-on; 294+ regulator-boot-on; 295+ }; 296+ 297+ ldousb_reg: ldousb { 298+ /* VDDA_3V_USB: VDDA_USBHS33 */ 299+ regulator-name = "ldousb"; 300+ regulator-min-microvolt = <3300000>; 301+ regulator-max-microvolt = <3300000>; 302+ regulator-always-on; 303+ regulator-boot-on; 304+ }; 305+ 306+ ldortc_reg: ldortc { 307+ /* VDDA_RTC */ 308+ regulator-name = "ldortc"; 309+ regulator-min-microvolt = <1800000>; 310+ regulator-max-microvolt = <1800000>; 311+ regulator-always-on; 312+ regulator-boot-on; 313+ }; 314+ 315+ regen1: regen1 { 316+ /* VDD_3V3_ON */ 317+ regulator-name = "regen1"; 318+ regulator-boot-on; 319+ regulator-always-on; 320+ }; 321+ 322+ regen2: regen2 { 323+ /* Needed for PMIC internal resource */ 324+ regulator-name = "regen2"; 325+ regulator-boot-on; 326+ regulator-always-on; 327+ }; 328+ }; 329+ }; 330+ 331+ tps659038_rtc: tps659038_rtc { 332+ compatible = "ti,palmas-rtc"; 333+ interrupt-parent = <&tps659038>; 334+ interrupts = <8 IRQ_TYPE_EDGE_FALLING>; 335+ wakeup-source; 336+ }; 337+ 338+ tps659038_pwr_button: tps659038_pwr_button { 339+ compatible = "ti,palmas-pwrbutton"; 340+ interrupt-parent = <&tps659038>; 341+ interrupts = <1 IRQ_TYPE_EDGE_FALLING>; 342+ wakeup-source; 343+ ti,palmas-long-press-seconds = <12>; 344+ }; 345+ 346+ tps659038_gpio: tps659038_gpio { 347+ compatible = "ti,palmas-gpio"; 348+ gpio-controller; 349+ #gpio-cells = <2>; 350+ }; 351+ 352+ extcon_usb2: tps659038_usb { 353+ compatible = "ti,palmas-usb-vid"; 354+ }; 355+ 356+ }; 357+ 358+ eeprom: eeprom@50 { 359+ compatible = "atmel,24c32"; 360+ reg = <0x50>; 361+ }; 362+}; 363+ 364+&i2c2 { 365+ status = "okay"; 366+ clock-frequency = <400000>; 367+}; 368+ 369+&i2c3 { 370+ status = "okay"; 371+ clock-frequency = <400000>; 372+}; 373+ 374+&i2c4 { 375+ status = "okay"; 376+ clock-frequency = <100000>; 377+}; 378+ 379+&i2c5 { 380+ status = "okay"; 381+ clock-frequency = <100000>; 382+}; 383+ 384+&cpu0 { 385+ vdd-supply = <&vdd_mpu>; 386+ voltage-tolerance = <1>; 387+}; 388+ 389+&uart1 { 390+ status = "okay"; 391+ interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 392+ <&dra7_pmx_core 0x3e0>; 393+}; 394+ 395+&uart3 { 396+ status = "okay"; 397+ interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, 398+ <&dra7_pmx_core 0x3f8>; 399+}; 400+ 401+&davinci_mdio { 402+ reset-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; 403+ reset-delay-us = <2>; 404+ 405+ phy0: ethernet-phy@1 { 406+ reg = <4>; 407+ }; 408+}; 409+ 410+&mac { 411+ slaves = <1>; 412+ status = "okay"; 413+ //dual_emac; 414+}; 415+ 416+&cpsw_emac0 { 417+ phy-handle = <&phy0>; 418+ phy-mode = "rgmii"; 419+ //dual_emac_res_vlan = <1>; 420+}; 421+ 422+&mmc1 { 423+ status = "okay"; 424+ vmmc-supply = <&vdd_3v3>; 425+ vmmc_aux-supply = <&vdd_sd>; 426+ vqmmc-supply = <&vdd_sd>; /* IO Line Power */ 427+ bus-width = <4>; 428+ max-frequency = <24000000>; 429+ cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */ 430+ 431+ pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; 432+ pinctrl-0 = <&mmc1_pins_default>; 433+ pinctrl-1 = <&mmc1_pins_hs>; 434+ pinctrl-2 = <&mmc1_pins_sdr12>; 435+ pinctrl-3 = <&mmc1_pins_sdr25>; 436+ pinctrl-4 = <&mmc1_pins_sdr50>; 437+ pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev20_conf>; 438+ pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>; 439+}; 440+ 441+&mmc2 { 442+ status = "okay"; 443+ vmmc-supply = <&vdd_3v3>; 444+ //FUTURE: vqmmc-supply = <&vdd_3v3>; /* IO Line Power */ 445+ bus-width = <8>; 446+ ti,non-removable; 447+ non-removable; 448+ max-frequency = <96000000>; 449+ no-1-8-v; 450+ /delete-property/ mmc-hs200-1_8v; 451+ 452+ pinctrl-names = "default", "hs"; 453+ pinctrl-0 = <&mmc2_pins_default>; 454+ pinctrl-1 = <&mmc2_pins_hs>; 455+}; 456+ 457+&usb2_phy1 { 458+ phy-supply = <&ldousb_reg>; 459+}; 460+ 461+&usb2_phy2 { 462+ phy-supply = <&ldousb_reg>; 463+}; 464+ 465+&usb1 { 466+ dr_mode = "host"; 467+}; 468+ 469+&omap_dwc3_2 { 470+ extcon = <&extcon_usb2>; 471+}; 472+ 473+&usb2 { 474+ dr_mode = "peripheral"; 475+}; 476+ 477+&cpu_trips { 478+ cpu_alert1: cpu_alert1 { 479+ temperature = <50000>; /* millicelsius */ 480+ hysteresis = <2000>; /* millicelsius */ 481+ type = "active"; 482+ }; 483+}; 484+ 485+&cpu_cooling_maps { 486+ map1 { 487+ trip = <&cpu_alert1>; 488+ }; 489+}; 490+ 491+&thermal_zones { 492+ board_thermal: board_thermal { 493+ polling-delay-passive = <1250>; /* milliseconds */ 494+ polling-delay = <1500>; /* milliseconds */ 495+ 496+ board_trips: trips { 497+ board_alert0: board_alert { 498+ temperature = <40000>; /* millicelsius */ 499+ hysteresis = <2000>; /* millicelsius */ 500+ type = "active"; 501+ }; 502+ 503+ board_crit: board_crit { 504+ temperature = <105000>; /* millicelsius */ 505+ hysteresis = <0>; /* millicelsius */ 506+ type = "critical"; 507+ }; 508+ }; 509+ 510+ board_cooling_maps: cooling-maps { 511+ map0 { 512+ trip = <&board_alert0>; 513+ }; 514+ }; 515+ }; 516+}; 517+ 518+&mailbox5 { 519+ status = "okay"; 520+ mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { 521+ status = "okay"; 522+ }; 523+ mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { 524+ status = "okay"; 525+ }; 526+}; 527+ 528+&mailbox6 { 529+ status = "okay"; 530+ mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { 531+ status = "okay"; 532+ }; 533+ mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { 534+ status = "okay"; 535+ }; 536+}; 537diff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/omap5/hw_data.c 538index c4a41db92a..57b23b93b5 100644 539--- a/arch/arm/mach-omap2/omap5/hw_data.c 540+++ b/arch/arm/mach-omap2/omap5/hw_data.c 541@@ -418,8 +418,10 @@ void enable_basic_clocks(void) 542 (*prcm)->cm_l3init_hsmmc2_clkctrl, 543 (*prcm)->cm_l4per_gptimer2_clkctrl, 544 (*prcm)->cm_wkup_wdtimer2_clkctrl, 545+ (*prcm)->cm_l4per_uart1_clkctrl, 546 (*prcm)->cm_l4per_uart3_clkctrl, 547 (*prcm)->cm_l4per_i2c1_clkctrl, 548+ (*prcm)->cm_l4per_i2c4_clkctrl, 549 #ifdef CONFIG_DRIVER_TI_CPSW 550 (*prcm)->cm_gmac_gmac_clkctrl, 551 #endif 552@@ -493,7 +495,6 @@ void enable_basic_uboot_clocks(void) 553 (*prcm)->cm_l4per_mcspi1_clkctrl, 554 (*prcm)->cm_l4per_i2c2_clkctrl, 555 (*prcm)->cm_l4per_i2c3_clkctrl, 556- (*prcm)->cm_l4per_i2c4_clkctrl, 557 #if defined(CONFIG_DRA7XX) 558 (*prcm)->cm_ipu_i2c5_clkctrl, 559 #else 560diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c 561index 7063345dcc..47a8391de8 100644 562--- a/board/ti/am57xx/board.c 563+++ b/board/ti/am57xx/board.c 564@@ -30,6 +30,8 @@ 565 #include <dwc3-omap-uboot.h> 566 #include <ti-usb-phy-uboot.h> 567 #include <mmc.h> 568+#include <dm/uclass.h> 569+#include <i2c.h> 570 571 #include "../common/board_detect.h" 572 #include "mux_data.h" 573@@ -46,6 +48,7 @@ 574 #define board_is_am574x_idk() board_ti_is("AM574IDK") 575 #define board_is_am572x_idk() board_ti_is("AM572IDK") 576 #define board_is_am571x_idk() board_ti_is("AM571IDK") 577+#define board_is_bbai() board_ti_is("BBBBAI__") //no EEPROM... 578 579 #ifdef CONFIG_DRIVER_TI_CPSW 580 #include <cpsw.h> 581@@ -75,6 +78,12 @@ DECLARE_GLOBAL_DATA_PTR; 582 #define TPS65903X_PRIMARY_SECONDARY_PAD2 0xFB 583 #define TPS65903X_PAD2_POWERHOLD_MASK 0x20 584 585+#define CAPE_EEPROM_BUS_NUM 3 586+#define CAPE_EEPROM_ADDR0 0x54 587+#define CAPE_EEPROM_ADDR3 0x57 588+ 589+#define CAPE_EEPROM_ADDR_LEN 0x10 590+ 591 const struct omap_sysinfo sysinfo = { 592 "Board: UNKNOWN(BeagleBoard X15?) REV UNKNOWN\n" 593 }; 594@@ -84,6 +93,12 @@ static const struct dmm_lisa_map_regs beagle_x15_lisa_regs = { 595 .is_ma_present = 0x1 596 }; 597 598+static const struct dmm_lisa_map_regs bbai_lisa_regs = { 599+ ///FIXME: Document, where this magic number come from? 600+ .dmm_lisa_map_3 = 0x80640100, 601+ .is_ma_present = 0x1 602+}; 603+ 604 static const struct dmm_lisa_map_regs am571x_idk_lisa_regs = { 605 .dmm_lisa_map_3 = 0x80640100, 606 .is_ma_present = 0x1 607@@ -101,6 +116,8 @@ void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs) 608 *dmm_lisa_regs = &am571x_idk_lisa_regs; 609 else if (board_is_am574x_idk()) 610 *dmm_lisa_regs = &am574x_idk_lisa_regs; 611+ else if (board_is_bbai()) 612+ *dmm_lisa_regs = &bbai_lisa_regs; 613 else 614 *dmm_lisa_regs = &beagle_x15_lisa_regs; 615 } 616@@ -502,8 +519,30 @@ void do_board_detect(void) 617 618 rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS, 619 CONFIG_EEPROM_CHIP_ADDRESS); 620- if (rc) 621+ if (rc) { 622 printf("ti_i2c_eeprom_init failed %d\n", rc); 623+ ti_i2c_eeprom_am_set("BBBBAI__", "A"); 624+ }; 625+ 626+ puts("in do_board_detect\n"); 627+ printf("do_board_detect\n"); 628+} 629+ 630+void write_hex (unsigned char i) 631+{ 632+ char cc; 633+ 634+ cc = i >> 4; 635+ cc &= 0xf; 636+ if (cc > 9) 637+ serial_putc (cc + 55); 638+ else 639+ serial_putc (cc + 48); 640+ cc = i & 0xf; 641+ if (cc > 9) 642+ serial_putc (cc + 55); 643+ else 644+ serial_putc (cc + 48); 645 } 646 647 #else /* CONFIG_SPL_BUILD */ 648@@ -521,6 +560,8 @@ void do_board_detect(void) 649 650 if (board_is_x15()) 651 bname = "BeagleBoard X15"; 652+ else if (board_is_bbai()) 653+ bname = "BeagleBone AI"; 654 else if (board_is_am572x_evm()) 655 bname = "AM572x EVM"; 656 else if (board_is_am574x_idk()) 657@@ -535,6 +576,23 @@ void do_board_detect(void) 658 "Board: %s REV %s\n", bname, board_ti_get_rev()); 659 } 660 661+void write_hex (unsigned char i) 662+{ 663+ char cc; 664+ 665+ cc = i >> 4; 666+ cc &= 0xf; 667+ if (cc > 9) 668+ serial_putc (cc + 55); 669+ else 670+ serial_putc (cc + 48); 671+ cc = i & 0xf; 672+ if (cc > 9) 673+ serial_putc (cc + 55); 674+ else 675+ serial_putc (cc + 48); 676+} 677+ 678 static void setup_board_eeprom_env(void) 679 { 680 char *name = "beagle_x15"; 681@@ -557,6 +615,8 @@ static void setup_board_eeprom_env(void) 682 name = "am57xx_evm_reva3"; 683 else 684 name = "am57xx_evm"; 685+ } else if (board_is_bbai()) { 686+ name = "am5729_beagleboneai"; 687 } else if (board_is_am574x_idk()) { 688 name = "am574x_idk"; 689 } else if (board_is_am572x_idk()) { 690@@ -626,7 +686,7 @@ void am57x_idk_lcd_detect(void) 691 struct udevice *dev; 692 693 /* Only valid for IDKs */ 694- if (board_is_x15() || board_is_am572x_evm()) 695+ if (board_is_x15() || board_is_am572x_evm() || board_is_bbai()) 696 return; 697 698 /* Only AM571x IDK has gpio control detect.. so check that */ 699@@ -720,6 +780,28 @@ int board_late_init(void) 700 701 am57x_idk_lcd_detect(); 702 703+ ///FIXME, too late!! But useful for testing function... 704+ unsigned char addr; 705+ struct udevice *dev; 706+ int rc; 707+ 708+ for ( addr = CAPE_EEPROM_ADDR0; addr <= CAPE_EEPROM_ADDR3; addr++ ) { 709+ puts("BeagleBone: cape eeprom: i2c_probe: 0x"); write_hex(addr); puts(":\n"); 710+ rc = i2c_get_chip_for_busnum(CAPE_EEPROM_BUS_NUM, addr, 1, &dev); 711+ if (rc) { 712+ printf("failed to get device for EEPROM at address 0x%x\n", 713+ addr); 714+// goto out; 715+ } 716+// out: 717+ } 718+ 719+ if (board_is_bbai()) { 720+ env_set("console", "ttyS0,115200n8"); 721+ } else { 722+ env_set("console", "ttyO2,115200n8"); 723+ } 724+ 725 #if !defined(CONFIG_SPL_BUILD) 726 board_ti_set_ethaddr(2); 727 #endif 728@@ -762,6 +844,13 @@ void recalibrate_iodelay(void) 729 pconf_sz = ARRAY_SIZE(core_padconf_array_essential_am571x_idk); 730 iod = iodelay_cfg_array_am571x_idk; 731 iod_sz = ARRAY_SIZE(iodelay_cfg_array_am571x_idk); 732+ } else if (board_is_bbai()) { 733+ /* Common for X15/GPEVM */ 734+ pconf = core_padconf_array_essential_bbai; 735+ pconf_sz = ARRAY_SIZE(core_padconf_array_essential_bbai); 736+ /* Since full production should switch to SR2.0 */ 737+ iod = iodelay_cfg_array_bbai; 738+ iod_sz = ARRAY_SIZE(iodelay_cfg_array_bbai); 739 } else { 740 /* Common for X15/GPEVM */ 741 pconf = core_padconf_array_essential_x15; 742@@ -863,12 +952,50 @@ const struct mmc_platform_fixups *platform_fixups_mmc(uint32_t addr) 743 #endif 744 745 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OS_BOOT) 746+ 747+//static int eeprom_has_been_read; 748+//static struct id_eeprom eeprom; 749+ 750+struct am335x_cape_eeprom_id { 751+ unsigned int header; 752+ char eeprom_rev[2]; 753+ char board_name[32]; 754+ char version[4]; 755+ char manufacture[16]; 756+ char part_number[16]; 757+ char number_of_pins[2]; 758+ char serial_number[12]; 759+ char pin_usage[140]; 760+ char vdd_3v3exp[ 2]; 761+ char vdd_5v[ 2]; 762+ char sys_5v[2]; 763+ char dc_supplied[2]; 764+}; 765+ 766 int spl_start_uboot(void) 767 { 768 /* break into full u-boot on 'c' */ 769 if (serial_tstc() && serial_getc() == 'c') 770 return 1; 771 772+ //FIXME, i2c doesn't see to be up.. 773+ puts("spl_start_uboot\n"); 774+ unsigned char addr; 775+ struct udevice *dev; 776+ int rc; 777+ 778+ for ( addr = CAPE_EEPROM_ADDR0; addr <= CAPE_EEPROM_ADDR3; addr++ ) { 779+ puts("BeagleBone: cape eeprom: i2c_probe: 0x"); write_hex(addr); puts(":\n"); 780+ rc = i2c_get_chip_for_busnum(CAPE_EEPROM_BUS_NUM, addr, 1, &dev); 781+ if (rc) { 782+ printf("failed to get device for EEPROM at address 0x%x\n", 783+ addr); 784+// goto out; 785+ } 786+// out: 787+ } 788+ 789+ 790 #ifdef CONFIG_SPL_ENV_SUPPORT 791 env_init(); 792 env_load(); 793@@ -1084,6 +1211,9 @@ int board_fit_config_name_match(const char *name) 794 } else if (board_is_am572x_evm() && 795 !strcmp(name, "am57xx-beagle-x15")) { 796 return 0; 797+ } else if (board_is_bbai() && 798+ !strcmp(name, "am5729-beagleboneai")) { 799+ return 0; 800 } else if (board_is_am572x_idk() && !strcmp(name, "am572x-idk")) { 801 return 0; 802 } else if (board_is_am574x_idk() && !strcmp(name, "am574x-idk")) { 803diff --git a/board/ti/am57xx/mux_data.h b/board/ti/am57xx/mux_data.h 804index d4a15ae93d..9b8ee944f8 100644 805--- a/board/ti/am57xx/mux_data.h 806+++ b/board/ti/am57xx/mux_data.h 807@@ -233,6 +233,272 @@ const struct pad_conf_entry core_padconf_array_essential_x15[] = { 808 {RSTOUTN, (M0 | PIN_OUTPUT)}, /* rstoutn.rstoutn */ 809 }; 810 811+const struct pad_conf_entry core_padconf_array_essential_bbai[] = { 812+ {GPMC_AD0, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad0.vin3a_d0 */ 813+ {GPMC_AD1, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad1.vin3a_d1 */ 814+ {GPMC_AD2, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad2.vin3a_d2 */ 815+ {GPMC_AD3, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad3.vin3a_d3 */ 816+ {GPMC_AD4, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad4.vin3a_d4 */ 817+ {GPMC_AD5, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad5.vin3a_d5 */ 818+ {GPMC_AD6, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad6.vin3a_d6 */ 819+ {GPMC_AD7, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad7.vin3a_d7 */ 820+ {GPMC_AD8, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad8.vin3a_d8 */ 821+ {GPMC_AD9, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad9.vin3a_d9 */ 822+ {GPMC_AD10, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad10.vin3a_d10 */ 823+ {GPMC_AD11, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad11.vin3a_d11 */ 824+ {GPMC_AD12, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad12.vin3a_d12 */ 825+ {GPMC_AD13, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad13.vin3a_d13 */ 826+ {GPMC_AD14, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad14.vin3a_d14 */ 827+ {GPMC_AD15, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad15.vin3a_d15 */ 828+ 829+ /* Cape Bus i2c */ 830+ {GPMC_A0, (M7 | PIN_INPUT_PULLUP)}, /* R6_GPIO7_3: gpmc_a0.i2c4_scl (Shared with F4_UART10_RTSN) */ 831+ {GPMC_A1, (M7 | PIN_INPUT_PULLUP)}, /* T9_GPIO7_4: gpmc_a1.i2c4_sda (Shared with D2_UART10_CTSN) */ 832+ 833+ {GPMC_A2, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a2.vin3a_d18 */ 834+ {GPMC_A3, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a3.vin3a_d19 */ 835+ {GPMC_A4, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a4.vin3a_d20 */ 836+ {GPMC_A5, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a5.vin3a_d21 */ 837+ {GPMC_A6, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a6.vin3a_d22 */ 838+ {GPMC_A7, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a7.vin3a_d23 */ 839+ {GPMC_A8, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a8.vin3a_hsync0 */ 840+ {GPMC_A9, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a9.vin3a_vsync0 */ 841+ {GPMC_A10, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a10.vin3a_de0 */ 842+ {GPMC_A11, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a11.vin3a_fld0 */ 843+ {GPMC_A12, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_a12.gpio2_2 */ 844+ {GPMC_A13, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a13.gpio2_3 */ 845+ {GPMC_A14, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_a14.gpio2_4 */ 846+ {GPMC_A15, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a15.gpio2_5 */ 847+ {GPMC_A16, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a16.gpio2_6 */ 848+ {GPMC_A17, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a17.gpio2_7 */ 849+ {GPMC_A18, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_a18.gpio2_8 */ 850+ 851+ /* eMMC */ 852+ {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* K7: gpmc_a19.mmc2_dat4 */ 853+ {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* M7: gpmc_a20.mmc2_dat5 */ 854+ {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* J5: gpmc_a21.mmc2_dat6 */ 855+ {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* K6: gpmc_a22.mmc2_dat7 */ 856+ {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* J7: gpmc_a23.mmc2_clk */ 857+ {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* J4: gpmc_a24.mmc2_dat0 */ 858+ {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* J6: gpmc_a25.mmc2_dat1 */ 859+ {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* H4: gpmc_a26.mmc2_dat2 */ 860+ {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* H5: gpmc_a27.mmc2_dat3 */ 861+ {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* H6: gpmc_cs1.mmc2_cmd */ 862+ 863+ {GPMC_CS0, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_cs0.gpio2_19 */ 864+ {GPMC_CS2, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_cs2.gpio2_20 */ 865+ {GPMC_CS3, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_cs3.vin3a_clk0 */ 866+ {GPMC_CLK, (M9 | PIN_INPUT_PULLDOWN)}, /* gpmc_clk.dma_evt1 */ 867+ {GPMC_ADVN_ALE, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_advn_ale.gpio2_23 */ 868+ {GPMC_OEN_REN, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_oen_ren.gpio2_24 */ 869+ {GPMC_WEN, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_wen.gpio2_25 */ 870+ {GPMC_BEN0, (M9 | PIN_INPUT_PULLDOWN)}, /* gpmc_ben0.dma_evt3 */ 871+ {GPMC_BEN1, (M9 | PIN_INPUT_PULLDOWN)}, /* gpmc_ben1.dma_evt4 */ 872+ {GPMC_WAIT0, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* gpmc_wait0.gpio2_28 */ 873+ {VIN1A_CLK0, (M14 | PIN_INPUT)}, /* vin1a_clk0.gpio2_30 */ 874+ {VIN1B_CLK1, (M14 | PIN_INPUT_SLEW)}, /* vin1b_clk1.gpio2_31 */ 875+ {VIN1A_D2, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d2.gpio3_6 */ 876+ {VIN1A_D3, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d3.gpio3_7 */ 877+ {VIN1A_D4, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d4.gpio3_8 */ 878+ {VIN1A_D5, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d5.gpio3_9 */ 879+ {VIN1A_D6, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d6.gpio3_10 */ 880+ {VIN1A_D7, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d7.gpio3_11 */ 881+ {VIN1A_D8, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d8.gpio3_12 */ 882+ {VIN1A_D10, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d10.gpio3_14 */ 883+ {VIN1A_D11, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d11.gpio3_15 */ 884+ {VIN1A_D12, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d12.gpio3_16 */ 885+ {VIN1A_D14, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d14.gpio3_18 */ 886+ {VIN1A_D16, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d16.gpio3_20 */ 887+ {VIN1A_D19, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d19.gpio3_23 */ 888+ {VIN1A_D20, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d20.gpio3_24 */ 889+ {VIN1A_D22, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d22.gpio3_26 */ 890+ {VIN2A_CLK0, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_clk0.gpio3_28 */ 891+ {VIN2A_DE0, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_de0.gpio3_29 */ 892+ {VIN2A_FLD0, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_fld0.gpio3_30 */ 893+ {VIN2A_HSYNC0, (M11 | PIN_INPUT_PULLUP)}, /* vin2a_hsync0.pr1_uart0_cts_n */ 894+ {VIN2A_VSYNC0, (M11 | PIN_OUTPUT_PULLUP)}, /* vin2a_vsync0.pr1_uart0_rts_n */ 895+ {VIN2A_D0, (M11 | PIN_INPUT_PULLUP)}, /* vin2a_d0.pr1_uart0_rxd */ 896+ {VIN2A_D1, (M11 | PIN_OUTPUT)}, /* vin2a_d1.pr1_uart0_txd */ 897+ {VIN2A_D2, (M8 | PIN_INPUT_PULLUP)}, /* vin2a_d2.uart10_rxd */ 898+ {VIN2A_D3, (M8 | PIN_OUTPUT)}, /* vin2a_d3.uart10_txd */ 899+ 900+ /* Cape Bus i2c (gpio shared) */ 901+ {VIN2A_D4, (M15 | PIN_INPUT)}, /* D2_UART10_CTSN: vin2a_d4.uart10_ctsn (Shared with T9_GPIO7_4) */ 902+ {VIN2A_D5, (M15 | PIN_INPUT)}, /* F4_UART10_RTSN: vin2a_d5.uart10_rtsn (Shared with R6_GPIO7_3) */ 903+ 904+ {VIN2A_D6, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d6.gpio4_7 */ 905+ {VIN2A_D7, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d7.gpio4_8 */ 906+ {VIN2A_D8, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d8.gpio4_9 */ 907+ {VIN2A_D9, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d9.gpio4_10 */ 908+ {VIN2A_D10, (M10 | PIN_OUTPUT_PULLDOWN)}, /* vin2a_d10.ehrpwm2B */ 909+ {VIN2A_D11, (M10 | PIN_INPUT_PULLDOWN)}, /* vin2a_d11.ehrpwm2_tripzone_input */ 910+ {VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ 911+ {VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */ 912+ {VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */ 913+ {VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */ 914+ {VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */ 915+ {VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */ 916+ {VIN2A_D18, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */ 917+ {VIN2A_D19, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */ 918+ {VIN2A_D20, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */ 919+ {VIN2A_D21, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ 920+ {VIN2A_D22, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ 921+ {VIN2A_D23, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ 922+ {VOUT1_CLK, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_clk.vout1_clk */ 923+ {VOUT1_DE, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_de.vout1_de */ 924+ {VOUT1_FLD, (M14 | PIN_INPUT)}, /* vout1_fld.gpio4_21 */ 925+ {VOUT1_HSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_hsync.vout1_hsync */ 926+ {VOUT1_VSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_vsync.vout1_vsync */ 927+ {VOUT1_D0, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d0.vout1_d0 */ 928+ {VOUT1_D1, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d1.vout1_d1 */ 929+ {VOUT1_D2, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d2.vout1_d2 */ 930+ {VOUT1_D3, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d3.vout1_d3 */ 931+ {VOUT1_D4, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d4.vout1_d4 */ 932+ {VOUT1_D5, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d5.vout1_d5 */ 933+ {VOUT1_D6, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d6.vout1_d6 */ 934+ {VOUT1_D7, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d7.vout1_d7 */ 935+ {VOUT1_D8, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d8.vout1_d8 */ 936+ {VOUT1_D9, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d9.vout1_d9 */ 937+ {VOUT1_D10, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d10.vout1_d10 */ 938+ {VOUT1_D11, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d11.vout1_d11 */ 939+ {VOUT1_D12, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d12.vout1_d12 */ 940+ {VOUT1_D13, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d13.vout1_d13 */ 941+ {VOUT1_D14, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d14.vout1_d14 */ 942+ {VOUT1_D15, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d15.vout1_d15 */ 943+ {VOUT1_D16, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d16.vout1_d16 */ 944+ {VOUT1_D17, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d17.vout1_d17 */ 945+ {VOUT1_D18, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d18.vout1_d18 */ 946+ {VOUT1_D19, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d19.vout1_d19 */ 947+ {VOUT1_D20, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d20.vout1_d20 */ 948+ {VOUT1_D21, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d21.vout1_d21 */ 949+ {VOUT1_D22, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d22.vout1_d22 */ 950+ {VOUT1_D23, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d23.vout1_d23 */ 951+ {MDIO_MCLK, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */ 952+ {MDIO_D, (M0 | PIN_INPUT | SLEWCONTROL)}, /* mdio_d.mdio_d */ 953+ {RMII_MHZ_50_CLK, (M14 | PIN_INPUT_PULLUP)}, /* RMII_MHZ_50_CLK.gpio5_17 */ 954+ {UART3_RXD, (M14 | PIN_INPUT_SLEW)}, /* uart3_rxd.gpio5_18 */ 955+ {UART3_TXD, (M14 | PIN_INPUT_SLEW)}, /* uart3_txd.gpio5_19 */ 956+ {RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ 957+ {RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ 958+ {RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ 959+ {RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ 960+ {RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ 961+ {RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ 962+ {RGMII0_RXC, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ 963+ {RGMII0_RXCTL, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ 964+ {RGMII0_RXD3, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ 965+ {RGMII0_RXD2, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ 966+ {RGMII0_RXD1, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ 967+ {RGMII0_RXD0, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ 968+ {USB1_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* usb1_drvvbus.usb1_drvvbus */ 969+ {USB2_DRVVBUS, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)}, /* usb2_drvvbus.usb2_drvvbus */ 970+ {GPIO6_14, (M10 | PIN_INPUT_PULLUP)}, /* gpio6_14.timer1 */ 971+ {GPIO6_15, (M10 | PIN_INPUT_PULLUP)}, /* gpio6_15.timer2 */ 972+ {GPIO6_16, (M10 | PIN_INPUT_PULLUP)}, /* gpio6_16.timer3 */ 973+ {XREF_CLK0, (M9 | PIN_OUTPUT_PULLDOWN)}, /* xref_clk0.clkout2 */ 974+ {XREF_CLK1, (M14 | PIN_INPUT_PULLDOWN)}, /* xref_clk1.gpio6_18 */ 975+ {XREF_CLK2, (M14 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.gpio6_19 */ 976+ {XREF_CLK3, (M9 | PIN_OUTPUT_PULLDOWN)}, /* xref_clk3.clkout3 */ 977+ {MCASP1_ACLKX, (M10 | PIN_INPUT_PULLUP)}, /* mcasp1_aclkx.i2c3_sda */ 978+ {MCASP1_FSX, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_fsx.i2c3_scl */ 979+ {MCASP1_ACLKR, (M10 | PIN_INPUT_PULLUP)}, /* mcasp1_aclkr.i2c4_sda */ 980+ {MCASP1_FSR, (M10 | PIN_INPUT_PULLUP)}, /* mcasp1_fsr.i2c4_scl */ 981+ {MCASP1_AXR0, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr0.i2c5_sda */ 982+ {MCASP1_AXR1, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr1.i2c5_scl */ 983+ {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */ 984+ {MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr3.gpio5_5 */ 985+ {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ 986+ {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */ 987+ {MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr6.gpio5_8 */ 988+ {MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr7.gpio5_9 */ 989+ {MCASP1_AXR8, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr8.gpio5_10 */ 990+ {MCASP1_AXR9, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr9.gpio5_11 */ 991+ {MCASP1_AXR10, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr10.gpio5_12 */ 992+ {MCASP1_AXR11, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr11.gpio4_17 */ 993+ {MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr12.mcasp7_axr0 */ 994+ {MCASP1_AXR13, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr13.mcasp7_axr1 */ 995+ {MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr14.mcasp7_aclkx */ 996+ {MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr15.mcasp7_fsx */ 997+ {MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.mcasp3_aclkx */ 998+ {MCASP3_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.mcasp3_fsx */ 999+ {MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_axr0.mcasp3_axr0 */ 1000+ {MCASP3_AXR1, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_axr1.mcasp3_axr1 */ 1001+ {MCASP4_ACLKX, (M3 | PIN_INPUT_PULLUP)}, /* mcasp4_aclkx.uart8_rxd */ 1002+ {MCASP4_FSX, (M3 | PIN_OUTPUT)}, /* mcasp4_fsx.uart8_txd */ 1003+ {MCASP4_AXR0, (M3 | PIN_INPUT_PULLUP)}, /* mcasp4_axr0.uart8_ctsn */ 1004+ {MCASP4_AXR1, (M3 | PIN_OUTPUT_PULLUP)}, /* mcasp4_axr1.uart8_rtsn */ 1005+ {MCASP5_ACLKX, (M3 | PIN_INPUT_PULLUP)}, /* mcasp5_aclkx.uart9_rxd */ 1006+ {MCASP5_FSX, (M3 | PIN_OUTPUT)}, /* mcasp5_fsx.uart9_txd */ 1007+ {MCASP5_AXR0, (M3 | PIN_INPUT_PULLUP)}, /* mcasp5_axr0.uart9_ctsn */ 1008+ {MCASP5_AXR1, (M3 | PIN_OUTPUT_PULLUP)}, /* mcasp5_axr1.uart9_rtsn */ 1009+ 1010+ /* microSD Socket */ 1011+ {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* W6: mmc1_clk.mmc1_clk */ 1012+ {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* Y6: mmc1_cmd.mmc1_cmd */ 1013+ {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* AA6: mmc1_dat0.mmc1_dat0 */ 1014+ {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* Y4: mmc1_dat1.mmc1_dat1 */ 1015+ {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* AA5: mmc1_dat2.mmc1_dat2 */ 1016+ {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* Y3: mmc1_dat3.mmc1_dat3 */ 1017+ {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* W7: mmc1_sdcd.gpio6_27 */ 1018+ 1019+ {GPIO6_10, (M10 | PIN_OUTPUT_PULLDOWN)}, /* gpio6_10.ehrpwm2A */ 1020+ {GPIO6_11, (M0 | PIN_INPUT_PULLUP)}, /* gpio6_11.gpio6_11 */ 1021+ {MMC3_CLK, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_clk.mmc3_clk */ 1022+ {MMC3_CMD, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_cmd.mmc3_cmd */ 1023+ {MMC3_DAT0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat0.mmc3_dat0 */ 1024+ {MMC3_DAT1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat1.mmc3_dat1 */ 1025+ {MMC3_DAT2, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat2.mmc3_dat2 */ 1026+ {MMC3_DAT3, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat3.mmc3_dat3 */ 1027+ {MMC3_DAT4, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat4.mmc3_dat4 */ 1028+ {MMC3_DAT5, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat5.mmc3_dat5 */ 1029+ {MMC3_DAT6, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat6.mmc3_dat6 */ 1030+ {MMC3_DAT7, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat7.mmc3_dat7 */ 1031+ {SPI1_SCLK, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.gpio7_7 */ 1032+ {SPI1_D1, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.gpio7_8 */ 1033+ {SPI1_D0, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.gpio7_9 */ 1034+ {SPI1_CS0, (M14 | PIN_INPUT)}, /* spi1_cs0.gpio7_10 */ 1035+ {SPI1_CS1, (M14 | PIN_INPUT)}, /* spi1_cs1.gpio7_11 */ 1036+ {SPI1_CS2, (M14 | PIN_INPUT_SLEW)}, /* spi1_cs2.gpio7_12 */ 1037+ {SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ 1038+ {SPI2_SCLK, (M14 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.gpio7_14 */ 1039+ {SPI2_D1, (M14 | PIN_INPUT_SLEW)}, /* spi2_d1.gpio7_15 */ 1040+ {SPI2_D0, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi2_d0.gpio7_16 */ 1041+ {SPI2_CS0, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi2_cs0.gpio7_17 */ 1042+ {DCAN1_TX, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* dcan1_tx.dcan1_tx */ 1043+ {DCAN1_RX, (M0 | PIN_INPUT | SLEWCONTROL)}, /* dcan1_rx.dcan1_rx */ 1044+ 1045+ /* BeagleBone AI: Debug UART */ 1046+ {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */ 1047+ {UART1_TXD, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* uart1_txd.uart1_txd */ 1048+ 1049+ {UART1_CTSN, (M14 | PIN_INPUT_PULLDOWN)}, /* uart1_ctsn.gpio7_24 */ 1050+ {UART1_RTSN, (M14 | PIN_INPUT)}, /* uart1_rtsn.gpio7_25 */ 1051+ {UART2_RXD, (M14 | PIN_INPUT_PULLDOWN)}, /* uart2_rxd.gpio7_26 */ 1052+ {UART2_TXD, (M14 | PIN_INPUT_PULLDOWN)}, /* uart2_txd.gpio7_27 */ 1053+ {UART2_CTSN, (M2 | PIN_INPUT_PULLUP)}, /* uart2_ctsn.uart3_rxd */ 1054+ {UART2_RTSN, (M1 | PIN_OUTPUT)}, /* uart2_rtsn.uart3_txd */ 1055+ {I2C1_SDA, (M0 | PIN_INPUT_PULLUP)}, /* i2c1_sda.i2c1_sda */ 1056+ {I2C1_SCL, (M0 | PIN_INPUT_PULLUP)}, /* i2c1_scl.i2c1_scl */ 1057+ {I2C2_SDA, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_sda.hdmi1_ddc_scl */ 1058+ {I2C2_SCL, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_scl.hdmi1_ddc_sda */ 1059+ {WAKEUP0, (M0 | PIN_INPUT)}, /* Wakeup0.Wakeup0 */ 1060+ {WAKEUP1, (M0 | PIN_INPUT)}, /* Wakeup1.Wakeup1 */ 1061+ {WAKEUP2, (M0 | PIN_INPUT)}, /* Wakeup2.Wakeup2 */ 1062+ {WAKEUP3, (M0 | PIN_INPUT)}, /* Wakeup3.Wakeup3 */ 1063+ {ON_OFF, (M0 | PIN_OUTPUT)}, /* on_off.on_off */ 1064+ {RTC_PORZ, (M0 | PIN_INPUT)}, /* rtc_porz.rtc_porz */ 1065+ {TMS, (M0 | PIN_INPUT_PULLUP)}, /* tms.tms */ 1066+ {TDI, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* tdi.tdi */ 1067+ {TDO, (M0 | PIN_OUTPUT)}, /* tdo.tdo */ 1068+ {TCLK, (M0 | PIN_INPUT_PULLDOWN)}, /* tclk.tclk */ 1069+ {TRSTN, (M0 | PIN_INPUT)}, /* trstn.trstn */ 1070+ {RTCK, (M0 | PIN_OUTPUT)}, /* rtck.rtck */ 1071+ {EMU0, (M0 | PIN_INPUT)}, /* emu0.emu0 */ 1072+ {EMU1, (M0 | PIN_INPUT)}, /* emu1.emu1 */ 1073+ {NMIN_DSP, (M0 | PIN_INPUT)}, /* nmin_dsp.nmin_dsp */ 1074+ {RSTOUTN, (M0 | PIN_OUTPUT)}, /* rstoutn.rstoutn */ 1075+}; 1076+ 1077 const struct pad_conf_entry core_padconf_array_delta_x15_sr1_1[] = { 1078 {MMC1_SDWP, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mmc1_sdwp.gpio6_28 */ 1079 {VOUT1_CLK, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_clk.vout1_clk */ 1080@@ -998,6 +1264,17 @@ const struct pad_conf_entry early_padconf[] = { 1081 {UART2_RTSN, (M1 | PIN_INPUT_SLEW)}, /* uart2_rtsn.uart3_txd */ 1082 {I2C1_SDA, (PIN_INPUT_PULLUP | M0)}, /* I2C1_SDA */ 1083 {I2C1_SCL, (PIN_INPUT_PULLUP | M0)}, /* I2C1_SCL */ 1084+ 1085+ /* BeagleBone AI: Debug UART */ 1086+ {UART1_RXD, (M0 | PIN_INPUT_SLEW)}, /* UART1_RXD */ 1087+ {UART1_TXD, (M0 | PIN_INPUT_SLEW)}, /* UART1_TXD */ 1088+ 1089+ /* Cape Bus i2c */ 1090+ {GPMC_A0, (M7 | PIN_INPUT_PULLUP)}, /* R6_GPIO7_3: gpmc_a0.i2c4_scl (Shared with F4_UART10_RTSN) */ 1091+ {GPMC_A1, (M7 | PIN_INPUT_PULLUP)}, /* T9_GPIO7_4: gpmc_a1.i2c4_sda (Shared with D2_UART10_CTSN) */ 1092+ /* Cape Bus i2c (gpio shared) */ 1093+ {VIN2A_D4, (M14 | PIN_INPUT_PULLUP)}, /* D2_UART10_CTSN: vin2a_d4.uart10_ctsn (Shared with T9_GPIO7_4) */ 1094+ {VIN2A_D5, (M14 | PIN_INPUT_PULLUP)}, /* F4_UART10_RTSN: vin2a_d5.uart10_rtsn (Shared with R6_GPIO7_3) */ 1095 }; 1096 1097 #ifdef CONFIG_IODELAY_RECALIBRATION 1098@@ -1199,6 +1476,119 @@ const struct iodelay_cfg_entry iodelay_cfg_array_x15_sr2_0[] = { 1099 {0x0CEC, 2739, 0}, /* CFG_VOUT1_VSYNC_OUT */ 1100 }; 1101 1102+const struct iodelay_cfg_entry iodelay_cfg_array_bbai[] = { 1103+ {0x0114, 2519, 702}, /* CFG_GPMC_A0_IN */ 1104+ {0x0120, 2435, 411}, /* CFG_GPMC_A10_IN */ 1105+ {0x012C, 2379, 755}, /* CFG_GPMC_A11_IN */ 1106+ {0x0198, 2384, 778}, /* CFG_GPMC_A1_IN */ 1107+ {0x0204, 2499, 1127}, /* CFG_GPMC_A2_IN */ 1108+ {0x0210, 2455, 1181}, /* CFG_GPMC_A3_IN */ 1109+ {0x021C, 2486, 1039}, /* CFG_GPMC_A4_IN */ 1110+ {0x0228, 2456, 938}, /* CFG_GPMC_A5_IN */ 1111+ {0x0234, 2463, 573}, /* CFG_GPMC_A6_IN */ 1112+ {0x0240, 2608, 783}, /* CFG_GPMC_A7_IN */ 1113+ {0x024C, 2430, 656}, /* CFG_GPMC_A8_IN */ 1114+ {0x0258, 2465, 850}, /* CFG_GPMC_A9_IN */ 1115+ {0x0264, 2316, 301}, /* CFG_GPMC_AD0_IN */ 1116+ {0x0270, 2324, 406}, /* CFG_GPMC_AD10_IN */ 1117+ {0x027C, 2278, 352}, /* CFG_GPMC_AD11_IN */ 1118+ {0x0288, 2297, 160}, /* CFG_GPMC_AD12_IN */ 1119+ {0x0294, 2278, 108}, /* CFG_GPMC_AD13_IN */ 1120+ {0x02A0, 2035, 0}, /* CFG_GPMC_AD14_IN */ 1121+ {0x02AC, 2279, 378}, /* CFG_GPMC_AD15_IN */ 1122+ {0x02B8, 2440, 70}, /* CFG_GPMC_AD1_IN */ 1123+ {0x02C4, 2404, 446}, /* CFG_GPMC_AD2_IN */ 1124+ {0x02D0, 2343, 212}, /* CFG_GPMC_AD3_IN */ 1125+ {0x02DC, 2355, 322}, /* CFG_GPMC_AD4_IN */ 1126+ {0x02E8, 2337, 192}, /* CFG_GPMC_AD5_IN */ 1127+ {0x02F4, 2270, 314}, /* CFG_GPMC_AD6_IN */ 1128+ {0x0300, 2339, 259}, /* CFG_GPMC_AD7_IN */ 1129+ {0x030C, 2308, 577}, /* CFG_GPMC_AD8_IN */ 1130+ {0x0318, 2334, 166}, /* CFG_GPMC_AD9_IN */ 1131+ {0x0378, 0, 0}, /* CFG_GPMC_CS3_IN */ 1132+ {0x0678, 0, 386}, /* CFG_MMC3_CLK_IN */ 1133+ {0x0680, 605, 0}, /* CFG_MMC3_CLK_OUT */ 1134+ {0x0684, 0, 0}, /* CFG_MMC3_CMD_IN */ 1135+ {0x0688, 0, 0}, /* CFG_MMC3_CMD_OEN */ 1136+ {0x068C, 0, 0}, /* CFG_MMC3_CMD_OUT */ 1137+ {0x0690, 171, 0}, /* CFG_MMC3_DAT0_IN */ 1138+ {0x0694, 0, 0}, /* CFG_MMC3_DAT0_OEN */ 1139+ {0x0698, 0, 0}, /* CFG_MMC3_DAT0_OUT */ 1140+ {0x069C, 221, 0}, /* CFG_MMC3_DAT1_IN */ 1141+ {0x06A0, 0, 0}, /* CFG_MMC3_DAT1_OEN */ 1142+ {0x06A4, 0, 0}, /* CFG_MMC3_DAT1_OUT */ 1143+ {0x06A8, 0, 0}, /* CFG_MMC3_DAT2_IN */ 1144+ {0x06AC, 0, 0}, /* CFG_MMC3_DAT2_OEN */ 1145+ {0x06B0, 0, 0}, /* CFG_MMC3_DAT2_OUT */ 1146+ {0x06B4, 474, 0}, /* CFG_MMC3_DAT3_IN */ 1147+ {0x06B8, 0, 0}, /* CFG_MMC3_DAT3_OEN */ 1148+ {0x06BC, 0, 0}, /* CFG_MMC3_DAT3_OUT */ 1149+ {0x06C0, 792, 0}, /* CFG_MMC3_DAT4_IN */ 1150+ {0x06C4, 0, 0}, /* CFG_MMC3_DAT4_OEN */ 1151+ {0x06C8, 0, 0}, /* CFG_MMC3_DAT4_OUT */ 1152+ {0x06CC, 782, 0}, /* CFG_MMC3_DAT5_IN */ 1153+ {0x06D0, 0, 0}, /* CFG_MMC3_DAT5_OEN */ 1154+ {0x06D4, 0, 0}, /* CFG_MMC3_DAT5_OUT */ 1155+ {0x06D8, 942, 0}, /* CFG_MMC3_DAT6_IN */ 1156+ {0x06DC, 0, 0}, /* CFG_MMC3_DAT6_OEN */ 1157+ {0x06E0, 0, 0}, /* CFG_MMC3_DAT6_OUT */ 1158+ {0x06E4, 636, 0}, /* CFG_MMC3_DAT7_IN */ 1159+ {0x06E8, 0, 0}, /* CFG_MMC3_DAT7_OEN */ 1160+ {0x06EC, 0, 0}, /* CFG_MMC3_DAT7_OUT */ 1161+ {0x06F0, 260, 0}, /* CFG_RGMII0_RXC_IN */ 1162+ {0x06FC, 0, 1412}, /* CFG_RGMII0_RXCTL_IN */ 1163+ {0x0708, 123, 1047}, /* CFG_RGMII0_RXD0_IN */ 1164+ {0x0714, 139, 1081}, /* CFG_RGMII0_RXD1_IN */ 1165+ {0x0720, 195, 1100}, /* CFG_RGMII0_RXD2_IN */ 1166+ {0x072C, 239, 1216}, /* CFG_RGMII0_RXD3_IN */ 1167+ {0x0740, 89, 0}, /* CFG_RGMII0_TXC_OUT */ 1168+ {0x074C, 15, 125}, /* CFG_RGMII0_TXCTL_OUT */ 1169+ {0x0758, 339, 162}, /* CFG_RGMII0_TXD0_OUT */ 1170+ {0x0764, 146, 94}, /* CFG_RGMII0_TXD1_OUT */ 1171+ {0x0770, 0, 27}, /* CFG_RGMII0_TXD2_OUT */ 1172+ {0x077C, 291, 205}, /* CFG_RGMII0_TXD3_OUT */ 1173+ {0x0A70, 0, 0}, /* CFG_VIN2A_D12_OUT */ 1174+ {0x0A7C, 219, 101}, /* CFG_VIN2A_D13_OUT */ 1175+ {0x0A88, 92, 58}, /* CFG_VIN2A_D14_OUT */ 1176+ {0x0A94, 135, 100}, /* CFG_VIN2A_D15_OUT */ 1177+ {0x0AA0, 154, 101}, /* CFG_VIN2A_D16_OUT */ 1178+ {0x0AAC, 78, 27}, /* CFG_VIN2A_D17_OUT */ 1179+ {0x0AB0, 411, 0}, /* CFG_VIN2A_D18_IN */ 1180+ {0x0ABC, 0, 382}, /* CFG_VIN2A_D19_IN */ 1181+ {0x0AD4, 320, 750}, /* CFG_VIN2A_D20_IN */ 1182+ {0x0AE0, 192, 836}, /* CFG_VIN2A_D21_IN */ 1183+ {0x0AEC, 294, 669}, /* CFG_VIN2A_D22_IN */ 1184+ {0x0AF8, 50, 700}, /* CFG_VIN2A_D23_IN */ 1185+ {0x0B9C, 0, 706}, /* CFG_VOUT1_CLK_OUT */ 1186+ {0x0BA8, 2313, 0}, /* CFG_VOUT1_D0_OUT */ 1187+ {0x0BB4, 2199, 0}, /* CFG_VOUT1_D10_OUT */ 1188+ {0x0BC0, 2266, 0}, /* CFG_VOUT1_D11_OUT */ 1189+ {0x0BCC, 3159, 0}, /* CFG_VOUT1_D12_OUT */ 1190+ {0x0BD8, 2100, 0}, /* CFG_VOUT1_D13_OUT */ 1191+ {0x0BE4, 2229, 0}, /* CFG_VOUT1_D14_OUT */ 1192+ {0x0BF0, 2202, 0}, /* CFG_VOUT1_D15_OUT */ 1193+ {0x0BFC, 2084, 0}, /* CFG_VOUT1_D16_OUT */ 1194+ {0x0C08, 2195, 0}, /* CFG_VOUT1_D17_OUT */ 1195+ {0x0C14, 2342, 0}, /* CFG_VOUT1_D18_OUT */ 1196+ {0x0C20, 2463, 0}, /* CFG_VOUT1_D19_OUT */ 1197+ {0x0C2C, 2439, 0}, /* CFG_VOUT1_D1_OUT */ 1198+ {0x0C38, 2304, 0}, /* CFG_VOUT1_D20_OUT */ 1199+ {0x0C44, 2103, 0}, /* CFG_VOUT1_D21_OUT */ 1200+ {0x0C50, 2145, 0}, /* CFG_VOUT1_D22_OUT */ 1201+ {0x0C5C, 1932, 0}, /* CFG_VOUT1_D23_OUT */ 1202+ {0x0C68, 2200, 0}, /* CFG_VOUT1_D2_OUT */ 1203+ {0x0C74, 2355, 0}, /* CFG_VOUT1_D3_OUT */ 1204+ {0x0C80, 3215, 0}, /* CFG_VOUT1_D4_OUT */ 1205+ {0x0C8C, 2314, 0}, /* CFG_VOUT1_D5_OUT */ 1206+ {0x0C98, 2238, 0}, /* CFG_VOUT1_D6_OUT */ 1207+ {0x0CA4, 2381, 0}, /* CFG_VOUT1_D7_OUT */ 1208+ {0x0CB0, 2138, 0}, /* CFG_VOUT1_D8_OUT */ 1209+ {0x0CBC, 2383, 0}, /* CFG_VOUT1_D9_OUT */ 1210+ {0x0CC8, 1984, 0}, /* CFG_VOUT1_DE_OUT */ 1211+ {0x0CE0, 1947, 0}, /* CFG_VOUT1_HSYNC_OUT */ 1212+ {0x0CEC, 2739, 0}, /* CFG_VOUT1_VSYNC_OUT */ 1213+}; 1214+ 1215 const struct iodelay_cfg_entry iodelay_cfg_array_am574x_idk[] = { 1216 {0x0114, 2199, 621}, /* CFG_GPMC_A0_IN */ 1217 {0x0120, 0, 0}, /* CFG_GPMC_A10_IN */ 1218diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig 1219index 3e2c166e0d..b1e2960a9f 100644 1220--- a/configs/am57xx_evm_defconfig 1221+++ b/configs/am57xx_evm_defconfig 1222@@ -27,14 +27,20 @@ CONFIG_SPL_DMA_SUPPORT=y 1223 CONFIG_SPL_OS_BOOT=y 1224 CONFIG_SPL_SPI_LOAD=y 1225 CONFIG_SPL_YMODEM_SUPPORT=y 1226+CONFIG_AUTOBOOT_KEYED=y 1227+CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" 1228+CONFIG_AUTOBOOT_DELAY_STR="d" 1229+CONFIG_AUTOBOOT_STOP_STR=" " 1230 CONFIG_CMD_SPL=y 1231 # CONFIG_CMD_FLASH is not set 1232 # CONFIG_CMD_SETEXPR is not set 1233 # CONFIG_CMD_PMIC is not set 1234+CONFIG_CMD_BTRFS=y 1235 CONFIG_OF_CONTROL=y 1236 CONFIG_SPL_OF_CONTROL=y 1237-CONFIG_DEFAULT_DEVICE_TREE="am572x-idk" 1238-CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1 am57xx-beagle-x15-revc am572x-idk am571x-idk am574x-idk" 1239+CONFIG_DEFAULT_DEVICE_TREE="am5729-beagleboneai" 1240+CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1 am57xx-beagle-x15-revc am5729-beagleboneai am572x-idk am571x-idk am574x-idk" 1241+# CONFIG_ENV_IS_IN_FAT is not set 1242 CONFIG_ENV_IS_IN_MMC=y 1243 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y 1244 CONFIG_DM=y 1245diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h 1246index 70aa425060..fcc6ac7f8f 100644 1247--- a/include/configs/am57xx_evm.h 1248+++ b/include/configs/am57xx_evm.h 1249@@ -24,7 +24,7 @@ 1250 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 1251 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 1252 1253-#define CONSOLEDEV "ttyO2" 1254+//#define CONSOLEDEV "ttyO2" 1255 #define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ 1256 #define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ 1257 #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ 1258diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h 1259index 1e2a62dd6f..47f641165d 100644 1260--- a/include/configs/ti_armv7_common.h 1261+++ b/include/configs/ti_armv7_common.h 1262@@ -80,6 +80,363 @@ 1263 #define CONFIG_SYS_I2C 1264 #endif 1265 1266+#define EEPROM_PROGRAMMING \ 1267+ "eeprom_dump=i2c dev 0; " \ 1268+ "i2c md 0x50 0x00.2 20; " \ 1269+ "\0" \ 1270+ "eeprom_blank=i2c dev 0; " \ 1271+ "i2c mw 0x50 0x00.2 ff; " \ 1272+ "i2c mw 0x50 0x01.2 ff; " \ 1273+ "i2c mw 0x50 0x02.2 ff; " \ 1274+ "i2c mw 0x50 0x03.2 ff; " \ 1275+ "i2c mw 0x50 0x04.2 ff; " \ 1276+ "i2c mw 0x50 0x05.2 ff; " \ 1277+ "i2c mw 0x50 0x06.2 ff; " \ 1278+ "i2c mw 0x50 0x07.2 ff; " \ 1279+ "i2c mw 0x50 0x08.2 ff; " \ 1280+ "i2c mw 0x50 0x09.2 ff; " \ 1281+ "i2c mw 0x50 0x0a.2 ff; " \ 1282+ "i2c mw 0x50 0x0b.2 ff; " \ 1283+ "i2c mw 0x50 0x0c.2 ff; " \ 1284+ "i2c mw 0x50 0x0d.2 ff; " \ 1285+ "i2c mw 0x50 0x0e.2 ff; " \ 1286+ "i2c mw 0x50 0x0f.2 ff; " \ 1287+ "i2c mw 0x50 0x10.2 ff; " \ 1288+ "i2c mw 0x50 0x11.2 ff; " \ 1289+ "i2c mw 0x50 0x12.2 ff; " \ 1290+ "i2c mw 0x50 0x13.2 ff; " \ 1291+ "i2c mw 0x50 0x14.2 ff; " \ 1292+ "i2c mw 0x50 0x15.2 ff; " \ 1293+ "i2c mw 0x50 0x16.2 ff; " \ 1294+ "i2c mw 0x50 0x17.2 ff; " \ 1295+ "i2c mw 0x50 0x18.2 ff; " \ 1296+ "i2c mw 0x50 0x19.2 ff; " \ 1297+ "i2c mw 0x50 0x1a.2 ff; " \ 1298+ "i2c mw 0x50 0x1b.2 ff; " \ 1299+ "i2c mw 0x50 0x1c.2 ff; " \ 1300+ "i2c mw 0x50 0x1d.2 ff; " \ 1301+ "i2c mw 0x50 0x1e.2 ff; " \ 1302+ "i2c mw 0x50 0x1f.2 ff; " \ 1303+ "i2c md 0x50 0x00.2 20; " \ 1304+ "\0" \ 1305+ "eeprom_x15_b1=i2c dev 0; " \ 1306+ "i2c mw 0x50 0x00.2 aa; " \ 1307+ "i2c mw 0x50 0x01.2 55; " \ 1308+ "i2c mw 0x50 0x02.2 33; " \ 1309+ "i2c mw 0x50 0x03.2 ee; " \ 1310+ "i2c mw 0x50 0x04.2 42; " \ 1311+ "i2c mw 0x50 0x05.2 42; " \ 1312+ "i2c mw 0x50 0x06.2 52; " \ 1313+ "i2c mw 0x50 0x07.2 44; " \ 1314+ "i2c mw 0x50 0x08.2 58; " \ 1315+ "i2c mw 0x50 0x09.2 31; " \ 1316+ "i2c mw 0x50 0x0a.2 35; " \ 1317+ "i2c mw 0x50 0x0b.2 5f; " \ 1318+ "i2c mw 0x50 0x0c.2 42; " \ 1319+ "i2c mw 0x50 0x0d.2 2e; " \ 1320+ "i2c mw 0x50 0x0e.2 31; " \ 1321+ "i2c mw 0x50 0x0f.2 30; " \ 1322+ "i2c mw 0x50 0x10.2 57; " \ 1323+ "i2c mw 0x50 0x11.2 57; " \ 1324+ "i2c mw 0x50 0x12.2 59; " \ 1325+ "i2c mw 0x50 0x13.2 59; " \ 1326+ "i2c mw 0x50 0x14.2 34; " \ 1327+ "i2c mw 0x50 0x15.2 50; " \ 1328+ "i2c mw 0x50 0x16.2 35; " \ 1329+ "i2c mw 0x50 0x17.2 35; " \ 1330+ "i2c mw 0x50 0x18.2 30; " \ 1331+ "i2c mw 0x50 0x19.2 30; " \ 1332+ "i2c mw 0x50 0x1a.2 30; " \ 1333+ "i2c mw 0x50 0x1b.2 30; " \ 1334+ "i2c mw 0x50 0x1c.2 ff; " \ 1335+ "i2c mw 0x50 0x1d.2 ff; " \ 1336+ "i2c mw 0x50 0x1e.2 ff; " \ 1337+ "i2c mw 0x50 0x1f.2 ff; " \ 1338+ "i2c md 0x50 0x00.2 20; " \ 1339+ "\0" \ 1340+ "eeprom_x15_c=i2c dev 0; " \ 1341+ "i2c mw 0x50 0x00.2 aa; " \ 1342+ "i2c mw 0x50 0x01.2 55; " \ 1343+ "i2c mw 0x50 0x02.2 33; " \ 1344+ "i2c mw 0x50 0x03.2 ee; " \ 1345+ "i2c mw 0x50 0x04.2 42; " \ 1346+ "i2c mw 0x50 0x05.2 42; " \ 1347+ "i2c mw 0x50 0x06.2 52; " \ 1348+ "i2c mw 0x50 0x07.2 44; " \ 1349+ "i2c mw 0x50 0x08.2 58; " \ 1350+ "i2c mw 0x50 0x09.2 31; " \ 1351+ "i2c mw 0x50 0x0a.2 35; " \ 1352+ "i2c mw 0x50 0x0b.2 5f; " \ 1353+ "i2c mw 0x50 0x0c.2 43; " \ 1354+ "i2c mw 0x50 0x0d.2 2e; " \ 1355+ "i2c mw 0x50 0x0e.2 30; " \ 1356+ "i2c mw 0x50 0x0f.2 30; " \ 1357+ "i2c mw 0x50 0x10.2 79; " \ 1358+ "i2c mw 0x50 0x11.2 79; " \ 1359+ "i2c mw 0x50 0x12.2 77; " \ 1360+ "i2c mw 0x50 0x13.2 77; " \ 1361+ "i2c mw 0x50 0x14.2 50; " \ 1362+ "i2c mw 0x50 0x15.2 58; " \ 1363+ "i2c mw 0x50 0x16.2 31; " \ 1364+ "i2c mw 0x50 0x17.2 35; " \ 1365+ "i2c mw 0x50 0x18.2 6e; " \ 1366+ "i2c mw 0x50 0x19.2 6e; " \ 1367+ "i2c mw 0x50 0x1a.2 6e; " \ 1368+ "i2c mw 0x50 0x1b.2 6e; " \ 1369+ "i2c mw 0x50 0x1c.2 ff; " \ 1370+ "i2c mw 0x50 0x1d.2 ff; " \ 1371+ "i2c mw 0x50 0x1e.2 ff; " \ 1372+ "i2c mw 0x50 0x1f.2 ff; " \ 1373+ "i2c md 0x50 0x00.2 20; " \ 1374+ "\0" \ 1375+ 1376+#define EEWIKI_MMC_BOOT \ 1377+ "mmc_boot=${devtype} dev ${mmcdev}; ${devtype} part; " \ 1378+ "if ${devtype} rescan; then " \ 1379+ "echo Scanning ${devtype} device ${mmcdev};" \ 1380+ "setenv bootpart ${mmcdev}:1; " \ 1381+ "echo Checking for: /uEnv.txt ...;" \ 1382+ "if test -e ${devtype} ${bootpart} /uEnv.txt; then " \ 1383+ "load ${devtype} ${bootpart} ${loadaddr} /uEnv.txt;" \ 1384+ "env import -t ${loadaddr} ${filesize};" \ 1385+ "echo Loaded environment from /uEnv.txt;" \ 1386+ "echo Checking if uenvcmd is set ...;" \ 1387+ "if test -n ${uenvcmd}; then " \ 1388+ "echo Running uenvcmd ...;" \ 1389+ "run uenvcmd;" \ 1390+ "fi;" \ 1391+ "fi; " \ 1392+ "echo Checking for: /boot/uEnv.txt ...;" \ 1393+ "for i in 1 2 3 4 5 6 7 ; do " \ 1394+ "setenv mmcpart ${i};" \ 1395+ "setenv bootpart ${mmcdev}:${mmcpart};" \ 1396+ "if test -e ${devtype} ${bootpart} /boot/uEnv.txt; then " \ 1397+ "load ${devtype} ${bootpart} ${loadaddr} /boot/uEnv.txt;" \ 1398+ "env import -t ${loadaddr} ${filesize};" \ 1399+ "echo Loaded environment from /boot/uEnv.txt;" \ 1400+ "if test -n ${dtb}; then " \ 1401+ "setenv fdtfile ${dtb};" \ 1402+ "echo debug: [dtb=${fdtfile}] ...;" \ 1403+ "fi;" \ 1404+ "echo Checking if uname_r is set in /boot/uEnv.txt ...;" \ 1405+ "if test -n ${uname_r}; then " \ 1406+ "echo debug: [uname_r=${uname_r}] ...;" \ 1407+ "setenv oldroot /dev/mmcblk${mmcdev}p${mmcpart};" \ 1408+ "run uname_boot;" \ 1409+ "fi;" \ 1410+ "fi;" \ 1411+ "done;" \ 1412+ "fi;\0" \ 1413+ 1414+#define EEWIKI_SCSI_BOOT \ 1415+ "scsi_boot=${devtype} reset ; " \ 1416+ "if ${devtype} dev ${mmcdev}; then " \ 1417+ "echo Scanning ${devtype} device ${mmcdev};" \ 1418+ "setenv bootpart ${mmcdev}:1; " \ 1419+ "echo Checking for: /uEnv.txt ...;" \ 1420+ "if test -e ${devtype} ${bootpart} /uEnv.txt; then " \ 1421+ "load ${devtype} ${bootpart} ${loadaddr} /uEnv.txt;" \ 1422+ "env import -t ${loadaddr} ${filesize};" \ 1423+ "echo Loaded environment from /uEnv.txt;" \ 1424+ "echo Checking if uenvcmd is set ...;" \ 1425+ "if test -n ${uenvcmd}; then " \ 1426+ "echo Running uenvcmd ...;" \ 1427+ "run uenvcmd;" \ 1428+ "fi;" \ 1429+ "fi; " \ 1430+ "echo Checking for: /boot/uEnv.txt ...;" \ 1431+ "for i in 1 2 3 4 ; do " \ 1432+ "setenv mmcpart ${i};" \ 1433+ "setenv bootpart ${mmcdev}:${mmcpart};" \ 1434+ "if test -e ${devtype} ${bootpart} /boot/uEnv.txt; then " \ 1435+ "load ${devtype} ${bootpart} ${loadaddr} /boot/uEnv.txt;" \ 1436+ "env import -t ${loadaddr} ${filesize};" \ 1437+ "echo Loaded environment from /boot/uEnv.txt;" \ 1438+ "if test -n ${dtb}; then " \ 1439+ "setenv fdtfile ${dtb};" \ 1440+ "echo debug: [dtb=${fdtfile}] ...;" \ 1441+ "fi;" \ 1442+ "echo Checking if uname_r is set in /boot/uEnv.txt ...;" \ 1443+ "if test -n ${uname_r}; then " \ 1444+ "echo debug: [uname_r=${uname_r}] ...;" \ 1445+ "setenv oldroot /dev/sda${mmcpart};" \ 1446+ "run uname_boot;" \ 1447+ "fi;" \ 1448+ "fi;" \ 1449+ "done;" \ 1450+ "fi;\0" \ 1451+ 1452+#define EEWIKI_USB_BOOT \ 1453+ "usb_boot=${devtype} reset ; " \ 1454+ "if ${devtype} dev ${mmcdev}; then " \ 1455+ "echo Scanning ${devtype} device ${mmcdev};" \ 1456+ "setenv bootpart ${mmcdev}:1; " \ 1457+ "echo Checking for: /uEnv.txt ...;" \ 1458+ "if test -e ${devtype} ${bootpart} /uEnv.txt; then " \ 1459+ "load ${devtype} ${bootpart} ${loadaddr} /uEnv.txt;" \ 1460+ "env import -t ${loadaddr} ${filesize};" \ 1461+ "echo Loaded environment from /uEnv.txt;" \ 1462+ "echo Checking if uenvcmd is set in /uEnv.txt ...;" \ 1463+ "if test -n ${uenvcmd}; then " \ 1464+ "echo Running uenvcmd ...;" \ 1465+ "run uenvcmd;" \ 1466+ "fi;" \ 1467+ "fi; " \ 1468+ "echo Checking for: /boot/uEnv.txt ...;" \ 1469+ "for i in 1 2 3 4 ; do " \ 1470+ "setenv mmcpart ${i};" \ 1471+ "setenv bootpart ${mmcdev}:${mmcpart};" \ 1472+ "if test -e ${devtype} ${bootpart} /boot/uEnv.txt; then " \ 1473+ "load ${devtype} ${bootpart} ${loadaddr} /boot/uEnv.txt;" \ 1474+ "env import -t ${loadaddr} ${filesize};" \ 1475+ "echo Loaded environment from /boot/uEnv.txt;" \ 1476+ "if test -n ${dtb}; then " \ 1477+ "setenv fdtfile ${dtb};" \ 1478+ "echo debug: [dtb=${fdtfile}] ...;" \ 1479+ "fi;" \ 1480+ "echo Checking if uname_r is set in /boot/uEnv.txt ...;" \ 1481+ "if test -n ${uname_r}; then " \ 1482+ "echo debug: [uname_r=${uname_r}] ...;" \ 1483+ "setenv oldroot /dev/sda${mmcpart};" \ 1484+ "run uname_boot;" \ 1485+ "fi;" \ 1486+ "fi;" \ 1487+ "done;" \ 1488+ "fi;\0" \ 1489+ 1490+#define EEWIKI_UNAME_BOOT \ 1491+ "uname_boot="\ 1492+ "setenv bootdir /boot; " \ 1493+ "setenv bootfile vmlinuz-${uname_r}; " \ 1494+ "if test -e ${devtype} ${bootpart} ${bootdir}/${bootfile}; then " \ 1495+ "echo loading ${bootdir}/${bootfile} ...; "\ 1496+ "run loadimage;" \ 1497+ "setenv fdtdir /boot/dtbs/${uname_r}; " \ 1498+ "if test -e ${devtype} ${bootpart} ${fdtdir}/${fdtfile}; then " \ 1499+ "run loadfdt;" \ 1500+ "else " \ 1501+ "setenv fdtdir /usr/lib/linux-image-${uname_r}; " \ 1502+ "if test -e ${devtype} ${bootpart} ${fdtdir}/${fdtfile}; then " \ 1503+ "run loadfdt;" \ 1504+ "else " \ 1505+ "setenv fdtdir /lib/firmware/${uname_r}/device-tree; " \ 1506+ "if test -e ${devtype} ${bootpart} ${fdtdir}/${fdtfile}; then " \ 1507+ "run loadfdt;" \ 1508+ "else " \ 1509+ "setenv fdtdir /boot/dtb-${uname_r}; " \ 1510+ "if test -e ${devtype} ${bootpart} ${fdtdir}/${fdtfile}; then " \ 1511+ "run loadfdt;" \ 1512+ "else " \ 1513+ "setenv fdtdir /boot/dtbs; " \ 1514+ "if test -e ${devtype} ${bootpart} ${fdtdir}/${fdtfile}; then " \ 1515+ "run loadfdt;" \ 1516+ "else " \ 1517+ "setenv fdtdir /boot/dtb; " \ 1518+ "if test -e ${devtype} ${bootpart} ${fdtdir}/${fdtfile}; then " \ 1519+ "run loadfdt;" \ 1520+ "else " \ 1521+ "setenv fdtdir /boot; " \ 1522+ "if test -e ${devtype} ${bootpart} ${fdtdir}/${fdtfile}; then " \ 1523+ "run loadfdt;" \ 1524+ "else " \ 1525+ "echo; echo unable to find ${fdtfile} ...; echo booting legacy ...;"\ 1526+ "run args_mmc;" \ 1527+ "echo debug: [${bootargs}] ... ;" \ 1528+ "echo debug: [bootz ${loadaddr}] ... ;" \ 1529+ "bootz ${loadaddr}; " \ 1530+ "fi;" \ 1531+ "fi;" \ 1532+ "fi;" \ 1533+ "fi;" \ 1534+ "fi;" \ 1535+ "fi;" \ 1536+ "fi; " \ 1537+ "if test -n ${enable_uboot_overlays}; then " \ 1538+ "setenv fdt_buffer 0x60000;" \ 1539+ "if test -n ${uboot_fdt_buffer}; then " \ 1540+ "setenv fdt_buffer ${uboot_fdt_buffer};" \ 1541+ "fi;" \ 1542+ "echo uboot_overlays: [fdt_buffer=${fdt_buffer}] ... ;" \ 1543+ "if test -n ${uboot_overlay_addr0}; then " \ 1544+ "setenv uboot_overlay ${uboot_overlay_addr0}; " \ 1545+ "run capeloadoverlay;" \ 1546+ "fi;" \ 1547+ "if test -n ${uboot_overlay_addr1}; then " \ 1548+ "setenv uboot_overlay ${uboot_overlay_addr1}; " \ 1549+ "run capeloadoverlay;" \ 1550+ "fi;" \ 1551+ "if test -n ${uboot_overlay_addr2}; then " \ 1552+ "setenv uboot_overlay ${uboot_overlay_addr2}; " \ 1553+ "run capeloadoverlay;" \ 1554+ "fi;" \ 1555+ "if test -n ${uboot_overlay_addr3}; then " \ 1556+ "setenv uboot_overlay ${uboot_overlay_addr3}; " \ 1557+ "run capeloadoverlay;" \ 1558+ "fi;" \ 1559+ "if test -n ${uboot_overlay_addr4}; then " \ 1560+ "setenv uboot_overlay ${uboot_overlay_addr4}; " \ 1561+ "run capeloadoverlay;" \ 1562+ "fi;" \ 1563+ "if test -n ${uboot_overlay_addr5}; then " \ 1564+ "setenv uboot_overlay ${uboot_overlay_addr5}; " \ 1565+ "run capeloadoverlay;" \ 1566+ "fi;" \ 1567+ "if test -n ${uboot_overlay_addr6}; then " \ 1568+ "setenv uboot_overlay ${uboot_overlay_addr6}; " \ 1569+ "run capeloadoverlay;" \ 1570+ "fi;" \ 1571+ "if test -n ${uboot_overlay_addr7}; then " \ 1572+ "setenv uboot_overlay ${uboot_overlay_addr7}; " \ 1573+ "run capeloadoverlay;" \ 1574+ "fi;" \ 1575+ "if test -n ${uboot_overlay_pru}; then " \ 1576+ "setenv uboot_overlay ${uboot_overlay_pru}; " \ 1577+ "run virtualloadoverlay;" \ 1578+ "fi;" \ 1579+ "else " \ 1580+ "echo uboot_overlays: add [enable_uboot_overlays=1] to /boot/uEnv.txt to enable...;" \ 1581+ "fi;" \ 1582+ "setenv rdfile initrd.img-${uname_r}; " \ 1583+ "if test -e ${devtype} ${bootpart} ${bootdir}/${rdfile}; then " \ 1584+ "echo loading ${bootdir}/${rdfile} ...; "\ 1585+ "run loadrd;" \ 1586+ "if test -n ${netinstall_enable}; then " \ 1587+ "run args_netinstall; run message;" \ 1588+ "echo debug: [${bootargs}] ... ;" \ 1589+ "echo debug: [bootz ${loadaddr} ${rdaddr}:${rdsize} ${fdtaddr}] ... ;" \ 1590+ "bootz ${loadaddr} ${rdaddr}:${rdsize} ${fdtaddr}; " \ 1591+ "fi;" \ 1592+ "if test -n ${uenv_root}; then " \ 1593+ "run args_uenv_root;" \ 1594+ "echo debug: [${bootargs}] ... ;" \ 1595+ "echo debug: [bootz ${loadaddr} ${rdaddr}:${rdsize} ${fdtaddr}] ... ;" \ 1596+ "bootz ${loadaddr} ${rdaddr}:${rdsize} ${fdtaddr}; " \ 1597+ "fi;" \ 1598+ "if test -n ${uuid}; then " \ 1599+ "run args_mmc_uuid;" \ 1600+ "echo debug: [${bootargs}] ... ;" \ 1601+ "echo debug: [bootz ${loadaddr} ${rdaddr}:${rdsize} ${fdtaddr}] ... ;" \ 1602+ "bootz ${loadaddr} ${rdaddr}:${rdsize} ${fdtaddr}; " \ 1603+ "else " \ 1604+ "run args_mmc_old;" \ 1605+ "echo debug: [${bootargs}] ... ;" \ 1606+ "echo debug: [bootz ${loadaddr} ${rdaddr}:${rdsize} ${fdtaddr}] ... ;" \ 1607+ "bootz ${loadaddr} ${rdaddr}:${rdsize} ${fdtaddr}; " \ 1608+ "fi;" \ 1609+ "else " \ 1610+ "if test -n ${uenv_root}; then " \ 1611+ "run args_uenv_root;" \ 1612+ "echo debug: [${bootargs}] ... ;" \ 1613+ "echo debug: [bootz ${loadaddr} - ${fdtaddr}] ... ;" \ 1614+ "bootz ${loadaddr} - ${fdtaddr}; " \ 1615+ "fi;" \ 1616+ "run args_mmc_old;" \ 1617+ "echo debug: [${bootargs}] ... ;" \ 1618+ "echo debug: [bootz ${loadaddr} - ${fdtaddr}] ... ;" \ 1619+ "bootz ${loadaddr} - ${fdtaddr}; " \ 1620+ "fi;" \ 1621+ "fi;\0" \ 1622+ 1623 /* 1624 * The following are general good-enough settings for U-Boot. We set a 1625 * large malloc pool as we generally have a lot of DDR, and we opt for 1626diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h 1627index ba57c40182..93368cdc51 100644 1628--- a/include/configs/ti_omap5_common.h 1629+++ b/include/configs/ti_omap5_common.h 1630@@ -63,6 +63,11 @@ 1631 DEFAULT_FIT_TI_ARGS \ 1632 DEFAULT_COMMON_BOOT_TI_ARGS \ 1633 DEFAULT_FDT_TI_ARGS \ 1634+ EEWIKI_USB_BOOT \ 1635+ EEWIKI_SCSI_BOOT \ 1636+ EEWIKI_MMC_BOOT \ 1637+ EEWIKI_UNAME_BOOT \ 1638+ EEPROM_PROGRAMMING \ 1639 DFUARGS \ 1640 NETARGS \ 1641 1642diff --git a/include/environment/ti/boot.h b/include/environment/ti/boot.h 1643index 05bdbbc23e..b0254b064a 100644 1644--- a/include/environment/ti/boot.h 1645+++ b/include/environment/ti/boot.h 1646@@ -64,32 +64,18 @@ 1647 "bootpart=0:2\0" \ 1648 "bootdir=/boot\0" \ 1649 "bootfile=zImage\0" \ 1650+ "board_eeprom_header=undefined\0" \ 1651 "usbtty=cdc_acm\0" \ 1652 "vram=16M\0" \ 1653 AVB_VERIFY_CMD \ 1654 "partitions=" PARTS_DEFAULT "\0" \ 1655 "optargs=\0" \ 1656 "dofastboot=0\0" \ 1657- "emmc_linux_boot=" \ 1658- "echo Trying to boot Linux from eMMC ...; " \ 1659- "setenv mmcdev 1; " \ 1660- "setenv bootpart 1:2; " \ 1661- "setenv mmcroot /dev/mmcblk0p2 rw; " \ 1662- "run mmcboot;\0" \ 1663- "emmc_android_boot=" \ 1664- "echo Trying to boot Android from eMMC ...; " \ 1665- "run update_to_fit; " \ 1666- "setenv eval_bootargs setenv bootargs $bootargs; " \ 1667- "run eval_bootargs; " \ 1668- "setenv mmcdev 1; " \ 1669- "setenv machid fe6; " \ 1670- "mmc dev $mmcdev; " \ 1671- "mmc rescan; " \ 1672- AVB_VERIFY_CHECK \ 1673- "part start mmc ${mmcdev} boot boot_start; " \ 1674- "part size mmc ${mmcdev} boot boot_size; " \ 1675- "mmc read ${loadaddr} ${boot_start} ${boot_size}; " \ 1676- "bootm ${loadaddr}#${fdtfile};\0 " 1677+ "read_board_eeprom="\ 1678+ "if test $board_eeprom_header = beagle_x15_revb1_blank; then " \ 1679+ "run eeprom_dump; run eeprom_x15_b1; reset; fi; " \ 1680+ "if test $board_eeprom_header = beagle_x15_revc_blank; then " \ 1681+ "run eeprom_dump; run eeprom_x15_c; reset; fi; \0 " 1682 1683 #ifdef CONFIG_OMAP54XX 1684 1685@@ -127,20 +113,17 @@ 1686 "echo WARNING: Could not determine device tree to use; fi; \0" 1687 1688 #define CONFIG_BOOTCOMMAND \ 1689- "if test ${dofastboot} -eq 1; then " \ 1690- "echo Boot fastboot requested, resetting dofastboot ...;" \ 1691- "setenv dofastboot 0; saveenv;" \ 1692- "echo Booting into fastboot ...; " \ 1693- "fastboot " __stringify(CONFIG_FASTBOOT_USB_DEV) "; " \ 1694- "fi;" \ 1695- "if test ${boot_fit} -eq 1; then " \ 1696- "run update_to_fit;" \ 1697- "fi;" \ 1698+ "run read_board_eeprom; " \ 1699 "run findfdt; " \ 1700- "run envboot; " \ 1701- "run mmcboot;" \ 1702- "run emmc_linux_boot; " \ 1703- "run emmc_android_boot; " \ 1704+ "setenv mmcdev 0; " \ 1705+ "setenv devtype usb; " \ 1706+ "echo usb_boot is currently disabled;" \ 1707+ "setenv devtype scsi; " \ 1708+ "echo scsi_boot is currently disabled;" \ 1709+ "setenv devtype mmc; " \ 1710+ "run mmc_boot;" \ 1711+ "setenv mmcdev 1; " \ 1712+ "run mmc_boot;" \ 1713 "" 1714 1715 #endif /* CONFIG_OMAP54XX */ 1716diff --git a/include/environment/ti/mmc.h b/include/environment/ti/mmc.h 1717index 785fc15345..6481682fc7 100644 1718--- a/include/environment/ti/mmc.h 1719+++ b/include/environment/ti/mmc.h 1720@@ -11,11 +11,33 @@ 1721 #define DEFAULT_MMC_TI_ARGS \ 1722 "mmcdev=0\0" \ 1723 "mmcrootfstype=ext4 rootwait\0" \ 1724- "finduuid=part uuid mmc ${bootpart} uuid\0" \ 1725+ "finduuid=part uuid ${devtype} ${bootpart} uuid\0" \ 1726 "args_mmc=run finduuid;setenv bootargs console=${console} " \ 1727 "${optargs} " \ 1728- "root=PARTUUID=${uuid} rw " \ 1729- "rootfstype=${mmcrootfstype}\0" \ 1730+ "root=PARTUUID=${uuid} ro " \ 1731+ "rootfstype=${mmcrootfstype} " \ 1732+ "${cmdline}\0" \ 1733+ "args_mmc_old=setenv bootargs console=${console} " \ 1734+ "${optargs} " \ 1735+ "root=${oldroot} ro " \ 1736+ "rootfstype=${mmcrootfstype} " \ 1737+ "${cmdline}\0" \ 1738+ "args_mmc_uuid=setenv bootargs console=${console} " \ 1739+ "${optargs} " \ 1740+ "root=UUID=${uuid} ro " \ 1741+ "rootfstype=${mmcrootfstype} " \ 1742+ "${cmdline}\0" \ 1743+ "args_uenv_root=setenv bootargs console=${console} " \ 1744+ "${optargs} " \ 1745+ "root=${uenv_root} ro " \ 1746+ "rootfstype=${mmcrootfstype} " \ 1747+ "${musb} ${cmdline}\0" \ 1748+ "args_netinstall=setenv bootargs ${netinstall_bootargs} " \ 1749+ "${optargs} " \ 1750+ "${cape_disable} " \ 1751+ "${cape_enable} " \ 1752+ "root=/dev/ram rw " \ 1753+ "${cmdline}\0" \ 1754 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 1755 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ 1756 "source ${loadaddr}\0" \ 1757@@ -24,7 +46,22 @@ 1758 "env import -t ${loadaddr} ${filesize}\0" \ 1759 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile}\0" \ 1760 "loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ 1761- "loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ 1762+ "loadrd=load ${devtype} ${bootpart} ${rdaddr} ${bootdir}/${rdfile}; setenv rdsize ${filesize}\0" \ 1763+ "loadfdt=echo loading ${fdtdir}/${fdtfile} ...; load ${devtype} ${bootpart} ${fdtaddr} ${fdtdir}/${fdtfile}\0" \ 1764+ "loadoverlay=echo uboot_overlays: loading ${uboot_overlay} ...; " \ 1765+ "load ${devtype} ${bootpart} ${rdaddr} ${uboot_overlay}; " \ 1766+ "fdt addr ${fdtaddr}; fdt resize ${fdt_buffer}; " \ 1767+ "fdt apply ${rdaddr}; fdt resize ${fdt_buffer};\0" \ 1768+ "virtualloadoverlay=if test -e ${devtype} ${bootpart} ${uboot_overlay}; then " \ 1769+ "run loadoverlay;" \ 1770+ "else " \ 1771+ "echo uboot_overlays: unable to find [${devtype} ${bootpart} ${uboot_overlay}]...;" \ 1772+ "fi;\0" \ 1773+ "capeloadoverlay=if test -e ${devtype} ${bootpart} ${uboot_overlay}; then " \ 1774+ "run loadoverlay;" \ 1775+ "else " \ 1776+ "echo uboot_overlays: unable to find [${devtype} ${bootpart} ${uboot_overlay}]...;" \ 1777+ "fi;\0" \ 1778 "envboot=mmc dev ${mmcdev}; " \ 1779 "if mmc rescan; then " \ 1780 "echo SD/MMC found on device ${mmcdev};" \ 1781-- 17822.17.1 1783 1784