1# mips default CPU ISAs 2config BR2_MIPS_CPU_MIPS32 3 bool 4 select BR2_MIPS_NAN_LEGACY 5config BR2_MIPS_CPU_MIPS32R2 6 bool 7 select BR2_MIPS_NAN_LEGACY 8config BR2_MIPS_CPU_MIPS32R3 9 bool 10 select BR2_MIPS_NAN_LEGACY 11config BR2_MIPS_CPU_MIPS32R5 12 bool 13 select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 14config BR2_MIPS_CPU_MIPS32R6 15 bool 16 select BR2_MIPS_NAN_2008 17 select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 18config BR2_MIPS_CPU_MIPS64 19 bool 20 select BR2_MIPS_NAN_LEGACY 21config BR2_MIPS_CPU_MIPS64R2 22 bool 23 select BR2_MIPS_NAN_LEGACY 24config BR2_MIPS_CPU_MIPS64R3 25 bool 26 select BR2_MIPS_NAN_LEGACY 27config BR2_MIPS_CPU_MIPS64R5 28 bool 29 select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 30config BR2_MIPS_CPU_MIPS64R6 31 bool 32 select BR2_MIPS_NAN_2008 33 select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 34 35choice 36 prompt "Target Architecture Variant" 37 default BR2_mips_32 if BR2_mips || BR2_mipsel 38 default BR2_mips_64 if BR2_mips64 || BR2_mips64el 39 depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el 40 help 41 Specific CPU variant to use 42 43 64bit capable: 64, 64r2, 64r3, 64r5, 64r6 44 non-64bit capable: 32, 32r2, 32r3, 32r5, 32r6 45 46config BR2_mips_32 47 bool "Generic MIPS32" 48 depends on !BR2_ARCH_IS_64 49 select BR2_MIPS_CPU_MIPS32 50config BR2_mips_32r2 51 bool "Generic MIPS32R2" 52 depends on !BR2_ARCH_IS_64 53 select BR2_MIPS_CPU_MIPS32R2 54config BR2_mips_32r3 55 bool "Generic MIPS32R3" 56 depends on !BR2_ARCH_IS_64 57 select BR2_MIPS_CPU_MIPS32R3 58config BR2_mips_32r5 59 bool "Generic MIPS32R5" 60 depends on !BR2_ARCH_IS_64 61 select BR2_MIPS_CPU_MIPS32R5 62config BR2_mips_32r6 63 bool "Generic MIPS32R6" 64 depends on !BR2_ARCH_IS_64 65 select BR2_MIPS_CPU_MIPS32R6 66config BR2_mips_interaptiv 67 bool "interAptiv" 68 depends on !BR2_ARCH_IS_64 69 select BR2_MIPS_CPU_MIPS32R2 70 select BR2_ARCH_NEEDS_GCC_AT_LEAST_6 71config BR2_mips_m5150 72 bool "M5150" 73 depends on !BR2_ARCH_IS_64 74 select BR2_MIPS_CPU_MIPS32R5 75 select BR2_MIPS_NAN_2008 76 select BR2_ARCH_NEEDS_GCC_AT_LEAST_6 77config BR2_mips_m6250 78 bool "M6250" 79 depends on !BR2_ARCH_IS_64 80 select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT 81 select BR2_MIPS_CPU_MIPS32R6 82config BR2_mips_p5600 83 bool "P5600" 84 depends on !BR2_ARCH_IS_64 85 select BR2_MIPS_CPU_MIPS32R5 86 select BR2_MIPS_NAN_2008 87config BR2_mips_xburst 88 bool "XBurst" 89 depends on !BR2_ARCH_IS_64 90 select BR2_MIPS_CPU_MIPS32R2 91 help 92 The Ingenic XBurst is a MIPS32R2 microprocessor. It has a 93 bug in the FPU that can generate incorrect results in 94 certain cases. The problem shows up when you have several 95 fused madd instructions in sequence with dependant 96 operands. This requires the -mno-fused-madd compiler option 97 to be used in order to prevent emitting these instructions. 98 99 See http://www.ingenic.com/en/?xburst.html 100config BR2_mips_64 101 bool "Generic MIPS64" 102 depends on BR2_ARCH_IS_64 103 select BR2_MIPS_CPU_MIPS64 104config BR2_mips_64r2 105 bool "Generic MIPS64R2" 106 depends on BR2_ARCH_IS_64 107 select BR2_MIPS_CPU_MIPS64R2 108config BR2_mips_64r3 109 bool "Generic MIPS64R3" 110 depends on BR2_ARCH_IS_64 111 select BR2_MIPS_CPU_MIPS64R3 112config BR2_mips_64r5 113 bool "Generic MIPS64R5" 114 depends on BR2_ARCH_IS_64 115 select BR2_MIPS_CPU_MIPS64R5 116config BR2_mips_64r6 117 bool "Generic MIPS64R6" 118 depends on BR2_ARCH_IS_64 119 select BR2_MIPS_CPU_MIPS64R6 120config BR2_mips_i6400 121 bool "I6400" 122 depends on BR2_ARCH_IS_64 123 select BR2_MIPS_CPU_MIPS64R6 124 select BR2_ARCH_NEEDS_GCC_AT_LEAST_6 125config BR2_mips_octeon2 126 bool "Octeon II" 127 depends on BR2_ARCH_IS_64 128 select BR2_MIPS_CPU_MIPS64R2 129 help 130 Marvell (formerly Cavium Networks) Octeon II CN60XX 131 processors. 132config BR2_mips_octeon3 133 bool "Octeon III" 134 depends on BR2_ARCH_IS_64 135 select BR2_MIPS_CPU_MIPS64R3 136 help 137 Marvell (formerly Cavium Networks) Octeon III CN7XXX 138 processors. 139config BR2_mips_p6600 140 bool "P6600" 141 depends on BR2_ARCH_IS_64 142 select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT 143 select BR2_MIPS_CPU_MIPS64R6 144endchoice 145 146choice 147 prompt "Target ABI" 148 default BR2_MIPS_NABI32 149 depends on BR2_mips64 || BR2_mips64el 150 151 help 152 Application Binary Interface to use 153 154config BR2_MIPS_NABI32 155 bool "n32" 156 depends on BR2_ARCH_IS_64 157 select BR2_KERNEL_64_USERLAND_32 158config BR2_MIPS_NABI64 159 bool "n64" 160 depends on BR2_ARCH_IS_64 161endchoice 162 163config BR2_MIPS_SOFT_FLOAT 164 bool "Use soft-float" 165 default y 166 depends on !BR2_mips_octeon3 # hard-float only 167 select BR2_SOFT_FLOAT 168 help 169 If your target CPU does not have a Floating Point Unit (FPU) 170 or a kernel FPU emulator, but you still wish to support 171 floating point functions, then everything will need to be 172 compiled with soft floating point support (-msoft-float). 173 174choice 175 prompt "FP mode" 176 default BR2_MIPS_FP32_MODE_XX 177 depends on !BR2_ARCH_IS_64 && !BR2_MIPS_SOFT_FLOAT 178 help 179 MIPS32 supports different FP modes (32,xx,64). Information 180 about FP modes can be found here: 181 https://sourceware.org/binutils/docs/as/MIPS-Options.html 182 https://dmz-portal.imgtec.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#5._Generating_modeless_code 183 184config BR2_MIPS_FP32_MODE_32 185 bool "32" 186 depends on !BR2_MIPS_CPU_MIPS32R6 187 188config BR2_MIPS_FP32_MODE_XX 189 bool "xx" 190 select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 191 192config BR2_MIPS_FP32_MODE_64 193 bool "64" 194 depends on !BR2_MIPS_CPU_MIPS32 195endchoice 196 197config BR2_GCC_TARGET_FP32_MODE 198 default "32" if BR2_MIPS_FP32_MODE_32 199 default "xx" if BR2_MIPS_FP32_MODE_XX 200 default "64" if BR2_MIPS_FP32_MODE_64 201 202config BR2_MIPS_NAN_LEGACY 203 bool 204 205config BR2_MIPS_NAN_2008 206 bool 207 select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9 208 209choice 210 prompt "Target NaN" 211 default BR2_MIPS_ENABLE_NAN_2008 212 depends on BR2_mips_32r5 || BR2_mips_64r5 213 help 214 MIPS supports two different NaN encodings, legacy and 2008. 215 Information about MIPS NaN encodings can be found here: 216 https://sourceware.org/binutils/docs/as/MIPS-NaN-Encodings.html 217 218config BR2_MIPS_ENABLE_NAN_LEGACY 219 bool "legacy" 220 select BR2_MIPS_NAN_LEGACY 221 222config BR2_MIPS_ENABLE_NAN_2008 223 bool "2008" 224 depends on !BR2_MIPS_SOFT_FLOAT 225 select BR2_MIPS_NAN_2008 226endchoice 227 228config BR2_GCC_TARGET_NAN 229 default "legacy" if BR2_MIPS_NAN_LEGACY 230 default "2008" if BR2_MIPS_NAN_2008 231 232config BR2_ARCH 233 default "mips" if BR2_mips 234 default "mipsel" if BR2_mipsel 235 default "mips64" if BR2_mips64 236 default "mips64el" if BR2_mips64el 237 238config BR2_NORMALIZED_ARCH 239 default "mips" 240 241config BR2_ENDIAN 242 default "LITTLE" if BR2_mipsel || BR2_mips64el 243 default "BIG" if BR2_mips || BR2_mips64 244 245config BR2_GCC_TARGET_ARCH 246 default "mips32" if BR2_mips_32 247 default "mips32r2" if BR2_mips_32r2 248 default "mips32r3" if BR2_mips_32r3 249 default "mips32r5" if BR2_mips_32r5 250 default "mips32r6" if BR2_mips_32r6 251 default "interaptiv" if BR2_mips_interaptiv 252 default "m5101" if BR2_mips_m5150 253 default "m6201" if BR2_mips_m6250 254 default "p5600" if BR2_mips_p5600 255 default "mips32r2" if BR2_mips_xburst 256 default "mips64" if BR2_mips_64 257 default "mips64r2" if BR2_mips_64r2 258 default "mips64r3" if BR2_mips_64r3 259 default "mips64r5" if BR2_mips_64r5 260 default "mips64r6" if BR2_mips_64r6 261 default "i6400" if BR2_mips_i6400 262 default "octeon2" if BR2_mips_octeon2 263 default "octeon3" if BR2_mips_octeon3 264 default "p6600" if BR2_mips_p6600 265 266config BR2_MIPS_OABI32 267 bool 268 default y if BR2_mips || BR2_mipsel 269 270config BR2_GCC_TARGET_ABI 271 default "32" if BR2_MIPS_OABI32 272 default "n32" if BR2_MIPS_NABI32 273 default "64" if BR2_MIPS_NABI64 274 275config BR2_READELF_ARCH_NAME 276 default "MIPS R3000" 277 278# vim: ft=kconfig 279# -*- mode:kconfig; -*- 280