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Searched refs:xhci (Results 1 – 4 of 4) sorted by relevance

/utopia/UTPA2-700.0.x/modules/usb/drv/usb_ecos/newhost/
H A DdrvUSBHwCtl.c484 void xhci_ppc(struct xhc_comp *xhci, int bOn) in xhci_ppc() argument
491 switch (xhci->port_index) { in xhci_ppc()
493 addr_w = usb_readw((void*)(xhci->u3top_base+0xFC*2)); in xhci_ppc()
495 addr_w = usb_readw((void*)(xhci->u3top_base+0xFE*2)); in xhci_ppc()
501 addr_w = usb_readw((void*)(xhci->u3top_base+0xE6*2)); in xhci_ppc()
503 addr_w = usb_readw((void*)(xhci->u3top_base+0xE8*2)); in xhci_ppc()
514 … diag_printf("xhci_ppc: turn %s USB3.0 port %d power \n", (bOn) ? "on" : "off", xhci->port_index); in xhci_ppc()
538 void U3phy_MS28_init(struct xhc_comp *xhci) in U3phy_MS28_init() argument
541 …writeb(readb((void*)(xhci->u3phy_D_base+0x84*2))|0x40, (void*)(xhci->u3phy_D_base+0x84*2)); // ope… in U3phy_MS28_init()
545 …writew(0x0104, (void*) (xhci->u3phy_A_base+0x6*2)); // for Enable 1G clock pass to UTMI //[2] reg… in U3phy_MS28_init()
[all …]
H A DdrvUSBHwCtl.h164 void xhci_ppc(struct xhc_comp *xhci, int bOn);
166 void xhci_ssport_set_state(struct xhc_comp *xhci, int bOn);
H A DdrvUSBEntry.c1466 xhci_ssport_set_state(&pChip->reg[u8Hostid].xhci, false); in MDrv_USB_Port_Init()
1468 xhci_ppc(&pChip->reg[u8Hostid].xhci, true); in MDrv_USB_Port_Init()
1518 xhci_ppc(&pCurrentChip->reg[u8Hostid].xhci, false); in MDrv_USB_Port_Close()
1520 xhci_ssport_set_state(&pCurrentChip->reg[u8Hostid].xhci, true); in MDrv_USB_Port_Close()
H A DdrvHub.h266 struct xhc_comp xhci; member