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Searched refs:u32Dclk (Results 1 – 24 of 24) sorted by relevance

/utopia/UTPA2-700.0.x/modules/mfc/hal/maserati/mfc/
H A Dmdrv_mfc_scalerop.c119 U32 u32Dclk=0; in Panel_Dclk_Hz2() local
120 u32Dclk = msCalculateDecimal(u16Htotal*u16Vtotal*u8Vfreq,1000000); in Panel_Dclk_Hz2()
121 return u32Dclk; in Panel_Dclk_Hz2()
126 U32 u32Dclk=0; in FPLL_Panel_Dclk_Hz2() local
127 u32Dclk = msCalculateDecimal(u16Htotal*u16Vtotal*u8Vfreq,1000000); in FPLL_Panel_Dclk_Hz2()
128 return u32Dclk ; in FPLL_Panel_Dclk_Hz2()
177 U32 MDrv_MFC_SetVCO(U32 u32Dclk, U8 u8Vfreq) in MDrv_MFC_SetVCO() argument
183 u32VCO = u32Dclk*4; in MDrv_MFC_SetVCO()
225 u32Dclk = u32Dclk/2; in MDrv_MFC_SetVCO()
226 u32VCO = u32Dclk*7; in MDrv_MFC_SetVCO()
[all …]
/utopia/UTPA2-700.0.x/modules/mfc/hal/macan/mfc/
H A Dmdrv_mfc_scalerop.c119 U32 u32Dclk=0; in Panel_Dclk_Hz2() local
120 u32Dclk = msCalculateDecimal(u16Htotal*u16Vtotal*u8Vfreq,1000000); in Panel_Dclk_Hz2()
121 return u32Dclk; in Panel_Dclk_Hz2()
126 U32 u32Dclk=0; in FPLL_Panel_Dclk_Hz2() local
127 u32Dclk = msCalculateDecimal(u16Htotal*u16Vtotal*u8Vfreq,1000000); in FPLL_Panel_Dclk_Hz2()
128 return u32Dclk ; in FPLL_Panel_Dclk_Hz2()
177 U32 MDrv_MFC_SetVCO(U32 u32Dclk, U8 u8Vfreq) in MDrv_MFC_SetVCO() argument
183 u32VCO = u32Dclk*4; in MDrv_MFC_SetVCO()
225 u32Dclk = u32Dclk/2; in MDrv_MFC_SetVCO()
226 u32VCO = u32Dclk*7; in MDrv_MFC_SetVCO()
[all …]
/utopia/UTPA2-700.0.x/modules/mfc/hal/M7821/mfc/
H A Dmdrv_mfc_scalerop.c119 U32 u32Dclk=0; in Panel_Dclk_Hz2() local
120 u32Dclk = msCalculateDecimal(u16Htotal*u16Vtotal*u8Vfreq,1000000); in Panel_Dclk_Hz2()
121 return u32Dclk; in Panel_Dclk_Hz2()
126 U32 u32Dclk=0; in FPLL_Panel_Dclk_Hz2() local
127 u32Dclk = msCalculateDecimal(u16Htotal*u16Vtotal*u8Vfreq,1000000); in FPLL_Panel_Dclk_Hz2()
128 return u32Dclk ; in FPLL_Panel_Dclk_Hz2()
177 U32 MDrv_MFC_SetVCO(U32 u32Dclk, U8 u8Vfreq) in MDrv_MFC_SetVCO() argument
183 u32VCO = u32Dclk*4; in MDrv_MFC_SetVCO()
225 u32Dclk = u32Dclk/2; in MDrv_MFC_SetVCO()
226 u32VCO = u32Dclk*7; in MDrv_MFC_SetVCO()
[all …]
/utopia/UTPA2-700.0.x/modules/mfc/hal/maxim/mfc/
H A Dmdrv_mfc_scalerop.c119 U32 u32Dclk=0; in Panel_Dclk_Hz2() local
120 u32Dclk = msCalculateDecimal(u16Htotal*u16Vtotal*u8Vfreq,1000000); in Panel_Dclk_Hz2()
121 return u32Dclk; in Panel_Dclk_Hz2()
126 U32 u32Dclk=0; in FPLL_Panel_Dclk_Hz2() local
127 u32Dclk = msCalculateDecimal(u16Htotal*u16Vtotal*u8Vfreq,1000000); in FPLL_Panel_Dclk_Hz2()
128 return u32Dclk ; in FPLL_Panel_Dclk_Hz2()
177 U32 MDrv_MFC_SetVCO(U32 u32Dclk, U8 u8Vfreq) in MDrv_MFC_SetVCO() argument
183 u32VCO = u32Dclk*4; in MDrv_MFC_SetVCO()
225 u32Dclk = u32Dclk/2; in MDrv_MFC_SetVCO()
226 u32VCO = u32Dclk*7; in MDrv_MFC_SetVCO()
[all …]
/utopia/UTPA2-700.0.x/modules/mfc/hal/manhattan/mfc/
H A Dmdrv_mfc_scalerop.c119 U32 u32Dclk=0; in Panel_Dclk_Hz2() local
120 u32Dclk = msCalculateDecimal(u16Htotal*u16Vtotal*u8Vfreq,1000000); in Panel_Dclk_Hz2()
121 return u32Dclk; in Panel_Dclk_Hz2()
126 U32 u32Dclk=0; in FPLL_Panel_Dclk_Hz2() local
127 u32Dclk = msCalculateDecimal(u16Htotal*u16Vtotal*u8Vfreq,1000000); in FPLL_Panel_Dclk_Hz2()
128 return u32Dclk ; in FPLL_Panel_Dclk_Hz2()
177 U32 MDrv_MFC_SetVCO(U32 u32Dclk, U8 u8Vfreq) in MDrv_MFC_SetVCO() argument
183 u32VCO = u32Dclk*4; in MDrv_MFC_SetVCO()
225 u32Dclk = u32Dclk/2; in MDrv_MFC_SetVCO()
226 u32VCO = u32Dclk*7; in MDrv_MFC_SetVCO()
[all …]
/utopia/UTPA2-700.0.x/modules/mfc/hal/M7621/mfc/
H A Dmdrv_mfc_scalerop.c119 U32 u32Dclk=0; in Panel_Dclk_Hz2() local
120 u32Dclk = msCalculateDecimal(u16Htotal*u16Vtotal*u8Vfreq,1000000); in Panel_Dclk_Hz2()
121 return u32Dclk; in Panel_Dclk_Hz2()
126 U32 u32Dclk=0; in FPLL_Panel_Dclk_Hz2() local
127 u32Dclk = msCalculateDecimal(u16Htotal*u16Vtotal*u8Vfreq,1000000); in FPLL_Panel_Dclk_Hz2()
128 return u32Dclk ; in FPLL_Panel_Dclk_Hz2()
177 U32 MDrv_MFC_SetVCO(U32 u32Dclk, U8 u8Vfreq) in MDrv_MFC_SetVCO() argument
183 u32VCO = u32Dclk*4; in MDrv_MFC_SetVCO()
225 u32Dclk = u32Dclk/2; in MDrv_MFC_SetVCO()
226 u32VCO = u32Dclk*7; in MDrv_MFC_SetVCO()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_sc.h397 INTERFACE void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk);
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_sc.h397 INTERFACE void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk);
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_sc.h407 INTERFACE void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk);
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_sc.h409 INTERFACE void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk);
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_sc.h430 INTERFACE void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk);
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_sc.h446 INTERFACE void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk);
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_sc.h446 INTERFACE void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk);
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_sc.h451 INTERFACE void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk);
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_sc.h451 INTERFACE void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk);
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_sc.c3944 void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk) in _MHal_SC_Flock_Caculate_LPLLSet() argument
3948 ldPllSet = ((MS_U64)320 * 524288 * 10000000 + (u32Dclk>>1)); // LPLL BK01 LPLL Set in _MHal_SC_Flock_Caculate_LPLLSet()
3949 do_div(ldPllSet, u32Dclk); in _MHal_SC_Flock_Caculate_LPLLSet()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_sc.c4080 void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk) in _MHal_SC_Flock_Caculate_LPLLSet() argument
4084 ldPllSet = ((MS_U64)320 * 524288 * 10000000 + (u32Dclk>>1)); // LPLL BK01 LPLL Set in _MHal_SC_Flock_Caculate_LPLLSet()
4085 do_div(ldPllSet, u32Dclk); in _MHal_SC_Flock_Caculate_LPLLSet()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_sc.c4866 void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk) in _MHal_SC_Flock_Caculate_LPLLSet() argument
4870 ldPllSet = ((MS_U64)320 * 524288 * 10000000 + (u32Dclk>>1)); // LPLL BK01 LPLL Set in _MHal_SC_Flock_Caculate_LPLLSet()
4871 do_div(ldPllSet, u32Dclk); in _MHal_SC_Flock_Caculate_LPLLSet()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_sc.c5471 void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk) in _MHal_SC_Flock_Caculate_LPLLSet() argument
5476 ldPllSet = ((MS_U64)320 * 524288 * 10000000 + (u32Dclk>>1)); // LPLL BK01 LPLL Set in _MHal_SC_Flock_Caculate_LPLLSet()
5477 do_div(ldPllSet, u32Dclk); in _MHal_SC_Flock_Caculate_LPLLSet()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_sc.c5532 void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk) in _MHal_SC_Flock_Caculate_LPLLSet() argument
5537 ldPllSet = ((MS_U64)320 * 524288 * 10000000 + (u32Dclk>>1)); // LPLL BK01 LPLL Set in _MHal_SC_Flock_Caculate_LPLLSet()
5538 do_div(ldPllSet, u32Dclk); in _MHal_SC_Flock_Caculate_LPLLSet()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_sc.c5915 void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk) in _MHal_SC_Flock_Caculate_LPLLSet() argument
5920 ldPllSet = ((MS_U64)320 * 524288 * 10000000 + (u32Dclk>>1)); // LPLL BK01 LPLL Set in _MHal_SC_Flock_Caculate_LPLLSet()
5921 do_div(ldPllSet, u32Dclk); in _MHal_SC_Flock_Caculate_LPLLSet()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_sc.c5935 void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk) in _MHal_SC_Flock_Caculate_LPLLSet() argument
5940 ldPllSet = ((MS_U64)320 * 524288 * 10000000 + (u32Dclk>>1)); // LPLL BK01 LPLL Set in _MHal_SC_Flock_Caculate_LPLLSet()
5941 do_div(ldPllSet, u32Dclk); in _MHal_SC_Flock_Caculate_LPLLSet()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_sc.c6220 void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk) in _MHal_SC_Flock_Caculate_LPLLSet() argument
6225 ldPllSet = ((MS_U64)320 * 524288 * 10000000 + (u32Dclk>>1)); // LPLL BK01 LPLL Set in _MHal_SC_Flock_Caculate_LPLLSet()
6226 do_div(ldPllSet, u32Dclk); in _MHal_SC_Flock_Caculate_LPLLSet()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_sc.c6220 void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk) in _MHal_SC_Flock_Caculate_LPLLSet() argument
6225 ldPllSet = ((MS_U64)320 * 524288 * 10000000 + (u32Dclk>>1)); // LPLL BK01 LPLL Set in _MHal_SC_Flock_Caculate_LPLLSet()
6226 do_div(ldPllSet, u32Dclk); in _MHal_SC_Flock_Caculate_LPLLSet()