| /utopia/UTPA2-700.0.x/modules/sc/drv/sc/sc2/ |
| H A D | drvSC.c | 374 SC_AND(u8SCID,UART_SCFR, ~(UART_SCFR_V_ENABLE)); in _SC_SetOCP()
377 SC_OR(u8SCID,UART_SCFR, UART_SCFR_V_HIGH); in _SC_SetOCP()
428 SC_AND(u8SCID,UART_SCFR, ~(UART_SCFR_V_HIGH)); in _SC_SetOCP()
1473 SC_AND(u8SCID,UART_SCFR, ~(UART_SCFR_V_ENABLE|UART_SCFR_V_HIGH)); in _SC_Activate()
1490 SC_OR(u8SCID,UART_SCFR, UART_SCFR_V_HIGH); // 'b1 in _SC_Activate()
1494 SC_AND(u8SCID,UART_SCFR, ~UART_SCFR_V_HIGH); in _SC_Activate()
1530 SC_OR(u8SCID,UART_SCFR, (UART_SCFR_V_ENABLE|UART_SCFR_V_HIGH)); in _SC_Deactivate()
1557 SC_AND(u8SCID, UART_SCFR, ~UART_SCFR_V_HIGH);// 'b0 in _SC_Deactivate()
1561 SC_OR(u8SCID, UART_SCFR, UART_SCFR_V_HIGH); // 'b1 in _SC_Deactivate()
1604 SC_AND(u8SCID,UART_SCFR, ~(UART_SCFR_V_ENABLE)); in _SC_Close()
[all …]
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| /utopia/UTPA2-700.0.x/modules/sc/hal/k6lite/sc/ |
| H A D | halSC.c | 387 SC_WRITE(u8SCID, UART_SCFR, SC_READ(u8SCID, UART_SCFR)|UART_SCFR_STOP_BIT_CNT_REACH_NDS_FLC_EN); in HAL_SC_Init()
485 SC_AND(u8SCID, UART_SCFR, ~(UART_SCFR_V_ENABLE));// 'b0 in HAL_SC_Open()
489 SC_OR(u8SCID, UART_SCFR, (UART_SCFR_V_ENABLE)); // 'b1 in HAL_SC_Open()
514 SC_AND(u8SCID,UART_SCFR, ~(UART_SCFR_V_ENABLE)); in HAL_SC_Close()
1086 SC_OR(u8SCID, UART_SCFR, UART_SCFR_V_HIGH); in HAL_SC_SmcVccPadCtrl()
1090 SC_AND(u8SCID, UART_SCFR, ~UART_SCFR_V_HIGH); in HAL_SC_SmcVccPadCtrl()
1110 SC_AND(u8SCID,UART_SCFR, ~(UART_SCFR_V_ENABLE|UART_SCFR_V_HIGH)); in HAL_SC_Ext8024ActiveSeq()
1116 SC_OR(u8SCID, UART_SCFR, UART_SCFR_V_HIGH); in HAL_SC_Ext8024DeactiveSeq()
1117 SC_AND(u8SCID, UART_SCFR, ~(UART_SCFR_V_ENABLE)); in HAL_SC_Ext8024DeactiveSeq()
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| /utopia/UTPA2-700.0.x/modules/sc/hal/k6/sc/ |
| H A D | halSC.c | 330 SC_WRITE(u8SCID, UART_SCFR, SC_READ(u8SCID, UART_SCFR)|UART_SCFR_STOP_BIT_CNT_REACH_NDS_FLC_EN); in HAL_SC_Init()
428 SC_AND(u8SCID, UART_SCFR, ~(UART_SCFR_V_ENABLE));// 'b0 in HAL_SC_Open()
432 SC_OR(u8SCID, UART_SCFR, (UART_SCFR_V_ENABLE)); // 'b1 in HAL_SC_Open()
457 SC_AND(u8SCID,UART_SCFR, ~(UART_SCFR_V_ENABLE)); in HAL_SC_Close()
1095 SC_OR(u8SCID, UART_SCFR, UART_SCFR_V_HIGH); in HAL_SC_SmcVccPadCtrl()
1099 SC_AND(u8SCID, UART_SCFR, ~UART_SCFR_V_HIGH); in HAL_SC_SmcVccPadCtrl()
1119 SC_AND(u8SCID,UART_SCFR, ~(UART_SCFR_V_ENABLE|UART_SCFR_V_HIGH)); in HAL_SC_Ext8024ActiveSeq()
1125 SC_OR(u8SCID, UART_SCFR, UART_SCFR_V_HIGH); in HAL_SC_Ext8024DeactiveSeq()
1126 SC_AND(u8SCID, UART_SCFR, ~(UART_SCFR_V_ENABLE)); in HAL_SC_Ext8024DeactiveSeq()
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| /utopia/UTPA2-700.0.x/modules/uart/hal/kano/uart/ |
| H A D | regUART.h | 207 #define UART_SCFR 12 // Smartcard Fifo Read Delay Register macro
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| /utopia/UTPA2-700.0.x/modules/uart/hal/macan/uart/ |
| H A D | regUART.h | 228 #define UART_SCFR 12 // Smartcard Fifo Read Delay Register macro
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| /utopia/UTPA2-700.0.x/modules/uart/hal/curry/uart/ |
| H A D | regUART.h | 207 #define UART_SCFR 12 // Smartcard Fifo Read Delay Register macro
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| /utopia/UTPA2-700.0.x/modules/uart/hal/mooney/uart/ |
| H A D | regUART.h | 206 #define UART_SCFR 12 // Smartcard Fifo Read Delay Register macro
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| /utopia/UTPA2-700.0.x/modules/uart/hal/messi/uart/ |
| H A D | regUART.h | 206 #define UART_SCFR 12 // Smartcard Fifo Read Delay Register macro
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| /utopia/UTPA2-700.0.x/modules/uart/hal/maldives/uart/ |
| H A D | regUART.h | 208 #define UART_SCFR 12 // Smartcard Fifo Read Delay Register macro
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| /utopia/UTPA2-700.0.x/modules/uart/hal/mustang/uart/ |
| H A D | regUART.h | 213 #define UART_SCFR 12 // Smartcard Fifo Read Delay Register macro
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| /utopia/UTPA2-700.0.x/modules/uart/hal/k6lite/uart/ |
| H A D | regUART.h | 207 #define UART_SCFR 12 // Smartcard Fifo Read Delay Register macro
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| /utopia/UTPA2-700.0.x/modules/uart/hal/M7821/uart/ |
| H A D | regUART.h | 248 #define UART_SCFR 12 // Smartcard Fifo Read Delay Register macro
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| /utopia/UTPA2-700.0.x/modules/uart/hal/maserati/uart/ |
| H A D | regUART.h | 244 #define UART_SCFR 12 // Smartcard Fifo Read Delay Register macro
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| /utopia/UTPA2-700.0.x/modules/uart/hal/M7621/uart/ |
| H A D | regUART.h | 244 #define UART_SCFR 12 // Smartcard Fifo Read Delay Register macro
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| /utopia/UTPA2-700.0.x/modules/uart/hal/manhattan/uart/ |
| H A D | regUART.h | 244 #define UART_SCFR 12 // Smartcard Fifo Read Delay Register macro
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| /utopia/UTPA2-700.0.x/modules/uart/hal/mainz/uart/ |
| H A D | regUART.h | 206 #define UART_SCFR 12 // Smartcard Fifo Read Delay Register macro
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| /utopia/UTPA2-700.0.x/modules/uart/hal/maxim/uart/ |
| H A D | regUART.h | 244 #define UART_SCFR 12 // Smartcard Fifo Read Delay Register macro
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| /utopia/UTPA2-700.0.x/modules/uart/hal/k6/uart/ |
| H A D | regUART.h | 228 #define UART_SCFR 12 // Smartcard Fifo Read Delay Register macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/maserati/sc/ |
| H A D | regSC.h | 180 #define UART_SCFR (0x0000000cUL) // Smart… macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/M7621/sc/ |
| H A D | regSC.h | 180 #define UART_SCFR (0x0000000cUL) // Smart… macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/maldives/sc/ |
| H A D | regSC.h | 170 #define UART_SCFR (0x0cUL) // Smartcard F… macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/mainz/sc/ |
| H A D | regSC.h | 180 #define UART_SCFR (0x0000000cUL) // Smart… macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/mustang/sc/ |
| H A D | regSC.h | 170 #define UART_SCFR (0x0cUL) // Smartcard F… macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/messi/sc/ |
| H A D | regSC.h | 180 #define UART_SCFR (0x0000000cUL) // Smart… macro
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| /utopia/UTPA2-700.0.x/modules/sc/hal/manhattan/sc/ |
| H A D | regSC.h | 180 #define UART_SCFR (0x0000000cUL) // Smart… macro
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