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/utopia/UTPA2-700.0.x/modules/gpio/hal/maldives/gpio/
H A DregGPIO.h100 #define RIU8 ((unsigned char volatile *) RIU_MAP) macro
106 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)] & (u8Mask))
111 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : \
112 (RIU8[u32Reg8] & ~(u8Mask)); \
117 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; \
121 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)])
124 (RIU8[(u32Reg)])
130 RIU8[((u32Reg) * 2) - 1] = (MS_U8)((u16Val)); \
131 RIU8[((u32Reg) + 1) * 2] = (MS_U8)((u16Val) >> 8); \
/utopia/UTPA2-700.0.x/modules/gpio/hal/mustang/gpio/
H A DregGPIO.h100 #define RIU8 ((unsigned char volatile *) RIU_MAP) macro
106 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)] & (u8Mask))
111 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : \
112 (RIU8[u32Reg8] & ~(u8Mask)); \
117 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; \
121 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)])
124 (RIU8[(u32Reg)])
130 RIU8[((u32Reg) * 2) - 1] = (MS_U8)((u16Val)); \
131 RIU8[((u32Reg) + 1) * 2] = (MS_U8)((u16Val) >> 8); \
/utopia/UTPA2-700.0.x/modules/gpio/hal/mooney/gpio/
H A DregGPIO.h100 #define RIU8 ((MS_U8 volatile *) RIU_MAP) macro
106 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)] & (u8Mask))
111 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : \
112 (RIU8[u32Reg8] & ~(u8Mask)); \
117 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; \
121 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)])
124 (RIU8[(u32Reg)])
130 RIU8[((u32Reg) * 2) - 1] = (MS_U8)((u16Val)); \
131 RIU8[((u32Reg) + 1) * 2] = (MS_U8)((u16Val) >> 8); \
/utopia/UTPA2-700.0.x/modules/gpio/hal/maxim/gpio/
H A DregGPIO.h117 #define RIU8 ((MS_U8 volatile *) RIU_MAP) macro
123 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)] & (u8Mask))
128 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : \
129 (RIU8[u32Reg8] & ~(u8Mask)); \
134 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; \
138 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)])
141 (RIU8[(u32Reg)])
147 RIU8[((u32Reg) * 2) - 1] = (MS_U8)((u16Val)); \
148 RIU8[((u32Reg) + 1) * 2] = (MS_U8)((u16Val) >> 8); \
/utopia/UTPA2-700.0.x/modules/gpio/hal/M7821/gpio/
H A DregGPIO.h117 #define RIU8 ((MS_U8 volatile *) RIU_MAP) macro
123 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)] & (u8Mask))
128 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : \
129 (RIU8[u32Reg8] & ~(u8Mask)); \
134 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; \
138 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)])
141 (RIU8[(u32Reg)])
147 RIU8[((u32Reg) * 2) - 1] = (MS_U8)((u16Val)); \
148 RIU8[((u32Reg) + 1) * 2] = (MS_U8)((u16Val) >> 8); \
/utopia/UTPA2-700.0.x/modules/gpio/hal/messi/gpio/
H A DregGPIO.h100 #define RIU8 ((MS_U8 volatile *) RIU_MAP) macro
106 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)] & (u8Mask))
111 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : \
112 (RIU8[u32Reg8] & ~(u8Mask)); \
117 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; \
121 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)])
124 (RIU8[(u32Reg)])
130 RIU8[((u32Reg) * 2) - 1] = (MS_U8)((u16Val)); \
131 RIU8[((u32Reg) + 1) * 2] = (MS_U8)((u16Val) >> 8); \
/utopia/UTPA2-700.0.x/modules/gpio/hal/maserati/gpio/
H A DregGPIO.h117 #define RIU8 ((MS_U8 volatile *) RIU_MAP) macro
123 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)] & (u8Mask))
128 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : \
129 (RIU8[u32Reg8] & ~(u8Mask)); \
134 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; \
138 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)])
141 (RIU8[(u32Reg)])
147 RIU8[((u32Reg) * 2) - 1] = (MS_U8)((u16Val)); \
148 RIU8[((u32Reg) + 1) * 2] = (MS_U8)((u16Val) >> 8); \
/utopia/UTPA2-700.0.x/modules/gpio/hal/manhattan/gpio/
H A DregGPIO.h117 #define RIU8 ((MS_U8 volatile *) RIU_MAP) macro
123 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)] & (u8Mask))
128 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : \
129 (RIU8[u32Reg8] & ~(u8Mask)); \
134 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; \
138 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)])
141 (RIU8[(u32Reg)])
147 RIU8[((u32Reg) * 2) - 1] = (MS_U8)((u16Val)); \
148 RIU8[((u32Reg) + 1) * 2] = (MS_U8)((u16Val) >> 8); \
/utopia/UTPA2-700.0.x/modules/gpio/hal/M7621/gpio/
H A DregGPIO.h117 #define RIU8 ((MS_U8 volatile *) RIU_MAP) macro
123 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)] & (u8Mask))
128 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : \
129 (RIU8[u32Reg8] & ~(u8Mask)); \
134 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; \
138 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)])
141 (RIU8[(u32Reg)])
147 RIU8[((u32Reg) * 2) - 1] = (MS_U8)((u16Val)); \
148 RIU8[((u32Reg) + 1) * 2] = (MS_U8)((u16Val) >> 8); \
/utopia/UTPA2-700.0.x/modules/gpio/hal/macan/gpio/
H A DregGPIO.h117 #define RIU8 ((MS_U8 volatile *) RIU_MAP) macro
123 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)] & (u8Mask))
128 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : \
129 (RIU8[u32Reg8] & ~(u8Mask)); \
134 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; \
138 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)])
141 (RIU8[(u32Reg)])
147 RIU8[((u32Reg) * 2) - 1] = (MS_U8)((u16Val)); \
148 RIU8[((u32Reg) + 1) * 2] = (MS_U8)((u16Val) >> 8); \
/utopia/UTPA2-700.0.x/modules/gpio/hal/mainz/gpio/
H A DregGPIO.h100 #define RIU8 ((MS_U8 volatile *) RIU_MAP) macro
106 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)] & (u8Mask))
111 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : \
112 (RIU8[u32Reg8] & ~(u8Mask)); \
117 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; \
121 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)])
124 (RIU8[(u32Reg)])
130 RIU8[((u32Reg) * 2) - 1] = (MS_U8)((u16Val)); \
131 RIU8[((u32Reg) + 1) * 2] = (MS_U8)((u16Val) >> 8); \
/utopia/UTPA2-700.0.x/modules/usb/drv/usbhost/include/
H A DdrvGlobal.h138 (((u32Reg) & 0x01) ? RIU8[(u32Reg) * 2 - 1] : RIU8[(u32Reg) * 2]) : \
162 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)] & (u8Mask))
167 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : \
168 (RIU8[u32Reg8] & ~(u8Mask)); \
175 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; \
189 RIU8[((u32Reg) * 2) - 1] = (U8)((u16Val)); \
190 RIU8[((u32Reg) + 1) * 2] = (U8)((u16Val) >> 8); \
221 RIU8[u32Reg8] = (RIU8[u32Reg8] & ~(u8Msk)) | ((u8Val) & (u8Msk)); \
/utopia/UTPA2-700.0.x/modules/gpio/hal/k6/gpio/
H A DregGPIO.h117 #define RIU8 ((MS_U8 volatile *) RIU_MAP) macro
123 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)] & (u8Mask))
128 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : \
129 (RIU8[u32Reg8] & ~(u8Mask)); \
134 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; \
138 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)])
144 RIU8[((u32Reg) * 2) - 1] = (MS_U8)((u16Val)); \
145 RIU8[((u32Reg) + 1) * 2] = (MS_U8)((u16Val) >> 8); \
/utopia/UTPA2-700.0.x/modules/gpio/hal/kano/gpio/
H A DregGPIO.h117 #define RIU8 ((MS_U8 volatile *) RIU_MAP) macro
123 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)] & (u8Mask))
128 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : \
129 (RIU8[u32Reg8] & ~(u8Mask)); \
134 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; \
138 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)])
144 RIU8[((u32Reg) * 2) - 1] = (MS_U8)((u16Val)); \
145 RIU8[((u32Reg) + 1) * 2] = (MS_U8)((u16Val) >> 8); \
/utopia/UTPA2-700.0.x/modules/gpio/hal/k7u/gpio/
H A DregGPIO.h117 #define RIU8 ((MS_U8 volatile *) RIU_MAP) macro
123 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)] & (u8Mask))
128 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : \
129 (RIU8[u32Reg8] & ~(u8Mask)); \
134 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; \
138 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)])
144 RIU8[((u32Reg) * 2) - 1] = (MS_U8)((u16Val)); \
145 RIU8[((u32Reg) + 1) * 2] = (MS_U8)((u16Val) >> 8); \
/utopia/UTPA2-700.0.x/modules/gpio/hal/curry/gpio/
H A DregGPIO.h117 #define RIU8 ((MS_U8 volatile *) RIU_MAP) macro
123 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)] & (u8Mask))
128 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : \
129 (RIU8[u32Reg8] & ~(u8Mask)); \
134 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; \
138 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)])
144 RIU8[((u32Reg) * 2) - 1] = (MS_U8)((u16Val)); \
145 RIU8[((u32Reg) + 1) * 2] = (MS_U8)((u16Val) >> 8); \
/utopia/UTPA2-700.0.x/modules/gpio/hal/k6lite/gpio/
H A DregGPIO.h117 #define RIU8 ((MS_U8 volatile *) RIU_MAP) macro
123 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)] & (u8Mask))
128 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : \
129 (RIU8[u32Reg8] & ~(u8Mask)); \
134 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; \
138 (RIU8[(u32Reg) * 2 - ((u32Reg) & 1)])
144 RIU8[((u32Reg) * 2) - 1] = (MS_U8)((u16Val)); \
145 RIU8[((u32Reg) + 1) * 2] = (MS_U8)((u16Val) >> 8); \
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/manhattan/mvd/
H A DhalMVD.c181 #define RIU8 ((unsigned char volatile *) u32RiuBaseAdd) macro
316 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; in HAL_MVD_RegWriteByte()
320 RIU8[(u32Reg << 1) - (u32Reg & 1)] = u8Val; in HAL_MVD_RegWriteByte()
327 (((u32Reg) & 0x01) ? RIU8[(u32Reg) * 2 - 1] : RIU8[(u32Reg) * 2]) : in HAL_MVD_RegReadByte()
328 (RIU8[(u32Reg << 1) - (u32Reg & 1)])); in HAL_MVD_RegReadByte()
334 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : in HAL_MVD_RegWriteBit()
335 (RIU8[u32Reg8] & ~(u8Mask)); in HAL_MVD_RegWriteBit()
341 RIU8[u32Reg8] = (RIU8[u32Reg8] & ~(u8Msk)) | ((u8Val) & (u8Msk)); in HAL_MVD_RegWriteByteMask()
355 RIU8[(u32Reg << 1) - 1] = u32Val; in HAL_MVD_RegWrite4Byte()
357 RIU8[((u32Reg + 3) << 1)] = (u32Val >> 24); in HAL_MVD_RegWrite4Byte()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/macan/mvd/
H A DhalMVD.c181 #define RIU8 ((unsigned char volatile *) u32RiuBaseAdd) macro
316 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; in HAL_MVD_RegWriteByte()
320 RIU8[(u32Reg << 1) - (u32Reg & 1)] = u8Val; in HAL_MVD_RegWriteByte()
327 (((u32Reg) & 0x01) ? RIU8[(u32Reg) * 2 - 1] : RIU8[(u32Reg) * 2]) : in HAL_MVD_RegReadByte()
328 (RIU8[(u32Reg << 1) - (u32Reg & 1)])); in HAL_MVD_RegReadByte()
334 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : in HAL_MVD_RegWriteBit()
335 (RIU8[u32Reg8] & ~(u8Mask)); in HAL_MVD_RegWriteBit()
341 RIU8[u32Reg8] = (RIU8[u32Reg8] & ~(u8Msk)) | ((u8Val) & (u8Msk)); in HAL_MVD_RegWriteByteMask()
355 RIU8[(u32Reg << 1) - 1] = u32Val; in HAL_MVD_RegWrite4Byte()
357 RIU8[((u32Reg + 3) << 1)] = (u32Val >> 24); in HAL_MVD_RegWrite4Byte()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7621/mvd/
H A DhalMVD.c181 #define RIU8 ((unsigned char volatile *) u32RiuBaseAdd) macro
316 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; in HAL_MVD_RegWriteByte()
320 RIU8[(u32Reg << 1) - (u32Reg & 1)] = u8Val; in HAL_MVD_RegWriteByte()
327 (((u32Reg) & 0x01) ? RIU8[(u32Reg) * 2 - 1] : RIU8[(u32Reg) * 2]) : in HAL_MVD_RegReadByte()
328 (RIU8[(u32Reg << 1) - (u32Reg & 1)])); in HAL_MVD_RegReadByte()
334 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : in HAL_MVD_RegWriteBit()
335 (RIU8[u32Reg8] & ~(u8Mask)); in HAL_MVD_RegWriteBit()
341 RIU8[u32Reg8] = (RIU8[u32Reg8] & ~(u8Msk)) | ((u8Val) & (u8Msk)); in HAL_MVD_RegWriteByteMask()
355 RIU8[(u32Reg << 1) - 1] = u32Val; in HAL_MVD_RegWrite4Byte()
357 RIU8[((u32Reg + 3) << 1)] = (u32Val >> 24); in HAL_MVD_RegWrite4Byte()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/mainz/mvd/
H A DhalMVD.c181 #define RIU8 ((unsigned char volatile *) u32RiuBaseAdd) macro
316 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; in HAL_MVD_RegWriteByte()
320 RIU8[(u32Reg << 1) - (u32Reg & 1)] = u8Val; in HAL_MVD_RegWriteByte()
327 (((u32Reg) & 0x01) ? RIU8[(u32Reg) * 2 - 1] : RIU8[(u32Reg) * 2]) : in HAL_MVD_RegReadByte()
328 (RIU8[(u32Reg << 1) - (u32Reg & 1)])); in HAL_MVD_RegReadByte()
334 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : in HAL_MVD_RegWriteBit()
335 (RIU8[u32Reg8] & ~(u8Mask)); in HAL_MVD_RegWriteBit()
341 RIU8[u32Reg8] = (RIU8[u32Reg8] & ~(u8Msk)) | ((u8Val) & (u8Msk)); in HAL_MVD_RegWriteByteMask()
355 RIU8[(u32Reg << 1) - 1] = u32Val; in HAL_MVD_RegWrite4Byte()
357 RIU8[((u32Reg + 3) << 1)] = (u32Val >> 24); in HAL_MVD_RegWrite4Byte()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maserati/mvd/
H A DhalMVD.c181 #define RIU8 ((unsigned char volatile *) u32RiuBaseAdd) macro
316 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; in HAL_MVD_RegWriteByte()
320 RIU8[(u32Reg << 1) - (u32Reg & 1)] = u8Val; in HAL_MVD_RegWriteByte()
327 (((u32Reg) & 0x01) ? RIU8[(u32Reg) * 2 - 1] : RIU8[(u32Reg) * 2]) : in HAL_MVD_RegReadByte()
328 (RIU8[(u32Reg << 1) - (u32Reg & 1)])); in HAL_MVD_RegReadByte()
334 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : in HAL_MVD_RegWriteBit()
335 (RIU8[u32Reg8] & ~(u8Mask)); in HAL_MVD_RegWriteBit()
341 RIU8[u32Reg8] = (RIU8[u32Reg8] & ~(u8Msk)) | ((u8Val) & (u8Msk)); in HAL_MVD_RegWriteByteMask()
355 RIU8[(u32Reg << 1) - 1] = u32Val; in HAL_MVD_RegWrite4Byte()
357 RIU8[((u32Reg + 3) << 1)] = (u32Val >> 24); in HAL_MVD_RegWrite4Byte()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/messi/mvd/
H A DhalMVD.c181 #define RIU8 ((unsigned char volatile *) u32RiuBaseAdd) macro
316 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; in HAL_MVD_RegWriteByte()
320 RIU8[(u32Reg << 1) - (u32Reg & 1)] = u8Val; in HAL_MVD_RegWriteByte()
327 (((u32Reg) & 0x01) ? RIU8[(u32Reg) * 2 - 1] : RIU8[(u32Reg) * 2]) : in HAL_MVD_RegReadByte()
328 (RIU8[(u32Reg << 1) - (u32Reg & 1)])); in HAL_MVD_RegReadByte()
334 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : in HAL_MVD_RegWriteBit()
335 (RIU8[u32Reg8] & ~(u8Mask)); in HAL_MVD_RegWriteBit()
341 RIU8[u32Reg8] = (RIU8[u32Reg8] & ~(u8Msk)) | ((u8Val) & (u8Msk)); in HAL_MVD_RegWriteByteMask()
355 RIU8[(u32Reg << 1) - 1] = u32Val; in HAL_MVD_RegWrite4Byte()
357 RIU8[((u32Reg + 3) << 1)] = (u32Val >> 24); in HAL_MVD_RegWrite4Byte()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maxim/mvd/
H A DhalMVD.c181 #define RIU8 ((unsigned char volatile *) u32RiuBaseAdd) macro
316 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; in HAL_MVD_RegWriteByte()
320 RIU8[(u32Reg << 1) - (u32Reg & 1)] = u8Val; in HAL_MVD_RegWriteByte()
327 (((u32Reg) & 0x01) ? RIU8[(u32Reg) * 2 - 1] : RIU8[(u32Reg) * 2]) : in HAL_MVD_RegReadByte()
328 (RIU8[(u32Reg << 1) - (u32Reg & 1)])); in HAL_MVD_RegReadByte()
334 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : in HAL_MVD_RegWriteBit()
335 (RIU8[u32Reg8] & ~(u8Mask)); in HAL_MVD_RegWriteBit()
341 RIU8[u32Reg8] = (RIU8[u32Reg8] & ~(u8Msk)) | ((u8Val) & (u8Msk)); in HAL_MVD_RegWriteByteMask()
355 RIU8[(u32Reg << 1) - 1] = u32Val; in HAL_MVD_RegWrite4Byte()
357 RIU8[((u32Reg + 3) << 1)] = (u32Val >> 24); in HAL_MVD_RegWrite4Byte()
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7821/mvd/
H A DhalMVD.c181 #define RIU8 ((unsigned char volatile *) u32RiuBaseAdd) macro
316 RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val; in HAL_MVD_RegWriteByte()
320 RIU8[(u32Reg << 1) - (u32Reg & 1)] = u8Val; in HAL_MVD_RegWriteByte()
327 (((u32Reg) & 0x01) ? RIU8[(u32Reg) * 2 - 1] : RIU8[(u32Reg) * 2]) : in HAL_MVD_RegReadByte()
328 (RIU8[(u32Reg << 1) - (u32Reg & 1)])); in HAL_MVD_RegReadByte()
334 RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] | (u8Mask)) : in HAL_MVD_RegWriteBit()
335 (RIU8[u32Reg8] & ~(u8Mask)); in HAL_MVD_RegWriteBit()
341 RIU8[u32Reg8] = (RIU8[u32Reg8] & ~(u8Msk)) | ((u8Val) & (u8Msk)); in HAL_MVD_RegWriteByteMask()
355 RIU8[(u32Reg << 1) - 1] = u32Val; in HAL_MVD_RegWrite4Byte()
357 RIU8[((u32Reg + 3) << 1)] = (u32Val >> 24); in HAL_MVD_RegWrite4Byte()

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