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Searched refs:REG_TOP_TS0_PE_MASK (Results 1 – 8 of 8) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/
H A DhalTSP.c320 #define REG_TOP_TS0_PE_MASK 0x07FFUL macro
2089 _u16TsPadPE[0] = TSP_TOP_REG(REG_TOP_TS0_PE) & REG_TOP_TS0_PE_MASK; in HAL_TSP_SelPad()
2090 TSP_TOP_REG(REG_TOP_TS0_PE) = TSP_TOP_REG(REG_TOP_TS0_PE)| REG_TOP_TS0_PE_MASK; in HAL_TSP_SelPad()
4792 …TSP_TOP_REG(REG_TOP_TS0_PE) = (TSP_TOP_REG(REG_TOP_TS0_PE) & ~REG_TOP_TS0_PE_MASK) | _u16TsPadPE[0… in HAL_TSP_PowerCtrl()
4968 …TSP_TOP_REG(REG_TOP_TS0_PE) = (TSP_TOP_REG(REG_TOP_TS0_PE) & ~REG_TOP_TS0_PE_MASK) | _u16TsPadPE[0… in HAL_TSP_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/
H A DhalTSP.c320 #define REG_TOP_TS0_PE_MASK 0x07FFUL macro
2089 _u16TsPadPE[0] = TSP_TOP_REG(REG_TOP_TS0_PE) & REG_TOP_TS0_PE_MASK; in HAL_TSP_SelPad()
2090 TSP_TOP_REG(REG_TOP_TS0_PE) = TSP_TOP_REG(REG_TOP_TS0_PE)| REG_TOP_TS0_PE_MASK; in HAL_TSP_SelPad()
4775 …TSP_TOP_REG(REG_TOP_TS0_PE) = (TSP_TOP_REG(REG_TOP_TS0_PE) & ~REG_TOP_TS0_PE_MASK) | _u16TsPadPE[0… in HAL_TSP_PowerCtrl()
4951 …TSP_TOP_REG(REG_TOP_TS0_PE) = (TSP_TOP_REG(REG_TOP_TS0_PE) & ~REG_TOP_TS0_PE_MASK) | _u16TsPadPE[0… in HAL_TSP_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/
H A DhalTSP.c328 #define REG_TOP_TS0_PE_MASK 0x07FFUL macro
2150 _u16TsPadPE[0] = TSP_TOP_REG(REG_TOP_TS0_PE) & REG_TOP_TS0_PE_MASK; in HAL_TSP_SelPad()
2151 TSP_TOP_REG(REG_TOP_TS0_PE) = TSP_TOP_REG(REG_TOP_TS0_PE)| REG_TOP_TS0_PE_MASK; in HAL_TSP_SelPad()
4858 …TSP_TOP_REG(REG_TOP_TS0_PE) = (TSP_TOP_REG(REG_TOP_TS0_PE) & ~REG_TOP_TS0_PE_MASK) | _u16TsPadPE[0… in HAL_TSP_PowerCtrl()
5024 …TSP_TOP_REG(REG_TOP_TS0_PE) = (TSP_TOP_REG(REG_TOP_TS0_PE) & ~REG_TOP_TS0_PE_MASK) | _u16TsPadPE[0… in HAL_TSP_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/
H A DhalTSP.c328 #define REG_TOP_TS0_PE_MASK 0x07FFUL macro
2111 _u16TsPadPE[0] = TSP_TOP_REG(REG_TOP_TS0_PE) & REG_TOP_TS0_PE_MASK; in HAL_TSP_SelPad()
2112 TSP_TOP_REG(REG_TOP_TS0_PE) = TSP_TOP_REG(REG_TOP_TS0_PE)| REG_TOP_TS0_PE_MASK; in HAL_TSP_SelPad()
4819 …TSP_TOP_REG(REG_TOP_TS0_PE) = (TSP_TOP_REG(REG_TOP_TS0_PE) & ~REG_TOP_TS0_PE_MASK) | _u16TsPadPE[0… in HAL_TSP_PowerCtrl()
4985 …TSP_TOP_REG(REG_TOP_TS0_PE) = (TSP_TOP_REG(REG_TOP_TS0_PE) & ~REG_TOP_TS0_PE_MASK) | _u16TsPadPE[0… in HAL_TSP_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/messi/tsp/
H A DhalTSP.c205 #define REG_TOP_TS0_PE_MASK 0x07FFUL macro
1322 TSP_TOP_REG(REG_TOP_TS0_PE) = TSP_TOP_REG(REG_TOP_TS0_PE)| REG_TOP_TS0_PE_MASK; in HAL_TSP_SelPad()
2828 TSP_TOP_REG(REG_TOP_TS0_PE) &= ~REG_TOP_TS0_PE_MASK; in HAL_TSP_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/mainz/tsp/
H A DhalTSP.c206 #define REG_TOP_TS0_PE_MASK 0x07FFUL macro
1323 TSP_TOP_REG(REG_TOP_TS0_PE) = TSP_TOP_REG(REG_TOP_TS0_PE)| REG_TOP_TS0_PE_MASK; in HAL_TSP_SelPad()
2832 TSP_TOP_REG(REG_TOP_TS0_PE) &= ~REG_TOP_TS0_PE_MASK; in HAL_TSP_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/
H A DhalTSP.c302 #define REG_TOP_TS0_PE_MASK 0x07FFUL macro
2031 TSP_TOP_REG(REG_TOP_TS0_PE) = TSP_TOP_REG(REG_TOP_TS0_PE)| REG_TOP_TS0_PE_MASK; in HAL_TSP_SelPad()
4315 TSP_TOP_REG(REG_TOP_TS0_PE) &= ~REG_TOP_TS0_PE_MASK; in HAL_TSP_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/
H A DhalTSP.c316 #define REG_TOP_TS0_PE_MASK 0x07FFUL macro
2053 TSP_TOP_REG(REG_TOP_TS0_PE) = TSP_TOP_REG(REG_TOP_TS0_PE)| REG_TOP_TS0_PE_MASK; in HAL_TSP_SelPad()
4352 TSP_TOP_REG(REG_TOP_TS0_PE) &= ~REG_TOP_TS0_PE_MASK; in HAL_TSP_PowerCtrl()