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Searched refs:REG_SC_BK0D_48_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/drv/pnl/include/
H A Dpnl_hwreg_utility2.h262 #define REG_SC_BK0D_48_L _PK_L_(0x0D, 0x48) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_sc.c706 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_dual_write_limit()
5303 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, 0x00); //F2 memory min address in _Hal_SC_Limit_Dual_WriteMem()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_sc.c751 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
835 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_dual_write_limit()
7304 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, 0x00); //F2 memory min address in _Hal_SC_Limit_Dual_WriteMem()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_sc.c788 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_dual_write_limit()
5439 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, 0x00); //F2 memory min address in _Hal_SC_Limit_Dual_WriteMem()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_sc.c767 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
851 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_dual_write_limit()
8097 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, 0x00); //F2 memory min address in _Hal_SC_Limit_Dual_WriteMem()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_sc.c767 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
851 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_dual_write_limit()
8098 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, 0x00); //F2 memory min address in _Hal_SC_Limit_Dual_WriteMem()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_sc.c753 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
837 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_dual_write_limit()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_sc.c806 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_dual_write_limit()
7247 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, 0x00); //F2 memory min address in MHal_SC_Limit_Dual_WriteMem()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_sc.c767 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
851 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_dual_write_limit()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_sc.c767 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
851 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_dual_write_limit()
/utopia/UTPA2-700.0.x/modules/dlc/hal/maldives/dlc/include/
H A Dhwreg_dlc.h3384 #define REG_SC_BK0D_48_L _PK_L_(0x0D, 0x48) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/mustang/dlc/include/
H A Dhwreg_dlc.h3384 #define REG_SC_BK0D_48_L _PK_L_(0x0D, 0x48) macro
/utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/include/
H A Dcolor_reg.h3647 #define REG_SC_BK0D_48_L _PK_L_(0x0D, 0x48) macro
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/
H A Dhwreg_sc.h3642 #define REG_SC_BK0D_48_L _PK_L_(0x0D, 0x48) macro
/utopia/UTPA2-700.0.x/modules/pq/hal/k6lite/pq/include/
H A Dcolor_reg.h3647 #define REG_SC_BK0D_48_L _PK_L_(0x0D, 0x48) macro
/utopia/UTPA2-700.0.x/modules/pq/hal/kano/pq/include/
H A Dcolor_reg.h3647 #define REG_SC_BK0D_48_L _PK_L_(0x0D, 0x48) macro
/utopia/UTPA2-700.0.x/modules/pq/hal/k6/pq/include/
H A Dcolor_reg.h3647 #define REG_SC_BK0D_48_L _PK_L_(0x0D, 0x48) macro
/utopia/UTPA2-700.0.x/modules/pq/hal/curry/pq/include/
H A Dcolor_reg.h3647 #define REG_SC_BK0D_48_L _PK_L_(0x0D, 0x48) macro
/utopia/UTPA2-700.0.x/modules/pq/hal/manhattan/pq/include/
H A Dcolor_reg.h3647 #define REG_SC_BK0D_48_L _PK_L_(0x0D, 0x48) macro
/utopia/UTPA2-700.0.x/modules/pq/hal/M7821/pq/include/
H A Dcolor_reg.h3647 #define REG_SC_BK0D_48_L _PK_L_(0x0D, 0x48) macro
/utopia/UTPA2-700.0.x/modules/pq/hal/maserati/pq/include/
H A Dcolor_reg.h3647 #define REG_SC_BK0D_48_L _PK_L_(0x0D, 0x48) macro
/utopia/UTPA2-700.0.x/modules/pq/hal/maxim/pq/include/
H A Dcolor_reg.h3647 #define REG_SC_BK0D_48_L _PK_L_(0x0D, 0x48) macro
/utopia/UTPA2-700.0.x/modules/pq/hal/M7621/pq/include/
H A Dcolor_reg.h3647 #define REG_SC_BK0D_48_L _PK_L_(0x0D, 0x48) macro