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Searched refs:REG_SC_BK05_20_L (Results 1 – 25 of 71) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/pq/hal/curry/pq/
H A Dmhal_pq_adaptive.c2501 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK05_20_L, 0x0001, 0x0001); // dhd on in MDrv_SC_Janus_DHD_driver()
2507 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK05_20_L, 0x0000, 0x0001); // dhd off in MDrv_SC_Janus_DHD_driver()
/utopia/UTPA2-700.0.x/modules/pq/hal/kano/pq/
H A Dmhal_pq_adaptive.c2501 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK05_20_L, 0x0001, 0x0001); // dhd on in MDrv_SC_Janus_DHD_driver()
2507 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK05_20_L, 0x0000, 0x0001); // dhd off in MDrv_SC_Janus_DHD_driver()
/utopia/UTPA2-700.0.x/modules/pq/hal/k6/pq/
H A Dmhal_pq_adaptive.c2501 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK05_20_L, 0x0001, 0x0001); // dhd on in MDrv_SC_Janus_DHD_driver()
2507 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK05_20_L, 0x0000, 0x0001); // dhd off in MDrv_SC_Janus_DHD_driver()
/utopia/UTPA2-700.0.x/modules/pq/hal/k6lite/pq/
H A Dmhal_pq_adaptive.c2501 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK05_20_L, 0x0001, 0x0001); // dhd on in MDrv_SC_Janus_DHD_driver()
2507 MApi_XC_EX_W2BYTEMSK(&_XC_DeviceIdx, REG_SC_BK05_20_L, 0x0000, 0x0001); // dhd off in MDrv_SC_Janus_DHD_driver()
/utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/include/
H A DMooney_Main.c4638 { PQ_MAP_REG(REG_SC_BK05_20_L), 0x3E, 0x00 },//Same mark
4667 { PQ_MAP_REG(REG_SC_BK05_20_L), 0xC1, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_sc.c5141 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
5157 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
/utopia/UTPA2-700.0.x/modules/pq/hal/maserati/pq/include/
H A DMaserati_Main.c5766 { PQ_MAP_REG(REG_SC_BK05_20_L), 0x3E, 0x00 },//Same mark
5795 { PQ_MAP_REG(REG_SC_BK05_20_L), 0xC1, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/pq/hal/M7821/pq/include/
H A DMaserati_Main.c8142 { PQ_MAP_REG(REG_SC_BK05_20_L), 0x3E, 0x00 },//Same mark
8171 { PQ_MAP_REG(REG_SC_BK05_20_L), 0xC1, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/pq/hal/manhattan/pq/include/
H A DManhattan_Main.c5692 { PQ_MAP_REG(REG_SC_BK05_20_L), 0x3E, 0x00 },//Same mark
5721 { PQ_MAP_REG(REG_SC_BK05_20_L), 0xC1, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_sc.c5277 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
5293 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
/utopia/UTPA2-700.0.x/modules/pq/hal/maxim/pq/include/
H A DMaxim_Main.c8129 { PQ_MAP_REG(REG_SC_BK05_20_L), 0x3E, 0x00 },//Same mark
8158 { PQ_MAP_REG(REG_SC_BK05_20_L), 0xC1, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/pq/hal/M7621/pq/include/
H A DMaxim_Main.c8129 { PQ_MAP_REG(REG_SC_BK05_20_L), 0x3E, 0x00 },//Same mark
8158 { PQ_MAP_REG(REG_SC_BK05_20_L), 0xC1, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_sc.c6391 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
6407 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_sc.c7114 Mhal_XC_MLoad_WriteCmd(pInstance, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
7130 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_sc.c7152 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
7168 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_sc.c7682 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
7698 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_sc.c7705 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
7721 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_sc.c7917 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
7933 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_sc.c7918 MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
7934 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK05_20_L, 0 ,BIT(0)); in MHal_XC_DTVPatchISR()
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h1478 #define REG_SC_BK05_20_L _PK_L_(0x05, 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h1478 #define REG_SC_BK05_20_L _PK_L_(0x05, 0x20) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h1480 #define REG_SC_BK05_20_L _PK_L_(0x05, 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h1478 #define REG_SC_BK05_20_L _PK_L_(0x05, 0x20) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/
H A Dhwreg_dlc.h1480 #define REG_SC_BK05_20_L _PK_L_(0x05, 0x20) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/
H A Dhwreg_wble.h1478 #define REG_SC_BK05_20_L _PK_L_(0x05, 0x20) macro

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