| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_ip.c | 985 SC_W2BYTEMSK(0, REG_SC_BK03_27_L, u8Setting, 0xFF ); in Hal_SC_ip_set_DE_Mode_Glitch()
997 return (MS_BOOL)(SC_R2BYTEMSK(0,REG_SC_BK03_27_L, BIT(2)) >> 2); in Hal_SC_ip_get_DE_mode_glitch_protect_enabled()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_ip.c | 985 SC_W2BYTEMSK(0, REG_SC_BK03_27_L, u8Setting, 0xFF ); in Hal_SC_ip_set_DE_Mode_Glitch()
997 return (MS_BOOL)(SC_R2BYTEMSK(0,REG_SC_BK03_27_L, BIT(2)) >> 2); in Hal_SC_ip_get_DE_mode_glitch_protect_enabled()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_ip.c | 959 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, u8Setting, 0xFF ); in Hal_SC_ip_set_DE_Mode_Glitch()
973 return (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, BIT(2)) >> 2); in Hal_SC_ip_get_DE_mode_glitch_protect_enabled()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_ip.c | 1092 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, u8Setting, 0xFF ); in Hal_SC_ip_set_DE_Mode_Glitch()
1106 return (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, BIT(2)) >> 2); in Hal_SC_ip_get_DE_mode_glitch_protect_enabled()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_ip.c | 1139 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, u8Setting, 0xFF ); in Hal_SC_ip_set_DE_Mode_Glitch()
1153 return (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, BIT(2)) >> 2); in Hal_SC_ip_get_DE_mode_glitch_protect_enabled()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_ip.c | 1092 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, u8Setting, 0xFF ); in Hal_SC_ip_set_DE_Mode_Glitch()
1106 return (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, BIT(2)) >> 2); in Hal_SC_ip_get_DE_mode_glitch_protect_enabled()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_ip.c | 1092 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, u8Setting, 0xFF ); in Hal_SC_ip_set_DE_Mode_Glitch()
1106 return (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, BIT(2)) >> 2); in Hal_SC_ip_get_DE_mode_glitch_protect_enabled()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_ip.c | 1096 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, u8Setting, 0xFF ); in Hal_SC_ip_set_DE_Mode_Glitch()
1110 return (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, BIT(2)) >> 2); in Hal_SC_ip_get_DE_mode_glitch_protect_enabled()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_ip.c | 959 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, u8Setting, 0xFF ); in Hal_SC_ip_set_DE_Mode_Glitch()
973 return (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, BIT(2)) >> 2); in Hal_SC_ip_get_DE_mode_glitch_protect_enabled()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_ip.c | 959 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, u8Setting, 0xFF ); in Hal_SC_ip_set_DE_Mode_Glitch()
973 return (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, BIT(2)) >> 2); in Hal_SC_ip_get_DE_mode_glitch_protect_enabled()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_ip.c | 1095 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, u8Setting, 0xFF ); in Hal_SC_ip_set_DE_Mode_Glitch()
1109 return (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, BIT(2)) >> 2); in Hal_SC_ip_get_DE_mode_glitch_protect_enabled()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_ip.c | 959 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, u8Setting, 0xFF ); in Hal_SC_ip_set_DE_Mode_Glitch()
973 return (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, BIT(2)) >> 2); in Hal_SC_ip_get_DE_mode_glitch_protect_enabled()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_ip.c | 1096 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, u8Setting, 0xFF ); in Hal_SC_ip_set_DE_Mode_Glitch()
1110 return (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, BIT(2)) >> 2); in Hal_SC_ip_get_DE_mode_glitch_protect_enabled()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_ip.c | 1095 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, u8Setting, 0xFF ); in Hal_SC_ip_set_DE_Mode_Glitch()
1109 return (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, BIT(2)) >> 2); in Hal_SC_ip_get_DE_mode_glitch_protect_enabled()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_ip.c | 1092 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, u8Setting, 0xFF ); in Hal_SC_ip_set_DE_Mode_Glitch()
1106 return (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_27_L, BIT(2)) >> 2); in Hal_SC_ip_get_DE_mode_glitch_protect_enabled()
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| /utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/ |
| H A D | hwreg_wble.h | 970 #define REG_SC_BK03_27_L _PK_L_(0x03, 0x27) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/ |
| H A D | hwreg_ace.h | 970 #define REG_SC_BK03_27_L _PK_L_(0x03, 0x27) macro
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/ |
| H A D | hwreg_dlc.h | 972 #define REG_SC_BK03_27_L _PK_L_(0x03, 0x27) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/ |
| H A D | hwreg_ace.h | 970 #define REG_SC_BK03_27_L _PK_L_(0x03, 0x27) macro
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/ |
| H A D | hwreg_dlc.h | 972 #define REG_SC_BK03_27_L _PK_L_(0x03, 0x27) macro
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| /utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/ |
| H A D | hwreg_wble.h | 970 #define REG_SC_BK03_27_L _PK_L_(0x03, 0x27) macro
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/ |
| H A D | hwreg_dlc.h | 972 #define REG_SC_BK03_27_L _PK_L_(0x03, 0x27) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/include/ |
| H A D | hwreg_ace.h | 970 #define REG_SC_BK03_27_L _PK_L_(0x03, 0x27) macro
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| /utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/ |
| H A D | hwreg_dlc.h | 972 #define REG_SC_BK03_27_L _PK_L_(0x03, 0x27) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/include/ |
| H A D | hwreg_ace.h | 970 #define REG_SC_BK03_27_L _PK_L_(0x03, 0x27) macro
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