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Searched refs:REG_SC_BK01_7B_L (Results 1 – 25 of 63) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_sc.c2815 SC_W2BYTEMSK(0,REG_SC_BK01_7B_L, (e3DType), (BIT(1) | BIT(0))); in Hal_XC_H3D_Input3DType()
2820 SC_W2BYTEMSK(0,REG_SC_BK01_7B_L, (bEn<<7), (BIT(7))); in Hal_XC_H3D_Breakline_Enable()
2823 SC_W2BYTEMSK(0,REG_SC_BK01_7B_L, (8<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
2827 SC_W2BYTEMSK(0,REG_SC_BK01_7B_L, (0<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
2883 SC_W2BYTEMSK(0,REG_SC_BK01_7B_L, (bEn<<4), (BIT(4))); in Hal_XC_H3D_SELECT_REGEN_TIMING()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_sc.c2835 SC_W2BYTEMSK(0,REG_SC_BK01_7B_L, (e3DType), (BIT(1) | BIT(0))); in Hal_XC_H3D_Input3DType()
2840 SC_W2BYTEMSK(0,REG_SC_BK01_7B_L, (bEn<<7), (BIT(7))); in Hal_XC_H3D_Breakline_Enable()
2843 SC_W2BYTEMSK(0,REG_SC_BK01_7B_L, (8<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
2847 SC_W2BYTEMSK(0,REG_SC_BK01_7B_L, (0<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
2903 SC_W2BYTEMSK(0,REG_SC_BK01_7B_L, (bEn<<4), (BIT(4))); in Hal_XC_H3D_SELECT_REGEN_TIMING()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_sc.c3571 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (e3DType), (BIT(1) | BIT(0))); in Hal_XC_H3D_Input3DType()
3578 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (bEn<<7), (BIT(7))); in Hal_XC_H3D_Breakline_Enable()
3581 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (8<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
3585 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (0<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
3643 SC_W2BYTEMSK(0, REG_SC_BK01_7B_L, (bEn<<4), (BIT(4))); in Hal_XC_H3D_SELECT_REGEN_TIMING()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_sc.c3697 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (e3DType), (BIT(1) | BIT(0))); in Hal_XC_H3D_Input3DType()
3704 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (bEn<<7), (BIT(7))); in Hal_XC_H3D_Breakline_Enable()
3707 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (8<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
3711 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (0<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
3769 SC_W2BYTEMSK(0, REG_SC_BK01_7B_L, (bEn<<4), (BIT(4))); in Hal_XC_H3D_SELECT_REGEN_TIMING()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_sc.c4483 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (e3DType), (BIT(1) | BIT(0))); in Hal_XC_H3D_Input3DType()
4490 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (bEn<<7), (BIT(7))); in Hal_XC_H3D_Breakline_Enable()
4493 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (8<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
4497 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (0<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
4555 SC_W2BYTEMSK(0, REG_SC_BK01_7B_L, (bEn<<4), (BIT(4))); in Hal_XC_H3D_SELECT_REGEN_TIMING()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_sc.c5053 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (e3DType), (BIT(1) | BIT(0))); in Hal_XC_H3D_Input3DType()
5060 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (bEn<<7), (BIT(7))); in Hal_XC_H3D_Breakline_Enable()
5063 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (8<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
5067 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (0<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
5125 SC_W2BYTEMSK(0, REG_SC_BK01_7B_L, (bEn<<4), (BIT(4))); in Hal_XC_H3D_SELECT_REGEN_TIMING()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_sc.c4931 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (e3DType), (BIT(1) | BIT(0))); in Hal_XC_H3D_Input3DType()
4938 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (bEn<<7), (BIT(7))); in Hal_XC_H3D_Breakline_Enable()
4941 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (8<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
4945 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (0<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
5003 SC_W2BYTEMSK(0, REG_SC_BK01_7B_L, (bEn<<4), (BIT(4))); in Hal_XC_H3D_SELECT_REGEN_TIMING()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_sc.c5313 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (e3DType), (BIT(1) | BIT(0))); in Hal_XC_H3D_Input3DType()
5320 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (bEn<<7), (BIT(7))); in Hal_XC_H3D_Breakline_Enable()
5323 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (8<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
5327 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (0<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
5385 SC_W2BYTEMSK(0, REG_SC_BK01_7B_L, (bEn<<4), (BIT(4))); in Hal_XC_H3D_SELECT_REGEN_TIMING()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_sc.c5333 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (e3DType), (BIT(1) | BIT(0))); in Hal_XC_H3D_Input3DType()
5340 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (bEn<<7), (BIT(7))); in Hal_XC_H3D_Breakline_Enable()
5343 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (8<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
5347 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (0<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
5405 SC_W2BYTEMSK(0, REG_SC_BK01_7B_L, (bEn<<4), (BIT(4))); in Hal_XC_H3D_SELECT_REGEN_TIMING()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_sc.c5618 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (e3DType), (BIT(1) | BIT(0))); in Hal_XC_H3D_Input3DType()
5625 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (bEn<<7), (BIT(7))); in Hal_XC_H3D_Breakline_Enable()
5628 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (8<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
5632 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (0<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
5690 SC_W2BYTEMSK(0, REG_SC_BK01_7B_L, (bEn<<4), (BIT(4))); in Hal_XC_H3D_SELECT_REGEN_TIMING()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_sc.c5618 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (e3DType), (BIT(1) | BIT(0))); in Hal_XC_H3D_Input3DType()
5625 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (bEn<<7), (BIT(7))); in Hal_XC_H3D_Breakline_Enable()
5628 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (8<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
5632 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_7B_L, (0<<8), HBMASK); in Hal_XC_H3D_Breakline_Enable()
5690 SC_W2BYTEMSK(0, REG_SC_BK01_7B_L, (bEn<<4), (BIT(4))); in Hal_XC_H3D_SELECT_REGEN_TIMING()
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h616 #define REG_SC_BK01_7B_L _PK_L_(0x01, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h616 #define REG_SC_BK01_7B_L _PK_L_(0x01, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h618 #define REG_SC_BK01_7B_L _PK_L_(0x01, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h616 #define REG_SC_BK01_7B_L _PK_L_(0x01, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/
H A Dhwreg_dlc.h618 #define REG_SC_BK01_7B_L _PK_L_(0x01, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/
H A Dhwreg_wble.h616 #define REG_SC_BK01_7B_L _PK_L_(0x01, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/
H A Dhwreg_dlc.h618 #define REG_SC_BK01_7B_L _PK_L_(0x01, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/include/
H A Dhwreg_ace.h616 #define REG_SC_BK01_7B_L _PK_L_(0x01, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/
H A Dhwreg_dlc.h618 #define REG_SC_BK01_7B_L _PK_L_(0x01, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/include/
H A Dhwreg_ace.h616 #define REG_SC_BK01_7B_L _PK_L_(0x01, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/messi/dlc/include/
H A Dhwreg_dlc.h618 #define REG_SC_BK01_7B_L _PK_L_(0x01, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/messi/wble/include/
H A Dhwreg_wble.h616 #define REG_SC_BK01_7B_L _PK_L_(0x01, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/M7821/wble/include/
H A Dhwreg_wble.h616 #define REG_SC_BK01_7B_L _PK_L_(0x01, 0x7B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/ace/include/
H A Dhwreg_ace.h616 #define REG_SC_BK01_7B_L _PK_L_(0x01, 0x7B) macro

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