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Searched refs:REG_SC_BK01_61_L (Results 1 – 25 of 62) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmdrv_sc_scaling.c10872 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, bEnable? (BIT(1)|BIT(0)):0x00, BIT(1)|BIT… in _MDrv_SC_check_2p_mode()
11066 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, (BIT(0)|BIT(1)),(BIT(0)|BIT(1))); //enabl… in _MDrv_SC_check_2p_mode()
11084 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, BIT(0), BIT(2)|BIT(1)|BIT(0)); // [0] 2p… in _MDrv_SC_check_2p_mode()
11088 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, 0x0000, BIT(2)|BIT(1)|BIT(0)); // [0] 2p… in _MDrv_SC_check_2p_mode()
11135 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, BIT(0), BIT(2)|BIT(1)|BIT(0)); // [0] 2p… in _MDrv_SC_check_2p_mode()
11149 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, 0x0000, BIT(2)|BIT(1)|BIT(0)); // [0] 2p… in _MDrv_SC_check_2p_mode()
11156 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, 0x0000, BIT(2)|BIT(1)|BIT(0)); // [0] 2p… in _MDrv_SC_check_2p_mode()
H A Dmdrv_sc_scaling.c.010843 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, bEnable? (BIT(1)|BIT(0)):0x00, BIT(1)|BIT…
10980 …//SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, bEnable? (BIT(1)|BIT(0)):0x00, BIT(1)|B…
11037 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, (BIT(0)|BIT(1)),(BIT(0)|BIT(1))); //enabl…
11055 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, BIT(0), BIT(2)|BIT(1)|BIT(0)); // [0] 2p…
11059 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, 0x0000, BIT(2)|BIT(1)|BIT(0)); // [0] 2p…
11106 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, BIT(0), BIT(2)|BIT(1)|BIT(0)); // [0] 2p…
11120 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, 0x0000, BIT(2)|BIT(1)|BIT(0)); // [0] 2p…
11127 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, 0x0000, BIT(2)|BIT(1)|BIT(0)); // [0] 2p…
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_sc.c7297 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, 0x01, 0x03); in MHal_XC_Init_Patch()
7301 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, 0x03, 0x03); in MHal_XC_Init_Patch()
7365 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, 0x01, 0x03); // for HDMI 2.0, always rece… in MHal_XC_Init_Patch()
10914 u16value = SC_R2BYTEMSK(0, REG_SC_BK01_61_L, 0x03); in Hal_SC_set_dualview_clone()
10915 …SC_W2BYTEMSK(1, REG_SC_BK01_61_L, u16value, 0x03); // copy main setting for HDMI Y422 color wrong … in Hal_SC_set_dualview_clone()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_sc.c7317 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, 0x01, 0x03); in MHal_XC_Init_Patch()
7321 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, 0x03, 0x03); in MHal_XC_Init_Patch()
7385 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, 0x01, 0x03); // for HDMI 2.0, always rece… in MHal_XC_Init_Patch()
10892 u16value = SC_R2BYTEMSK(0, REG_SC_BK01_61_L, 0x03); in Hal_SC_set_dualview_clone()
10893 …SC_W2BYTEMSK(1, REG_SC_BK01_61_L, u16value, 0x03); // copy main setting for HDMI Y422 color wrong … in Hal_SC_set_dualview_clone()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_sc.c6900 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, 0x01, 0x03); // for HDMI 2.0, always rece… in MHal_XC_Init_Patch()
9801 u16value = SC_R2BYTEMSK(0, REG_SC_BK01_61_L, 0x03); in Hal_SC_set_dualview_clone()
9802 …SC_W2BYTEMSK(1, REG_SC_BK01_61_L, u16value, 0x03); // copy main setting for HDMI Y422 color wrong … in Hal_SC_set_dualview_clone()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_sc.c7643 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, 0x01, 0x03); // for HDMI 2.0, always rece… in MHal_XC_Init_Patch()
11358 u16value = SC_R2BYTEMSK(0, REG_SC_BK01_61_L, 0x03); in Hal_SC_set_dualview_clone()
11359 …SC_W2BYTEMSK(1, REG_SC_BK01_61_L, u16value, 0x03); // copy main setting for HDMI Y422 color wrong … in Hal_SC_set_dualview_clone()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_sc.c7643 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, 0x01, 0x03); // for HDMI 2.0, always rece… in MHal_XC_Init_Patch()
11369 u16value = SC_R2BYTEMSK(0, REG_SC_BK01_61_L, 0x03); in Hal_SC_set_dualview_clone()
11370 …SC_W2BYTEMSK(1, REG_SC_BK01_61_L, u16value, 0x03); // copy main setting for HDMI Y422 color wrong … in Hal_SC_set_dualview_clone()
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h564 #define REG_SC_BK01_61_L _PK_L_(0x01, 0x61) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h564 #define REG_SC_BK01_61_L _PK_L_(0x01, 0x61) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h566 #define REG_SC_BK01_61_L _PK_L_(0x01, 0x61) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h564 #define REG_SC_BK01_61_L _PK_L_(0x01, 0x61) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/
H A Dhwreg_dlc.h566 #define REG_SC_BK01_61_L _PK_L_(0x01, 0x61) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_sc.c5073 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_61_L, 0x01, 0x03); // for HDMI 2.0, always rece… in MHal_XC_Init_Patch()
/utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/
H A Dhwreg_wble.h564 #define REG_SC_BK01_61_L _PK_L_(0x01, 0x61) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/
H A Dhwreg_dlc.h566 #define REG_SC_BK01_61_L _PK_L_(0x01, 0x61) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/include/
H A Dhwreg_ace.h564 #define REG_SC_BK01_61_L _PK_L_(0x01, 0x61) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/
H A Dhwreg_dlc.h566 #define REG_SC_BK01_61_L _PK_L_(0x01, 0x61) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/include/
H A Dhwreg_ace.h564 #define REG_SC_BK01_61_L _PK_L_(0x01, 0x61) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/messi/dlc/include/
H A Dhwreg_dlc.h566 #define REG_SC_BK01_61_L _PK_L_(0x01, 0x61) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/messi/wble/include/
H A Dhwreg_wble.h564 #define REG_SC_BK01_61_L _PK_L_(0x01, 0x61) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/M7821/wble/include/
H A Dhwreg_wble.h564 #define REG_SC_BK01_61_L _PK_L_(0x01, 0x61) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/ace/include/
H A Dhwreg_ace.h564 #define REG_SC_BK01_61_L _PK_L_(0x01, 0x61) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/maxim/wble/include/
H A Dhwreg_wble.h564 #define REG_SC_BK01_61_L _PK_L_(0x01, 0x61) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7621/dlc/include/
H A Dhwreg_dlc.h566 #define REG_SC_BK01_61_L _PK_L_(0x01, 0x61) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/mainz/wble/include/
H A Dhwreg_wble.h564 #define REG_SC_BK01_61_L _PK_L_(0x01, 0x61) macro

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