Home
last modified time | relevance | path

Searched refs:REG_MHL_ECBUS_PHY_65 (Results 1 – 18 of 18) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhwregMHL.h613 #define REG_MHL_ECBUS_PHY_65 (REG_MHL_ECBUS_PHY_BANK + 0xCA) macro
H A DhalMHL.c1476 …W2BYTEMSK(REG_MHL_ECBUS_PHY_65, 0x08, BMASK(5:0)); // [5:0]: reg_dat_lsb_mask; after analog rwa da… in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/mhl/internal/
H A DhwregMHL.h613 #define REG_MHL_ECBUS_PHY_65 (REG_MHL_ECBUS_PHY_BANK + 0xCA) macro
H A DhalMHL.c1154 …W2BYTEMSK(REG_MHL_ECBUS_PHY_65, 0x08, BMASK(5:0)); // [5:0]: reg_dat_lsb_mask; after analog rwa da… in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhwregMHL.h613 #define REG_MHL_ECBUS_PHY_65 (REG_MHL_ECBUS_PHY_BANK + 0xCA) macro
H A DhalMHL.c1422 …W2BYTEMSK(REG_MHL_ECBUS_PHY_65, 0x08, BMASK(5:0)); // [5:0]: reg_dat_lsb_mask; after analog rwa da… in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/mhl/internal/
H A DhwregMHL.h613 #define REG_MHL_ECBUS_PHY_65 (REG_MHL_ECBUS_PHY_BANK + 0xCA) macro
H A DhalMHL.c1154 …W2BYTEMSK(REG_MHL_ECBUS_PHY_65, 0x08, BMASK(5:0)); // [5:0]: reg_dat_lsb_mask; after analog rwa da… in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhwregMHL.h613 #define REG_MHL_ECBUS_PHY_65 (REG_MHL_ECBUS_PHY_BANK + 0xCA) macro
H A DhalMHL.c1422 …W2BYTEMSK(REG_MHL_ECBUS_PHY_65, 0x08, BMASK(5:0)); // [5:0]: reg_dat_lsb_mask; after analog rwa da… in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhwregMHL.h613 #define REG_MHL_ECBUS_PHY_65 (REG_MHL_ECBUS_PHY_BANK + 0xCA) macro
H A DhalMHL.c1460 …W2BYTEMSK(REG_MHL_ECBUS_PHY_65, 0x08, BMASK(5:0)); // [5:0]: reg_dat_lsb_mask; after analog rwa da… in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhwregMHL.h613 #define REG_MHL_ECBUS_PHY_65 (REG_MHL_ECBUS_PHY_BANK + 0xCA) macro
H A DhalMHL.c1422 …W2BYTEMSK(REG_MHL_ECBUS_PHY_65, 0x08, BMASK(5:0)); // [5:0]: reg_dat_lsb_mask; after analog rwa da… in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhwregMHL.h613 #define REG_MHL_ECBUS_PHY_65 (REG_MHL_ECBUS_PHY_BANK + 0xCA) macro
H A DhalMHL.c1422 …W2BYTEMSK(REG_MHL_ECBUS_PHY_65, 0x08, BMASK(5:0)); // [5:0]: reg_dat_lsb_mask; after analog rwa da… in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhwregMHL.h613 #define REG_MHL_ECBUS_PHY_65 (REG_MHL_ECBUS_PHY_BANK + 0xCA) macro
H A DhalMHL.c1422 …W2BYTEMSK(REG_MHL_ECBUS_PHY_65, 0x08, BMASK(5:0)); // [5:0]: reg_dat_lsb_mask; after analog rwa da… in _mhal_mhl_ECbusInitialSetting()