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Searched refs:REG_MHL_ECBUS_36 (Results 1 – 18 of 18) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/mhl/internal/
H A DhalMHL.c1213 W2BYTEMSK(REG_MHL_ECBUS_36, 0, BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1217 W2BYTEMSK(REG_MHL_ECBUS_36, BIT(0), BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1235 W2BYTEMSK(REG_MHL_ECBUS_36, bEnableFlag? 0: BIT(12), BIT(12)); // eMSC receive int mask in _mhal_mhl_SetEMSCReceiveInterrupt()
H A DhwregMHL.h434 #define REG_MHL_ECBUS_36 (REG_MHL_ECBUS_BANK + 0x6C) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/mhl/internal/
H A DhalMHL.c1213 W2BYTEMSK(REG_MHL_ECBUS_36, 0, BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1217 W2BYTEMSK(REG_MHL_ECBUS_36, BIT(0), BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1235 W2BYTEMSK(REG_MHL_ECBUS_36, bEnableFlag? 0: BIT(12), BIT(12)); // eMSC receive int mask in _mhal_mhl_SetEMSCReceiveInterrupt()
H A DhwregMHL.h434 #define REG_MHL_ECBUS_36 (REG_MHL_ECBUS_BANK + 0x6C) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhalMHL.c1519 W2BYTEMSK(REG_MHL_ECBUS_36, 0, BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1523 W2BYTEMSK(REG_MHL_ECBUS_36, BIT(0), BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1541 W2BYTEMSK(REG_MHL_ECBUS_36, bEnableFlag? 0: BIT(12), BIT(12)); // eMSC receive int mask in _mhal_mhl_SetEMSCReceiveInterrupt()
H A DhwregMHL.h434 #define REG_MHL_ECBUS_36 (REG_MHL_ECBUS_BANK + 0x6C) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhalMHL.c1535 W2BYTEMSK(REG_MHL_ECBUS_36, 0, BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1539 W2BYTEMSK(REG_MHL_ECBUS_36, BIT(0), BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1557 W2BYTEMSK(REG_MHL_ECBUS_36, bEnableFlag? 0: BIT(12), BIT(12)); // eMSC receive int mask in _mhal_mhl_SetEMSCReceiveInterrupt()
H A DhwregMHL.h434 #define REG_MHL_ECBUS_36 (REG_MHL_ECBUS_BANK + 0x6C) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhalMHL.c1481 W2BYTEMSK(REG_MHL_ECBUS_36, 0, BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1485 W2BYTEMSK(REG_MHL_ECBUS_36, BIT(0), BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1503 W2BYTEMSK(REG_MHL_ECBUS_36, bEnableFlag? 0: BIT(12), BIT(12)); // eMSC receive int mask in _mhal_mhl_SetEMSCReceiveInterrupt()
H A DhwregMHL.h434 #define REG_MHL_ECBUS_36 (REG_MHL_ECBUS_BANK + 0x6C) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhalMHL.c1481 W2BYTEMSK(REG_MHL_ECBUS_36, 0, BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1485 W2BYTEMSK(REG_MHL_ECBUS_36, BIT(0), BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1503 W2BYTEMSK(REG_MHL_ECBUS_36, bEnableFlag? 0: BIT(12), BIT(12)); // eMSC receive int mask in _mhal_mhl_SetEMSCReceiveInterrupt()
H A DhwregMHL.h434 #define REG_MHL_ECBUS_36 (REG_MHL_ECBUS_BANK + 0x6C) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhalMHL.c1481 W2BYTEMSK(REG_MHL_ECBUS_36, 0, BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1485 W2BYTEMSK(REG_MHL_ECBUS_36, BIT(0), BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1503 W2BYTEMSK(REG_MHL_ECBUS_36, bEnableFlag? 0: BIT(12), BIT(12)); // eMSC receive int mask in _mhal_mhl_SetEMSCReceiveInterrupt()
H A DhwregMHL.h434 #define REG_MHL_ECBUS_36 (REG_MHL_ECBUS_BANK + 0x6C) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhalMHL.c1481 W2BYTEMSK(REG_MHL_ECBUS_36, 0, BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1485 W2BYTEMSK(REG_MHL_ECBUS_36, BIT(0), BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1503 W2BYTEMSK(REG_MHL_ECBUS_36, bEnableFlag? 0: BIT(12), BIT(12)); // eMSC receive int mask in _mhal_mhl_SetEMSCReceiveInterrupt()
H A DhwregMHL.h434 #define REG_MHL_ECBUS_36 (REG_MHL_ECBUS_BANK + 0x6C) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhalMHL.c1481 W2BYTEMSK(REG_MHL_ECBUS_36, 0, BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1485 W2BYTEMSK(REG_MHL_ECBUS_36, BIT(0), BIT(0)); // Ecbus state change int mask in _mhal_mhl_SetECbusStateChangeInterrupt()
1503 W2BYTEMSK(REG_MHL_ECBUS_36, bEnableFlag? 0: BIT(12), BIT(12)); // eMSC receive int mask in _mhal_mhl_SetEMSCReceiveInterrupt()
H A DhwregMHL.h434 #define REG_MHL_ECBUS_36 (REG_MHL_ECBUS_BANK + 0x6C) macro