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Searched refs:REG_MHL_ECBUS_2D (Results 1 – 18 of 18) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhwregMHL.h425 #define REG_MHL_ECBUS_2D (REG_MHL_ECBUS_BANK + 0x5A) macro
H A DhalMHL.c1464 W2BYTEMSK(REG_MHL_ECBUS_2D, BIT(3), BIT(3)); in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/mhl/internal/
H A DhwregMHL.h425 #define REG_MHL_ECBUS_2D (REG_MHL_ECBUS_BANK + 0x5A) macro
H A DhalMHL.c1142 W2BYTEMSK(REG_MHL_ECBUS_2D, BIT(3), BIT(3)); in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhwregMHL.h425 #define REG_MHL_ECBUS_2D (REG_MHL_ECBUS_BANK + 0x5A) macro
H A DhalMHL.c1410 W2BYTEMSK(REG_MHL_ECBUS_2D, BIT(3), BIT(3)); in _mhal_mhl_ECbusInitialSetting()
2086 W2BYTEMSK(REG_MHL_ECBUS_2D, bEnableFlag? BIT(4): BIT(5), BMASK(5:4)); in _mhal_mhl_BISTECbusEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/mhl/internal/
H A DhwregMHL.h425 #define REG_MHL_ECBUS_2D (REG_MHL_ECBUS_BANK + 0x5A) macro
H A DhalMHL.c1142 W2BYTEMSK(REG_MHL_ECBUS_2D, BIT(3), BIT(3)); in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhwregMHL.h425 #define REG_MHL_ECBUS_2D (REG_MHL_ECBUS_BANK + 0x5A) macro
H A DhalMHL.c1410 W2BYTEMSK(REG_MHL_ECBUS_2D, BIT(3), BIT(3)); in _mhal_mhl_ECbusInitialSetting()
2086 W2BYTEMSK(REG_MHL_ECBUS_2D, bEnableFlag? BIT(4): BIT(5), BMASK(5:4)); in _mhal_mhl_BISTECbusEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhwregMHL.h425 #define REG_MHL_ECBUS_2D (REG_MHL_ECBUS_BANK + 0x5A) macro
H A DhalMHL.c1448 W2BYTEMSK(REG_MHL_ECBUS_2D, BIT(3), BIT(3)); in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhwregMHL.h425 #define REG_MHL_ECBUS_2D (REG_MHL_ECBUS_BANK + 0x5A) macro
H A DhalMHL.c1410 W2BYTEMSK(REG_MHL_ECBUS_2D, BIT(3), BIT(3)); in _mhal_mhl_ECbusInitialSetting()
2086 W2BYTEMSK(REG_MHL_ECBUS_2D, bEnableFlag? BIT(4): BIT(5), BMASK(5:4)); in _mhal_mhl_BISTECbusEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhwregMHL.h425 #define REG_MHL_ECBUS_2D (REG_MHL_ECBUS_BANK + 0x5A) macro
H A DhalMHL.c1410 W2BYTEMSK(REG_MHL_ECBUS_2D, BIT(3), BIT(3)); in _mhal_mhl_ECbusInitialSetting()
2086 W2BYTEMSK(REG_MHL_ECBUS_2D, bEnableFlag? BIT(4): BIT(5), BMASK(5:4)); in _mhal_mhl_BISTECbusEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhwregMHL.h425 #define REG_MHL_ECBUS_2D (REG_MHL_ECBUS_BANK + 0x5A) macro
H A DhalMHL.c1410 W2BYTEMSK(REG_MHL_ECBUS_2D, BIT(3), BIT(3)); in _mhal_mhl_ECbusInitialSetting()
2086 W2BYTEMSK(REG_MHL_ECBUS_2D, bEnableFlag? BIT(4): BIT(5), BMASK(5:4)); in _mhal_mhl_BISTECbusEnable()