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Searched refs:REG_IPMUX_10_L (Results 1 – 19 of 19) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_ip.c918 W2BYTEMSK(REG_IPMUX_10_L, BIT(1), BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
922 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
927 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
931 W2BYTEMSK(REG_IPMUX_10_L, BIT(15), BIT(15)); in Hal_SC_IPMux_Gen_SpecificTiming()
932 W2BYTEMSK(REG_IPMUX_10_L, BIT(0), BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
940 return (MDrv_ReadByte(REG_IPMUX_10_L) & 0x01); in Hal_SC_Check_IP_Gen_Timing()
2104 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(9):0, BIT(9)); in Hal_SC_ipmux_Set_TestPattern()
2105 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(12):0, BIT(12)); in Hal_SC_ipmux_Set_TestPattern()
2106 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(13):0, BIT(13)); in Hal_SC_ipmux_Set_TestPattern()
2107 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(14):0, BIT(14)); in Hal_SC_ipmux_Set_TestPattern()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_ip.c965 W2BYTEMSK(REG_IPMUX_10_L, BIT(1), BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
969 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
974 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
978 W2BYTEMSK(REG_IPMUX_10_L, BIT(15), BIT(15)); in Hal_SC_IPMux_Gen_SpecificTiming()
979 W2BYTEMSK(REG_IPMUX_10_L, BIT(0), BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
987 return (MDrv_ReadByte(REG_IPMUX_10_L) & 0x01); in Hal_SC_Check_IP_Gen_Timing()
2112 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(9):0, BIT(9)); in Hal_SC_ipmux_Set_TestPattern()
2113 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(12):0, BIT(12)); in Hal_SC_ipmux_Set_TestPattern()
2114 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(13):0, BIT(13)); in Hal_SC_ipmux_Set_TestPattern()
2115 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(14):0, BIT(14)); in Hal_SC_ipmux_Set_TestPattern()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_ip.c918 W2BYTEMSK(REG_IPMUX_10_L, BIT(1), BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
922 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
927 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
931 W2BYTEMSK(REG_IPMUX_10_L, BIT(15), BIT(15)); in Hal_SC_IPMux_Gen_SpecificTiming()
932 W2BYTEMSK(REG_IPMUX_10_L, BIT(0), BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
940 return (MDrv_ReadByte(REG_IPMUX_10_L) & 0x01); in Hal_SC_Check_IP_Gen_Timing()
2104 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(9):0, BIT(9)); in Hal_SC_ipmux_Set_TestPattern()
2105 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(12):0, BIT(12)); in Hal_SC_ipmux_Set_TestPattern()
2106 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(13):0, BIT(13)); in Hal_SC_ipmux_Set_TestPattern()
2107 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(14):0, BIT(14)); in Hal_SC_ipmux_Set_TestPattern()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_ip.c918 W2BYTEMSK(REG_IPMUX_10_L, BIT(1), BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
922 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
927 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
931 W2BYTEMSK(REG_IPMUX_10_L, BIT(15), BIT(15)); in Hal_SC_IPMux_Gen_SpecificTiming()
932 W2BYTEMSK(REG_IPMUX_10_L, BIT(0), BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
940 return (MDrv_ReadByte(REG_IPMUX_10_L) & 0x01); in Hal_SC_Check_IP_Gen_Timing()
2104 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(9):0, BIT(9)); in Hal_SC_ipmux_Set_TestPattern()
2105 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(12):0, BIT(12)); in Hal_SC_ipmux_Set_TestPattern()
2106 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(13):0, BIT(13)); in Hal_SC_ipmux_Set_TestPattern()
2107 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(14):0, BIT(14)); in Hal_SC_ipmux_Set_TestPattern()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_ip.c922 W2BYTEMSK(REG_IPMUX_10_L, BIT(1), BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
926 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
931 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
935 W2BYTEMSK(REG_IPMUX_10_L, BIT(15), BIT(15)); in Hal_SC_IPMux_Gen_SpecificTiming()
936 W2BYTEMSK(REG_IPMUX_10_L, BIT(0), BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
944 return (MDrv_ReadByte(REG_IPMUX_10_L) & 0x01); in Hal_SC_Check_IP_Gen_Timing()
2106 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(9):0, BIT(9)); in Hal_SC_ipmux_Set_TestPattern()
2107 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(12):0, BIT(12)); in Hal_SC_ipmux_Set_TestPattern()
2108 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(13):0, BIT(13)); in Hal_SC_ipmux_Set_TestPattern()
2109 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(14):0, BIT(14)); in Hal_SC_ipmux_Set_TestPattern()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_ip.c921 W2BYTEMSK(REG_IPMUX_10_L, BIT(1), BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
925 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
930 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
934 W2BYTEMSK(REG_IPMUX_10_L, BIT(15), BIT(15)); in Hal_SC_IPMux_Gen_SpecificTiming()
935 W2BYTEMSK(REG_IPMUX_10_L, BIT(0), BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
943 return (MDrv_ReadByte(REG_IPMUX_10_L) & 0x01); in Hal_SC_Check_IP_Gen_Timing()
2077 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(9):0, BIT(9)); in Hal_SC_ipmux_Set_TestPattern()
2078 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(12):0, BIT(12)); in Hal_SC_ipmux_Set_TestPattern()
2079 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(13):0, BIT(13)); in Hal_SC_ipmux_Set_TestPattern()
2080 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(14):0, BIT(14)); in Hal_SC_ipmux_Set_TestPattern()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_ip.c922 W2BYTEMSK(REG_IPMUX_10_L, BIT(1), BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
926 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
931 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
935 W2BYTEMSK(REG_IPMUX_10_L, BIT(15), BIT(15)); in Hal_SC_IPMux_Gen_SpecificTiming()
936 W2BYTEMSK(REG_IPMUX_10_L, BIT(0), BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
944 return (MDrv_ReadByte(REG_IPMUX_10_L) & 0x01); in Hal_SC_Check_IP_Gen_Timing()
2106 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(9):0, BIT(9)); in Hal_SC_ipmux_Set_TestPattern()
2107 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(12):0, BIT(12)); in Hal_SC_ipmux_Set_TestPattern()
2108 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(13):0, BIT(13)); in Hal_SC_ipmux_Set_TestPattern()
2109 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(14):0, BIT(14)); in Hal_SC_ipmux_Set_TestPattern()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_ip.c921 W2BYTEMSK(REG_IPMUX_10_L, BIT(1), BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
925 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
930 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
934 W2BYTEMSK(REG_IPMUX_10_L, BIT(15), BIT(15)); in Hal_SC_IPMux_Gen_SpecificTiming()
935 W2BYTEMSK(REG_IPMUX_10_L, BIT(0), BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
943 return (MDrv_ReadByte(REG_IPMUX_10_L) & 0x01); in Hal_SC_Check_IP_Gen_Timing()
2077 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(9):0, BIT(9)); in Hal_SC_ipmux_Set_TestPattern()
2078 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(12):0, BIT(12)); in Hal_SC_ipmux_Set_TestPattern()
2079 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(13):0, BIT(13)); in Hal_SC_ipmux_Set_TestPattern()
2080 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(14):0, BIT(14)); in Hal_SC_ipmux_Set_TestPattern()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_ip.c918 W2BYTEMSK(REG_IPMUX_10_L, BIT(1), BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
922 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
927 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
931 W2BYTEMSK(REG_IPMUX_10_L, BIT(15), BIT(15)); in Hal_SC_IPMux_Gen_SpecificTiming()
932 W2BYTEMSK(REG_IPMUX_10_L, BIT(0), BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
940 return (MDrv_ReadByte(REG_IPMUX_10_L) & 0x01); in Hal_SC_Check_IP_Gen_Timing()
2104 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(9):0, BIT(9)); in Hal_SC_ipmux_Set_TestPattern()
2105 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(12):0, BIT(12)); in Hal_SC_ipmux_Set_TestPattern()
2106 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(13):0, BIT(13)); in Hal_SC_ipmux_Set_TestPattern()
2107 W2BYTEMSK(REG_IPMUX_10_L, bEnable? BIT(14):0, BIT(14)); in Hal_SC_ipmux_Set_TestPattern()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_ip.c835 W2BYTEMSK(REG_IPMUX_10_L, BIT(1), BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
839 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
844 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
848 W2BYTEMSK(REG_IPMUX_10_L, BIT(15), BIT(15)); in Hal_SC_IPMux_Gen_SpecificTiming()
849 W2BYTEMSK(REG_IPMUX_10_L, BIT(0), BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
857 return (MDrv_ReadByte(REG_IPMUX_10_L) & 0x01); in Hal_SC_Check_IP_Gen_Timing()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_ip.c835 W2BYTEMSK(REG_IPMUX_10_L, BIT(1), BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
839 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
844 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
848 W2BYTEMSK(REG_IPMUX_10_L, BIT(15), BIT(15)); in Hal_SC_IPMux_Gen_SpecificTiming()
849 W2BYTEMSK(REG_IPMUX_10_L, BIT(0), BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
857 return (MDrv_ReadByte(REG_IPMUX_10_L) & 0x01); in Hal_SC_Check_IP_Gen_Timing()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_ip.c771 W2BYTEMSK(REG_IPMUX_10_L, BIT(1), BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
775 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
780 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
784 W2BYTEMSK(REG_IPMUX_10_L, BIT(15), BIT(15)); in Hal_SC_IPMux_Gen_SpecificTiming()
785 W2BYTEMSK(REG_IPMUX_10_L, BIT(0), BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
793 return (MDrv_ReadByte(REG_IPMUX_10_L) & 0x01); in Hal_SC_Check_IP_Gen_Timing()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_ip.c771 W2BYTEMSK(REG_IPMUX_10_L, BIT(1), BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
775 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
780 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
784 W2BYTEMSK(REG_IPMUX_10_L, BIT(15), BIT(15)); in Hal_SC_IPMux_Gen_SpecificTiming()
785 W2BYTEMSK(REG_IPMUX_10_L, BIT(0), BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
793 return (MDrv_ReadByte(REG_IPMUX_10_L) & 0x01); in Hal_SC_Check_IP_Gen_Timing()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_ip.c771 W2BYTEMSK(REG_IPMUX_10_L, BIT(1), BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
775 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
780 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
784 W2BYTEMSK(REG_IPMUX_10_L, BIT(15), BIT(15)); in Hal_SC_IPMux_Gen_SpecificTiming()
785 W2BYTEMSK(REG_IPMUX_10_L, BIT(0), BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
793 return (MDrv_ReadByte(REG_IPMUX_10_L) & 0x01); in Hal_SC_Check_IP_Gen_Timing()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_ip.c771 W2BYTEMSK(REG_IPMUX_10_L, BIT(1), BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
775 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(1)); in Hal_SC_IPMux_Gen_SpecificTiming()
780 W2BYTEMSK(REG_IPMUX_10_L, 0x00, BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
784 W2BYTEMSK(REG_IPMUX_10_L, BIT(15), BIT(15)); in Hal_SC_IPMux_Gen_SpecificTiming()
785 W2BYTEMSK(REG_IPMUX_10_L, BIT(0), BIT(0)); in Hal_SC_IPMux_Gen_SpecificTiming()
793 return (MDrv_ReadByte(REG_IPMUX_10_L) & 0x01); in Hal_SC_Check_IP_Gen_Timing()
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/
H A Dhwreg_ipmux.h135 #define REG_IPMUX_10_L (REG_IPMUX_BASE + 0x20) macro
/utopia/UTPA2-700.0.x/modules/xc/api/xc/
H A DapiXC_EX.c9587 W2BYTEMSK(REG_IPMUX_10_L, (bEnable << 9) , BIT(9)); in MApi_XC_EX_Set_WhiteBalance_Pattern()
9588 W2BYTEMSK(REG_IPMUX_10_L, (bEnable << 12), BIT(12)); in MApi_XC_EX_Set_WhiteBalance_Pattern()
9589 W2BYTEMSK(REG_IPMUX_10_L, (bEnable << 13), BIT(13)); in MApi_XC_EX_Set_WhiteBalance_Pattern()
9590 W2BYTEMSK(REG_IPMUX_10_L, (bEnable << 14), BIT(14)); in MApi_XC_EX_Set_WhiteBalance_Pattern()
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmvideo.c13555 W2BYTEMSK(REG_IPMUX_10_L, (bEnable << 9) , BIT(9));
13556 W2BYTEMSK(REG_IPMUX_10_L, (bEnable << 12), BIT(12));
13557 W2BYTEMSK(REG_IPMUX_10_L, (bEnable << 13), BIT(13));
13558 W2BYTEMSK(REG_IPMUX_10_L, (bEnable << 14), BIT(14));
H A Dmvideo.c.013537 W2BYTEMSK(REG_IPMUX_10_L, (bEnable << 9) , BIT(9));
13538 W2BYTEMSK(REG_IPMUX_10_L, (bEnable << 12), BIT(12));
13539 W2BYTEMSK(REG_IPMUX_10_L, (bEnable << 13), BIT(13));
13540 W2BYTEMSK(REG_IPMUX_10_L, (bEnable << 14), BIT(14));