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Searched refs:REG_HDMI_BASE (Results 1 – 25 of 59) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_hdmi.h956 #define REG_HDMI_00_L (REG_HDMI_BASE + 0x00)
957 #define REG_HDMI_00_H (REG_HDMI_BASE + 0x01)
958 #define REG_HDMI_01_L (REG_HDMI_BASE + 0x02)
959 #define REG_HDMI_01_H (REG_HDMI_BASE + 0x03)
960 #define REG_HDMI_02_L (REG_HDMI_BASE + 0x04)
961 #define REG_HDMI_02_H (REG_HDMI_BASE + 0x05)
962 #define REG_HDMI_03_L (REG_HDMI_BASE + 0x06)
963 #define REG_HDMI_03_H (REG_HDMI_BASE + 0x07)
964 #define REG_HDMI_04_L (REG_HDMI_BASE + 0x08)
965 #define REG_HDMI_04_H (REG_HDMI_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_hdmi.h956 #define REG_HDMI_00_L (REG_HDMI_BASE + 0x00)
957 #define REG_HDMI_00_H (REG_HDMI_BASE + 0x01)
958 #define REG_HDMI_01_L (REG_HDMI_BASE + 0x02)
959 #define REG_HDMI_01_H (REG_HDMI_BASE + 0x03)
960 #define REG_HDMI_02_L (REG_HDMI_BASE + 0x04)
961 #define REG_HDMI_02_H (REG_HDMI_BASE + 0x05)
962 #define REG_HDMI_03_L (REG_HDMI_BASE + 0x06)
963 #define REG_HDMI_03_H (REG_HDMI_BASE + 0x07)
964 #define REG_HDMI_04_L (REG_HDMI_BASE + 0x08)
965 #define REG_HDMI_04_H (REG_HDMI_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h938 #define REG_HDMI_00_L (REG_HDMI_BASE + 0x00)
939 #define REG_HDMI_00_H (REG_HDMI_BASE + 0x01)
940 #define REG_HDMI_01_L (REG_HDMI_BASE + 0x02)
941 #define REG_HDMI_01_H (REG_HDMI_BASE + 0x03)
942 #define REG_HDMI_02_L (REG_HDMI_BASE + 0x04)
943 #define REG_HDMI_02_H (REG_HDMI_BASE + 0x05)
944 #define REG_HDMI_03_L (REG_HDMI_BASE + 0x06)
945 #define REG_HDMI_03_H (REG_HDMI_BASE + 0x07)
946 #define REG_HDMI_04_L (REG_HDMI_BASE + 0x08)
947 #define REG_HDMI_04_H (REG_HDMI_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h938 #define REG_HDMI_00_L (REG_HDMI_BASE + 0x00)
939 #define REG_HDMI_00_H (REG_HDMI_BASE + 0x01)
940 #define REG_HDMI_01_L (REG_HDMI_BASE + 0x02)
941 #define REG_HDMI_01_H (REG_HDMI_BASE + 0x03)
942 #define REG_HDMI_02_L (REG_HDMI_BASE + 0x04)
943 #define REG_HDMI_02_H (REG_HDMI_BASE + 0x05)
944 #define REG_HDMI_03_L (REG_HDMI_BASE + 0x06)
945 #define REG_HDMI_03_H (REG_HDMI_BASE + 0x07)
946 #define REG_HDMI_04_L (REG_HDMI_BASE + 0x08)
947 #define REG_HDMI_04_H (REG_HDMI_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h938 #define REG_HDMI_00_L (REG_HDMI_BASE + 0x00)
939 #define REG_HDMI_00_H (REG_HDMI_BASE + 0x01)
940 #define REG_HDMI_01_L (REG_HDMI_BASE + 0x02)
941 #define REG_HDMI_01_H (REG_HDMI_BASE + 0x03)
942 #define REG_HDMI_02_L (REG_HDMI_BASE + 0x04)
943 #define REG_HDMI_02_H (REG_HDMI_BASE + 0x05)
944 #define REG_HDMI_03_L (REG_HDMI_BASE + 0x06)
945 #define REG_HDMI_03_H (REG_HDMI_BASE + 0x07)
946 #define REG_HDMI_04_L (REG_HDMI_BASE + 0x08)
947 #define REG_HDMI_04_H (REG_HDMI_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h938 #define REG_HDMI_00_L (REG_HDMI_BASE + 0x00)
939 #define REG_HDMI_00_H (REG_HDMI_BASE + 0x01)
940 #define REG_HDMI_01_L (REG_HDMI_BASE + 0x02)
941 #define REG_HDMI_01_H (REG_HDMI_BASE + 0x03)
942 #define REG_HDMI_02_L (REG_HDMI_BASE + 0x04)
943 #define REG_HDMI_02_H (REG_HDMI_BASE + 0x05)
944 #define REG_HDMI_03_L (REG_HDMI_BASE + 0x06)
945 #define REG_HDMI_03_H (REG_HDMI_BASE + 0x07)
946 #define REG_HDMI_04_L (REG_HDMI_BASE + 0x08)
947 #define REG_HDMI_04_H (REG_HDMI_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h938 #define REG_HDMI_00_L (REG_HDMI_BASE + 0x00)
939 #define REG_HDMI_00_H (REG_HDMI_BASE + 0x01)
940 #define REG_HDMI_01_L (REG_HDMI_BASE + 0x02)
941 #define REG_HDMI_01_H (REG_HDMI_BASE + 0x03)
942 #define REG_HDMI_02_L (REG_HDMI_BASE + 0x04)
943 #define REG_HDMI_02_H (REG_HDMI_BASE + 0x05)
944 #define REG_HDMI_03_L (REG_HDMI_BASE + 0x06)
945 #define REG_HDMI_03_H (REG_HDMI_BASE + 0x07)
946 #define REG_HDMI_04_L (REG_HDMI_BASE + 0x08)
947 #define REG_HDMI_04_H (REG_HDMI_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h938 #define REG_HDMI_00_L (REG_HDMI_BASE + 0x00)
939 #define REG_HDMI_00_H (REG_HDMI_BASE + 0x01)
940 #define REG_HDMI_01_L (REG_HDMI_BASE + 0x02)
941 #define REG_HDMI_01_H (REG_HDMI_BASE + 0x03)
942 #define REG_HDMI_02_L (REG_HDMI_BASE + 0x04)
943 #define REG_HDMI_02_H (REG_HDMI_BASE + 0x05)
944 #define REG_HDMI_03_L (REG_HDMI_BASE + 0x06)
945 #define REG_HDMI_03_H (REG_HDMI_BASE + 0x07)
946 #define REG_HDMI_04_L (REG_HDMI_BASE + 0x08)
947 #define REG_HDMI_04_H (REG_HDMI_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h938 #define REG_HDMI_00_L (REG_HDMI_BASE + 0x00)
939 #define REG_HDMI_00_H (REG_HDMI_BASE + 0x01)
940 #define REG_HDMI_01_L (REG_HDMI_BASE + 0x02)
941 #define REG_HDMI_01_H (REG_HDMI_BASE + 0x03)
942 #define REG_HDMI_02_L (REG_HDMI_BASE + 0x04)
943 #define REG_HDMI_02_H (REG_HDMI_BASE + 0x05)
944 #define REG_HDMI_03_L (REG_HDMI_BASE + 0x06)
945 #define REG_HDMI_03_H (REG_HDMI_BASE + 0x07)
946 #define REG_HDMI_04_L (REG_HDMI_BASE + 0x08)
947 #define REG_HDMI_04_H (REG_HDMI_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h938 #define REG_HDMI_00_L (REG_HDMI_BASE + 0x00)
939 #define REG_HDMI_00_H (REG_HDMI_BASE + 0x01)
940 #define REG_HDMI_01_L (REG_HDMI_BASE + 0x02)
941 #define REG_HDMI_01_H (REG_HDMI_BASE + 0x03)
942 #define REG_HDMI_02_L (REG_HDMI_BASE + 0x04)
943 #define REG_HDMI_02_H (REG_HDMI_BASE + 0x05)
944 #define REG_HDMI_03_L (REG_HDMI_BASE + 0x06)
945 #define REG_HDMI_03_H (REG_HDMI_BASE + 0x07)
946 #define REG_HDMI_04_L (REG_HDMI_BASE + 0x08)
947 #define REG_HDMI_04_H (REG_HDMI_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h938 #define REG_HDMI_00_L (REG_HDMI_BASE + 0x00)
939 #define REG_HDMI_00_H (REG_HDMI_BASE + 0x01)
940 #define REG_HDMI_01_L (REG_HDMI_BASE + 0x02)
941 #define REG_HDMI_01_H (REG_HDMI_BASE + 0x03)
942 #define REG_HDMI_02_L (REG_HDMI_BASE + 0x04)
943 #define REG_HDMI_02_H (REG_HDMI_BASE + 0x05)
944 #define REG_HDMI_03_L (REG_HDMI_BASE + 0x06)
945 #define REG_HDMI_03_H (REG_HDMI_BASE + 0x07)
946 #define REG_HDMI_04_L (REG_HDMI_BASE + 0x08)
947 #define REG_HDMI_04_H (REG_HDMI_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h938 #define REG_HDMI_00_L (REG_HDMI_BASE + 0x00)
939 #define REG_HDMI_00_H (REG_HDMI_BASE + 0x01)
940 #define REG_HDMI_01_L (REG_HDMI_BASE + 0x02)
941 #define REG_HDMI_01_H (REG_HDMI_BASE + 0x03)
942 #define REG_HDMI_02_L (REG_HDMI_BASE + 0x04)
943 #define REG_HDMI_02_H (REG_HDMI_BASE + 0x05)
944 #define REG_HDMI_03_L (REG_HDMI_BASE + 0x06)
945 #define REG_HDMI_03_H (REG_HDMI_BASE + 0x07)
946 #define REG_HDMI_04_L (REG_HDMI_BASE + 0x08)
947 #define REG_HDMI_04_H (REG_HDMI_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h938 #define REG_HDMI_00_L (REG_HDMI_BASE + 0x00)
939 #define REG_HDMI_00_H (REG_HDMI_BASE + 0x01)
940 #define REG_HDMI_01_L (REG_HDMI_BASE + 0x02)
941 #define REG_HDMI_01_H (REG_HDMI_BASE + 0x03)
942 #define REG_HDMI_02_L (REG_HDMI_BASE + 0x04)
943 #define REG_HDMI_02_H (REG_HDMI_BASE + 0x05)
944 #define REG_HDMI_03_L (REG_HDMI_BASE + 0x06)
945 #define REG_HDMI_03_H (REG_HDMI_BASE + 0x07)
946 #define REG_HDMI_04_L (REG_HDMI_BASE + 0x08)
947 #define REG_HDMI_04_H (REG_HDMI_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h938 #define REG_HDMI_00_L (REG_HDMI_BASE + 0x00)
939 #define REG_HDMI_00_H (REG_HDMI_BASE + 0x01)
940 #define REG_HDMI_01_L (REG_HDMI_BASE + 0x02)
941 #define REG_HDMI_01_H (REG_HDMI_BASE + 0x03)
942 #define REG_HDMI_02_L (REG_HDMI_BASE + 0x04)
943 #define REG_HDMI_02_H (REG_HDMI_BASE + 0x05)
944 #define REG_HDMI_03_L (REG_HDMI_BASE + 0x06)
945 #define REG_HDMI_03_H (REG_HDMI_BASE + 0x07)
946 #define REG_HDMI_04_L (REG_HDMI_BASE + 0x08)
947 #define REG_HDMI_04_H (REG_HDMI_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h938 #define REG_HDMI_00_L (REG_HDMI_BASE + 0x00)
939 #define REG_HDMI_00_H (REG_HDMI_BASE + 0x01)
940 #define REG_HDMI_01_L (REG_HDMI_BASE + 0x02)
941 #define REG_HDMI_01_H (REG_HDMI_BASE + 0x03)
942 #define REG_HDMI_02_L (REG_HDMI_BASE + 0x04)
943 #define REG_HDMI_02_H (REG_HDMI_BASE + 0x05)
944 #define REG_HDMI_03_L (REG_HDMI_BASE + 0x06)
945 #define REG_HDMI_03_H (REG_HDMI_BASE + 0x07)
946 #define REG_HDMI_04_L (REG_HDMI_BASE + 0x08)
947 #define REG_HDMI_04_H (REG_HDMI_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/wble/hal/maserati/wble/include/
H A Dwble_hwreg.h100 #define REG_HDMI_BASE 0x2700UL // 0x2700 - 0x27FF macro
/utopia/UTPA2-700.0.x/modules/wble/hal/mooney/wble/include/
H A Dwble_hwreg.h100 #define REG_HDMI_BASE 0x2700UL // 0x2700 - 0x27FF macro
/utopia/UTPA2-700.0.x/modules/wble/hal/maxim/wble/include/
H A Dwble_hwreg.h100 #define REG_HDMI_BASE 0x2700UL // 0x2700 - 0x27FF macro
/utopia/UTPA2-700.0.x/modules/wble/hal/messi/wble/include/
H A Dwble_hwreg.h100 #define REG_HDMI_BASE 0x2700UL // 0x2700 - 0x27FF macro
/utopia/UTPA2-700.0.x/modules/wble/hal/M7621/wble/include/
H A Dwble_hwreg.h100 #define REG_HDMI_BASE 0x2700UL // 0x2700 - 0x27FF macro
/utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/
H A Dwble_hwreg.h100 #define REG_HDMI_BASE 0x2700UL // 0x2700 - 0x27FF macro
/utopia/UTPA2-700.0.x/modules/wble/hal/mainz/wble/include/
H A Dwble_hwreg.h100 #define REG_HDMI_BASE 0x2700UL // 0x2700 - 0x27FF macro
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dwble_hwreg.h100 #define REG_HDMI_BASE 0x2700UL // 0x2700 - 0x27FF macro
/utopia/UTPA2-700.0.x/modules/wble/hal/M7821/wble/include/
H A Dwble_hwreg.h100 #define REG_HDMI_BASE 0x2700UL // 0x2700 - 0x27FF macro
/utopia/UTPA2-700.0.x/modules/wble/hal/maldives/wble/include/
H A Dwble_hwreg.h100 #define REG_HDMI_BASE 0x2700 // 0x2700 - 0x27FF macro

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