| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_hdmi.c | 1254 …W2BYTEMSK(REG_DVI_ATOP1_65_L, 0, BMASK(13:12));//Voltage threshold setting: 0x0 = 1.1v, 0x1 = 1.1… in Hal_HDMI_init()
3276 W2BYTE(REG_DVI_ATOP1_65_L, 0x0A00); in Hal_HDMI_Calibration()
3301 W2BYTE(REG_DVI_ATOP1_65_L, 0x0000); in Hal_HDMI_Calibration()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_hdmi.c | 1254 …W2BYTEMSK(REG_DVI_ATOP1_65_L, 0, BMASK(13:12));//Voltage threshold setting: 0x0 = 1.1v, 0x1 = 1.1… in Hal_HDMI_init()
3276 W2BYTE(REG_DVI_ATOP1_65_L, 0x0A00); in Hal_HDMI_Calibration()
3301 W2BYTE(REG_DVI_ATOP1_65_L, 0x0000); in Hal_HDMI_Calibration()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/ |
| H A D | hwreg_hdmi.h | 810 #define REG_DVI_ATOP1_65_L (REG_DVI_ATOP1_BASE + 0xCA) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/ |
| H A D | hwreg_hdmi.h | 810 #define REG_DVI_ATOP1_65_L (REG_DVI_ATOP1_BASE + 0xCA) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_hdmi.c | 4403 …W2BYTEMSK(REG_DVI_ATOP1_65_L, 0, BMASK(13:12));//Voltage threshold setting: 0x0 = 1.1v, 0x1 = 1.1… in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_hdmi.c | 4341 …W2BYTEMSK(REG_DVI_ATOP1_65_L, 0, BMASK(13:12));//Voltage threshold setting: 0x0 = 1.1v, 0x1 = 1.1… in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_hdmi.c | 4403 …W2BYTEMSK(REG_DVI_ATOP1_65_L, 0, BMASK(13:12));//Voltage threshold setting: 0x0 = 1.1v, 0x1 = 1.1… in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_hdmi.c | 4543 …W2BYTEMSK(REG_DVI_ATOP1_65_L, 0, BMASK(13:12));//Voltage threshold setting: 0x0 = 1.1v, 0x1 = 1.1… in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_hdmi.c | 4543 …W2BYTEMSK(REG_DVI_ATOP1_65_L, 0, BMASK(13:12));//Voltage threshold setting: 0x0 = 1.1v, 0x1 = 1.1… in Hal_HDMI_init()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_hdmi.h | 803 #define REG_DVI_ATOP1_65_L (REG_DVI_ATOP1_BASE + 0xCA) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_hdmi.h | 803 #define REG_DVI_ATOP1_65_L (REG_DVI_ATOP1_BASE + 0xCA) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_hdmi.h | 803 #define REG_DVI_ATOP1_65_L (REG_DVI_ATOP1_BASE + 0xCA) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_hdmi.h | 803 #define REG_DVI_ATOP1_65_L (REG_DVI_ATOP1_BASE + 0xCA) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | hwreg_hdmi.h | 803 #define REG_DVI_ATOP1_65_L (REG_DVI_ATOP1_BASE + 0xCA) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_hdmi.h | 803 #define REG_DVI_ATOP1_65_L (REG_DVI_ATOP1_BASE + 0xCA) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_hdmi.h | 803 #define REG_DVI_ATOP1_65_L (REG_DVI_ATOP1_BASE + 0xCA) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | hwreg_hdmi.h | 803 #define REG_DVI_ATOP1_65_L (REG_DVI_ATOP1_BASE + 0xCA) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | hwreg_hdmi.h | 803 #define REG_DVI_ATOP1_65_L (REG_DVI_ATOP1_BASE + 0xCA) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | hwreg_hdmi.h | 803 #define REG_DVI_ATOP1_65_L (REG_DVI_ATOP1_BASE + 0xCA) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | hwreg_hdmi.h | 803 #define REG_DVI_ATOP1_65_L (REG_DVI_ATOP1_BASE + 0xCA) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | hwreg_hdmi.h | 803 #define REG_DVI_ATOP1_65_L (REG_DVI_ATOP1_BASE + 0xCA) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/ |
| H A D | hwreg_hdmi.h | 803 #define REG_DVI_ATOP1_65_L (REG_DVI_ATOP1_BASE + 0xCA) macro
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