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Searched refs:REG_COMBO_PHY1_P3_11_L (Results 1 – 25 of 29) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhalMHL.c2338 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, BIT(4), BIT(4)); in _mhal_mhl_MHL30AutoEQSetting()
2599 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, bAutoEQEnable? 0: BIT(4), BIT(4)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhalMHL.c2338 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, BIT(4), BIT(4)); in _mhal_mhl_MHL30AutoEQSetting()
2599 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, bAutoEQEnable? 0: BIT(4), BIT(4)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhalMHL.c2338 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, BIT(4), BIT(4)); in _mhal_mhl_MHL30AutoEQSetting()
2599 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, bAutoEQEnable? 0: BIT(4), BIT(4)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhalMHL.c2338 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, BIT(4), BIT(4)); in _mhal_mhl_MHL30AutoEQSetting()
2599 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, bAutoEQEnable? 0: BIT(4), BIT(4)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhalMHL.c2338 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, BIT(4), BIT(4)); in _mhal_mhl_MHL30AutoEQSetting()
2599 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, bAutoEQEnable? 0: BIT(4), BIT(4)); in _mhal_mhl_MHL30AutoEQEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c1039 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, bHDMI20Flag? 0: BIT(4), BIT(4)); in _Hal_tmds_HDMI20AutoEQSetting()
1259 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, BIT(4) | TMDS_CONTINUE_START, BIT(4) | BMASK(3:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c1050 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, bHDMI20Flag? 0: BIT(4), BIT(4)); in _Hal_tmds_HDMI20AutoEQSetting()
1270 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, BIT(4) | TMDS_CONTINUE_START, BIT(4) | BMASK(3:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c1089 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, bHDMI20Flag? 0: BIT(4), BIT(4)); in _Hal_tmds_HDMI20AutoEQSetting()
1324 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, BIT(4) | TMDS_CONTINUE_START, BIT(4) | BMASK(3:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c1050 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, bHDMI20Flag? 0: BIT(4), BIT(4)); in _Hal_tmds_HDMI20AutoEQSetting()
1270 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, BIT(4) | TMDS_CONTINUE_START, BIT(4) | BMASK(3:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c1111 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, bHDMI20Flag? 0: BIT(4), BIT(4)); in _Hal_tmds_HDMI20AutoEQSetting()
1331 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, BIT(4) | TMDS_CONTINUE_START, BIT(4) | BMASK(3:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c1089 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, bHDMI20Flag? 0: BIT(4), BIT(4)); in _Hal_tmds_HDMI20AutoEQSetting()
1324 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, BIT(4) | TMDS_CONTINUE_START, BIT(4) | BMASK(3:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c1042 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, bHDMI20Flag? 0: BIT(4), BIT(4)); in _Hal_tmds_HDMI20AutoEQSetting()
1262 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, BIT(4) | TMDS_CONTINUE_START, BIT(4) | BMASK(3:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c1042 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, bHDMI20Flag? 0: BIT(4), BIT(4)); in _Hal_tmds_HDMI20AutoEQSetting()
1262 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, BIT(4) | TMDS_CONTINUE_START, BIT(4) | BMASK(3:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c1177 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, bHDMI20Flag? 0: BIT(4), BIT(4)); in _Hal_tmds_HDMI20AutoEQSetting()
1424 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, BIT(4) | TMDS_CONTINUE_START, BIT(4) | BMASK(3:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c1042 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, bHDMI20Flag? 0: BIT(4), BIT(4)); in _Hal_tmds_HDMI20AutoEQSetting()
1262 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, BIT(4) | TMDS_CONTINUE_START, BIT(4) | BMASK(3:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c1177 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, bHDMI20Flag? 0: BIT(4), BIT(4)); in _Hal_tmds_HDMI20AutoEQSetting()
1424 W2BYTEMSK(REG_COMBO_PHY1_P3_11_L, BIT(4) | TMDS_CONTINUE_START, BIT(4) | BMASK(3:0)); in _Hal_tmds_AutoEQInitialSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h3337 #define REG_COMBO_PHY1_P3_11_L (REG_COMBO_PHY1_P3_BASE + 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h3339 #define REG_COMBO_PHY1_P3_11_L (REG_COMBO_PHY1_P3_BASE + 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h3337 #define REG_COMBO_PHY1_P3_11_L (REG_COMBO_PHY1_P3_BASE + 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h3339 #define REG_COMBO_PHY1_P3_11_L (REG_COMBO_PHY1_P3_BASE + 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h3337 #define REG_COMBO_PHY1_P3_11_L (REG_COMBO_PHY1_P3_BASE + 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h3339 #define REG_COMBO_PHY1_P3_11_L (REG_COMBO_PHY1_P3_BASE + 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h3339 #define REG_COMBO_PHY1_P3_11_L (REG_COMBO_PHY1_P3_BASE + 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h3337 #define REG_COMBO_PHY1_P3_11_L (REG_COMBO_PHY1_P3_BASE + 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h3338 #define REG_COMBO_PHY1_P3_11_L (REG_COMBO_PHY1_P3_BASE + 0x22) macro

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