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Searched refs:REG_COMBO_PHY1_P3_00_L (Results 1 – 20 of 20) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_mux.c337 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
371 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
405 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
439 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
472 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_mux.c337 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
371 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
405 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
439 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
472 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_mux.c337 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
371 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
405 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
439 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
472 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_mux.c337 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
371 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
405 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
439 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
472 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_mux.c337 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
371 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
405 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
439 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
472 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_mux.c337 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
371 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
405 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
439 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
472 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_mux.c337 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
371 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
405 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
439 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
472 … W2BYTE(REG_COMBO_PHY1_P3_00_L, 0x0007);// [3]: reg_atop_pd_ldo; [2:0]: reg_atop_pd_osc in Hal_SC_mux_set_dvi_mux()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h3303 #define REG_COMBO_PHY1_P3_00_L (REG_COMBO_PHY1_P3_BASE + 0x00) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h3305 #define REG_COMBO_PHY1_P3_00_L (REG_COMBO_PHY1_P3_BASE + 0x00) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h3303 #define REG_COMBO_PHY1_P3_00_L (REG_COMBO_PHY1_P3_BASE + 0x00) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h3305 #define REG_COMBO_PHY1_P3_00_L (REG_COMBO_PHY1_P3_BASE + 0x00) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h3303 #define REG_COMBO_PHY1_P3_00_L (REG_COMBO_PHY1_P3_BASE + 0x00) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h3305 #define REG_COMBO_PHY1_P3_00_L (REG_COMBO_PHY1_P3_BASE + 0x00) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h3305 #define REG_COMBO_PHY1_P3_00_L (REG_COMBO_PHY1_P3_BASE + 0x00) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h3303 #define REG_COMBO_PHY1_P3_00_L (REG_COMBO_PHY1_P3_BASE + 0x00) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h3304 #define REG_COMBO_PHY1_P3_00_L (REG_COMBO_PHY1_P3_BASE + 0x00) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h3303 #define REG_COMBO_PHY1_P3_00_L (REG_COMBO_PHY1_P3_BASE + 0x00) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h3303 #define REG_COMBO_PHY1_P3_00_L (REG_COMBO_PHY1_P3_BASE + 0x00) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h3303 #define REG_COMBO_PHY1_P3_00_L (REG_COMBO_PHY1_P3_BASE + 0x00) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h3303 #define REG_COMBO_PHY1_P3_00_L (REG_COMBO_PHY1_P3_BASE + 0x00) macro