| /utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/ |
| H A D | halMHL.c | 2321 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQSetting()
2574 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, bAutoEQEnable? 0: BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQEnable()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/ |
| H A D | halMHL.c | 2321 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQSetting()
2574 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, bAutoEQEnable? 0: BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQEnable()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/ |
| H A D | halMHL.c | 2321 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQSetting()
2574 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, bAutoEQEnable? 0: BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQEnable()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/ |
| H A D | halMHL.c | 2321 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQSetting()
2574 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, bAutoEQEnable? 0: BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQEnable()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/ |
| H A D | halMHL.c | 2321 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQSetting()
2574 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, bAutoEQEnable? 0: BIT(5), BIT(5)); in _mhal_mhl_MHL30AutoEQEnable()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_hdmi.c | 1025 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1244 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_hdmi.c | 1036 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1255 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_hdmi.c | 1075 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1309 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_hdmi.c | 1036 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1255 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_hdmi.c | 1097 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1316 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_hdmi.c | 1075 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1309 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_hdmi.c | 1028 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1247 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_hdmi.c | 1028 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1247 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_hdmi.c | 1163 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1409 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_hdmi.c | 1028 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1247 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_hdmi.c | 1163 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, bHDMI20Flag? 0: BIT(5), BIT(5)); in _Hal_tmds_HDMI20AutoEQSetting()
1409 W2BYTEMSK(REG_COMBO_PHY1_P2_49_L, BIT(5), BIT(5)); in _Hal_tmds_AutoEQInitialSetting()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_hdmi.h | 2933 #define REG_COMBO_PHY1_P2_49_L (REG_COMBO_PHY1_P2_BASE + 0x92) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_hdmi.h | 2935 #define REG_COMBO_PHY1_P2_49_L (REG_COMBO_PHY1_P2_BASE + 0x92) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_hdmi.h | 2933 #define REG_COMBO_PHY1_P2_49_L (REG_COMBO_PHY1_P2_BASE + 0x92) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_hdmi.h | 2935 #define REG_COMBO_PHY1_P2_49_L (REG_COMBO_PHY1_P2_BASE + 0x92) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | hwreg_hdmi.h | 2933 #define REG_COMBO_PHY1_P2_49_L (REG_COMBO_PHY1_P2_BASE + 0x92) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_hdmi.h | 2935 #define REG_COMBO_PHY1_P2_49_L (REG_COMBO_PHY1_P2_BASE + 0x92) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_hdmi.h | 2935 #define REG_COMBO_PHY1_P2_49_L (REG_COMBO_PHY1_P2_BASE + 0x92) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | hwreg_hdmi.h | 2933 #define REG_COMBO_PHY1_P2_49_L (REG_COMBO_PHY1_P2_BASE + 0x92) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | hwreg_hdmi.h | 2934 #define REG_COMBO_PHY1_P2_49_L (REG_COMBO_PHY1_P2_BASE + 0x92) macro
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